Datasheet FDS9934C Datasheet (Fairchild)

Page 1
FDS9934C
FDS9934C
Complementary
March 2006
Features
These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state ressitance and yet maintain superior switching performance.
These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
D2
D
D2
D
D1
D
D1
D
SO-8
Pin 1
SO-8
S1
Absolute Maximum Ratings T
V
DSS
V
GSS
I
D
Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous (Note 1a)
G2
S2
G
G1
S
S
S
=25oC unless otherwise noted
A
– Pulsed
P
D
Power Dissipation for Dual Operation 2 Power Dissipation for Single Operation (Note 1a) 1.6
TJ, T
STG
Operating and Storage Junction Temperature Range –55 to +150
• Q1: 6.5 A, 20 V. R R
• Q2: –5 A, –20 V,R
R
Q2
5 6
Q1
7 8
Q1 Q2
±10
6.5 –5
(Note 1b) (Note 1c)
= 30 mΩ @ VGS = 4.5 V
DS(ON)
= 43 mΩ @ VGS = 2.5 V.
DS(ON)
= 55 mΩ @ VGS = –4.5 V
DS(ON)
= 90 mΩ @ VGS = –2.5 V
DS(ON)
Ratings UnitsSymbol Parameter
20 –20
±12
20 –30
1
0.9
4 3 2 1
V V A
W
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 Thermal Resistance, Junction-to-Case (Note 1) 40
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS9934C FDS9934C 13’’ 12mm 2500 units
2006 Fairchild Semiconductor Corporation
FDS9934C Rev D(W)
°C/W °C/W
Page 2
Electrical Characteristics T
FDS9934C
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics
BV
DSS
∆BVDSS ∆T
I
DSS
I
GSS
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient
J
Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA VGS = 0 V, ID = –250 µA
ID = 250 µA, Referenced to 25°C ID = –250 µA, Referenced to 25°C VDS = 16V, VGS = 0 V VDS = –16V, VGS = 0 V
Gate-Body Leakage VGS = ±8 V, VDS = 0 V
VGS = ±12 V, VDS = 0 V
Q1Q2 20
–20 Q1 Q2
Q1 Q2 Q1 Q2
14
–14
1
–1 ±100 ±100
V
mV/°C
µA nA
V
GS(th)
∆VGS(th) ???∆T
J
R
DS(on)
Gate Threshold Voltage VDS = VGS, ID = 250 µA Gate Threshold Voltage
Temperature Coefficient Static Drain-Source
On-Resistance
I g
D(on)
FS
On-State Drain Current VGS = 4.5V, VDS = 5 V Forward Transcoductance VDS = –5 V, ID = 6.5 A
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance Q1 Output Capacitance Q1 Reverse Transfer Capacitance Gate Resistance VGS = 15 mV, f = 1.0 MHz Q1
VDS = VGS, ID = 250 µA ID = 250 uA, Referenced to 25°C ID = 250 uA, Referenced to 25°C
VGS = 4.5 V, ID = 6.5 A VGS = 2.5 V, ID = 5.4 A V
= 4.5 V, ID =6.5A, TJ=125°C
GS
VGS = –4.5 V, ID = –3.2 A VGS = –2.5 V, ID = –1.0 A V
= –4.5 V,ID = –3.2 A, TJ=125°C
GS
VGS = –4.5 V, VDS = – 5 V VDS = 5 V, ID = – 5.5 A
Q1 VDS = 10V, VGS = 0 V, f = 1.0 MHz Q2 VDS = –10 V, VGS = 0 V, f = 1.0 MHz
Q1Q20.6
–0.6 1–0.9 Q1 Q2
–3 3
Q1 25
35 35
Q2 43
64 55
Q1Q2 15
–16 Q1 Q2
22 14
650
Q2
955
150 Q2 Q1 Q2
215
85
115
1.4
Q2
4.9
1.5
–1.2
30 43 50
55 90 76
V
mV/°C
mΩ
mΩ
A S
S
pF pF pF
Ω
FDS9934C Rev D(W)
Page 3
Electrical Characteristics (continued) T
FDS9934C
= 25°C unless otherwise noted
A
Symbol Parameter Test Conditions Type Min Typ Max Units
Switching Characteristics (Note 2)
t t t t Q Q Q
d(on)
r
d(off)
f
g
gs
gd
Turn-On Delay Time Q1 Turn-On Rise Time Q1
Q1 VDD = 10 V, ID = 1 A, VGS = 4.5V, R
GEN
= 6Ω
Q2 Q2
Turn-Off Delay Time Q1 Turn-Off Fall Time
Q2 VDD = –6V, ID = –1A, VGS = –4.5V, R
GEN
= 6Ω
Q2 Q1 Q2
Total Gate Charge Q1
Q1 VDS = 10 V, ID = 3 A, VGS = 4.5V
Q2
Gate-Source Charge Q1
Q2
Gate-Drain Charge
Q2 VDS = –6 V, ID = –3.2 A,VGS = –4.5 V
Q1 Q2
8
1629ns
16
9
1718ns
9
15
2641ns
25
4
9
19
6.2
8.7912
1.2
2.1
1.7
2.1
9
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
t
rr
Q
rr
Notes:
1. R
θJA
the drain pins. R
Maximum Continuous Drain-Source Diode Forward Current Q1
Q2 Drain-Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
VGS = 0 V, IS = 1.3 A (Note 2) VGS = 0 V, IS = -2.0 A (Note 2) Q1 IF = 6.5 A, diF/dt = 100 A/µs Q2 IF = -3.2 A, diF/dt = 100 A/µs
is determined by the user's board design.
θCA
Q1
Q2
Q1
Q2
Q1
Q2
0.73 –0.8
1.3
–1.3
1.2
–1.2 15 20
5 7
ns nC nC nC
A
V nS nC
a) 78°C/W when
mounted on a
0.5 in2 pad of 2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
b) 125°C/W when
mounted on a .02 in pad of 2 oz copper
2
c) 135°C/W when mounted on a
minimum pad.
FDS9934C Rev D(W)
Page 4
Typical Characteristics: Q1 (N-Channel)
3.5
2.5V
2.0V
3.0V
2.5V
4.0V
FDS9934C
20
16
12
8
, DRAIN CURRENT (A)
D
I
4
0
VGS = 4.5V
0 0.5 1 1.5 2
VDS, DRAIN TO SOURCE VOLTAGE (V)
2.4 VGS = 2.0V
2.2
2
1.8
1.6
, NORMALIZED
1.4
DS(ON)
R
1.2
DRAIN-SOURCE ON-RESISTANCE
1
0.8
0 5 10 15 20
3.0V
ID, DIRAIN CURRENT (A)
3.5V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
ID = 6.5A
VGS = 4.5V
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
0.11
0.09
0.07
0.05
, ON-RESISTANCE (OHM)
0.03
DS(ON)
R
0.01 1 2 3 4 5
TA = 25oC
VGS, GATE TO SOURCE VOLTAGE (V)
TA = 125oC
4.5V
ID = 3.25A
Figure 3. On-Resistance Variation with
Temperature.
20
VDS = 5V
15
10
, DRAIN CURRENT (A)
D
I
5
0
1 1.5 2 2.5 3
VGS, GATE TO SOURCE VOLTAGE (V)
TA = -55oC
125oC
25oC
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS = 0V
10
1
0.1
0.01
0.001
, REVERSE DRAIN CURRENT (A)
S
I
0.0001 0 0.2 0.4 0.6 0.8 1 1.2
TA = 125oC
25oC
-55oC
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS9934C Rev D(W)
Page 5
Typical Characteristics: Q1 (N-Channel)
100µs
1ms
FDS9934C
5
ID = 3 A
4
3
2
1
, GATE-SOURCE VOLTAGE (V)
GS
V
0
0 1 2 3 4 5 6 7 8
Qg, GATE CHARGE (nC)
VDS = 5V
10V
15V
1000
800
600
400
CAPACITANCE (pF)
200
C
rss
0
0 5 10 15 20
C
oss
VDS, DRAIN TO SOURCE VOLTAGE (V)
C
iss
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
LIMIT
10
, DRAIN CURRENT (A)
0.1
D
I
0.01
DS(ON)
10ms
100ms
1
VGS = 4.5V
SINGLE PULSE
R
= 135oC/W
θJA
TA = 25oC
0.01 0.1 1 10 100
VDS, DRAIN-SOURCE VOLTAGE (V)
1s
10s
DC
50
40
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.001 0.01 0.1 1 10 100
t1, TIME (sec)
f = 1 MHz VGS = 0 V
SINGLE PULSE R
= 135°C/W
θJA
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
FDS9934C Rev D(W)
Page 6
Typical Characteristics: Q2 (P-Channel)
FDS9934C
30
VGS = -4.5V
-4.0V
20
10
, DRAIN CURRENT (A)
D
-I
0
0 1 2 3 4 5
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-3.5V
-3.0V
-2.5V
-2.0V
1.8
VGS=-2.5V
1.6
1.4
, NORMALIZED
1.2
DS(ON)
R
1
DRAIN-SOURCE ON-RESISTANCE
0.8 0 6 12 18 24 30
-3.0V
-3.5V
-ID, DRAIN CURRENT (A)
-4.0V
Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
1.4
ID = -5A
1.3
VGS = -4.5V
1.2
1.1
, NORMALIZED
1
DS(ON)
R
0.9
DRAIN-SOURCE ON-RESISTANCE
0.8
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
0.14
0.12
0.1
0.08
0.06
, ON-RESISTANCE (OHM)
DS(ON)
R
0.04
0.02
TA = 25oC
0 2 4 6 8 10
-VGS, GATE TO SOURCE VOLTAGE (V)
TA = 125oC
-4.5V
ID = -2.5A
Figure 13. On-Resistance Variation with
Temperature.
30
VDS = -5V
25
20
15
10
, DRAIN CURRENT (A)
D
-I
5
0
0 1 2 3 4 5
-VGS, GATE TO SOURCE VOLTAGE (V)
TA = -55oC
125oC
25oC
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS =0V
10
1
TA = 125oC
0.1
0.01
, REVERSE DRAIN CURRENT (A)
0.001
S
-I
0.0001 0 0.4 0.8 1.2 1.6
25oC
-55oC
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS9934C Rev D(W)
Page 7
Typical Characteristics: Q2 (P-Channel)
1ms
P(pk)
SINGLE PULSE
0.01
0.02
0.05
0.1
FDS9934C
5
ID = -5A
4
3
2
, GATE-SOURCE VOLTAGE (V)
1
GS
-V
0
0 2 4 6 8 10
Qg, GATE CHARGE (nC)
VDS = -4V
-6V
-8V
1600
1200
C
iss
800
C
CAPACITANCE (pF)
400
C
rss
0
0 4 8 12 16 20
oss
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
100ms
1s
1
, DRAIN CURRENT (A)
D
-I
VGS = -4.5V
SINGLE PULSE
0.1 R
= 135oC/W
θJA
TA = 25oC
0.01
0.1 1 10 100
-VDS, DRAIN-SOURCE VOLTAGE (V)
10s
DC
100µs
10ms
50
40
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
SINGLE PULSE R
= 135°C/W
θ
JA
TA = 25°C
f = 1 MHz VGS = 0 V
Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
0.2
R
(t) = r(t) * R
θJA
R
θJA
= 135oC/W
0.1
t
1
t
0.01
2
TJ - TA = P * R
Duty Cycle, D = t1 / t
r(t), NORMALIZED EFFECTIVE
0.001
TRANSIENT THERMAL RESISTANCE
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
θJA
(t)
θJA
2
FDS9934C Rev D(W)
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ ActiveArray™ Bottomless™
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Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™
2
E
CMOS™ EnSigna™ FACT™
FACT Quiet Series™
Across the board. Around the world.™ The Power Franchise Programmable Active Droop™
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CONVEY ANY LICENSE UNDER ITS PA TENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
®
FAST FAST r™
LittleFET™
FRFET™ GlobalOptoisolator™ GTO™ HiSeC™
2
I
C™ i-Lo™ ImpliedDisconnect™
IntelliMAX™
®
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STA TUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I18
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