Datasheet FDS6982 Datasheet (Fairchild Semiconductor)

FDS6982

(

)

Dual N-Channel, Notebook Power Supply MOSFET

General Description

This part is designed to replace two single SO-8 MOSFET s in synchronous DC:DC power supplies that provide the various peripheral voltage rails required in notebook computers and other battery powered electronic devices. FDS6982 contains two unique 30V, N-channel, logic level, PowerTrenchTM MOSFETs designed to maximize power conversion efficiency.

The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the low-side switch (Q2) is optimized for low conduction (less than 20mΩ

at VGS = 4.5V).

Applications

• Battery powered synchronous DC:DC converters.

• Embedded DC:DC conversion.

Features

• Q2: 8.6A, 30V. R

R

• Q1: 6.3A, 30V. R

R

• Fast switching speed.

• Low gate charge (Q1 typical = 8.5nC).

• High performance trench technology for extremely

low R

DS(ON)

.

= 0.015 Ω @ V

DS(on)

= 0.020 Ω @ V

DS(on)

= 0.028 Ω @ V

DS(on)

= 0.035 Ω @ V

DS(on)

June 1999

= 10V

GS

= 4.5V

GS

= 10V

GS

= 4.5V

GS

FDS6982

D2

D1

G2

S2

SO-8

G1

S1

Absolute Maximum Ratings

Symbol Parameter

V

DSS

V

GSS

I

D

P

D

TJ, T

stg

Drain-Source Voltage 30 30 V Gate-Source Voltage Drain Current - Continuous

- Pulsed 30 20 Power Dissipation for Dual Operation 2 W Power Dissipation for Single Operation

Operating and Storage Junction Temperature Range -55 to +150

Thermal Characteristics

R

JA

θ

R

JC

θ

Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case

TA = 25°C unless otherwise noted

(Note 1a)

Note 1a

(Note 1b) (Note 1c)

(Note 1a) (Note 1)

5

Q1

6

7

Q2

8

Q2

20

±

8.6 6.3 A

1.6 1

0.9

78 40

4

3 2 1

Q1

20 V

±

Units

° °

C

°

C/W C/W

Package Marking and Ordering Information

Device M a rk in g Device Ree l S iz e Tape W id th Quantity

FDS6982 FDS6982 13” 12mm 2500 units

1999 Fairchild Semiconductor Corporation

FDS6982, Rev. C

FDS6982

Electrical Characteristics

TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions TypeMin TypMax Units

Off Characteristics

BV

DSS

BV

∆

T

∆

I

DSS

I

GSSF

I

GSSR

On Characteristics

V

GS(th)

V

∆

T

∆

R

DS(on)

I

D(on)

g

FS

Drain-Source Breakdown Voltage

Breakdown Voltage

DSS

Temperature Coefficient

J

Zero Gate Voltage Drain

VGS = 0 V, ID = 250 µAQ2

Q13030

ID = 250 µA, Referenced to 25°CQ2Q127

26

VDS = 24 V, VGS = 0 V All 1

Current Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V All 100 nA

Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V All -100 nA

(Note 2)

Gate Threshold Voltage VDS = VGS, ID = 250 µAQ2

Q111

Gate Threshold Voltage Temperature Coefficient

J

Static Drain-Source On-Resistance

ID = 250 µA, Referenced to 25°CQ2Q1-5

VGS = 10 V, ID = 8.6 A V

= 10 V, ID = 8.6 A, TJ = 125°C

GS

= 4.5 V, ID = 7.5 A

V

GS

V

= 10 V, ID = 6.3 A

GS

V

= 10 V, ID = 6.3 A, TJ = 125°C

GS

= 4.5 V, ID = 5.6 A

V

GS

Q2

Q1

2.2

1.633

-4

0.012

0.018

0.016

0.021

0.038

0.028

On-State Drain Current VGS = 10 V, VDS = 5 V Q2Q130

20

Forward Transconductance VDS = 5 V, ID = 8.6 A

V

= 5 V, ID = 6.3 A

DS

Q2 Q1

50 40

0.015

0.024

0.020

0.028

0.047

0.035

V

mV/°C

A

µ

V

mV/°C

Ω

A

S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Q2

Output Capacitance Q2

Reverse Transfer Capacitance

= 10 V, VGS = 0 V,

V

DS

f = 1.0 MHz

Q1

Q1 Q2 Q1

2085

760 420 160 160

70

pF

FDS6982, Rev. C

FDS6982

yp

Electrical Characteristics

(continued)

TA = 25°C unless otherwise noted

Symbol Parameter Test Conditions Type Min T

(Note 2)

Switching Characteristics

t

d(on)

r

Turn-On Delay Time Q2

Turn-On Rise Time Q2

V

= 15 V, ID = 1 A,

DD

V

= 10V, R

GS

GEN

= 6

Ω

Q1

t

d(off)

Turn-Off Delay Time Q2

Q1

t

f

Turn-Off Fall Time

Q2 Q1

Q

g

Q

gs

Q

gd

Total Gate Charge Q2

Q2

= 15 V, ID = 8.6 A, VGS = 5 V

V

DS

Q1

Gate-Source Charge Q2

Gate-Drain Charge

Q1 V

= 15 V, ID = 6.3 A,VGS = 5 V

DS

Q1 Q2 Q1

Drain-Source Diode Characteristics and Maximum Ratings

I

S

V

SD

Notes:

1. R

θJA

the drain pins. R

Maximum Continuous Drain-Source Diode Forward Current Q2

Q1 Drain-Source Diode Forward Voltage

is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of

is guaranteed by design while R

θJC

VGS = 0 V, IS = 1.3 A VGS = 0 V, IS = 1.3 A

is determined by the user's board design.

θJA

(Note 2) (Note 2)

Q2

Q1

Max Units

15102718ns

11142025ns

36215834ns

1872914ns

18.5

8.52612

7.3

2.4

6.2

3.1

1.3

0.72

0.74

1.2

nC

A

V

a) 78° C/W when

mounted on a 0.5 in pad of 2 oz. copper.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

2

b) 125° C/W when

mounted on a 0.02 in pad of 2 oz. copper.

2

c) 135° C/W when

mounted on a 0.003 in pad of 2 oz. copper.

2

FDS6982, Rev. C

Typical Characteristics: Q2

FDS6982

50

VGS = 10V

5.0V

40

30

20

10

0

01234

4.5V

4.0V

V

, DRAIN-SOURCE VOLTAGE (V)

DS

3.5V

3.0V

Figure 1. On-Region Characteristics.

1.6 ID = 8.6A

V

= 10V

GS

1.4

1.2

1

0.8

2

1.8

VGS = 4.0V

1.6

1.4

1.2

1

0.8 0 1020304050

4.5V

5.0V

, DRAIN CURRENT (A)

I

D

6.0V

7.0V 10V

Figure 2. On-Resistance Variation

with Drain Current and Gate V oltage.

0.04

0.03

0.02

0.01

TA = 125oC

TA = 25oC

ID = 4.5A

0.6

-50 -25 0 25 50 75 100 125 150

, JUNCTION TEMPERATURE (oC)

T

J

Figure 3. On-Resistance Variation

with Temperature.

50

VDS = 5V

40

30

20

10

0

123456

V

, GATE TO SOURCE VOLTAGE (V)

GS

TA = -55oC

25oC

125oC

Figure 5. Transfer Characteristics.

0

246810

, GATE TO SOURCE VOLTAGE (V)

V

GS

Figure 4. On-Resistance Variation

with Gate-to-Source Voltage.

100

VGS = 0V

10

1

0.1

0.01

0.001

0.0001

TA = 125oC

25oC

-55oC

0 0.4 0.8 1.2 1.6

, BODY DIODE FORWARD VOLTAGE (V)

V

SD

Figure 6. Body Diode Forward Voltage

Variation with Source Current

and Temperature.

FDS6982, Rev. C

T ypical Characteristics: Q2 (continued)

FDS6982

10

ID = 8.6A

8

6

4

2

0

0 5 10 15 20 25 30 35

Q

, GATE CHARGE (nC)

g

VDS = 5V

15V

Figure 7. Gate-Charge Characteristics.

100

R

LIMIT

DS(ON)

10

100ms

1

VGS = 10V

0.1

SINGLE PULSE

R

= 135oC/W

JA

θ

= 25oC

T

A

0.01

0.1 1 10 100

, DRAIN-SOURCE VOLTAGE (V)

V

DS

1s

10s

DC

10ms

1ms

100µs

Figure 9. Maximum Safe Operating Area.

10V

3000

2500

C

2000

1500

1000

500

0

0 5 10 15 20 25 30

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

ISS

C

OSS

C

RSS

f = 1MHz

V

= 0 V

GS

Figure 8. Capacitance Characteristics.

30

25

20

15

10

5

0

0.01 0.1 1 10 100 1000

SINGLE PULSE TIME (SEC)

SINGLE PULSE R

= 135oC/W

JA

θ

o

C

TA = 25

Figure 10. Single Pulse Maximum

Power Dissipation.

FDS6982, Rev. C

Typical Characteristics: Q1

FDS6982

40

30

20

10

VGS = 10V

6.0V

4.5V

4.0V

3.5V

3.0V

0

01234

, DRAIN-SOURCE VOLTAGE (V)

V

DS

2.5V

Figure 11. On-Region Characteristics.

1.6 ID = 6.3A

V

= 10V

GS

1.4

1.2

1

0.8

2

1.8

1.6

1.4

1.2

1

0.8

VGS = 3.5V

4.0V

4.5V

5.0V

6.0V

0 10203040

, DRAIN CURRENT (A)

I

D

10V

Figure 12. On-Resistance Variation

with Drain Current and Gate V oltage.

0.08

0.06

0.04

0.02

TA = 125oC

TA = 25oC

ID = 3.5A

0.6

-50 -25 0 25 50 75 100 125 150

, JUNCTION TEMPERATURE (oC)

T

J

Figure 13. On-Resistance Variation

with Temperature.

40

VDS = 5V

30

20

10

0

123456

V

GS

TA = -55oC

, GATE TO SOURCE VOLTAGE (V)

25oC

125oC

Figure 15. Transfer Characteristics.

0

246810

V

, GATE TO SOURCE VOLTAGE (V)

GS

Figure 14. On-Resistance Variation

with Gate-to-Source Voltage.

100

VGS = 0V

10

1

0.1

0.01

0.001

0.0001 0 0.4 0.8 1.2 1.6

TA = 125oC

25oC

-55oC

, BODY DIODE FORWARD VOLTAGE (V)

V

SD

Figure 16. Body Diode Forward Voltage

Variation with Source Current

and Temperature.

FDS6982, Rev. C

T ypical Characteristics: Q1 (continued)

FDS6982

10

ID = 6.3A

8

6

4

2

0

0481216

Q

, GATE CHARGE (nC)

g

VDS = 5V 10V

15V

Figure 17. Gate-Charge Characteristics.

100

10ms

1ms

100µs

R

LIMIT

DS(ON)

10

100ms

1

VGS = 10V

0.1

SINGLE PULSE

R

= 135oC/W

JA

θ

= 25oC

T

A

0.01

0.1 1 10 100

, DRAIN-SOURCE VOLTAGE (V)

V

DS

1s

10s

DC

Figure 19. Maximum Safe Operating Area.

1200

1000

800

600

400

200

0

0 5 10 15 20 25 30

, DRAIN TO SOURCE VOLTAGE (V)

V

DS

C

ISS

C

OSS

C

RSS

f = 1MHz V

= 0 V

GS

Figure 18. Capacitance Characteristics.

30

25

20

15

10

5

0

0.01 0.1 1 10 100 1000

SINGLE PULSE TIME (SEC)

SINGLE PULSE R

= 135oC/W

JA

θ

o

C

TA = 25

Figure 20. Single Pulse Maximum

Power Dissipation.

FDS6982, Rev. C

Typical Characteristics: Q1 & Q2 (continued)

FDS6982

1

0.5

0.2

0.1

0.05

0.02

0.01

0.005

r(t), NORMALIZED EFFECTIVE

0.002

TRANSIENT THERMAL RESISTANCE

0.001

0.0001 0.001 0.01 0.1 1 10 100 300

D = 0.5

0.2

0.1

0.05

0.02

0.01 Single Pulse

t , TIME (sec)

1

R (t) = r(t) * R

θ

JA

R = 135°C/W

JA

θ

P(pk)

t

1

t

2

T - T = P * R (t)

J

A

Duty Cycle, D = t /t

JA

θ

1

Figure 21. Transient Thermal Response Curve.

θ

JA

2

FDS6982, Rev. C

SO-8 Tape and Reel Data and Package Dimensions

SOIC(8lds) Packaging Configuration: Figure 1.0

N

ELECTROSTATIC

SENSITIVE DEVICES

DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS

TNR DATE

PT NUMBER

PEEL STRENGTH MIN ______________gms

MAX _____________ gms

ESD Label

F63TNR Label

Antistatic Cover Tape

Conductive Embossed

Carrier Tape

Customized Label

SOIC (8lds) Packaging Information

Packaging Option Packaging type

Qty per Reel/Tube/Bag 2,500 95 200 Reel Size Box Dimension (mm) 343x64x343 530x130x83 76x102x127 Max qty per Box 5,000 30,000 1,000 Weight per unit (gm) 0.0774 0.0774 0.0774 0.0774 Weight per Reel (kg) 0.6060 - - 0.1182

Note/Comments Bulk

Standard

(no flow code)

TNR

13” Dia

L86Z S62Z

Rail/Tube-Bag

184x187x47

F63TNR Label sample

LOT: CBVK741B019

FSID: FDS9953A

D/C1: D9842 QTY1: SPEC REV: QARV: D/C2: QTY2: CPN:

QTY: 2500

SPEC:

(F63TNR)2

SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0

D84Z

TNR

500

7” Dia

2,500

F63TNLabel

Pin 1

ESD Label

831N

F

852

831N

F

852

SOIC-8 Unit Orientation

343mm x 342mm x 64mm

Standard Intermediate box

831N

F

852

F

831N

852

ESD Label

F63TNLabel

Carrier

Tape

Cover Tape

Trailer Tape 160mm minimum

Components

Leader Tape 390mm minimum

November 1998, Rev. A

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0

T

K0

Wc

B0

P0

D0

E1

F

W

E2

Tc

A0

P1

D1

User Direction of Feed

Dimensions are in millimeter

Pkg type

SOIC(8lds)

(12mm)

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

SOIC(8lds) Reel Configuration: Figure 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

6.50

5.30

12.0

1.55

1.60

1.75

10.25

+/-0.10

+/-0.3

+/-0.05

+/-0.10

rotational and lateral movement requirements (see sketches A, B, and C).

B0

20 deg maximum component rotation

Sketch A (Side or Front Sectional View)

Component Rotation

5.50

min

+/-0.05

20 deg maximum

A0

Sketch B (Top View)

Component Rotation

W1 Measured at Hub

8.0 +/-0.1

Typical component cavity center line

Typical component center line

Dim A

Max

4.0 +/-0.1

0.450

2.1 +/-0.10

0.5mm maximum

Sketch C (Top View)

Component lateral movement

+/-

0.150

9.2 +/-0.3

0.5mm maximum

0.06 +/-0.02

Dim A

max

Tape Size

12mm 7” Dia

12mm 13” Dia

 1998 Fairchild Semiconductor Corporation

Reel

Option

Dim N

See detail AA

7” Diameter Option

B Min

Dim C

13” Diameter Option

See detail AA

W2 max Measured at Hub

W3

Dim D

min

DETAIL AA

Dimensions are in inches and millimeters

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

0.059

177.8

13.00 330

1.5

0.059

1.5

512 +0.020/-0.008 13 +0.5/-0.2

0.795

20.2

0.795

20.2

5.906 150

7.00 178

0.488 +0.078/-0.000

12.4 +2/0

0.488 +0.078/-0.000

12.4 +2/0

0.724

18.4

0.724

18.4

0.469 – 0.606

11.9 – 15.4

0.469 – 0.606

11.9 – 15.4

November 1998, Rev. A

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC-8 (FS PKG Code S1)

1 : 1

Scale 1:1 on letter size paper

Dimensions show n below are in:

inches [millimet ers]

Part Weight per unit (gram): 0.0774

9

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ CoolFET™ CROSSVOLT™ E2CMOS

TM

FACT™ FACT Quiet Series™

®

FAST FASTr™ GTO™ HiSeC™

ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 TinyLogic™

UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.