Cypress Semiconductor CY7C199L-8ZC, CY7C199L-8VC, CY7C199L-25ZI, CY7C199L-20ZC, CY7C199L-12ZC Datasheet

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Cypress Semiconductor CY7C199L-8ZC, CY7C199L-8VC, CY7C199L-25ZI, CY7C199L-20ZC, CY7C199L-12ZC Datasheet

fax id: 1030

CY7C199

Features

High speed

10 ns

Fast tDOE

CMOS for optimum speed/power

Low active power

467 mW (max, 12 ns “L” version)

Low standby power

0.275 mW (max, “L” version)

2V data retention (“L” version only)

Easy memory expansion with CE and OE features

TTL-compatible inputs and outputs

Automatic power-down when deselected

Functional Description

The CY7C199 is a high-performance CMOS static RAM organized as 32,768 words by 8 bits. Easy memory expansion is

32K x 8 Static RAM

provided by an active LOW chip enable (CE) and active LOW

output enable (OE) and three-state drivers. This device has an automatic power-down feature, reducing the power consumption by 81% when deselected. The CY7C199 is in the standard 300-mil-wide DIP, SOJ, and LCC packages.

An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins.

The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH. A die coat is used to improve alpha immunity.

Logic Block Diagram

 

 

 

 

 

 

 

Pin Configurations

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIP / SOJ / SOIC

 

LCC

 

 

 

 

 

 

 

 

 

 

 

 

 

Top View

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Top View

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A5

1

28

VCC

 

7 6 5

CC

WE

 

 

 

 

 

 

 

 

 

 

 

A6

2

27

WE

 

A A A

V

 

 

 

 

 

 

 

 

 

 

 

 

3 2 1 28 27

 

 

 

 

 

 

 

 

 

 

 

A7

3

26

A4

A8

A4

 

 

 

 

 

 

 

 

 

 

A8

4

25

A3

4

 

 

26

 

 

 

 

 

 

 

 

 

 

A9

5

 

 

25

A3

 

 

 

 

 

 

 

 

 

 

A9

5

24

A2

 

 

 

 

 

 

 

 

 

 

 

 

A10

6

 

 

24 A2

 

 

 

 

 

 

 

 

 

 

A10

6

23

A1

A11

7

 

 

23

A1

 

 

 

 

 

 

 

 

I/O0

A11

7

22

OE

A12

8

 

 

22

OE

 

 

 

 

 

 

 

 

A12

8

21

A0

A13

9

 

 

21

A0

 

 

 

INPUT BUFFER

 

 

 

 

A13

9

20

CE

A14

10

 

 

20

CE

 

 

 

 

 

 

 

I/O0

11

 

 

19

 

 

 

 

 

 

 

 

I/O1

A14

10

19

I/O7

 

 

I/O7

 

A0

 

 

 

 

 

 

I/O1

12

 

 

18

I/O6

 

 

 

 

 

 

 

 

 

I/O0

11

18

I/O6

 

1314151617

 

 

A1

ROW DECODER

 

 

 

 

 

I/O2

I/O1

12

17

I/O5

 

2

3 4

5

C199–3

A

 

 

 

 

 

 

 

16

 

 

 

 

 

 

 

 

 

I/O2

13

I/O4

 

I/O GND

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A3

 

 

 

 

 

 

 

GND

14

15

I/O3

 

 

 

 

 

 

A4

 

 

 

 

 

I/O3

 

 

 

 

C199–2

 

 

 

 

 

A

1024 x 32 x 8

 

 

 

 

 

 

 

 

 

 

 

 

A65

ARRAY

 

 

 

 

 

OE

22

 

 

 

 

 

21

A 0

 

A7

 

 

 

 

AMPSSENSE

I/O4

A 1

23

 

 

 

I/O

I/O

I/O 20

CE

 

 

 

 

 

A 2

24

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

I/O 7

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

A 3

25

 

 

 

 

 

 

18

I/O

6

9

 

 

 

 

 

 

I/O5

A 4

26

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TSOP I

 

 

 

17

I/O 5

 

 

 

 

 

 

 

 

 

WE

27

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

16

I/O 4

 

 

 

 

 

 

I/O6

VCC

28

 

 

Top View

 

 

 

15

I/O 3

WE

 

 

 

 

 

POWER

 

 

 

 

 

 

COLUMN

 

 

 

A 5

1

 

 

(not to scale)

 

 

14

GND

 

 

 

DOWN

 

 

 

 

 

 

 

 

DECODER

 

 

 

A 6

2

 

 

 

 

 

 

13

I/O 2

 

 

 

 

I/O

 

 

 

 

 

 

 

OE

 

 

 

 

 

 

7

A 7

3

 

 

 

 

 

 

12

I/O 1

 

 

 

 

 

 

 

A 8

4

 

 

 

 

 

 

 

 

 

 

 

 

 

C199–1

 

 

 

 

 

 

 

11

I/O 0

 

10

11

12

13

14

 

 

A 9

5

 

 

 

 

 

 

10

A 14

 

 

 

 

 

 

 

 

 

 

 

A

A

A

A

A

 

 

 

A 10

6

 

 

 

 

 

 

9

A 13

 

 

 

 

 

 

 

 

 

A 11

7

 

 

 

 

 

 

8

A 12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C199–4

Selection Guide

 

 

7C199-8

7C199-10

7C199-12

7C199-15

7C199-20

7C199-25

7C199-35

7C199-45

Maximum Access Time (ns)

8

10

12

15

20

25

35

45

Maximum Operating

 

120

110

160

155

150

150

140

140

Current (mA)

L

 

90

90

90

90

80

70

 

 

 

 

Maximum CMOS

 

0.5

0.5

10

10

10

10

10

10

Standby Current (mA)

L

 

0.05

0.05

0.05

0.05

0.05

0.05

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Shaded area contains preliminary information.

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 February 1988 – Revised April 22, 1998

CY7C199

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature .................................

–65°C to +150°C

Ambient Temperature with

–55°C to +125°C

Power Applied .............................................

Supply Voltage to Ground Potential

 

(Pin 28 to Pin 14) ...........................................

–0.5V to +7.0V

DC Voltage Applied to Outputs

 

in High Z State[1] ....................................

–0.5V to VCC + 0.5V

DC Input Voltage[1].................................

–0.5V to VCC + 0.5V

Electrical Characteristics Over the Operating Range[3]

Output Current into Outputs (LOW)

............................. 20 mA

Static Discharge Voltage ..........................................

>2001V

(per MIL-STD-883, Method 3015)

 

Latch-Up Current....................................................

>200 mA

Operating Range

Range

Ambient Temperature[2]

VCC

Commercial

0°C to +70°C

5V ± 10%

 

 

 

Industrial

–40°C to +85°C

5V ± 10%

 

 

 

Military

–55°C to +125°C

5V ± 10%

 

 

 

 

 

 

 

 

 

 

 

7C199-8

7C199-10

7C199-12

7C199-15

 

Parameter

Description

 

 

Test Conditions

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit

VOH

Output HIGH

 

VCC=Min., IOH=–4.0 mA

2.4

 

2.4

 

2.4

 

2.4

 

V

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOL

Output LOW

 

VCC=Min., IOL=8.0 mA

 

0.4

 

0.4

 

0.4

 

0.4

V

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

Input HIGH

 

 

 

 

 

 

2.2

VCC

2.2

VCC

2.2

VCC

2.2

VCC

V

 

Voltage

 

 

 

 

 

 

 

+0.3V

 

+0.3V

 

+0.3V

 

+0.3V

 

VIL

Input LOW

 

 

 

 

 

 

–0.5

0.8

–0.5

0.8

–0.5

0.8

–0.5

0.8

V

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIX

Input Load

 

GND < VI < VCC

 

–5

+5

–5

+5

–5

+5

–5

+5

μA

 

Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZ

Output Leakage

 

GND < VO < VCC,

 

–5

+5

–5

+5

–5

+5

–5

+5

μA

 

Current

 

Output Disabled

 

 

 

 

 

 

 

 

 

 

ICC

VCC Operating

 

VCC = Max.,

Com’l

 

120

 

110

 

160

 

155

mA

 

Supply Current

 

IOUT = 0 mA,

L

 

 

 

85

 

85

 

100

mA

 

 

 

f = fMAX = 1/tRC

 

 

 

 

 

 

 

 

 

 

 

 

 

Mil

 

 

 

 

 

 

 

180

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISB1

Automatic CE

 

Max. VCC,

 

>

Com’l

 

5

 

5

 

30

 

30

mA

CE

 

 

 

 

 

Power-Down

 

VIH,

L

 

 

 

5

 

5

 

5

mA

 

Current— TTL

 

VIN > VIH or

 

 

 

 

 

 

 

 

 

 

 

Inputs

 

VIN < VIL, f = fMAX

 

 

 

 

 

 

 

 

 

 

ISB2

Automatic CE

 

Max. VCC,

Com’l

 

0.5

 

0.5

 

10

 

10

mA

 

Power-Down

 

CE

> VCC – 0.3V

L

 

0.05

 

0.05

 

0.05

 

0.05

mA

 

Current— CMOS

 

VIN > VCC – 0.3V

 

 

 

 

 

 

 

 

 

 

 

Mil

 

 

 

 

 

 

 

15

mA

 

Inputs

 

or VIN < 0.3V, f = 0

 

 

 

 

 

 

 

Shaded area contains preliminary information.

Notes:

1.VIL (min.) = –2.0V for pulse durations of less than 20 ns.

2.TA is the “instant on” case temperature.

3.See the last page of this specification for Group A subgroup testing information.

2

CY7C199

Electrical Characteristics Over the Operating Range[3] (continued)

 

 

 

 

 

 

 

 

 

7C199-20

7C199-25

7C199-35

7C199-45

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Description

 

 

 

Test Conditions

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH

Output HIGH

 

VCC=Min., IOH=–4.0 mA

2.4

 

2.4

 

2.4

 

2.4

 

V

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOL

Output LOW

 

VCC=Min., IOL=8.0 mA

 

0.4

 

0.4

 

0.4

 

0.4

V

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

Input HIGH

 

 

 

 

 

 

 

2.2

VCC

2.2

VCC

2.2

VCC

2.2

VCC

V

 

Voltage

 

 

 

 

 

 

 

 

+0.3V

 

+0.3V

 

+0.3V

 

+0.3V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Input LOW

 

 

 

 

 

 

 

–0.5

0.8

-0.5

0.8

-0.5

0.8

-0.5

0.8

V

 

Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIX

Input Load

 

GND < VI < VCC

 

–5

+5

–5

+5

–5

+5

–5

+5

μA

 

Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZ

Output Leakage

 

GND < VI < VCC,

 

–5

+5

–5

+5

–5

+5

–5

+5

μA

 

Current

 

Output Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

VCC Operating

 

VCC = Max.,

Com’l

 

150

 

150

 

140

 

140

mA

 

Supply Current

 

IOUT = 0 mA,

 

 

 

 

 

 

 

 

 

 

 

 

L

 

90

 

80

 

70

 

70

mA

 

 

 

f = fMAX = 1/tRC

 

 

 

 

 

 

 

 

 

 

 

 

 

Mil

 

170

 

150

 

150

 

150

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISB1

Automatic CE

 

Max. VCC,

 

> VIH,

Com’l

 

30

 

30

 

25

 

25

mA

CE

 

 

 

 

 

Power-Down

 

VIN > VIH

 

 

 

 

 

 

 

 

 

 

 

 

L

 

5

 

5

 

5

 

5

mA

 

Current—

 

or VIN < VIL, f = fMAX

 

 

 

 

 

 

 

 

 

 

 

TTL Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISB2

Automatic CE

 

Max. VCC,

Com’l

 

10

 

10

 

10

 

10

mA

 

Power-Down

 

CE

> VCC – 0.3V

 

 

 

 

 

 

 

 

 

 

 

 

L

 

0.05

 

0.05

 

0.05

 

0.05

μA

 

Current—

 

V

> V – 0.3V or

 

 

 

 

 

CMOS Inputs

 

IN

CC

 

 

 

 

 

 

 

 

 

 

 

 

VIN < 0.3V, f=0

Mil

 

15

 

15

 

15

 

15

mA

]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Capacitance[4]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Description

Test Conditions

Max.

Unit

 

 

 

 

 

CIN

Input Capacitance

TA = 25°C, f = 1 MHz,

8

pF

 

 

VCC = 5.0V

 

 

COUT

Output Capacitance

8

pF

3

 

 

 

 

 

 

CY7C199

AC Test Loads and Waveforms[5]

 

 

 

 

5V

R1 481Ω

5V

R1 481Ω

 

 

 

 

 

 

ALL INPUT PULSES

OUTPUT

 

OUTPUT

 

 

 

 

3.0V

90%

90%

 

 

 

 

 

 

 

 

 

10%

10%

30 pF

R2

5 pF

R2

 

GND

 

 

 

255 Ω

 

255Ω

tr

 

tr

INCLUDING

 

INCLUDING

 

 

JIGAND

 

JIGAND

 

 

 

 

SCOPE

 

SCOPE

C199–5

 

 

C199–6

 

 

 

(a)

(b)

 

 

 

 

 

 

Equivalent to:

THÉVENIN EQUIVALENT

 

 

 

 

 

 

 

 

 

 

 

167 Ω

 

 

 

 

 

 

 

 

OUTPUT

 

 

 

 

1.73V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data Retention Characteristics Over the Operating Range (L version only)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

 

 

Description

 

 

 

 

Conditions[6]

Min.

Max.

Unit

VDR

 

VCC for Data Retention

 

 

 

 

 

2.0

 

V

ICCDR

 

Data Retention Current

 

Com’l

 

VCC = VDR = 2.0V,

 

 

μA

 

 

 

 

 

 

 

 

 

 

CE

> VCC – 0.3V,

 

 

 

 

 

 

 

 

 

 

 

Com’l L

 

 

10

μA

 

 

 

 

 

 

 

 

 

VIN > VCC – 0.3V or

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V

< 0.3V

 

 

 

[4]

 

Chip Deselect to Data Retention Time

 

0

 

ns

tCDR

 

 

IN

 

 

t [5]

 

Operation Recovery Time

 

 

 

 

 

t

 

ns

R

 

 

 

 

 

 

 

 

 

 

 

 

RC

 

 

Data Retention Waveform

 

 

DATA RETENTION MODE

 

VCC

3.0V

VDR > 2V

3.0V

 

tCDR

 

tR

CE

 

 

 

 

 

 

C199–7

Notes:

4.Tested initially and after any design or process changes that may affect these parameters.

5.tR < 3 ns for the -12 and -15 speeds. tR < 5 ns for the -20 and slower speeds.

6.No input may exceed VCC + 0.5V.

4

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