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INSTRUCTION MANUAL
FOR
BE1-11
Protection Systems
Modbus™ Communication Protocol
Publication: 9424200774
Revision: B Aug-14
9424200774 Rev B |
i |
Preface
This instruction manual provides information about the BE1-11 Protection Systems with the Modbus™ protocol. To accomplish this, the following information is provided:
•General information
•Register table
Conventions Used in this Manual
Important safety and procedural information is emphasized and presented in this manual through warning, caution, and note boxes. Each type is illustrated and defined as follows.
Warning!
Warning boxes call attention to conditions or actions that may cause personal injury or death.
Caution
Caution boxes call attention to operating conditions that may lead to equipment or property damage.
Note
Note boxes emphasize important information pertaining to installation or operation.
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12570 State Route 143
Highland IL 62249-1074 USA
www.basler.com
info@basler.com
Tel: +1 618.654.2341
Fax: +1 618.654.2351
© 2014 by Basler Electric All rights reserved
First printing: April 2014
Warning!
READ THIS MANUAL. Read this manual before installing, operating, or maintaining the BE1-11. Note all warnings, cautions, and notes in this manual as well as on the product. Keep this manual with the product for reference. Only qualified personnel should install, operate, or service this system. Failure to follow warning and cautionary labels may result in personal injury or property damage. Exercise caution at all times.
Basler Electric does not assume any responsibility to compliance or noncompliance with national code, local code, or any other applicable code. This manual serves as reference material that must be well understood prior to installation, operation, or maintenance.
For terms of service relating to this product and software, see the Commercial Terms of Products and Services document available at www.basler.com/terms.
This publication contains confidential information of Basler Electric Company, an Illinois corporation. It is loaned for confidential use, subject to return on request, and with the mutual understanding that it will not be used in any manner detrimental to the interests of Basler Electric Company and used strictly for the purpose intended.
It is not the intention of this manual to cover all details and variations in equipment, nor does this manual provide data for every possible contingency regarding installation or operation. The availability and design of all features and options are subject to modification without notice. Over time, improvements and revisions may be made to this publication. Before performing any of the following procedures, contact Basler Electric for the latest revision of this manual.
The English-language version of this manual serves as the only approved manual version.
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Contents |
|
General Information .................................................................................................................................... |
1 |
Message Structure .................................................................................................................................... |
1 |
Device Address Field............................................................................................................................. |
1 |
Function Code Field............................................................................................................................... |
1 |
Data Block Field..................................................................................................................................... |
2 |
Error Check Field ................................................................................................................................... |
2 |
Modbus™ Modes of Operation .................................................................................................................. |
2 |
Modbus™ Over Serial Line ........................................................................................................................ |
2 |
Message Structure................................................................................................................................. |
2 |
Message Framing and Timing Considerations ...................................................................................... |
3 |
Modbus™ on TCP/IP.................................................................................................................................. |
3 |
Application Data Unit ............................................................................................................................. |
3 |
MBAP Header Description..................................................................................................................... |
4 |
Error Handling and Exception Responses ................................................................................................ |
4 |
BE1-11 Modbus™ via Ethernet.................................................................................................................. |
5 |
Communications Hardware Requirements................................................................................................ |
5 |
Modbus™ Over RS-485 Communication Requirements........................................................................ |
5 |
Modbus™ Over Ethernet TCP/IP Communication Requirements.......................................................... |
5 |
Detailed Message Query and Response for RTU Transmission Mode .................................................... |
5 |
Read Holding Registers......................................................................................................................... |
5 |
Return Query Data................................................................................................................................. |
6 |
Restart Communications Option............................................................................................................ |
6 |
Listen Only Mode ................................................................................................................................... |
6 |
Preset Multiple Registers....................................................................................................................... |
7 |
Preset Single Register ........................................................................................................................... |
8 |
Data Formats............................................................................................................................................. |
8 |
Floating Point Data Format (Float) ........................................................................................................ |
9 |
Long Integer Data Format (Uint32, Int32, and IP Address)................................................................... |
9 |
Integer Data Format (Uint16 and Int16) or Bit-Mapped Variables in Uint16 Format ............................. |
9 |
Short Integer Data Format/Byte Character Data Format (Uint8 and Int8)........................................... |
10 |
String Data Format (String).................................................................................................................. |
10 |
CRC Error Check ................................................................................................................................. |
11 |
Reading Fault Record Data ................................................................................................................. |
11 |
Contiguous Poll Block Registers.......................................................................................................... |
11 |
Register Table ........................................................................................................................................... |
13 |
Conventions............................................................................................................................................. |
13 |
Register Table ......................................................................................................................................... |
13 |
General ................................................................................................................................................ |
13 |
SBO Select .......................................................................................................................................... |
14 |
SBO Operate ....................................................................................................................................... |
14 |
Direct Operate...................................................................................................................................... |
15 |
Binary Points........................................................................................................................................ |
15 |
Reporting ............................................................................................................................................. |
31 |
Power Quality....................................................................................................................................... |
31 |
Fault Record ........................................................................................................................................ |
32 |
Relay Settings...................................................................................................................................... |
33 |
Reporting Setup ................................................................................................................................... |
35 |
Power Quality Setup ............................................................................................................................ |
35 |
Demand Setup ..................................................................................................................................... |
35 |
Fault Record Setup.............................................................................................................................. |
35 |
Poll Block Settings ............................................................................................................................... |
35 |
Metering ............................................................................................................................................... |
39 |
Demand Data....................................................................................................................................... |
42 |
Global Settings..................................................................................................................................... |
44 |
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Protection Settings............................................................................................................................... |
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User Labels........................................................................................................................................ |
152 |
Alarms and Targets Reporting .............................................................................................................. |
155 |
Revision History...................................................................................................................................... |
177 |
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General Information
This document describes the Modbus™ communications protocol employed by BE1-11 Protection Systems and how to exchange information with these protection systems over a Modbus network. The BE1-11 communicates by emulating a subset of the Modicon 984 Programmable Controller.
Modbus communications use a master-slave technique in which only the master can initiate a transaction. This transaction is called a query. When appropriate, a slave (BE1-11) responds to the query. When a Modbus master communicates with a slave, information is provided or requested by the master. Information residing in the BE1-11 is grouped categorically as follows:
•Global Parameters
•Control Parameters (Select Before Operate)
•Setting Parameters
•Report Parameters
•Metering Parameters
All supported data can be read as specified in the register table. Abbreviations are used in the register table to indicate the register type. Register types are:
•Read/Write = RW
•Read Only = R
Select Before Operate (SBO) functions are used to change active settings groups and control outputs. There are four settings groups in the BE1-11, one of which may be selected as active using SBO commands.
When a slave receives a query, the slave responds by either supplying the requested data to the master or performing the requested action. A slave device never initiates communications on the Modbus network and will always generate a response to the query unless certain error conditions occur. The BE1-11 is designed to communicate on the Modbus network only as a slave device.
Message Structure
Device Address Field
The device address field contains the unique Modbus address of the slave being queried. The addressed slave repeats the address in the device address field of the response message. This field is 1 byte.
Modbus protocol limits a device address from 1 - 247. The address is user-selectable at installation and can be altered during real-time operation.
Function Code Field
The function code field in the query message defines the action to be taken by the addressed slave. This field is echoed in the response message and is altered by setting the most significant bit (MSB) of the field to 1 if the response is an error response. This field is 1 byte in length.
The BE1-11 maps all available data into the Modicon 984 holding register address space and supports the following function codes:
•Function 03 (03 hex) - read holding registers
•Function 06 (06 hex) - preset single register
•Function 08 (08 hex), subfunction 00 - diagnostics: return query data
•Function 08 (08 hex), subfunction 01 - diagnostics: restart communications option
•Function 08 (08 hex), subfunction 04 - diagnostics: force listen only mode
•Function 16 (10 hex) - preset multiple registers
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Data Block Field
The query data block contains additional information needed by the slave to perform the requested function. The response data block contains data collected by the slave for the queried function. An error response will substitute an exception response code for the data block. The length of this field varies with each query. See the paragraphs on Register Definitions in this manual for interpretation of data.
Error Check Field
The error check field provides a method for the slave to validate the integrity of the query message contents and allows the master to confirm the validity of response message contents. This field is 2 bytes.
Modbus™ Modes of Operation
A standard Modbus network offers the remote terminal unit (RTU) transmission mode for communication. BE1-11 Protection Systems support the Modbus/TCP or RS-485 modes depending on communication options for the protection system. For example, the Modbus/TCP mode is employed when Ethernet Protocol Option “2” (Modbus/TCP with BESTnet™Plus) or Ethernet Protocol Option “4” (Modbus/TCP and DNP3 with BESTnetPlus) is ordered. See the style chart in the Introduction chapter of the appropriate instruction manual for the BE1-11. The BE1-11 also supports the Modbus over RS-485 protocol when the BE1-11 is ordered with the RS-485 Port Protocol Option “M”. The BE1-11 supports Modbus/TCP and RS485 at the same time. These two optional modes of operation are described below.
A master can query slaves individually or universally. A universal ("broadcast") query, when allowed, evokes no response from any slave device. If a query to an individual slave device requests actions unable to be performed by the slave, the slave response message contains an exception response code defining the error detected. Exception response codes are quite often enhanced by the information found in the "Error Details" block of holding registers.
The Modbus protocol defines a simple Protocol Data Unit (PDU) independent of the underlying communication layers. The mapping of the Modbus protocol on specific buses or networks can introduce some additional fields on the Application Data Unit (ADU). See Figure 1.
ADU
Additional address |
|
Function code |
|
Data |
|
Error Check |
|
|
|
|
|
|
|
PDU
Figure 1. General Modbus Frame
The client that initiates a Modbus transaction builds the Modbus Application Data Unit. The function code indicates to the server which kind of action to perform.
Modbus™ Over Serial Line
Message Structure
Master initiated queries and BE1-11 responses share the same message structure. Each message is comprised of four message fields. They are:
• |
Device Address |
(1 byte) |
• |
Function Code |
(1 byte) |
• |
Data Block |
(n bytes) |
• |
Error Check field |
(2 bytes) |
Each 8-bit byte in a message contains two 4-bit hexadecimal characters. The message is transmitted in a continuous stream with the LSB of each byte of data transmitted first. Transmission of each 8-bit data byte occurs with one start bit and either one or two stop bits. Parity checking is performed, when enabled, and can be either odd or even. The transmission baud rate is user-selectable, and can be set at
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installation and altered during real-time operation. The BE1-11 Modbus supports baud rates up to 115200. The factory default baud rate is 19200.
The BE1-11 supports RS-485 compatible serial interfaces. This interface is accessible from the rear panel of the BE1-11. The RS-485 interface is configured for Modbus communication when Option “M” is ordered.
Message Framing and Timing Considerations
When receiving a message via the RS-485 communication port, the BE1-11 requires an inter-byte latency of 3.5 character times before considering the message complete.
Once a valid query is received, the BE1-11 waits a specified amount of time before responding. This time delay is set on the Miscellaneous Modbus Settings screen under Communications in BESTCOMSPlus®. This parameter contains a value from 10 - 10,000 milliseconds. The default value is 10 milliseconds.
Table 1 provides the response message transmission time (in seconds) and 3.5 character times (in milliseconds) for various message lengths and baud rates.
Table 1. Timing Considerations
|
|
Message Tx Time (s) |
|
|
|
|
|
Baud Rate |
3.5 Character Time (ms) |
128 Bytes |
256 Bytes |
|
|
|
|
2400 |
16.04 |
0.59 |
1.17 |
|
|
|
|
4800 |
8.021 |
0.29 |
0.59 |
|
|
|
|
9600 |
4.0104 |
0.15 |
0.29 |
|
|
|
|
19200 |
2.0052 |
0.07 |
0.15 |
|
|
|
|
Modbus™ on TCP/IP
Application Data Unit
The following describes the encapsulation of a Modbus request or response when it is carried on a Modbus TCP/IP network. See Figure 2.
Modbus TCP/IP ADU
MBAP Header |
|
Function code |
|
Data |
|
|
|
|
|
PDU
Figure 2. Modbus Request/Response Over TCP/IP
A dedicated header is used on TCP/IP to identify the Modbus Application Data Unit. It is called the MBAP header (Modbus Application Protocol header).
This header provides some differences compared to the Modbus RTU application data unit used on a serial line:
•The Modbus ‘slave address’ field usually used on Modbus Serial Line is replaced by a single byte ‘Unit Identifier’ within the MBAP header. The ‘Unit Identifier’ is used to communicate via devices such as bridges, routers, and gateways that use a single IP address to support multiple independent Modbus end units.
•All Modbus requests and responses are designed in such a way that the recipient can verify that a message is finished. For function codes where the Modbus PDU has a fixed length, the function code alone is sufficient. For function codes carrying a variable amount of data in the request or response, the data field includes a byte count.
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•When Modbus is carried over TCP, additional length information is carried in the MBAP header to allow the recipient to recognize message boundaries even if the message has been split into multiple packets for transmission. The existence of explicit and implicit length rules and use of a CRC-32 error check code (on Ethernet) results in an infinitesimal chance of undetected corruption to a request or response message.
MBAP Header Description
The MBAP Header contains the fields listed in Table 2.
Table 2. MBAP Header Fields
Fields |
Length |
Description |
Client |
Server |
|
|
|
|
|
|
|
Transaction |
2 |
Bytes |
Identification of a Modbus |
Initialized by |
Recopied by the |
Identifier |
|
|
request/response transaction. |
the client. |
server from the |
|
|
|
|
|
received request. |
|
|
|
|
|
|
Protocol |
2 |
Bytes |
0 = Modbus protocol. |
Initialized by |
Recopied by the |
Identifier |
|
|
|
the client. |
server from the |
|
|
|
|
|
received request. |
|
|
|
|
|
|
Length |
2 |
Bytes |
Number of following bytes. |
Initialized by |
Initialized by the |
|
|
|
|
the client |
server (response). |
|
|
|
|
(request). |
|
|
|
|
|
|
|
Unit Identifier |
1 |
Byte |
Identification of a remote slave |
Initialized by |
Recopied by the |
|
|
|
connected on a serial line or on |
the client. |
server from the |
|
|
|
other buses. |
|
received request. |
|
|
|
|
|
|
The header is 7 bytes long:
•Transaction Identifier – Used for transaction pairing, the Modbus server copies in the response the transaction identifier of the request.
•Protocol Identifier – Used for intra-system multiplexing. The Modbus protocol is identified by the value 0.
•Length – A byte count of the following fields, including the Unit Identifier and data fields.
•Unit Identifier – Used for intra-system routing purpose. It is typically used to communicate to a Modbus or a Modbus serial line slave through a gateway between an Ethernet TCP/IP network and a Modbus serial line. This field is set by the Modbus Client in the request and must be returned with the same value in the response by the server.
Note: All Modbus/TCP ADU are sent via TCP on registered port 502.
Error Handling and Exception Responses
Any query received that contains a non-existent device address, a framing error, or CRC error is ignored. No response is transmitted. Queries addressed to the BE1-11 with an unsupported function or illegal values in the data block result in an error response message with an exception response code. The exception response codes supported by the BE1-11 are provided in Table 3.
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Table 3. Supported Exception Response Codes |
||
|
Code |
Name |
Description |
|
|
|
|
|
|
|
01 |
Illegal Function |
The query Function/Subfunction Code is unsupported; query |
|
|
|
|
read of more than 125 registers; query preset of more than 100 |
|
|
|
|
registers. |
|
|
|
|
|
|
|
02 |
Illegal Data Address |
A register referenced in the data block does not support queried |
|
|
|
|
read/write; query preset of a subset of a numerical register |
|
|
|
|
group. |
|
|
|
|
|
|
|
03 |
Illegal Data Value |
A preset register data block contains an incorrect number of |
|
|
|
|
bytes or one or more data values out of range. |
|
|
|
|
|
|
BE1-11 Modbus™ via Ethernet
Modbus can communicate through Ethernet if the IP address of the BE1-11 is configured as described in the Communication chapter of the appropriate BE1-11 instruction manual.
Communications Hardware Requirements
Modbus™ Over RS-485 Communication Requirements
The BE1-11 optional RS-485 physical interface is three positions of a terminal strip with locations for Send/Receive A (A), Send/Receive B (B) and Signal Ground (C). Refer to the instruction manuals for the BE1-11 protection systems for further details.
Modbus™ Over Ethernet TCP/IP Communication Requirements
The BE1-11 Ethernet port (RJ-45 or fiber optic) is used with the Ethernet option. The protection system supports 10/100BASE-T using Cat 5 / Cat 5e shielded twisted pair on the RJ-45 port or 100MB/s on the fiber optic port. Refer to the appropriate instruction manual for the BE1-11 for further details.
Detailed Message Query and Response for RTU Transmission Mode
A detailed description of BE1-11 supported message queries and responses is provided in the following paragraphs.
Read Holding Registers
Query
This query message requests a register or block of registers to be read. The data block contains the starting register address and the quantity of registers to be read. A register address of N will read holding register N+1. If the query is a broadcast (device address = 0), no response message is returned.
Device Address
Function Code = 03 (hex) Starting Address Hi
Starting Address Lo
No. of Registers Hi
No. of Registers Lo CRC Hi error check CRC Lo error check
The number of registers cannot exceed 125 without causing an error response with the exception code for an illegal function.
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Response
The response message contains the data queried. The data block contains the block length in bytes followed by the data (one Data Hi byte and one Data Lo byte) for each requested register.
Reading an unassigned holding register returns a value of zero.
Device Address |
|
Function Code = |
03 (hex) |
Byte Count |
|
Data Hi (For each requested register, there is one Data Hi and one Data Lo.) Data Lo
.
.
Data Hi
Data Lo
CRC Hi error check CRC Lo error check
Return Query Data
This query contains data to be returned (looped back) in the response. The response and query messages should be identical. If the query is a broadcast (device address = 0), no response message is returned.
Device Address |
|
Function Code = |
08 (hex) |
Subfunction Hi = |
00 (hex) |
Subfunction Lo = |
00 (hex) |
Data Hi = |
xx (don't care) |
Data Lo = |
xx (don't care) |
CRC Hi error check |
|
CRC Lo error check |
|
Restart Communications Option
This query causes the remote communications function of the BE1-11 to restart, terminating an active listen only mode of operation. No effect is made upon primary BE1-11 operations. Only the remote communications function is affected. If the query is a broadcast (device address = 0), no response message is returned.
If the BE1-11 receives this query while in the listen only mode, no response message is generated. Otherwise, a response message identical to the query message is transmitted prior to the communications restart.
Device Address |
|
Function Code = |
08 (hex) |
Subfunction Hi = |
00 (hex) |
Subfunction Lo = |
01 (hex) |
Data Hi = |
xx (don't care) |
Data Lo = |
xx (don't care) |
CRC Hi error check |
|
CRC Lo error check |
|
Listen Only Mode
This query forces the addressed BE1-11 to the listen only mode for Modbus communications, isolating it from other devices on the network. No responses are returned.
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While in the listen only mode, the BE1-11 continues to monitor all queries. The BE1-11 does not respond to any other query until the listen only mode is removed. All write requests with a query to Preset Multiple Registers (Function Code = 16) are also ignored. When the BE1-11 receives the restart communications query, the listen only mode is removed.
Device Address |
|
Function Code = |
08 (hex) |
Subfunction Hi = |
00 (hex) |
Subfunction Lo = |
04 (hex) |
Data Hi = |
xx (don't care) |
Data Lo = |
xx (don't care) |
CRC Hi error check |
|
CRC Lo error check |
|
Preset Multiple Registers
A preset multiple registers query could address multiple registers in one slave or multiple slaves. If the query is a broadcast (device address = 0), no response message is returned.
Query
A Preset Multiple Register query message requests a register or block of registers to be written. The data block contains the starting address and the quantity of registers to be written, followed by the Data Block byte count and data. The BE1-11 will perform the write when the device address in query is a broadcast address or the same as the BE1-11 Modbus Unit ID (device address).
A register address of N will write Holding Register N+1.
Data will cease to be written if any of the following exceptions occur.
•Queries to write to Read Only registers result in an error response with Exception Code of “Illegal Data Address”.
•Queries attempting to write more than 100 registers cause an error response with Exception Code “Illegal Function”.
•An incorrect Byte Count will result in an error response with Exception Code of “Illegal Data Value”.
•There are several instances of registers that are grouped together to collectively represent a single numerical BE1-11 data value (i.e. - floating point data, 32-bit integer data, and strings). A query to write a subset of such a register group will result in an error response with Exception Code “Illegal Data Address”.
•A query to write a not allowed value (out of range) to a register results in an error response with Exception Code of “Illegal Data Value”.
Device Address
Function Code = 10 (hex) Starting Address Hi
Starting Address Lo
No. of Registers Hi
No. of Registers Lo Byte Count
Data Hi
Data Lo
.
.
Data Hi
Data Lo
CRC Hi error check CRC Lo error check
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Response
The response message echoes the starting address and the number of registers. There is no response message when the query is a broadcast (device address = 0).
Device Address
Function Code = 10 (hex)
Starting Address Hi
Starting Address Lo
No. of Registers Hi
No. of Registers Lo
CRC Hi Error Check
CRC Lo Error Check
Preset Single Register
A Preset Single Register query message requests a single register to be written. If the query is a broadcast (device address = 0), no response message is returned.
Note: Only data types INT16, INT8, UINT16, UINT8, and String (not longer than 2 bytes), can be preset by this function.
Query
Data will cease to be written if any of the following exceptions occur.
•Queries to write to Read Only registers result in an error response with Exception Code of “Illegal Data Address”.
•A query to write a disallowed value (out of range) to a register results in an error response with Exception Code of “Illegal Data Value”.
Device Address
Function Code = 06 (hex)
Address Hi
Address Lo
Data Hi
Data Lo
CRC Hi error check
CRC Lo error check
Response
The response message echoes the Query message after the register has been altered.
Data Formats
BE1-11 Protection Systems support the following data types:
●Data types mapped to 2 registers
○Unsigned Integer 32 (Uint32)
○Signed Integer 32 (Int32)
○Floating Point (Float)
○IP Address (IP Address)
○Strings maximum 4 characters long (String)
●Data types mapped to 1 register
○Unsigned Integer 16 (Uint16) (If this type is mapped to section Binary Points, then 1 register contains up to 16 bit-mapped variables as listed in the Register Table chapter under Binary Points.)
○Signed Integer 16 (Int16)
○Unsigned Integer 8 (Uint8)
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○Signed Integer 8 (Int8)
○Strings maximum 2 characters long (String)
●Data types mapped to more than 2 registers
○Strings longer than 4 characters (String)
Floating Point Data Format (Float)
The Modbus floating point data format uses two consecutive holding registers to represent a data value. The first register contains the low-order 16 bits of the following 32-bit format:
•MSB is the sign bit for the floating-point value (0 = positive).
•The next 8 bits are the exponent biased by 127 decimal.
•The 23 LSBs comprise the normalized mantissa. The most-significant bit of the mantissa is always assumed to be 1 and is not explicitly stored, yielding an effective precision of 24 bits.
The value of the floating-point number is obtained by multiplying the binary mantissa times two raised to the power of the unbiased exponent. The assumed bit of the binary mantissa has the value of 1.0, with the remaining 23 bits providing a fractional value. Table 4 shows the floating-point format.
Table 4. Floating Point Format
Sign |
Exponent + 127 |
Mantissa |
|
|
|
1 Bit |
8 Bits |
23 Bits |
|
|
|
The floating-point format allows for values ranging from approximately 8.43X10–37 to 3.38X1038. A floatingpoint value of all zeroes is the value zero. A floating-point value of all ones (not a number) signifies a value currently not applicable or disabled.
Example: The value 95,800 represented in floating-point format is hexadecimal 47BB1C00. This number will read from two consecutive holding registers as follows:
Holding Register |
Value |
|
|
K |
(Hi Byte) |
hex 1C |
|
K |
(Lo Byte) |
hex 00 |
|
K+1(Hi Byte) |
hex 47 |
||
K+1(Lo Byte) |
hex BB |
||
The same byte alignments are required to write.
Long Integer Data Format (Uint32, Int32, and IP Address)
The Modbus long integer data format uses two consecutive holding registers to represent a 32-bit data value. The first register contains the low-order 16 bits and the second register contains the high-order 16 bits.
Example: The value 95,800 represented in long integer format is hexadecimal 0x00017638. This number will read from two consecutive holding registers as follows:
Holding Register |
Value |
|
|
K |
(Hi Byte) |
hex 76 |
|
K |
(Lo Byte) |
hex 38 |
|
K+1(Hi Byte) |
hex 00 |
||
K+1(Lo Byte) |
hex 01 |
||
The same byte alignments are required to write.
Integer Data Format (Uint16 and Int16) or Bit-Mapped Variables in Uint16 Format
The Modbus integer data format uses a single holding register to represent a 16-bit data value.
Example: The value 4660 represented in integer format is hexadecimal 0x1234. This number will read from a holding register as follows:
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Holding Register |
Value |
|
|
|
K |
(Hi Byte) |
hex 12 |
|
|
K |
(Lo Byte) |
hex 34 |
|
The same byte alignments are required to write.
If Uint16 Data Format is listed in the Binary Points Section only, then each register contains up to 16 bitmapped variables as listed in the Register Table chapter under Binary Points.
Example: Register 900 occupies 16 rows in the Register Table where each row gives the name of specific bit-mapped data such as 900-0 indicates bit 0 of register 900 is mapped to 60FL/60FL ALARM, bit 1 is mapped to 27P/BLOCK, and so forth until 900-15 is mapped to 27P-2/BLOCK.
Short Integer Data Format/Byte Character Data Format (Uint8 and Int8)
The Modbus short integer data format uses a single holding register to represent an 8-bit data value. The holding register high byte will always be zero.
Example: The value 132 represented in short integer format is hexadecimal 0x84. This number will read from a holding register as follows:
Holding Register |
Value |
|
|
K |
(Hi Byte) |
hex 00 |
|
K |
(Lo Byte) |
hex 84 |
|
The same byte alignments are required to write.
String Data Format (String)
The Modbus string data format uses one or more holding registers to represent a sequence, or string, of character values. If the string contains a single character, the holding register high byte will contain the ASCII character code and the low byte will be zero.
Example: The string “PASSWORD” represented in string format will read as follows:
Holding Register |
Value |
|
K |
(Hi Byte) |
‘P’ |
K |
(Lo Byte) |
‘A’ |
K+1(Hi Byte) |
‘S’ |
|
K+1(Lo Byte) |
‘S’ |
|
K+2(Hi Byte) |
‘W’ |
|
K+2(Lo Byte) |
‘O’ |
|
K+3(Hi Byte) |
‘R’ |
|
K+3(Lo Byte) |
‘D’ |
|
Example: If the above string is changed to “P”, the new string will read as follows:
Holding Register |
Value |
||
K |
(Hi Byte) |
‘P’ |
|
K |
(Lo Byte) |
hex 00 |
|
K+1(Hi Byte) |
hex 00 |
||
K+1(Lo Byte) |
hex 00 |
||
K+2(Hi Byte) |
hex 00 |
||
K+2(Lo Byte) |
hex 00 |
||
K+3(Hi Byte) |
hex 00 |
||
K+3(Lo Byte) |
hex 00 |
||
The same byte alignments are required to write.
General Information |
BE1-11 |
9424200774 Rev B |
11 |
CRC Error Check
This field contains a 2-byte CRC value for transmission error detection. The master first calculates the CRC and appends it to the query message. The BE1-11 Protection System recalculates the CRC value for the received query and performs a comparison to the query CRC value to determine if a transmission error has occurred. If so, no response message is generated. If no transmission error has occurred, the slave calculates a new CRC value for the response message and appends it to the message for transmission.
The CRC calculation is performed using all bytes of the device address, function code, and data block fields. A 16-bit CRC register is initialized to all 1's. Then each 8-bit byte of the message is used in the following algorithm:
First, exclusive-OR the message byte with the low-order byte of the CRC register. The result, stored in the CRC register, will then be right-shifted eight times. The CRC register MSB is zero-filled with each shift. After each shift, the CRC register LSB is examined. If the LSB is a 1, the CRC register is exclusiveORed with the fixed polynomial value A001 (hex) prior to the next shift. Once all bytes of the message have undergone the above algorithm, the CRC register will contain the message CRC value to be placed in the error check field.
Reading Fault Record Data
Fault record data is obtained by reading registers from the session fault record. The fault record to be reported is selected by writing the fault number to register “Fault Report Selection”. See Fault Record Setup in the Register Table chapter. The selected fault may be from 1 to 255. Entering a value of –1, will select the most recent fault record.
Contiguous Poll Block Registers
The user may allocate up to 125 holding registers to the Contiguous Poll Block (9875-9999). This allocation allows dispersed registers that are frequently read to be polled via a single read query. Mapping can be done via BESTCOMSPlus or via Modbus registers in the Poll Block Settings session. A register is assigned to a position in the Poll Block by writing its address value into the corresponding position in the Contiguous Poll Block Assignments registers (9676-9800) in the Poll Block Settings session. Unassigned position(s) must be mapped to Modbus Dummy Data register (9874), which always returns a value of 0.
Once assignments are made, the values of the assigned registers may be read by polling the Contiguous Poll Block. For example, if you wanted to continuously monitor VA Primary (10100), IA Primary (10124), IA Angle (10126), and Total PF (10192) Holding Registers, you would first configure the Contiguous Poll Block Registers by writing the desired register address values 10100, 10101, 10124, 10125, 10126, 10127, 10192, and 10193 into the Contiguous Poll Block Assignment registers 9676 thru 9683, respectively. You may now begin monitoring the specified registers by reading the first 8 locations in the Contiguous Poll Block; ie, reading registers 9875/9876 for VA Primary (as specified in its corresponding assignment registers 9676/9677), reading registers 9876/9877 for IA Primary (as specified in its corresponding assignment registers 9678/9679), reading registers 9879/9880 for IA Angle (as specified in its corresponding assignment registers 9680/9681), and reading registers 9881/9882 for Total PF (as specified in its corresponding assignment registers 9682/9683).
BE1-11 |
General Information |
12 |
9424200774 Rev B |
General Information |
BE1-11 |
9424200774 Rev B |
13 |
Register Table
Parameters are mapped into the holding register address space in blocks according to access type. Registers 9875 through 9999 are reserved for user configurable polling block, and register 9874 is reserved for system use only. By default, all registers in the polling block are mapped to register 9874 when their value is zero. Use BESTCOMSPlus® to map desired data to poll block registers to be read by one Modbus™ read request.
Any holding register not listed in the register table is an unassigned holding register. Reading or writing to unassigned holding registers is not allowed and error code “Illegal Data Address” will be reported.
Reading/Writing any data (variable) as its complete (atomic) value is the only legal operation. Partially requested data will return an error. For example, request for reading/writing of/to only register 620 will return an error because this register is part of data Settings Group-Direct Operate that is mapped to 2 registers. Reading of register 620 is correct only if reading/writing of both 620 and 621 are requested in the same query.
Conventions
The Type column uses the following abbreviations:
•String - ASCII string
•Float - Floating point
•Int32 - Integer (32-bit integer)
•Int16 - Integer (16-bit integer)
•Int8 - Integer (8-bit integer)
•Uint32 - Unsigned Integer (32-bit integer)
•Uint16 - Unsigned Integer (16-bit integer)
•Uint8 - Unsigned Integer (8-bit integer)
•IP Address - IP Address
The Style column uses the following abbreviations:
•F - Feeder Protection System
•G - Generator Protection System
•I - Intertie Protection System
•M - Motor Protection System
•T - Transformer Protection System
Register Table
The register table on the following pages contains the following groups:
General, SBO Select, SBO Operate, Direct Operate, Binary Points, Reporting, Power Quality, Fault Record, Relay Settings, Reporting Setup, Power Quality Setup, Demand Setup, Fault Record Setup, Poll Block Settings, Metering, Demand Data, Global Settings, Protection Settings, and User Labels.
General
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
System Data |
Default Graphics Module Version |
1 |
String |
13 |
R |
0 - 13 |
System Data |
Alternate Graphics Module Version |
8 |
String |
13 |
R |
0 - 13 |
System Data |
Model Number |
15 |
String |
64 |
R |
0 - 64 |
Reserved |
|
47-110 |
|
|
|
|
System Data |
Boot Version Information |
111 |
String |
64 |
R |
0 - 64 |
Reserved |
|
143-206 |
|
|
|
|
System Data |
Firmware Part Number |
207 |
String |
64 |
R |
0 - 64 |
Unit Info |
Style Number |
239 |
String |
32 |
R |
0 - 32 |
Unit Info |
Model Number |
255 |
String |
64 |
R |
0 - 64 |
Unit Info |
App Part Number |
287 |
String |
64 |
R |
0 - 64 |
Unit Info |
Serial Number |
319 |
String |
32 |
R |
0 - 32 |
BE1-11 |
Register Table |
14 9424200774 Rev B
SBO Select
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
43-1 |
Select |
600 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-2 |
Select |
602 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-3 |
Select |
604 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-4 |
Select |
606 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-5 |
Select |
608 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
101 |
Select |
610 |
Uint32 |
4 |
R W |
Trip=1 |
|
|
|
|
|
|
Close=2 |
Local Contacts |
Contact Output 1 Override State Select |
612 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 2 Override State Select |
613 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 3 Override State Select |
614 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 4 Override State Select |
615 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 5 Override State Select |
616 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output A Override State Select |
617 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Settings Group |
Select |
618 |
Int32 |
4 |
R W |
Settings Group 0=0 |
|
|
|
|
|
|
Settings Group 1=1 |
|
|
|
|
|
|
Settings Group 2=2 |
|
|
|
|
|
|
Settings Group 3=3 |
Settings Group |
Direct Operate |
620 |
Int32 |
4 |
R W |
Settings Group 0=0 |
|
|
|
|
|
|
Settings Group 1=1 |
|
|
|
|
|
|
Settings Group 2=2 |
|
|
|
|
|
|
Settings Group 3=3 |
Local Contacts |
Contact Output 6 Override State Select |
622 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 7 Override State Select |
623 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 8 Override State Select |
624 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
SBO Operate
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
43-1 |
Operate |
700 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-2 |
Operate |
702 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-3 |
Operate |
704 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-4 |
Operate |
706 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
43-5 |
Operate |
708 |
Uint32 |
4 |
R W |
Set=1 |
|
|
|
|
|
|
Reset=2 |
|
|
|
|
|
|
Pulse=3 |
101 |
Operate |
710 |
Uint32 |
4 |
R W |
Trip=1 |
|
|
|
|
|
|
Close=2 |
Local Contacts |
Contact Output 1 Override State Operate |
712 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 2 Override State Operate |
713 |
Uint8 |
1 |
R W |
Off=0 On=1 |
Local Contacts |
Contact Output 3 Override State Operate |
714 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 4 Override State Operate |
715 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output 5 Override State Operate |
716 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Local Contacts |
Contact Output A Override State Operate |
717 |
Uint8 |
1 |
R W |
Off=0 |
|
|
|
|
|
|
On=1 |
Register Table |
BE1-11 |
|
9424200774 Rev B |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
15 |
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Name |
|
|
Description |
|
|
Register |
Type |
|
Bytes |
|
Writable |
|
|
Range |
|
|
|||||||
|
Settings Group |
|
Operate |
|
|
|
|
718 |
|
Int32 |
|
|
4 |
|
|
R W |
|
Settings Group 0=0 |
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Settings Group 1=1 |
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Settings Group 2=2 |
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Settings Group 3=3 |
|
|||
|
Local Contacts |
|
Contact Output 6 Override State Operate |
|
|
720 |
|
Uint8 |
|
|
1 |
|
|
R W |
|
Off=0 |
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
On=1 |
|
|
||
|
Local Contacts |
|
Contact Output 7 Override State Operate |
|
|
721 |
|
Uint8 |
|
|
1 |
|
|
R W |
|
Off=0 |
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
On=1 |
|
|
||
|
Local Contacts |
|
Contact Output 8 Override State Operate |
|
|
722 |
|
Uint8 |
|
|
1 |
|
|
R W |
|
Off=0 |
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
On=1 |
|
|
||
|
Direct Operate |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
Name |
|
Description |
|
Register |
|
Type |
|
|
Bytes |
|
Writable |
|
|
Range |
|
|
||||||
|
101 |
|
|
|
Untag |
800 |
|
Uint32 |
|
4 |
|
|
R W |
|
|
Disable Tag=0 |
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Info Tag=1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Blocking Tag=2 |
|
|
|
|
101 |
|
|
|
Tag |
802 |
|
Uint32 |
|
4 |
|
|
R W |
|
|
Disable Tag=0 |
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Info Tag=1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Blocking Tag=2 |
|
|
|
|
Demand Meter Circuit 1 |
|
Reset Demands |
804 |
|
Uint32 |
|
4 |
|
|
R W |
|
|
Operate=1 |
|
|
||||||||
|
Current Demand Circuit 2 |
|
Reset Demands |
806 |
|
Uint32 |
|
4 |
|
|
R W |
|
|
Operate=1 |
|
|
||||||||
|
G Current Demand Circuit 2 |
|
Reset Demands |
808 |
|
Uint32 |
|
4 |
|
|
R W |
|
|
Operate=1 |
|
|
||||||||
|
Binary Points |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||||||
|
Name |
|
Description |
|
|
Register |
|
|
Type |
|
Bytes |
|
Writable |
|
|
Range |
|
Style |
|
|||||
|
60FL |
|
|
60FL Alarm |
|
900 bit 0 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
24 |
|
|
Block |
|
900 bit 1 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
GIT |
|
|||||||
|
24 |
|
|
Pickup |
|
900 bit 2 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
GIT |
|
|||||||
|
24 |
|
|
Trip |
|
900 bit 3 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
GIT |
|
|||||||
|
24 |
|
|
Target |
|
900 bit 4 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
GIT |
|
|||||||
|
24 |
|
|
Alarm |
|
900 bit 5 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
GIT |
|
|||||||
|
25 |
|
|
Block |
|
900 bit 6 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGI |
|
|||||||
|
25 |
|
|
Status |
|
900 bit 7 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGI |
|
|||||||
|
25 |
|
|
VM1 Status |
|
900 bit 8 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGI |
|
|||||||
|
27P-1 |
|
|
Block |
|
900 bit 9 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-1 |
|
|
Pickup |
|
900 bit 10 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-1 |
|
|
Trip |
|
900 bit 11 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-1 |
|
|
Target A |
|
900 bit 12 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-1 |
|
|
Target B |
|
900 bit 13 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-1 |
|
|
Target C |
|
900 bit 14 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-2 |
|
|
Block |
|
900 bit 15 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-2 |
|
|
Pickup |
|
901 bit 0 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-2 |
|
|
Trip |
|
901 bit 1 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-2 |
|
|
Target A |
|
901 bit 2 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-2 |
|
|
Target B |
|
901 bit 3 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-2 |
|
|
Target C |
|
901 bit 4 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-3 |
|
|
Block |
|
901 bit 5 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-3 |
|
|
Pickup |
|
901 bit 6 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-3 |
|
|
Trip |
|
901 bit 7 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-3 |
|
|
Target A |
|
901 bit 8 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-3 |
|
|
Target B |
|
901 bit 9 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-3 |
|
|
Target C |
|
901 bit 10 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-4 |
|
|
Block |
|
901 bit 11 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-4 |
|
|
Pickup |
|
901 bit 12 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-4 |
|
|
Trip |
|
901 bit 13 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-4 |
|
|
Target A |
|
901 bit 14 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-4 |
|
|
Target B |
|
901 bit 15 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-4 |
|
|
Target C |
|
902 bit 0 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIMT |
|
|||||||
|
27P-5 |
|
|
Block |
|
902 bit 1 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27P-5 |
|
|
Pickup |
|
902 bit 2 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27P-5 |
|
|
Trip |
|
902 bit 3 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27P-5 |
|
|
Target A |
|
902 bit 4 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27P-5 |
|
|
Target B |
|
902 bit 5 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27P-5 |
|
|
Target C |
|
902 bit 6 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Block |
|
902 bit 7 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Pickup |
|
902 bit 8 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Trip |
|
902 bit 9 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Target 3V0 |
|
902 bit 10 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Target V2 |
|
902 bit 11 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Target AUX |
|
902 bit 12 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Target 3RD |
|
902 bit 13 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-1 |
|
|
Target V1 |
|
902 bit 14 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-2 |
|
|
Block |
|
902 bit 15 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-2 |
|
|
Pickup |
|
903 bit 0 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
|
27X-2 |
|
|
Trip |
|
903 bit 1 |
|
|
Uint16 |
|
2 |
|
R |
True=1 False=0 |
|
FGIT |
|
|||||||
BE1-11 |
Register Table |
16 |
|
|
|
|
|
9424200774 Rev B |
||
|
|
|
|
|
|
|
|
|
|
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
27X-2 |
Target 3V0 |
903 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-2 |
Target V2 |
903 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-2 |
Target AUX |
903 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-2 |
Target 3RD |
903 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-2 |
Target V1 |
903 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Block |
903 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Pickup |
903 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Trip |
903 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Target 3V0 |
903 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Target V2 |
903 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Target AUX |
903 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Target 3RD |
903 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-3 |
Target V1 |
903 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Block |
903 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Pickup |
904 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Trip |
904 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Target 3V0 |
904 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Target V2 |
904 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Target AUX |
904 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Target 3RD |
904 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
27X-4 |
Target V1 |
904 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-1 |
Block |
904 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-1 |
Pickup |
904 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-1 |
Trip |
904 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-1 |
Target A |
904 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-1 |
Target B |
904 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-1 |
Target C |
904 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-2 |
Block |
904 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-2 |
Pickup |
904 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-2 |
Trip |
904 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-2 |
Target A |
905 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-2 |
Target B |
905 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-2 |
Target C |
905 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59P-3 |
Block |
905 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-3 |
Pickup |
905 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-3 |
Trip |
905 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-3 |
Target A |
905 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-3 |
Target B |
905 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-3 |
Target C |
905 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-4 |
Block |
905 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-4 |
PICKUP |
905 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-4 |
Trip |
905 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-4 |
Target A |
905 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-4 |
Target B |
905 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59P-4 |
Target C |
905 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-1 |
Block |
905 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-1 |
Pickup |
906 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-1 |
Trip |
906 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-1 |
Target 3V0 |
906 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-1 |
Target V2 |
906 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-1 |
Target AUX |
906 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-1 |
Target 3RD |
906 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-1 |
Target V1 |
906 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Block |
906 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Pickup |
906 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Trip |
906 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Target 3V0 |
906 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Target V2 |
906 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Target AUX |
906 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Target 3RD |
906 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-2 |
Target V1 |
906 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
59X-3 |
BLOCK |
906 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-3 |
PICKUP |
907 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-3 |
TRIP |
907 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-3 |
Target 3V0 |
907 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-3 |
Target V2 |
907 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-3 |
Target AUX |
907 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-3 |
Target 3RD |
907 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-3 |
Target V1 |
907 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Block |
907 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Pickup |
907 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Trip |
907 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Target 3V0 |
907 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Target V2 |
907 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Target AUX |
907 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Target 3RD |
907 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
59X-4 |
Target V1 |
907 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-1 |
Block |
907 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
|
|
|
|
|
|
|
Register Table |
BE1-11 |
|
9424200774 Rev B |
|
|
|
|
|
|
|
17 |
|
|
|
|
|
|
|
|
|
|
|
Name |
|
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
50-1 |
Pickup |
908 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
Trip |
908 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
Target A |
908 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
Target B |
908 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
Target C |
908 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
Target Negative Sequence |
908 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
Target Residual |
908 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
Target Independent Ground |
908 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-1 |
67 |
Target A |
908 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-1 |
67 |
Target B |
908 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-1 |
67 |
Target C |
908 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-1 |
67 |
Target Negative Sequence |
908 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-1 |
67 |
Target Residual |
908 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-1 |
67 |
Target Independent Ground |
908 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-2 |
Block |
908 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Pickup |
908 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Trip |
909 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Target A |
909 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Target B |
909 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Target C |
909 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Target Negative Sequence |
909 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Target Residual |
909 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
Target Independent Ground |
909 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-2 |
67 |
Target A |
909 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-2 |
67 |
Target B |
909 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-2 |
67 |
Target C |
909 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-2 |
67 |
Target Negative Sequence |
909 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-2 |
67 |
Target Residual |
909 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-2 |
67 |
Target Independent Ground |
909 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-3 |
Block |
909 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Pickup |
909 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Trip |
909 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Target A |
910 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Target B |
910 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Target C |
910 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Target Negative Sequence |
910 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Target Residual |
910 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
Target Independent Ground |
910 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-3 |
67 |
Target A |
910 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-3 |
67 |
Target B |
910 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-3 |
67 |
Target C |
910 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-3 |
67 |
Target Negative Sequence |
910 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-3 |
67 |
Target Residual |
910 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-3 |
67 |
Target Independent Ground |
910 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-4 |
Block |
910 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Pickup |
910 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Trip |
910 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Target A |
910 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Target B |
911 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Target C |
911 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Target Negative Sequence |
911 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Target Residual |
911 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
Target Independent Ground |
911 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-4 |
67 |
Target A |
911 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-4 |
67 |
Target B |
911 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-4 |
67 |
Target C |
911 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-4 |
67 |
Target Negative Sequence |
911 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-4 |
67 |
Target Residual |
911 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-4 |
67 |
Target Independent Ground |
911 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-5 |
Block |
911 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Pickup |
911 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Trip |
911 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Target A |
911 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Target B |
911 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Target C |
912 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Target Negative Sequence |
912 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Target Residual |
912 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
Target Independent Ground |
912 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-5 |
67 |
Target A |
912 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-5 |
67 |
Target B |
912 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-5 |
67 |
Target C |
912 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-5 |
67 |
Target Negative Sequence |
912 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-5 |
67 |
Target Residual |
912 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-5 |
67 |
Target Independent Ground |
912 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-6 |
Block |
912 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
Pickup |
912 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
Trip |
912 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
Target A |
912 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
|
|
|
|
|
|
|
|
|
BE1-11 |
Register Table |
18 |
|
|
|
|
|
|
9424200774 Rev B |
||
|
|
|
|
|
|
|
|
|
|
|
Name |
|
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
50-6 |
Target B |
912 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
Target C |
912 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
Target Negative Sequence |
913 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
Target Residual |
913 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
Target Independent Ground |
913 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
50-6 |
67 |
Target A |
913 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-6 |
67 |
Target B |
913 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-6 |
67 |
Target C |
913 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-6 |
67 |
Target Negative Sequence |
913 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-6 |
67 |
Target Residual |
913 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-6 |
67 |
Target Independent Ground |
913 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-1 |
Block |
913 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Pickup |
913 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Trip |
913 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Target A |
913 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Target B |
913 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Target C |
913 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Target Negative Sequence |
913 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Target Residual |
914 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
Target Independent Ground |
914 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-1 |
67 |
Target A |
914 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-1 |
67 |
Target B |
914 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-1 |
67 |
Target C |
914 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-1 |
67 |
Target NEG SEQ |
914 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-1 |
67 |
Target Residual |
914 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-1 |
67 |
Target Independent Ground |
914 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-2 |
Block |
914 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Pickup |
914 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Trip |
914 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Target A |
914 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Target B |
914 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Target C |
914 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Target Negative Sequence |
914 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Target Residual |
914 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
Target Independent Ground |
915 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-2 |
67 |
Target A |
915 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-2 |
67 |
Target B |
915 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-2 |
67 |
Target C |
915 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-2 |
67 |
Target NEG SEQ |
915 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-2 |
67 |
Target Residual |
915 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-2 |
67 |
Target Independent Ground |
915 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-3 |
Block |
915 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Pickup |
915 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Trip |
915 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Target A |
915 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Target B |
915 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Target C |
915 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Target Negative Sequence |
915 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Target Residual |
915 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
Target Independent Ground |
915 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-3 |
67 |
Target A |
916 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-3 |
67 |
Target B |
916 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-3 |
67 |
Target C |
916 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-3 |
67 |
Target Negative Sequence |
916 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-3 |
67 |
Target Residual |
916 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-3 |
67 |
Target Independent Ground |
916 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-4 |
Block |
916 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Pickup |
916 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Trip |
916 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Target A |
916 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Target B |
916 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Target C |
916 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Target Negative Sequence |
916 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Target Residual |
916 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
Target Independent Ground |
916 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-4 |
67 |
Target A |
916 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-4 |
67 |
Target B |
917 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-4 |
67 |
Target C |
917 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-4 |
67 |
Target Negative Sequence |
917 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-4 |
67 |
Target Residual |
917 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-4 |
67 |
Target Independent Ground |
917 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-5 |
Block |
917 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
Pickup |
917 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
Trip |
917 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
Target A |
917 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
Target B |
917 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
Target C |
917 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
Target Negative Sequence |
917 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
|
|
|
|
|
|
|
|
|
Register Table |
BE1-11 |
|
9424200774 Rev B |
|
|
|
|
|
|
|
19 |
|
|
|
|
|
|
|
|
|
|
|
Name |
|
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
51-5 |
Target Residual |
917 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
Target Independent Ground |
917 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-5 |
67 |
Target A |
917 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-5 |
67 |
Target B |
917 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-5 |
67 |
Target C |
918 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-5 |
67 |
Target Negative Sequence |
918 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-5 |
67 |
Target Residual |
918 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-5 |
67 |
Target Independent Ground |
918 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-6 |
Block |
918 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Pickup |
918 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Trip |
918 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Target A |
918 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Target B |
918 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Target C |
918 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Target Negative Sequence |
918 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Target Residual |
918 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
Target Independent Ground |
918 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-6 |
67 |
Target A |
918 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-6 |
67 |
Target B |
918 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-6 |
67 |
Target C |
918 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-6 |
67 |
Target Negative Sequence |
919 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-6 |
67 |
Target Residual |
919 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-6 |
67 |
Target Independent Ground |
919 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-7 |
Block |
919 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Pickup |
919 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Trip |
919 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Target A |
919 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Target B |
919 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Target C |
919 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Target Negative Sequence |
919 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Target Residual |
919 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
Target Independent Ground |
919 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
51-7 |
67 |
Target A |
919 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-7 |
67 |
Target B |
919 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-7 |
67 |
Target C |
919 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-7 |
67 |
Target Negative Sequence |
919 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-7 |
67 |
Target Residual |
920 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-7 |
67 |
Target Independent Ground |
920 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
32-1 |
Block |
920 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Pickup |
920 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Trip |
920 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target A Over |
920 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target B Over |
920 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target C Over |
920 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target T Over |
920 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target A Under |
920 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target B Under |
920 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target C Under |
920 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-1 |
Target T Under |
920 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIM |
|
|
32-2 |
Block |
920 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Pickup |
920 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Trip |
920 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target A Over |
921 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target B Over |
921 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target C Over |
921 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target T Over |
921 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target A Under |
921 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target B Under |
921 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target C Under |
921 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
32-2 |
Target T Under |
921 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGI |
|
|
40Z |
Block |
921 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Pickup |
921 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Trip |
921 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
VC Pickup |
921 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
VC Trip |
921 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z1 Pickup |
921 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z1 Trip |
921 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z1 Target |
921 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z1 VC Pickup |
922 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z1 VC Trip |
922 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z1 VC Target |
922 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z2 Pickup |
922 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z2 Trip |
922 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z2 Target |
922 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z2 VC Pickup |
922 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z2 VC Trip |
922 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Z |
Z2 VC Target |
922 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
G |
|
|
40Q |
Block |
922 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
GM |
|
|
|
|
|
|
|
|
|
|
|
BE1-11 |
Register Table |
20 |
|
|
|
|
|
9424200774 Rev B |
||
|
|
|
|
|
|
|
|
|
|
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
40Q |
Pickup |
922 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
GM |
|
40Q |
Trip |
922 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
GM |
|
40Q |
Target |
922 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
GM |
|
81-1 |
Block |
922 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-1 |
Pickup |
922 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-1 |
Trip |
922 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-1 |
Target Over |
923 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-1 |
Target Under |
923 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-1 |
Target Rate of Change |
923 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-2 |
Block |
923 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-2 |
Pickup |
923 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-2 |
Trip |
923 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-2 |
Target Over |
923 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-2 |
Target Under |
923 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-2 |
Target Rate of Change |
923 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-3 |
Block |
923 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-3 |
Pickup |
923 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-3 |
Trip |
923 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-3 |
Target Over |
923 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-3 |
Target Under |
923 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-3 |
Target Rate of Change |
923 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-4 |
Block |
923 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-4 |
Pickup |
924 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-4 |
Trip |
924 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-4 |
Target Over |
924 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-4 |
Target Under |
924 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-4 |
Target Rate of Change |
924 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
81-5 |
Block |
924 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-5 |
Pickup |
924 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-5 |
Trip |
924 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-5 |
Target Over |
924 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-5 |
Target Under |
924 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-5 |
Target Rate of Change |
924 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-6 |
Block |
924 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-6 |
Pickup |
924 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-6 |
Trip |
924 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-6 |
Target Over |
924 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-6 |
Target Under |
924 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-6 |
Target Rate of Change |
925 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-7 |
Block |
925 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-7 |
Pickup |
925 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-7 |
Trip |
925 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-7 |
Target Over |
925 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-7 |
Target Under |
925 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-7 |
Target Rate of Change |
925 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-8 |
Block |
925 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-8 |
Pickup |
925 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-8 |
Trip |
925 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-8 |
Target Over |
925 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-8 |
Target Under |
925 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
81-8 |
Target Rate of Change |
925 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
43-1 |
Pulse |
925 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Reset |
925 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Set |
925 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Output |
926 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
926 bit 1 |
|
|
|
|
|
|
43-1 |
Tag Blocking |
926 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Tag Informational |
926 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Untag Blocking |
926 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Untag Informational |
926 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Tag Blocking Status |
926 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-1 |
Tag Informational Status |
926 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Pulse |
926 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Reset |
926 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Set |
926 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Output |
926 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
926 bit 12 |
|
|
|
|
|
|
43-2 |
Tag Blocking |
926 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Tag Informational |
926 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Untag Blocking |
926 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Untag Informational |
927 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Tag Blocking Status |
927 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-2 |
Tag Informational Status |
927 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Pulse |
927 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Reset |
927 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Set |
927 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Output |
927 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
927 bit 7 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Register Table |
BE1-11 |
|
9424200774 Rev B |
|
|
|
|
|
|
21 |
|
|
|
|
|
|
|
|
|
|
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
43-3 |
Tag Blocking |
927 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Tag Informational |
927 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Untag Blocking |
927 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Untag Informational |
927 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Tag Blocking Status |
927 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-3 |
Tag Informational Status |
927 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Pulse |
927 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Reset |
927 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Set |
928 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Output |
928 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
928 bit 2 |
|
|
|
|
|
|
43-4 |
Tag Blocking |
928 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Tag Informational |
928 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Untag Blocking |
928 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Untag Informational |
928 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Tag Blocking Status |
928 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-4 |
Tag Informational Status |
928 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Pulse |
928 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Reset |
928 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Set |
928 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Output |
928 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
928 bit 13 |
|
|
|
|
|
|
43-5 |
Tag Blocking |
928 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Tag Informational |
928 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Untag Blocking |
929 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Untag Informational |
929 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Tag Blocking Status |
929 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
43-5 |
Tag Informational Status |
929 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
86-1 |
Reset |
929 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
86-1 |
Set |
929 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
86-1 |
Out |
929 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
86-2 |
Reset |
929 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
86-2 |
Set |
929 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
86-2 |
Out |
929 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Trip |
929 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Close |
929 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Trip Out |
929 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Close Out |
929 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
TSC Out |
929 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
CSC Out |
929 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
930 bit 0 |
|
|
|
|
|
|
101 |
Tag Blocking |
930 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Tag Informational |
930 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Untag Blocking |
930 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Untag Informational |
930 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Tag Blocking Status |
930 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
101 |
Tag Informational Status |
930 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-1 |
Block |
930 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-1 |
Initiate |
930 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-1 |
Output |
930 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-2 |
Block |
930 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-2 |
Initiate |
930 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-2 |
Output |
930 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-3 |
Block |
930 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-3 |
Initiate |
930 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-3 |
Output |
930 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-4 |
Block |
931 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-4 |
Initiate |
931 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-4 |
Output |
931 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-5 |
Block |
931 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-5 |
Initiate |
931 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-5 |
Output |
931 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-6 |
Block |
931 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-6 |
Initiate |
931 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-6 |
Output |
931 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-7 |
Block |
931 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-7 |
Initiate |
931 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-7 |
Output |
931 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-8 |
Block |
931 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-8 |
Initiate |
931 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
62-8 |
Output |
931 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
79 |
Recloser Fail Alarm |
931 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Reclosing |
932 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Recloser Running |
932 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Recloser Reset |
932 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Recloser Lockout |
932 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Recloser SCB |
932 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Shot 1 |
932 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
|
|
|
|
|
|
|
|
BE1-11 |
Register Table |
22 |
|
|
|
|
|
9424200774 Rev B |
||
|
|
|
|
|
|
|
|
|
|
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
79 |
Shot 2 |
932 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Shot 3 |
932 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Shot 4 |
932 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Reclose Initiate |
932 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Wait |
932 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Drive to Lockout |
932 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Zone Pick Up |
932 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
79 |
Zone Trip |
932 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FI |
|
50BF |
Block |
932 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50BF |
BFI52 |
932 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50BF |
BFI50 |
933 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50BF |
BFRT |
933 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50BF |
BFT |
933 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50BF |
50BF Target |
933 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50BF |
BFI Alarm |
933 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50BF |
Current Detected |
933 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
52 |
Status |
933 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
52 |
52 Alarm |
933 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Breaker Monitor |
Breaker Monitor Block |
933 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
IG Demand Alarm |
933 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
IN Demand Alarm |
933 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
IP Demand Alarm |
933 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
IQ Demand Alarm |
933 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
Var Positive Demand Alarm |
933 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
Var Negative Demand Alarm |
933 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
Watt Forward Demand Alarm |
933 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
Watt Reverse Demand Alarm |
934 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Demand Meter |
S Demand Alarm |
934 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Input 1 State |
934 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Input 2 State |
934 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Input 3 State |
934 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Input 4 State |
934 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact 52 TCM |
934 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 1 State |
934 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 2 State |
934 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 3 State |
934 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 4 State |
934 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 5 State |
934 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output A State |
934 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
System Data |
RF Trigger |
934 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
System Data |
Pickup Logic |
934 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
System Data |
Trip Logic |
934 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
System Data |
Logic Trigger |
935 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
System Data |
Breaker Status |
935 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Flash Failure Alarm |
935 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Micro Failure Alarm |
935 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Calibration Error Alarm |
935 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Calibration Defaults Alarm |
935 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Defaults Loaded Alarm |
935 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
System Overload Alarm |
935 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Power Supply Alarm |
935 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Changes Lost Alarm |
935 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Real-Time Clock Alarm |
935 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Date/Time Set Alarm |
935 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Firmware Changed Alarm |
935 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Frequency Out of Range Alarm |
935 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Ethernet Link Lost Alarm |
935 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
935 bit 15 |
|
|
|
|
|
|
Alarms |
IRIG Sync Lost Alarm |
936 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Logic = None Alarm |
936 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
No User Setting Alarm |
936 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
NTP Sync Lost Alarm |
936 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
DNP Polls Error |
936 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Setting Change Alarm |
936 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Output Override Alarm |
936 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Analog Alarm |
936 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Microprocessor Reset Alarm |
936 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Breaker Monitor 1 |
936 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Breaker Monitor 2 |
936 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Breaker Monitor 3 |
936 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Fault Report Timeout |
936 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 1 |
936 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 2 |
936 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 3 |
936 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 4 |
937 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 5 |
937 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 6 |
937 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 7 |
937 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
|
|
|
|
|
|
|
Register Table |
BE1-11 |
|
9424200774 Rev B |
|
|
|
|
|
|
23 |
|
|
|
|
|
|
|
|
|
|
Name |
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
Alarms |
Programmable Alarm 8 |
937 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Major Alarm |
Alarm Output |
937 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Minor Alarm |
Alarm Output |
937 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Targets |
Targets Active |
937 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Relay Alarms |
Alarm Output |
937 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC Auto |
937 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC D0 |
937 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC D1 |
937 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC D2 |
937 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC D3 |
937 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC Active Alarm |
937 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC Logic Override |
937 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC SG0 |
938 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC SG1 |
938 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC SG2 |
938 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Settings Group |
SGC SG3 |
938 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50-1 |
Target Positive Sequence |
938 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50-1 |
67 Target Positive Sequence |
938 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-2 |
Target Positive Sequence |
938 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50-2 |
67 Target Positive Sequence |
938 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-3 |
Target Positive Sequence |
938 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50-3 |
67 Target Positive Sequence |
938 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-4 |
Target Positive Sequence |
938 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50-4 |
67 Target Positive Sequence |
938 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-5 |
Target Positive Sequence |
938 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50-5 |
67 Target Positive Sequence |
938 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
50-6 |
Target Positive Sequence |
938 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
50-6 |
67 Target Positive Sequence |
938 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-1 |
Target Positive Sequence |
939 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-1 |
67 Target Positive Sequence |
939 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-2 |
Target Positive Sequence |
939 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-2 |
67 Target Positive Sequence |
939 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-3 |
Target Positive Sequence |
939 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-3 |
67 Target Positive Sequence |
939 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-4 |
Target Positive Sequence |
939 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-4 |
67 Target Positive Sequence |
939 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-5 |
Target Positive Sequence |
939 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
51-5 |
67 Target Positive Sequence |
939 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-6 |
Target Positive Sequence |
939 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-6 |
67 Target Positive Sequence |
939 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-7 |
Target Positive Sequence |
939 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
51-7 |
67 Target Positive Sequence |
939 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIT |
|
Alarms |
Programmable Alarm 9 |
939 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 10 |
939 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 11 |
940 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 12 |
940 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 13 |
940 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 14 |
940 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 15 |
940 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Alarms |
Programmable Alarm 16 |
940 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
87N-1 |
Block |
940 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
GT |
|
87N-1 |
Pickup |
940 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
GT |
|
87N-1 |
Trip |
940 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
GT |
|
87N-1 |
Target |
940 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
GT |
|
51TF |
Block |
940 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
T |
|
51TF |
Pickup |
940 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
T |
|
51TF |
Trip |
940 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
T |
|
51TF |
Target |
940 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
T |
|
Reserved |
|
940 bit 14 |
|
|
|
|
|
|
Current Demand Circuit 2 |
3I0 Demand Alarm |
940 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Current Demand Circuit 2 |
IP Demand Alarm |
941 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Current Demand Circuit 2 |
I2 Demand Alarm |
941 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Ground Current Demand Circuit 2 |
IG Demand Alarm |
941 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 6 State |
941 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 7 State |
941 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Output 8 State |
941 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
941 bit 6-8 |
|
|
|
|
|
|
Local Contacts |
Contact Input 5 State |
941 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Input 6 State |
941 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Local Contacts |
Contact Input 7 State |
941 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
941 bit 12-942 bit 5 |
|
|
|
|
|
|
Analog Input Protection 1 |
Block |
942 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 1 |
Pickup |
942 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 1 |
Trip |
942 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 1 |
Target |
942 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 2 |
Block |
942 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 2 |
Pickup |
942 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 2 |
Trip |
942 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
|
|
|
|
|
|
|
BE1-11 |
Register Table |
24 |
|
|
|
|
|
|
9424200774 Rev B |
||
|
|
|
|
|
|
|
|
|
|
|
Name |
|
Description |
Register |
Type |
Bytes |
Writable |
Range |
Style |
|
Analog Input Protection 2 |
Target |
|
942 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 3 |
Block |
|
942 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 3 |
Pickup |
|
942 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 3 |
Trip |
|
943 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 3 |
Target |
|
943 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 4 |
Block |
|
943 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 4 |
Pickup |
|
943 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 4 |
Trip |
|
943 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 4 |
Target |
|
943 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 5 |
Block |
|
943 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 5 |
Pickup |
|
943 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 5 |
Trip |
|
943 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 5 |
Target |
|
943 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 6 |
Block |
|
943 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 6 |
Pickup |
|
943 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 6 |
Trip |
|
943 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 6 |
Target |
|
943 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 7 |
Block |
|
943 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 7 |
Pickup |
|
943 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 7 |
Trip |
|
944 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 7 |
Target |
|
944 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 8 |
Block |
|
944 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 8 |
Pickup |
|
944 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 8 |
Trip |
|
944 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Analog Input Protection 8 |
Target |
|
944 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
Reserved |
|
|
944 bit 6-10 |
|
|
|
|
|
|
49RTD-1 |
Block |
|
944 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
Pickup |
|
944 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
Trip |
|
944 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-1 |
|
944 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-2 |
|
944 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-3 |
|
945 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-4 |
|
945 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-5 |
|
945 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-6 |
|
945 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-7 |
|
945 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-8 |
|
945 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-9 |
|
945 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-10 |
|
945 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-11 |
|
945 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD1-12 |
|
945 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-1 |
|
945 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-2 |
|
945 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-3 |
|
945 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-4 |
|
945 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-5 |
|
945 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-6 |
|
945 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-7 |
|
946 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-8 |
|
946 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-9 |
|
946 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-10 |
|
946 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-11 |
|
946 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-1 |
RTD2-12 |
|
946 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
Block |
|
946 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
Pickup |
|
946 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
Trip |
|
946 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-1 |
|
946 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-2 |
|
946 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-3 |
|
946 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-4 |
|
946 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-5 |
|
946 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-6 |
|
946 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-7 |
|
946 bit 15 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-8 |
|
947 bit 0 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-9 |
|
947 bit 1 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-10 |
|
947 bit 2 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-11 |
|
947 bit 3 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD1-12 |
|
947 bit 4 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-1 |
|
947 bit 5 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-2 |
|
947 bit 6 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-3 |
|
947 bit 7 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-4 |
|
947 bit 8 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-5 |
|
947 bit 9 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-6 |
|
947 bit 10 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-7 |
|
947 bit 11 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-8 |
|
947 bit 12 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-9 |
|
947 bit 13 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
49RTD-2 |
RTD2-10 |
|
947 bit 14 |
Uint16 |
2 |
R |
True=1 False=0 |
FGIMT |
|
|
|
|
|
|
|
|
|
|
Register Table |
BE1-11 |
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