Apple MacBook Pro 13 M1 Late 2020 Schematics
www.repairlap.com
T668 MLB
www.teknisi-indonesia.com
DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE
1
2
3
1
2
4
5
5
6
6
7
7
8
9
10 SOC: POWER (DDR,SRAM)
11
12
13
14
10
11
12
13
14
15
TABLE OF CONTENTS
REFERENCE DESIGN SYNC TABLES
PD PARTS
SOC: Support
SOC: CIO, USB, RESETS, CLOCKS, SWD
SOC: AP I/Os
SOC: LPDP & MIPI
SOC: PCIE
SOC: AOP
SOC: POWER (IO)
SOC: POWER (SOC, CPU, GPU)
SOC: POWER (SRAM)
SOC: POWER (Fixed, PLL's, Filtered)
T668_MLB
T668_KSAITO_MLB_0.11.1
T585_REF_SOC_H13G_0.56.0
AITKEN_T668_MLB
T585_REF_SOC_H13G_0.56.0
AITKEN_T668_MLB
ANDREW_T668_MLB
T585_REF_SOC_H13G_0.56.0
T585_REF_SOC_H13G_0.56.0
T585_REF_SOC_H13G_0.56.0
T585_REF_SOC_H13G_0.56.0
T585_REF_SOC_H13G_0.56.0
T585_REF_SOC_H13G_0.56.0
10/08/2019
10/08/2019
10/09/2019
61
62
63
644
65
66
67
68
69
70
71
72
73
74
158
200
201
220
221
224
230
231
236
237
238
239
242
243
USB-C: SUPPORT
WIFI/BT: MODULE07/17/2019
WIFI/BT: ANTENNA and GND
STORAGE: SSD0 S5E <0>
STORAGE: SSD0 S5E <1>
STORAGE: NON OCARINA SUPPORT
STORAGE: SSD SUPPORT
SECDIS: MIPI MUX
DISPLAY: CONNECTOR, PWR
DISPLAY POWER SEQUENCER
BEN: CONTROLLER
BEN: KEYBOARD
SECDIS: AMR
SECDIS: FPGA
T585_REF_USBC_ACE2_0.23.0
REF_WIRELESS_RASPUTIN
REF_WIRELESS_RASPUTIN
REF_STORAGE_S5E
REF_STORAGE_S5E
REF_STORAGE_NON_OCARINA_SUPPORT
WUDI_T668_MLB
T585_REF_SECDIS_MIPIMUX_0.7.0
AITKEN_T668_MLB
REF_PANELPWR_BNJ
REF_BLC_BEN
REF_BLC_BEN
T585_REF_SECDIS_AMR_0.9.0
REF_SECDIS_SAK
02/01/2020
02/01/2020
04/27/2020
04/27/2020
02/25/2020
01/28/2020
10/02/2019
04/22/2020
11/21/2019
11/21/2019
04/22/2020
15
16
17
18
19
20
21
22
23
24
25
26
27
28
16
17
19
21
SOC: GND
SOC: GND-2
SPI NOR
PROJECT SUPPORT (1/2)
22 PROJECT SUPPORT (2/2)
50
Secure Element
BATTERY CONNECTORS51
52
53
57
58
59
77
78
PBUS SUPPLY & BATTERY CHARGER
BATTERY CHARGER SUPPORT
POWER: 3V8 AON (1/2)
POWER: 3V8 AON (2/2)
POWER: 3V8 AON SUPPORT
PMU: SLAVE INPUT PWR & BUCKS
PMU: SLAVE LDO
T585_REF_SOC_H13G_0.56.0
T585_REF_SOC_H13G_0.56.0
REF_SOC_H13G
AITKEN_T668_MLB
AITKEN_T668_MLB
REF_SE_CERES
AITKEN_T668_MLB
REF_CHARGER_SUONA
REF_CHARGER_SUONA
REF_VR_ICEMAN
REF_VR_ICEMAN
T585_REF_VR_ICEMAN_0.36.0
KEI_T668_MLB
KEI_T668_MLB
01/27/2020
09/18/2019
11/11/2019
02/26/2020
09/18/2019
02/25/2020
04/01/2020
04/09/2020
03/30/2020
04/07/2020
75
77
78
79
80
244
246
247
248
249
25081
82
83
84
85
86
251
252
253
254
256
87 DFR SUPPORT 125704/07/2020
88 258
AUDIO SUPPORT
AUDIO JACK CODEC24576
AUDIO AMPLIFIERS (1/2)
AUDIO AMPLIFIERS (2/2)
AUDIO CONNECTORS: AMPS
AUDIO CONNECTORS: DMIC, JACK
KEYBOARD BLC CONNECTORS
KEYBOARD IOX, SUPPORT
KEYBOARD SIGNAL CONNECTOR, ESD
TRACKPAD SUPPORT
TRACKPAD CONNECTOR
TOUCHID SUPPORT
DFR SUPPORT 2
REF_SPKRAMP_TAS5770
REF_CODEC_CLIFDEN
REF_SPKRAMP_TAS5770
REF_SPKRAMP_TAS5770
KELVIN_T668_MLB
KELVIN_T668_MLB
T668_MLB
REF_KBD_SUPPORT
WUDI_T668_MLB
WUDI_T668_MLB
WUDI_T668_MLB
T585_REF_MESA_SUPPORT_0.11.0
T585_REF_DFR_V3_SUPPORT_0.25.0
T585_REF_DFR_V3_SUPPORT_0.25.0
04/16/2020
04/13/2020
04/16/2020
04/16/2020
09/18/2019
09/24/2019
05/16/2019
02/01/2020
01/28/2020
04/16/2020
04/16/2020
30
31
32
33
34
35
36
37
38
39
40
41
42
7929
80
81
82
83
84
121
123
124
127
128
129
130
131
PMU: SLAVE GPIO & GND
PMU: SLAVE SUPPORT
PMU: MASTER INPUT PWR & BUCKS
PMU: MASTER BUCKS & GND
PMU: MASTER LDO & GPIO
PMU: MASTER SUPPORT
POWER: EXTERNAL LDO
POWER: 5V S2
POWER: 5V S2 SUPPORT
POWER: 3V3 S2
POWER: FETS
POWER: SUPPORT
I2C: SIO, DISP
I2C: ISP, AOP
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
REF_VR_5V_TPS62135
T668_MLB
REF_VR_3V3_TPS62135
KEI_T668_MLB
KEI_T668_MLB
T668_MLB
T668_MLB
04/07/2020
01/27/2020
04/02/2020
04/26/2020
04/23/2020
04/16/2020
09/23/2019
04/16/2020
03/26/2020
01/09/2020
09/10/2019
09/10/2019
06/20/2019
06/20/2019
89
90
91
266
270
271
92 278
93
94
95
96
279
280
282
294
30097
98
301
99 302
100
310 EMC
101
401
FCT
DEBUG: BUTTONS
DEBUG: MISC
DEBUG: LEDS (1/3)
DEBUG: LEDS (2/3)
DEBUG: LEDS (3/3)
DEBUG: P3V8AON ISENSE
DEBUG: VITAMIN-C
DESENSE (1/3)
DESENSE (2/3)
DESENSE (3/3)
POWER ALIASES 1400
POWER ALIASES 2102
KELVIN_T668_MLB
T668_MLB 06/20/2019
T668_MLB
T668_MLB
T668_MLB
T668_MLB
T668_MLB
MANAN_T668_MLB
KEI_T668_MLB
KEI_T668_MLB 09/30/2019
KEI_T668_MLB 09/30/2019
KEI_T668_MLB 10/02/2019
KEI_T668_MLB 11/06/2019
KEI_T668_MLB
01/29/2020
06/20/2019
07/24/2019
07/24/2019
07/24/2019
06/20/2019
02/03/2020
11/04/2019
11/06/2019
43
44
45
46
47
48
49
50
51
52
54
55
56
132
135
136
138
139
140
141
142
144
145
15053
151
152
153
I2C: SMC
SENSORS: POWER HIGH SIDE (1/2)
SENSORS: POWER HIGH SIDE (2/2)
SENSORS: POWER LOW SIDE (1/2)
SENSORS: POWER LOW SIDE (2/2)
SENSORS: POWER SUPPORT
SENSORS: THERMAL (1/2)
SENSORS: THERMAL (2/2)
SENSORS: MOTION
FAN
USB-C: High Speed ATC0
USB-C: High Speed ATC1
USB-C: Support 1 ATC01
USB-C: Support 2 ATC01
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
KEI_T668_MLB
WUDI_T668_MLB
AITKEN_T668_MLB
REF_USBC_ACE2
REF_USBC_ACE2
REF_USBC_ACE2
REF_USBC_ACE2
12/20/2019
04/04/2020
03/10/2020
03/10/2020
01/23/2020
02/04/2020
04/02/2020
01/23/2020
09/23/2019
09/18/2019
02/14/2020
02/14/2020
02/01/2020
02/01/2020
103
104
105
107
108
109
110
111
112
113
114
115
116
402
403
404
405106
406
500
POWER ALIASES 3
POWER ALIASES 4
POWER ALIASES 5
SIGNAL ALIASES 1
SIGNAL ALIASES 2
17.2 RULES
501 17.2 PHYSICAL CSETS
502
503
600
601
17.2 SPACING CSETS, ISO
17.2 SPACING CSETS, CLASS-CLASS
BOM VARIANT TABLES
BOM OPTION TABLES
602
610
BOM ALTERNATES
700
T668_MLB
KEI_T668_MLB
T668_MLB
T668_MLB
T668_MLB
T668_MLB
T668_MLB
06/05/2019
11/06/2019
09/12/2019KEI_T668_MLB
09/18/20 9AITKEN_T668_MLB
05/29/2019
05/13/2019
05/13/2019T668_MLB
05/13/2019
05/13/2019T668_MLB
06/05/2018T668_MLB
06/05/2018T668_MLB
06/05/2018T668_MLB
06/05/2018
06/05/2018
57
58
59
60
154
155
156
157
USB-C: Port Controller ATC0
USB-C: Port Controller ATC1
USB-C: Connector(s)
USB-C: HS Level Shifters
REF_USBC_ACE2
REF_USBC_ACE2
KEI_T668_MLB
REF_USBC_ACE2
02/01/2020
02/01/2020
02/01/2020
02/04/2020
117
999
CHECKPLUS SUPPORT
08/29/2019T668_MLB
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D
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REFERENCE DESIGNS J293 SYNCS FROM
SUB-DESIGN PAGESSUB-DESIGN NAMESOURCE PROJECT VERSION SYNC_DATE/TIME
T585 REF_VR_ICEMAN 57,58 1.14.0
T585 52,53REF_CHARGER_SUONA
224
T585 0.8.0
REF_VR_3V3_TPS62135
REF_SECDIS_MIPIMUX 231T585
REF_DFR_V3_SUPPORTT585 257,258
T585 50
T585 237REF_PANELPWR_BNJ 0.9.0
REF_SE_CERES
REF_SECD S_ AK 243 40.0
244,246,247REF_SPKRAMP_TAS5770
123T585
0.36.0
0.5.0T585 REF_STORAGE_NON_OCARINA_SUPPORT
1.6.0245T585
0.8.0T585 127
0.13.0REF_VR_5V_LT8642S
0.7.0
0.25.0
0.13.0
0.34.0T585 220,221REF_STORAGE_S5E
HARD/
SOFT
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2020/04/27
2 20/04/27
2020/04/27
REFERENCE DESIGNS NO LONGER SYNCS FROM
SUB-DESIGN P G SSUB-DES GN N MESOUR E PROJECT VERSION YNC_DATE/TIME
5-17,19T585 REF_SOC_H13G
T585 REF_PMU_SERA_SIMETRA 77-79,81-83
T585 238,239REF_BLC_BEN
T585 294REF DEBUG_STUFF
T585 242REF_SECDIS_AMR
150-155,157REF_USBC_ACE2T 85
200-201T585 REF_WIRELESS_ ASPUTIN
REF_MESA_SUPPORT 256T585
REF_KBD_SUPPORT 251T585
HARD/
SOFT
<-- WE STOPPED SYNCING SOC AT 0.56.0 DUE TO REF DESIGN DESENSE CAP ADDITIONS CONFLICTING WITH DESENSE TEAM'S REQUESTS FOR J293
<-- WE STOPPED SYNCING PMU AT 0.57.0 DUE TO SLOW UPDATES AND REF DESIGN IS OFF GRID
<-- WE STOPPED SYNCING BLC AT 0.16.0 TO RELAX PLACE NEARS
<-- WE STOPPED SYNCING VITAMIN C AT 0.1.0 SINCE THE REF DESIGN IS INCOMPLETE ND MANY CHANGES ARE NEEDED TO SUPPORT VIT C MK II
<-- WE STOPPED SYNCING AMR REF SINCE THE REF HAS A DIFFERENT APN FOR AMR FOOTPRINT THAN PD USES IN J293'S MCO
<-- WE STOPPED SYNCING USB AT 0.31.0 AS THE 50V CC CAPS WHICH ARE 2.8X MORE EXPENSIVE THAN THE 25V ONES, ALSO LSF0 02 COMBO ADDED
<-- WE STOPPED SYNCING RASPUTIN TO ADD RF CONN BOM OPT ON, CHANGE 100M CLK TPS TO PPS, AND FIX OVERLAPPING IPU TEXT NOTES
<-- WE STOPPED SYNCING MESA SUPPORT AT 0.11.0 SINCE THE REF DESIGN REMOVED A PULL UP AND WE NEED 1V85 ON THE LDO
<-- WE STOPPED SYNCING KBD AT 0.25.0 TO FIX CREF GENERATION ERROR ON PIN Y8
REFERENCE DESIGNS WHERE NET NUDGE WAS NEEDED TO REMOVE CREFER ERRORS
S5E, USBC, SECDIS SAK
B
SYNC_MASTER T668_MLB SYNC_DA E=07/17/2019
PAGE TITLE
A
REFERENCE DESIGN SYNC TABLES
678
35 4
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3 24
www.teknisi-indonesia.com
TOP SIDE STANDOFFS
ALLOW_APPLE_PREFIX=Z
Z0400
2.8OD1.2ID-1.49H-SM
860-01216
CRITICAL
ALLOW_APPLE_PREFIX=Z
Z0401
2.8OD1.2ID-1.49H-SM
860-01216
CRITICAL
ALLOW_APPLE_PREFIX=Z
Z0402
2.8OD1.2ID-1.49H-SM
860-01216
CRITICAL
ALLOW_APPLE_PREFIX=Z
Z0403
2.8OD1.2ID-1.49H-SM
USB-C BOSS
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0420
3.4OD1.75ID-1.12H-SM
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0421
3.4OD1.75ID-1.12H-SM
DFR BOSS
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0430
3.4OD1.75ID-1.5H-SM
860-00392
860-00392
860-01484
TRACKPAD BOSS
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0440
3.5OD1.85ID-1.41H-SM
860-00381
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0441
3.5OD1.85ID-1.41H-SM
860-00381
CPU THERM STAGE HOLE 3.15 MM
OMIT
CRITICAL
ZT0400
3P9R3P15
998-0845
CORNER NEAREST KEYBOARD
DISPLAY BOSS
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0450
2.7X1.8R-1.4ID-0.84H-SM
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0451
2.7X1.8R-1.4ID-0.84H-SM
FAN MTG HOLE 2.0X2.6 MM
OMIT
ALLOW_APPLE_PREFIX=ZT
CRITICAL
ZT0430
TH-NSP
1
SL-2.6X2.0-4.7X4.1
SHIELD CAN ALIGNMENT HOLES
OMIT
ALLOW_APPLE_PREFIX=Z
Z04A0
TH-NSP
SL-1.2X0.4-1.5X0.7
OMIT
ALLOW_APPLE_PREFIX=Z
Z04A1
TH-NSP
SL-1.2X0.4-1.5X0.7
OMIT
ALLOW_APPLE_PREFIX=Z
Z04A2
TH-NSP
SL-1.2X0.4-1.5X0.7
OMIT
ALLOW_APPLE_PREFIX=Z
Z04A3
TH-NSP
SL-1.2X0.4-1.5X0.7
OMIT
ALLOW_APPLE_PREFIX=Z
998-04440
998-04440
998-04440
998-04440
D
CRITICAL
ALLOW_APPLE_PREFIX=Z
Z0404
2.8OD1.2ID-1.49H-SM
CRITICAL
ALLOW_APPLE_PREFIX=Z
Z0405
2.8OD1.2ID-1.49H-SM
CRITICAL
860-01216
860-01216
860-01216
BOTTOM SIDE STANDOFFS
ALLOW_APPLE_PREFIX=Z
Z0410
2.8OD1.2ID-3.15H-SM
860-01485
CRITICAL
ALLOW_APPLE_PREFIX=Z
Z0411
2.8OD1.2ID-3.15H-SM
860-01485
CRITICAL
CPU THERM STAGE HOLES 3.6 MM
OMIT
CRITICAL
ZT0401
4.0R3.6-NSP
998-03850
OMIT
CRITICAL
ZT0402
4.0R3.6-NSP
998-03850
CPU THERM STAGE HOLE OVAL
MLB MTG HOLES 2.1X3.51 MM
OMIT
ALLOW_APPLE_PREFIX=ZT
CRITICAL
ZT0420
TH-NSP
1
SL-2.1X3.51-4.6X6.01
OMIT
ALLOW_APPLE_PREFIX=ZT
CRITICAL
ZT0421
TH-NSP
1
SL-2.1X3.51-4.6X6.01
OMIT
ALLOW_APPLE_PREFIX=ZT
CRITICAL
ZT0422
TH-NSP
1
SL-2.1X3.51-4.6X6.01
Z04A4
TH-NSP
SL-1.2X0.4-1.5X0.7
OMIT
ALLOW_APPLE_PREFIX=Z
Z04A5
TH-NSP
SL-1.2X0.4-1.5X0.7
POGO PINS
ALLOW_APPLE_PREFIX=PP
PP0400
POGO-2.3OD-4.0H-SM
SM-1
998-04440
998-04440
C
DFR WASHER
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0431
4.75OD2.73ID-H0.2
RING-TH
860-01519
ALLOW_APPLE_PREFIX=Z
Z0412
2.8OD1.2ID-3.15H-SM
CRITICAL
ALLOW_APPLE_PREFIX=Z
Z0413
2.8OD1.2ID-3.15H-SM
CRITICAL
860-01485
860-01485
OMIT
CRITICAL
ZT0403
TH-NSP
SL-3.65X3.15-4.5X4.0
ALLOW_APPLE_PREFIX=ZT
998-21974
WIFI COAX STANDOFF
CRITICAL
Z0498
5.25X2.8R-1.4ID-1.5H-SM
860-01704
ALLOW_APPLE_PREFIX=Z
WIFI WASHER
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0432
4.75OD2.73ID-H0.2
RING-TH
AJ FLEX COWLING BOSS
ALLOW_APPLE_PREFIX=Z
CRITICAL
Z0470
3.5OD1.85ID-1.92H-SM
ALLOW_APPLE_PREFIX=PP
PP0401
POGO-2.3OD-4.0H-SM
SM-1
ALLOW_APPLE_PREFIX=PP
PP0402
POGO-2.3OD-4.0H-SM
SM-1
ALLOW_APPLE_PREFIX=PP
PP0403
POGO-2.3OD-4.0H-SM
SM-1
870-09667
870-09667
B
870-09667
FENCE SPMU
FENCE COMBO
CRITICALPART NUMBER REFERENCE DESDESCRIPTION
FENCE,SPMU,X1727 FENCE_SPMU_C770806-24457 FENCE_SPMU CRITICAL
CRITICALPART NUMBER REFERENCE DESDESCRIPTION
870-09667
LANDING CLIP
FENCE_SPMU_SUSFENCE,SPMU,SUS,SBP,X1727806-24550 FENCE_SPMU CRITICAL
CRITICALPART NUMBER BOM OPTIONREFERENCE DESDESCRIPTION
CL P:YESCLIPCLIP,LAND NG,MLB,X1727806-25216 CRITICAL
PAGE TITLE
A
PD PARTS
LANDING CLIP SMALL
FENCE_COMBOFENCE_COMBOFENCE,COMBO,X1727806-24549 CRITICAL
CRITICALPART NUMBER BOM OPTIONREFERENCE DESDESCRIPTION
FENCE USBC
CRITICALPART NUMBER REFERENCE DESDESCRIPTION
FENCE_USBC_C770CRITICAL806-24455 FENCE_USBCFENCE,BURNSIDE BRIDGE,X1727
CRITICALFENCE_USBC806-24548 FENCE,BURNSIDE BRIDGE,SUS,SBP,X1727 FENCE_USBC_SUS
CLIP_SMALL:YESCLIP_SMALLCLIP,LANDING,SMALL,MLB,X1727806-25217 CRITICAL
METAL SLED
CRITICALPART NUMBER BOM OPTIONREFERENCE DESDESCRIPTION
SLED,METAL,X1727 SLED1,SLED2 CRITICAL SLED:YES806-24419
BOM_COST_GROUP=MECHANICALS
34
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BOOT CONFIG ID
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688
618
618
SPI_DFR_MISO
OUT
SPI_DFR_MOSI_R
OUT
SPI_DFR_CLK_R
OUT
BOOT_CFG[2:0]
000
001
010
011
POR ---> 100
101
110
111
102 11 8 6 5 4
PP1V25_AWAKE_IO
MODE
SPI1 NOR (12 MHZ)
SPI1 NOR (12 MHZ) TESTMODE
SPI0 NAND
SPI0 NAND TESTMODE
SPI1 NOR (40 MHZ)
SPI1 NOR ( 0 MHZ) TESTMODE
SPI1 NOR (6 MHZ)
SPI1 NOR (6MHZ) TESTMODE
BOOT_CONFIG2 BOOT_CONFIG1 BOOT_CONFIG0
1
R0502
4.7K
5%
1/20W
MF
201
2
1
R0501
4.7K
5%
1/20W
MF
201
2
S/W READ FLOW
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
3. READ
1
R0500
4.7K
5%
1/20W
MF
20
2
R0533
10K
5%
1/20W
MF
201
R0534
10K
5%
1/20W
MF
201
R0535
10K
5%
1/20W
MF
201
R0536
10K
5%
1/20W
MF
201
21
SOC_JTAG_SEL
21
SOC_TESTMODE
SOC_HOLD_RESET
21
21
SOC_KIS_DFU_SELECT
OUT
OUT
OUT
OUT
9 18
5
5
5
BOARD ID
2 11 8 6 5 4
6
6
6
6
6
BOARD_ID[7:0] IS 8 TOTAL BITS
BOARD_ID[7:5] ARE SET INSIDE THE SOC
BOARD_ID[4:0] A E SET WITH THESE RESIS RS
BOARD_ID[0] IS 0 OR FORM FACTOR AND 1 FO DEV PLATFORM
BOARD_ID[7:0] FOR J293 IS 0B00100100
<RDAR://53744986>
BOARD_ID4
OUT
BOARD_ID3
OUT
BOARD_ID2
OUT
BOARD_ID1
OUT
BOARD_ID0
OUT
S/W READ FLOW
PP1V25_AWAKE_IO
BOARDID4
1
2
R0514
1K
5%
1/20W
MF
201
1
R0513
1K
5%
1/20W
MF
201
2
BOARDID2BOARDID3
1
R0512
1K
5%
1/20W
MF
201
2
BOARDID1 BOARDID0
1
R0511
1K
5%
1/20W
MF
201
2
1
R0510
1K
5%
1/20W
MF
201
2
PP1V25_AWAKE_IO
I2C_SEEPROM_SCL
6
I2C_SEEPROM_SDA
6
SEP EEPROM (128-Kbit)
PP1V8_AWAKE
1
R0540
2.2K
5%
1/20W
MF
201
2
(Write: 0xA2, Read 0xA3)
A1 PER <RDAR://590 9073>
1
R0541
2.2K
5%
1/20W
MF
201
2
7
SCL
6
SDA
VCC
U0500
STOCT
DFN
335S00488
VSS EPAD
VIO
NC
1
C0500
1.0UF
20%
4V
2
X6S
0201
5
2
NC
3
NC
4
NC
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
3. READ
BOARD REVISION
6
OUT
OUT
6
OUT
6
OUT
BOARD_REV0
BOARD_REV1
BOARD_REV2
BOARD_REV3
NOTE: STUFFING RESISTOR MEANS 0
BOARD_REV3
1
R0523
1K
5%
1/20W
MF
201
2
BOARD_REV2
1
R0522
1K
5%
1/20W
MF
201
2
BOARD_REV1
1
R0521
1K
5%
1/20W
MF
201
2
BOARD_REV0
1
R0520
1K
5%
1/20W
MF
201
2
board rev should start at 0b0000 and increment each rev.
S/W READ FLOW
1. SET GPIO AS INPUT
2. ENABLE PU AND DISABLE PD
3. READ
J293 BOARD_REV [3:0] = 0000 : PRE P1
0001 : P1 A0
0010 : P1 A1
0 1 : P1 A1 AUD O
0100 : P2
0101 : EVT
PAGE TITLE
SOC: Support
BOM_COST_GROUP=SOC
378
www.repairlap.com
SOC: CIO, USB, DRAM, RESETS, CLOCKS, SWD, FPWM
www.teknisi-indonesia.com
OMIT_TABLE
U0600
TMLR68A0-B09
BGA
SYM 1 OF 23
933748990100
IN
533568990
4
IN
335589
IN
4
IN
PMU_RESET_L
SOC_FORCE_DFU
OC_REQUEST_DFU1
519
SOC_REQUEST_DFU2
5
SOC_TESTMODE
PMU_ACTIVE_READY
SOC_HOLD_RESET
R2
AA49
AK55
AJ54
AD
AL54
AC1
LP4_IN_RESET_N
FORCE_DFU
REQUEST_DFU1
REQUEST_DFU2
TESTMODE
CFSB
HOLD_RESET
IPD
IPD
RESET
DFU_STATUS
V51
SOC_DFU_STATUS
OUTIN
19 56 89 94
AMUX_OUT can go to TP or to AMUX_IN on PMU
4
18
BI
18
BI
60
IN
60
OUT
SOC_KIS_DFU_SELECT
IN
EUSB_ATC0_P
EUSB_ATC0_N
CIO_A C0_LSRX_1V2
CIO_ATC0_LSTX_1V2
SOC_ATC0_USB_RESREF
5
AB49
BB54
BB55
BE
BE13
BB53
KIS_DFU_SELECT
ATC0_USB_EDP
ATC0_USB_EDM
USB_C0_LSRX
USB_C0_LSTX
ATC0_USB_RESREF
CLOCKS
XI0
XO0
TST_CLKOUT
BE36
BF36
P54
SOC_XTAL24M_IN
SOC_XTAL24M_OUT
TP_TST_CLKOUT
18
SOC_ATCPHY0_RCAL_POS
SOC_ATCPHY0_RCAL_ EG
SOC_ATCPHY1_RCAL_POS
SOC_ATCPHY1_RCAL_NEG
1
R0600
200
1%
1/20W
MF
201
2
1
C0600
10PF
5%
25V
2
C0G
0201
1
R0601
200
1%
1/20W
MF
201
2
1
C0601
10PF
5%
25V
2
C0G
0201
99
1%
MF
201
1
2
24.000MHZ-20PPM-9.5PF-60OHM
OC_24M_O_R
CRITICAL
1
C0650
15PF
5%
50V
2
C0G
0201
1
R0631
10K
5%
1/20W
MF
201
2
CRITICAL
Y0600
1.60X1.20MM
31
42
SOC_FORCE_DFU
5335689905519
CRITICAL
1
C0651
15PF
5%
50V
2
C0G
0201
1
R0632
47K
5%
1/20W
MF
201
2
NC_ATC0_HPD
107
18
BI
18
BI
60
IN
60
OUT
53
BI
53
BI
53
OUT
53
OUT
53
BI
53
BI
53
OUT
53
OUT
53
BI
53
BI
54
BI
54
BI
54
OUT
54
OUT
54
BI
54
BI
54
OUT
54
OUT
EUSB_ATC1_P
EUSB_ATC1_N
CIO_A C1_LSRX_1V2
CIO_ATC1_LSTX_1V2
SOC_ATC1_USB_RESREF
5
NC_ATC1_HPD
107
USB_VBUS_DETECT
5
USBC_ TC0_D2R_P<1>
USBC_ATC0_D2R_N<1>
USBC_ATC0_R2D_C_P<1>
USBC_ATC0_R2D_C_N<1>
USBC_ATC0_D2R_P<2>
USBC_ATC0_D2R_N<2>
USBC_ATC0_R2D_C_P<2>
USBC_ATC0_R2D_C_N<2>
USBC_ TC0_AUX_P
USBC_ATC0_AUX_N
SOC_ATCPHY0_RCAL_POS
5
SOC_ATCPHY0_RCAL_NEG
5
USBC_ATC1_D2R_P<1>
USBC_ATC1_D2R_N<1>
USBC_ATC1_R2D_C_P<1>
USBC_ATC1_R2D_C_N<1>
USBC_ATC1_D2R_P<2>
USBC_ATC1_D2R_N<2>
USBC_ATC1_R2D_C_P<2>
USBC_ATC1_R2D_C_N<2>
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
V48
BC54
BC55
B 3
BE10
BC53
R48
AG1
BE
BF50
BC49
BD49
BE48
BF48
BC47
BD47
AY
AY52
BE52
BF52
BF44
BE44
BD43
BC43
BF46
BE46
BD45
BC45
USB_C0_HPD/TMU_CLK_OUT0
ATC1_USB_EDP
ATC1_USB_EDM
USB_C1_LSRX
USB_C1_LSTX
ATC1_USB_RESREF
USB_C1_HPD/TMU_CLK_OUT1
EUSB_VBUS_DETECT
ATCPHY0_RX0_P
ATCPHY0_RX0_N
ATCPHY0_TX0_P
ATCPHY0_TX0_N
ATCPHY0_RX1_P
ATCPHY0_RX1_N
ATCPHY0_TX1_P
ATCPHY0_TX1_N
ATCPHY0_AUX_P
ATCPHY0_AUX_N
ATCPHY0_RCAL_P
ATCPHY0_RCAL_N
ATCPHY1_RX0_P
ATCPHY1_RX0_N
ATCPHY1_TX0_P
ATCPHY1_TX0_N
ATCPHY1_RX1_P
ATCPHY1_RX1_N
ATCPHY1_TX1_P
ATCPHY1_TX1_N
ATC
SWD
FPW
ANALOGMUX_OUT
SWD_TCK_OUT1
SWD_TMS2
SWD_TMS3
SWD_TMS4
FPWM0/MASTER_SYNC_GEN_0
FPWM1
FPWM2
AL48
AJ1
U54
V54
AH3
V50
Y49
U 0
TP_SOC_AMUX_OUT
SWD_NAND0_SWCLK
SWD_NAND0_SWDIO
NC_SWD_TMS3
TP_SWD_TMS4
IPD
WLAN_TIME_SYNC
KBD_BKLT_PWM
TP_FPWM2
102 11 8 6 5 4
PP1V25_AWAKE_IO
SOC_REQUEST_DFU1
OUT
OUT
BI
106
IN
OUT
1
2
18 106
67 107
67 10
62
72
R0630
10K
5%
1/20W
MF
201
R0651
1/20
SOC_REQUEST_DFU2
102 11 8 6 5 4
PP1V25_AWAKE_IO
USB_VBUS_DETECT
5
1
R0639
0
5%
1/20W
MF
0201
2
54
BI
54
BI
USBC_ATC1_AUX_P
USBC_ATC1_AUX_N
SOC_ATCPHY1_RCAL_POS
5
SOC_A CPHY1_RCAL_NEG
5
BA52
BA51
BF4
BE
ATCPHY1_AUX_P
ATCPHY1_AUX_N
ATCPHY1_RCAL_P
ATCPHY1_RCAL_N
SOC_ATC0_USB_RESREF SOC_ATC1_USB_RESREF
5 5
R0641
200
1%
1/20W
MF
201
2
1
R0640
200
1%
1/20W
MF
201
2
SYNC_MASTER=AITKEN_T6 8_MLB SYNC_DATE=10/08/2019
PAGE TITLE
A
SOC: CIO, USB, RESETS, CLOCKS, SWD
AB E_ LT_HE D
PART NUMBER
Y0600197S0590 EPSON,24MHZ.XTAL197S0591
Y0600197S0588 TXC,24MHZ,XTAL197S0591
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
AB E_ LT_IT M
AB E_ LT_IT M
BOM_COST_GROUP=SOC
35 46
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
all signals are 1.2 unless otherwise specified.
all signals on this page reference PP1V2_AWAKE_GRP if they are 1.2V
if they are 1.8V they reference PP1V8_AWAKE_GRP
U0600
TMLR68A0-B09
BGA
SYM 3 OF 23
SOC: I/Os
18
UT
18
IN
18
OUT
18
OUT
18
OUT
1
IN
1
OUT
18
OUT
18
OUT
76
IN
18
OUT
18
OUT
TDM_SPKRAMP_L_BCLK_R
TDM_SPKRAMP_L_D2R
TDM_SPKRAMP_L_R2D_R
TDM_SPKRAMP_L_FSYNC_R
NC_SOC_I2S0_MCK
106
TDM_SPKRAMP_R_BCLK_R
TDM_SPKRAMP_R_D2R
TDM_SPKRAMP_R_R2D_R
TDM_SPKRAMP_R_FSYNC_R
NC_SOC_I2S1_MCK
6
TDM_CODEC_BCLK_R
TDM_CODEC_D2R
TDM_CODEC_R2D_R
TDM_CODEC_FSYNC_R
TP_SOC_I2S2_MCK
NC_I2S3_BCLK
106
NC_I2S3_D2R
6
NC_I2S3_R2D
6
NC_I2S3_LRCLK
106
NC_I2S3_MCLK
106
AK
AJ3
AJ5
AJ4
AK3
AG3
AF3
AG4
AF2
AG2
AK5
AL6
AJ7
AM4
AK6
AH6
AH4
AG
AJ6
AF5
I2S0_BCLK
I2S0_DIN
I2S0_DOUT
I2S0_LRCK
I2S0_MCK
I2S1_BCLK
I2S1_DIN
I2S1_DOUT
I2S1_LRCK
I2S1_MCK
I2S2_BCLK
I2S2_DIN
I2S2_DOUT
I2S2_LRCK
I2S2_MCK
I2S3_BCLK
I2S3_DIN
I2S3_DOUT
I2S3_LRCK
I2S3_MCK
IPD
IPD
IPD
I2S
SPI
IPD
IPD
IPD
IPD
IPD
SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
SPI4_MISO
SPI4_MOSI
SPI4_SCLK
SPI4_SSIN
AL4
AK2
AK1
AD4
AE4
AF4
AE3
AF53
AF54
AF55
AF52
Y1
W1
AB1
AA1
AC4
AB4
AA4
AB3
SP _DFR_MISO
SPI_DFR_MOSI_R
SPI_DFR_CLK_R
SPI_SOCROM_MISO
SPI_SOCROM_MOSI_R
SPI_SOCROM_CLK_R
SPI_SOCROM_CS_L
SPI_TOUCHID_MISO
SP _TOUCHID_MOSI_R
SPI_TOUCHID_CLK_R
NC_SOC_SPI2_SSIN
SPI_IPD_MISO
SPI_IPD_MOSI_R
SPI_IPD_CLK_R
SPI_IPD_CS_L
SPI_TCON_MISO
SP _TCON_MOSI_R
SPI_TCON_CLK_R
SPI_TCON_CS_L
106
IN
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
4
4
4
17
17
17
17
80
18
18
84
18
18
84
69
69
69
69
1.8V IO
1.8V IO
41
OUT
1
BI
1
OUT
41
BI
41
OUT
41
BI
41
OUT
41
BI
4
OUT
1
BI
I2C_UPC_SCL
I2C_UPC_SDA
I2C_SPKRAMP_L_SCL
I2C_SPKRAMP_L_SDA
I2C_CODEC_SCL
I2C_CODEC_SDA
I2C_SPKRAMP_R_SCL
I2C_SPKRAMP_R_SDA
I2C_DFR_SCL
I2C_DFR_SDA
NC_SPMI2_CLK
106
TP_SPMI2_DATA
W52
V52
AA48
Y48
AB50
Y50
AF6
AE6
AF50
AG49
AK7
AL7
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
I2C3_SCL
I2C3_SDA
I2C4_SCL
I2C4_SDA
AP_SPMI2_SCLK
AP_SPMI2_SDATA
SPMI
SI2C0_SCL
SEP
THROTTLE
IPU FOR ALL
THROTTLE_TRIGGER
THROTTLE_TRIGGER0/MTR_ADC_DOUT
THROTTLE_TRIGGER1/MTR_ADC_CLKOUT
THROTTLE_TRIGG R /PLL_DIGOBS_0
THROTTLE_TRIGGER3/PLL_DIGOBS_1
THROTTLE_TRIGGER4
SI2C0_SDA
SSPI0_MISO
SSPI0_MOSI
SSPI0_SCLK
SGPIO0
SGPIO1
SOCHOT1
AC3
AC2
Y5
Y4
AC5
AD5
AD6
AK52
AK53
AL53
AJ55
AJ53
AJ49
DBL_CLICK_DET
DISABLE_STROBE
I2C_SEEPROM_SCL
I2C_SEEPROM_SDA
FTCAM_DISABLE_L
NC_SSPI0_MOSI
DMIC_DISABLE_L
SOC_SOCHOT_L
BUCK1_THERMAL_THROTTLE_L
BUCK0_THERMAL_THROTTLE_L
SO _THROTTLE_TRIGGER2
PMU_VDDHI_UVWARN_L
PMU_VDDMAIN_UVWARN_L
106
33
IN
74
OUT
4
OUT
BI
74
OUT
74
OUT
6 33 89 91 96 100
OUT
33 34
IN
33 34
IN
19
IN
106
IN
33 34
IN
11 8 5 4
PP1V25_AWAKE_IO
SOC_SOCHOT_L
633899196100
1
R0790
47K
5%
1/20W
MF
201
2
UPC_FORCE_PWR will likely be
removed in the future
TOUCHID_PWR_EN gets
pulled up to S2 on
TOUCHID page
This is OK because
the GPIO is failsafe
PD needed on DFR PAGE
107
107
1 6
106
U0600
TMLR68A0-B09
BGA
SYM 2 OF 23
IN
79
IN
89
7989
IN
OUT
777880
IN
76
IN
55
OUT
UPC_I2C_INT_L
NC_SOC_GPIO01
106
SPKR_ID0
SPKR_ID1
SPKRAMP_RESET_L
SPKRAMP INT_L
CODEC_INT_L
SWD_UPC_SWCLK
NC_SOC_GPIO08
106
TP_SOC_GPI 09
TP_SOC_GPIO10
4
IN
4
IN
4
IN
4
IN
55
BI
BI
IN
84
OUT
86
IN
8694
OUT
575861
OUT
8788
OUT
94
88106
OUT
IN
BOARD_REV0
BOARD_REV1
BOARD_REV2
BOARD_REV3
NC_SOC_GPIO15
106
NC_SOC_GPIO16
106
SWD_UPC_SWDIO0
TP_SWD_UPC_SWDIO1
DFR_TOUCH_ NT_L
IPD_SPI_EN
TOUCHID_INT
TOUCHID_PWR_EN
UPC_FORCE_PWR
DFR_PWR_EN
SPI_DFR CS_L
NC_ENET_SYNC_1588
AJ51
AA50
V53
U53
T53
W53
W50
U52
AC48
R53
R52
N55
AH54
Y52
AA51
R54
AC50
U51
AK50
T52
V49
AJ52
AJ50
AC49
R51
AL49
AF49
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[22]
GPIO[23]
GPIO[24]
GPIO[25]
GPIO[26]
IPU
IPU
IPU
IPU
IPU
IPD
IPD
GPIO
UART
IPD
IPD
IPD
IPU
IPU
UART0_RXD
UART0_TXD
UART1_CTSN
UART1_RTSN
UART1_RXD
UART1_TXD
UART2_CTSN
UART2_RTSN
UART2_RXD
UART2_TXD
UART3_CTSN
UART3_RTSN
UART3_RXD
UART3_TXD
UART4_CTSN
UART4_RTSN
UART4_RXD
UART4_TXD
UART6_RXD
UART6_TXD
UART7_RXD
UART7_TXD
AB53
AC53
AC54
AA53
AA54
AC55
W55
Y54
Y53
Y55
AC51
AC52
AF48
AB52
AJ48
AK48
AL52
AL50
AF51
AG50
AM2
AJ2
UART_DEBUGPRT_D2R
UART_DEBUGPRT_R2D
DFR_1V8_TOUCH_RESET_L
DFR_1V8_DISP_RESET_L
DFR_1V8_DISP_INT
BT_TIME_SYNC_1V8
UART_WLAN_D2R_CTS_L
UART_WLAN_R2D_RTS_L
UART_WLAN_D2R
UART_WLAN_R2D
NC_UART3_D2R_CTS_L
NC_UART3_R2D_RTS_L
NC_UART3_D2R
NC_UART3_R2D
NC_UART4_D2R_CTS_L
NC_UART4_R2D_RTS_L
NC_UART4_D2R
NC_UART4_R2D
UART_TCON_HDMI_D2R
UART_TCON_HDMI_R2D
NC_UART7_RXD
NC_UART7_TXD
106
106
106
106
106
106
106
106
106
106
IN
OUT
OUT
OUT
IN
IN
IN
OUT
IN
OUT
IN
OUT
18 56 89
18 56 89
87 88 89
87 88 89
87 8 89
62 63
62
62
62
62
69 89
69 89
1.8V IO
1.8V IO
s UART2 if your wireless module is 1.2V IO
R2D is for desktop only
NAND0_RESET_L
6646567
4
IN
4
IN
4
IN
4
IN
4
IN
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
W49
BOARD_ID0/SOC_DEBUG1
R55
BOARD_ID1/SOC_DEBUG2
T55
BOARD_ID2/SOC_DEBUG3
V55
BOARD_ID3/SPI0_SSIN
U55
BOARD_ID4
OARD ID
NAND
NAND_SYS_CLK0
NAND_SYS_CLK1
SSD_BFH
SSD_RESETN
AG52
AH53
AH51
AG53
NAND0_CLK24M_0_R
NAND0_CLK24M_1_R
NAND_BFH
NAND0_RESET_L
OUT
OUT
OUT
OUT
67
67
64 65 67
6 64 65 67
NOSTUFF
1
R0791
47K
5%
1/20W
MF
201
2
PAGE TITLE
SOC: AP I/Os
BOM_COST_GROUP=SOC
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
SOC: LPDP & MIPI
NC_LPDPRX_AUX0
106
NC_LPDPRX_AUX1
106
NC_LPDPRX_AUX2
106
NC_LPDPRX_AUX3
1 6
NC_LPDPRX_AUX4
106
NC_LPDPRX_AUX5
1 6
NC_LPDPRX_AUX6
106
NC_LPDPRX_AUX7
106
NC_LPDPRX_AUX8
106
NC_LPDPRX_AUX9
106
NC_LPDPRX_AUX10
106
NC_LPDPRX_AUX11
106
NC_LPDPRX_RX_P_0
107
NC_LPDPRX_RX_N_0
107
NC_LPDPRX_RX_P_1
107
NC_LPDPRX_RX_N_1
107
NC_LPDPRX_RX_P_2
107
NC_LPDPRX_RX_N_2
10
NC_LPDPRX_RX_P_3
107
NC_LPDPRX_RX_N_3
107
NC_LPDPRX_RX_P_4
107
NC_LPDPRX_RX_N_4
107
NC_LPDPRX_RX_P_5
107
NC_LPDPRX_RX_N_5
107
NC_LPDPRX_RX_P_6
107
NC_LPDPRX_RX_N_6
107
NC_LPDPRX_RX_P_7
107
NC_LPDPRX_RX_N_7
107
NC_LPDPRX_RX_P_8
107
NC_LPDPRX_RX_N_8
107
AP7
LPDPRX_AUX_D0_P
AR7
LPDPRX_AUX_ _P
AT7
LPDPRX_AUX_D2_P
AV7
LPDPRX_AUX_D3_P
AW7
LPDPRX_AUX_D4_P
AY7
LPDPRX_AUX_D5_P
AP8
LPDPRX_AUX_D6_P
AR8
LPDPRX_AUX_D7_P
AT8
LPDPRX_AUX_D8_P
AV8
LPDPRX_AUX_D9_P
AW8
LPDPRX_AUX_D10_P
AY8
LPDPRX_AUX_ 1_P
AP1
LPDPRX_RX_D0_P
AP2
LPDPRX_RX_D0_N
AR1
LPDPRX_RX_D1_P
AR2
LPDPRX_RX_D1_N
AT1
LPDPRX_RX_D2_P
AT2
LPDPRX_RX_D N
AV1
LPDPRX_RX_D3_P
AV2
LPDPRX_RX_D3_N
AW1
LPDPRX_RX_D4_P
AW2
LPDPRX_RX_D4_N
AY1
LPDPRX_RX_D5_P
AY2
LPDPRX_RX_D5_N
AP4
LPDPRX_RX_D6_P
AP5
LPDPRX_RX_D6_N
AR4
LPDPRX_RX_D7_P
AR5
LPDPRX_RX_D7_N
AT4
LPDPRX_RX_D8_P
AT5
LPDPRX_RX_D8_N
U0600
TMLR68A0-B09
BGA
SYM 4 OF 23
IPD
DISP_SPI_SCLK/DISP_I2C_SCL
DISP_SPI_SSIN/DISP_I2C_SDA
LPDP_TX0P
LPDP_TX0N
LPDP_TX1P
LPDP_TX1N
LPDP_TX2P
LPDP_TX2N
LPDP_TX3P
LPDP_TX3N
LPDP_TX4P
LPDP_TX4N
LPDP_TX5P
LPDP_TX5N
LPDP_AUX_P
LPDP_AUX_N
LPDP_RCAL_P
LPDP_RCAL_N
DISP_HPD
DISP_POL
DISP_SPI_MISO/DWI_CLK
DISP_SPI_MOSI/DWI_DO
DISP_SPMI_SCLK
DISP_SPMI_SDATA
DISP_FSYNC
DISP_LSYNC
GND_VOID=TRUE
AR55
AR54
AT55
AT54
AU54
AU55
AV55
AV54
AW55
AW54
AY55
AY54
AU52
AU51
AV52
AV51
AG55
AH55
AC6
AC7
AD7
AB6
W4
W3
T49
R50
LPDP_INT_DATA_C_P<0>
LPDP_INT_DATA_C_N<0>
GND_VOID=TRUE
GND_VOID=TRUE
LPDP_INT_DATA_C_P<1>
LPDP_INT_DATA_C N<1>
GND_VOID=TRUE
GN _VOID=TRUE
LPDP_INT_DATA_C_P<2>
LPDP_INT_DATA_C_N<2>
GND_VOID=TRUE
GND_VOID=TRUE
LPDP_INT_DATA_C_P<3>
LPDP_INT_DATA_C_N<3>
GND_VOID=TRUE
NC_LPDP_TX4POS
NC_LPDP_TX4NEG
C_LPDP_TX5POS
NC_LPDP_TX5NEG
LPDP_INT_AUX_C_P
LPDP_INT_AUX_C_N
SOC_LPDP_INT_ CAL_POS
SOC_LPDP_INT_RCAL_NEG
PDP_INT_HPD
NC_DISPLAY_POL
NC_SPI_DISP_BKLT_MISO
NC_SPI_DISP_BKLT_MOSI_R
I2C_DISP_BKLT_SCL
I2C_DISP_BKLT_SDA
NC_DISP_SPMI_CLK
C_DISP_SPMI_DATA
NC_DISP_FSYNC
NC_DISP_BKLT_LSYNC
OUT
OUT
OUT
OUT
OUT
OUT
OUT
06
06
106
106
7
106
106
106
106
OUT
UT
BI
BI
IN
69
69
69
69
69
69
69
69
69
69
69 89
106
42
42
106
IN
OUT
OUT
BI
NC_ISP_I2C0_SCL
106
NC_ISP_I2C0_SDA
106
NC_ISP_I2C1_SCL
106
NC_ISP_I2C1_SDA
106
I2C_CAM_SCL
OUT
I2C_CAM_SDA
BI
NC_ISP_I2C3_SCL
106
NC_ISP_I2C3_SDA
106
NC_FTCAM_RESET_L
OUT
NC_ISP_GPIO1
106
TP_I P_GPIO2
TP_ISP_GPIO3
NC_ISP_SPMI0_CLK106
NC_ISP_SPMI0_DATA
106
NC_ISP_SPMI1_CLK
10
NC_ISP_SPMI1_DATA
106
TP_SENSOR0_CLK
NC_SENSOR1_CLK
106
NC_SENSOR2_CLK
106
NC_SENSOR3_CLK
106
106
106
41 1
41 106
Y2
ISP_I2C0_SCL/ISP_GPIO_8
Y3
ISP_I2C0_SDA/ISP_GPIO_9
AA5
ISP_I2C1_SCL/ISP_GPIO_10
AA6
ISP_I2C1_SDA/ISP_GPIO_11
AA3
ISP_I2C2_SCL
AA2
ISP_I2C2_SDA
AA7
ISP_I2C3_SCL
AB7
ISP_I2C3_SDA
Y6
ISP_GPIO_0
W6
ISP_GPIO_1
Y7
ISP_GPIO_2
W7
ISP_GPIO_3
AG7
ISP_SPMI0_SCLK/ISP_GPIO_5
AF7
ISP_SPMI0_SDATA/ISP_GPIO_4
AG6
ISP_SPMI1_SCLK/ISP_GPIO_7
AH7
ISP_SPMI1_SDATA/ISP_GPIO_6
AD1
SENSOR0_CLK
AE1
SENSOR1_CLK
AD3
SENSOR2_CLK
AF1
SENSOR3_CLK
U0600
TMLR68A0-B09
BGA
SYM 5 OF 23
ISP SPMI
MIPI0C_DPCLK
MIPI0C_ NCLK
MIPI0C_DPDATA0
MIPI0C_DNDATA0
MIPI0C_DPDATA1
MIPI0C_DNDATA1
MIPI1C_DPCLK
MIPI1C_DNCLK
MIPI1C_DPDATA0
MIPI1C_DNDATA0
MIPI1C_DPDAT 1
MIPI1C_DNDATA1
MIPID_DPCLK
MIPID_DNCLK
MIPID_DPDATA0
MIPID_DNDATA0
MIPI_D
MIPI0C_REXT
MIPI1C_REXT
MIPID_REXT
L15
NC_MIPI0C_CLK_POS
L14
NC_MIPI0C_CLK_NEG
K15
NC_MIPI0C_DATA_0_POS
K14
NC_MIPI0C_DATA_0 NEG
M14
NC_MIPI0C_DATA_1_POS
M15
NC_MIPI0C_DATA_1_NEG
GND_VOID=TRUE
L11
MIPI_FTCAM_CLK_P
L12
MIPI_FTCAM_CLK_N
GND_VOID=TRUE
M12
MIPI_FTCAM_DATA_P<0>
M11
MIPI_FTCAM_DATA_N<0>
K 1
NC_MIPI_FTCAM_DA A_POS1
K12
NC_MIPI_FTCAM_DATA_NEG1
GND_VOID=TRUE
K9
MIPI_DFR_CLK_P
K8
MIPI_DFR_CLK_N
GND_VOID=TRUE
GND_VOID=TRUE
L9
MIPI_DFR_DATA_P<0>
L8
MIPI DFR DATA N<0>
GND_VOID=TRUE
K17
L17
SOC_MIPI1C_REXT
M9
SOC_MIPID_REXT
GND_VOID=TRUE
GND_VOID=TRUE
106
106
106
106
106
106
7
7
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
68
68
68
68
106
106
87
87
87
87
NC_LPDPRX_RX_P_9
10
NC_LPDPRX_RX_N_9
107
NC_LPDPRX_RX_P_10
107
NC_LPDPRX_RX_N_10
107
NC_LPDPRX_RX_P_11
107
NC_LPDPRX_RX_N_11
107
LPDPRX0_RCAL_POS
19
LPDPRX0_RCAL_NEG
19
LPDPRX1_RCAL_POS
19
LPDPRX1_RCAL_NEG
19
AV4
LPDPRX_RX_D P
AV5
LPDPRX_RX_D9_N
AW4
LPDPRX_RX_D10_P
AW5
LPDPRX_RX_D10_N
AY4
LPDPRX_RX_D11_P
AY5
LPDPRX_RX_D11_N
AU1
LPDPRX0_RCAL_P
AU2
LPDPRX0_RCAL N
AU4
LPDPRX1_RCAL_P
AU5
LPDPRX1_RCAL_N
DISP_TOUCH_BSYNC0
DISP_TOUCH_BSYNC1
DISP_TOUCH_EB
DFR_BSYNC/DISP_INT
DFR_DISP_TE
T50
R49
U49
AM5
AL51
NC_DISP_TOUCH_BSYNC0
NC_DISP_TOUCH_BSYNC1
NC_DISP_TOUCH_EB
C_BKLT_FAULT_INT_
DFR_DISP_TE
106
06
06
106
IN
88
IN
SOC_MIPI1C_REXT
7
SOC_MIPID_REXT
7
PLACE_NEAR=U0600.K17:6MM
PACK_OPTION=DFR
1
R0800
200
1%
1/20W
MF
201
2
PLACE_NEAR=U0600.L17:6MM
PACK_OPTION=FTCAM
1
R0820
200
1%
1/20W
MF
201
2
SOC_LPDP_INT_RCAL_POS
7
SOC_LPDP_INT_RCAL_NEG
7
1
R0895
200
1%
1/20W
MF
201
2
1
C0895
10PF
5%
25V
2
C0G
0201
SYNC_MASTER=AITKEN_T668_MLB SYNC_DATE=10/08/2019
PAGE TITLE
SOC: LPDP & MIPI
BOM_COST_GROUP=SOC
www.repairlap.com
PER PCISIG SPEC, AC COUPLING CAPS SHOULD BE BETWEEN
www.teknisi-indonesia.com
75 NF AND 265 NF FOR GEN1/2 AND BETWEEN
176 NF AND 265 NF FOR GEN 3/4
R0970 IS NEEDED DUE TO RDAR://53793006
SOC: PCIE
U0600
TMLR68A0-B09
BGA
SYM 6 OF 23
GND_VOID=TRUE
64
IN
64
IN
64
OUT
64
OUT
PCIE_NAND0_D2R_P<0>
PCIE_NAND0_D2R_N<0>
PCIE_NAND0_R2D_C_P<0>
PCIE_NAND0_R2D_C_N<0>
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
BE26
BF26
BC27
BD27
ST_PCIE_RX0_P
ST_PCIE_RX0_N
ST_PCIE_TX0_P
ST_PCIE_TX0_N
GP_PCIE_RX0_P
GP_PCIE_RX0_N
GP_PC E_TX0_P
GP_PCIE_ X0_N
GND_VOID=TRUE
BE30
BF30
GND_VOID=TRUE
GND_VOID=TRUE
BC31
BD31
GND_VOID=TRUE
PCIE_WLBT_D2R_P
PCIE_WLBT_D2R_N
PCIE WLBT_R2D_C_P
PCIE_WLBT_R2D_C_N
IN
IN
OUT
OUT
62
62
62
62
102 11 6 5 4
PP1V25_AWAKE_IO
NAND0_CLKREQ1_L
867
WLBT_CLKREQ_L
86263
NAND0_CLKREQ0_L
867
USBHC_CLKREQ_L
8
1
R0930
47K
1/20W
MF
201 201
2
1
R0940
47K
5%5%
1/20W
MF
201
2
1
R0950
47K
5%
1/20W
MF
2
1
R0970
47K
5%
1/20W
MF
201
2
6467
OUT
6467
OUT
867
BI
67
864
OUT
65
65
IN
65 106
IN
65
OUT
65
OUT
6567
OUT
6567
OUT
867
BI
PCIE_CLK100M_NAND0_0_P
PCIE_CLK 00M_NAND0_0_N
NAND0_CLKREQ0_L
NAND0_PCIE_RESET_L
PCIE_NAND0_D2R_P<1>
PCIE_NAND0_D2R_N<1>
PCIE_NAND0_R2D_C_P<1>
PCIE_NAND0_R2D_C_N<1>
PCIE_CLK100M_NAND0_1_P
PCIE_CLK100M_NAND0_1_N
NAND0_CLKREQ1_L
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
BB37
BC37
AH50
AH52
BE28
BF28
BC29
BD29
BB38
BC38
AH49
ST_PCIE_REF_CLK0_P
ST_PCIE_REF_CLK0_N
ST_PCIE_CLKREQ0_N
ST_PCIE_PERST0_N
ST_PCIE_RX1_P
ST_PCIE_RX1_N
ST_PCIE_TX1_P
ST_PCIE_TX1_N
ST_PCIE_REF_CLK1_P
ST_PCIE_REF_CLK1_N
ST_PCIE_CLKREQ1_N
GP_PCIE_REF_CLK0 P
GP_PCIE_REF_CLK0_N
GP_PCIE_CLKREQ0_N
GP_PCIE_PERST0_N
GP_PCIE_RX1 P
GP_PCIE_RX1_N
GP_PCIE_TX1_P
GP_PCIE_TX1_N
GP_PCIE_REF_CLK1_P
GP_PCIE_REF_CLK1_N
GP_PCIE_CLKREQ1_N
BE40
BF40
AB55
AA52
BE32
BF32
BC33
BD33
BE38
BF38
AA55
PCIE_CLK100M_WLBT_P
PCIE_CLK100M_WLBT_N
WLBT_CLKREQ_L
WLBT_RESET_L
NC_PCIE_USBHC_D2R_POS
NC_PCIE_USBHC_D2R_NEG
NC_PCIE_USBHC_R2D_C_POS
NC_PCIE_USBHC_R2D_C_NEG
NC_PCIE_CLK100M_USBHC_POS
NC_PCIE_CLK100M_USBHC_NEG
USBHC_CLKREQ_L
OUT
OUT
BI
OUT
IN
IN
OUT
OUT
OUT
OUT
62
62
8 62 63
8 62 63
1 6
106
106
106
106
8
TO BE CHECKED WITH SEG- DO NOT MATCH WITH SILVAL
IS THE PULL-UP VOLTAGE CORRECT?
NC_NAND0_PCIE_RESET1_L
106
AH48
ST_PCIE_PERST1_N
GP_PCIE_PERST1_N
GP_PCIE_RX2_P
GP_PCIE_RX2_N
GP_PCIE_TX2_P
GP_PCIE_TX2_N
GP_PCIE_REF_CLK2_P
GP_PCIE_REF_CLK2_N
GP_PCIE_CLKREQ2_N
GP_PCIE_PERST2_N
P55
BE34
BF34
BC35
BD35
BE39
BF39
AH1
AE7
NC_USBHC_RESET_L
NC_PCIE_ENET_D2R_POS
NC_PCIE_ENET_D2R_NEG
NC_PCIE_ENET_R2D_C_POS
NC_PCIE_ENET_R2D_C_NEG
NC_PCIE_CLK100M_ENET_POS
NC_PCIE_CLK100M_ENET_NEG
NC_ENET_CLKREQ_L
NC_ENET_RESET_L
OUT
IN
IN
OUT
OUT
OUT
OUT
BI
OUT
106
106
106
106
106
106
106
106
106
SOC_ST_PCIE_RCAL_POS
8
SOC_ST_PCIE_RCAL_NEG
8
SOC_GP_PCIE_RCAL_POS
8
SOC_GP_PCIE_RCAL_NEG
8
1
R0990
200
1%
1/20W
MF
201
2
1
C0990
10PF
5%
25V
2
C0G
0201
1
R0991
200
1%
1/20W
MF
201
2
1
C0991
10PF
5%
25V
2
C0G
0201
NAND0_PCIE_RESET_L
8646567
WLBT_RESET_L
86263
SOC_ST_PCIE_RCAL_POS
SOC_ST_PCIE_RCAL_NEG
8
NC_MTR_VREF_ANAP
106
NC_MTR_VREF_ANAN
106
NC_MTR VREF_POS
106
NC_MTR_VR F_NEG
106
1
R0941
47K
5%
1/20W
MF
201
2
1
R0951
47K
5%
1/20W
MF
201
2
BC24
BB24
AM3
AL3
AL1
AM1
ST_PCIE_RCAL_P
ST_PCIE_RCAL_N
PAD_MTR_ANALOG_TEST_P
PAD_MTR_ANALOG_TEST_N
PAD_MTR_VREF_P
PAD_MTR_VREF_N
GP_PCIE_RCAL_P
GP_PCIE_RCAL_N
BC25
BB25
SOC_GP_PCIE_RCAL_POS
SOC_GP_PCIE_RCAL_NEG
88
8
SYNC_MASTER=ANDREW_T668_MLB SYNC_DATE=10/09/2019
PAGE TITLE
SOC: PCIE
BOM_COST_GROUP=SOC
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
AOP, NUB, AND SMC GPIO'S ARE REFERENCED TO PP1V25_S2_AOP
SOC: AOP
U0600
TMLR68A0-B09
BGA
SYM 7 OF 23
output if gyro, input for radar
I2C0 is ALS for portables
106
106
106
106
106
106
106
106
106
OUT
OUT
IN
OUT
51106
OUT
51106
IN
51106
IN
74
IN
6263
OUT
6263
OUT
IN
OUT
BI
OUT
BI
74
OUT
74
OUT
NC_R1_DUMP_TRIG
N _ OP_FUNC1
106
NC_R1_RTC_SYNC
NC_R1_INT
NC_SPI_R1_CS_L
NC_AOP_FUNC5
106
SPI_GYRO_CS_L
GYRO_INT
GYRO_MOTION_INT
LID_OPEN
NC_AOP_FUNC10
106
W AN_CONTEXT_A
WLAN_CONTEXT_B
NC_ALS_INT_L
NC_AOP_FUNC14
106
I2C_AOP_ALS_SCL
I2C_AOP_ALS_SDA
NC_I2C_AOP_ENET_SCL
NC_I2C_AOP_ENET_SDA
NC_PDM_CLK1
106
NC_PDM_CLK2
106
PDM_DMIC_CLK3
PDM_DMIC_CLK4
NC_PDM_CLK5
106
NC_PDM_CLK6
106
BB18
BC1
BC12
BC13
BA16
BA13
BA15
BD13
BD16
BA14
BB12
BD 0
BA11
BD18
BA10
BC20
BB19
BB16
BE15
BB9
BC9
BC6
BD9
BC8
BD8
AOP_FUNC[0]
AOP_FUNC[1]
AOP_FUNC[2]
AOP_FUNC[3]
AOP_FUNC[4]
AOP_FUNC[5]
AOP_FUNC[6]
AOP_FUNC[7]
AOP_FUNC[8]
AOP_FUNC[9]
AOP_FUNC[10]
AOP_FUNC[11]
AOP_FUNC[12]
AOP_FUNC[13]
AOP_FUNC[14]
AOP_I2CM0_SCL
AOP_I2CM0_SDA
AOP_I2CM1_SCL
AOP_I2CM1_SDA
AOP_PDM_IN_CLK1/AOP_I2S1_BCLK
AOP_PDM_IN_CLK2/AOP_I2S0_MCK
AOP_PDM_IN_CLK3/AOP_I2S0_LRCK
AOP_PDM_IN_CLK4/AOP_I2S0_DOUT
AOP_PDM_IN_CLK5/AOP_I2S0_DIN
AOP_PDM_IN_CLK6/AOP_I2S0_BCLK
IPD
IPD
IPU
AOP GPIO
AOP I2C
AOP PDM
NUB_CLK_OUT0
NUB_DOCK_ATTENTION/CTM_TRIGGER
NUB_DOCK_CONNECT
NUB_GPIO_0/AOP_FUNC15/NUB_CLK_OUT1
NUB_GPIO_1/AOP_PDM_IN_CLK0
NUB_GPIO_2/AOP_PDM_IN_DATA0
NUB_GPIO_3/AOP LEAP_MADI_IN
IPU
NUB_GPIO_6/AOP_PDM_OUT_DATA0/AOP_FUNC16
NUB GPIO
NUB SPMI
NUB SWD
NUB_GPIO_4/AOP_LEAP_MADI_OUT
NUB_GPIO_5/AOP_PDM_OUT_CLK0
NUB_GPIO_7/A P_ U C17
NUB_GPIO_8/AOP_FUNC18
NUB_GPIO_9/AOP_FUNC19
NUB_GPIO_10/AOP_FUNC20
NUB_GPIO_11/KIS_GPIO0/AOP_FUNC21
NUB_GPIO_12/KIS_GPIO1/AOP_FUNC22
NUB_SPMI0_SCLK
NUB_SPMI0_SDATA
NUB_SPMI1_SCLK
NUB_SPMI1_SDATA
NUB_SWD_TCK_OUT0
NUB_SWD_TMS0
NUB_SWD_TMS1
BA17
BC15
BC17
BD14
BD15
BD21
BD17
BB13
BD19
BD22
BB10
BD12
BD11
BC10
BB7
BD10
BB15
BC14
BA12
BC11
BC18
BC19
BC21
DFR_TOUCH_CLK32K_RESET_L
TP_SOC_DOCK_ATTENTION
SOC_DOCK_CONNECT
NC_BKLT_PWR_ON_SMC_LED_SEL
CODEC_RESET_L
SOC_SW_DBG
IPD_SPI_INT_L
SMC_FIXTURE_MODE_L
CHGR_INT_L
NC_ENET_I2C_LOM_INT_L
NC_ACDC D
NC_ACDC_BURST_EN_L
NC_SPI_DP2HDMI_HOLD_L
NC_HDMI_CEC_AOP_TX
NC_HDMI_CEC_AOP_RX
NC_HDMI_HPD_AOP
SPMI_NUB_MPMU_CLK_R
SPMI_NUB_MPMU_DATA_R
SPMI_NUB_SPMU_CLK_R
SPMI_NUB_SPMU_DATA_R
SWD_NUB_SWCLK
SWD_NUB_PMU_SWDIO
NC_SWD_NUB_R1_SWDIO
OUT
18 106
IN
OUT
OUT
OUT
N
IN
IN
IN
IN
OUT
OUT
OUT
IN
IN
OUT
BI
OUT
BI
OUT
BI
BI
88
9 96
106
76 80
94
106
18 89
106
106
1 6
106
106
106
106
106
18
18
1
18
29 33
29 33
106
DOC_ATTENTION should be a TP
for non dev programs,
SOC_SW_DBG SHOULD GO TO
A LED IF POSSIBLE.
NEEDS A TEST POINT AT MINIMUM
FIXTURE_MODE_L should be aliased to a TP
for non dev programs,
The TP is required
102 11 9
533748990100
IN
PP1V25_S2
PMU_RESET_L
R1083
10K
5%
/2 W
MF
201
NC_PDM_DATA1
106
NC_PDM_DATA2
106
74
IN
74
IN
51
IN
18
OUT
18
OUT
18
OUT
18
BI
1
2
1833
IN
P M_DMIC_DATA3
PDM_DMIC_DATA4
SPI_AOP_GYRO_R1_MISO
SPI_AOP_GYRO_R1_MOSI_R
SPI_AOP_GYRO_R1_CLK_R
NC_AOP_SPMI0_SCLK
106
NC_AOP_SPMI0_SDATA
106
S MI_SE_CLK_R
SPMI_SE_DATA_R
NC_AOP_UART2_D2R
106
NC_AOP_UART2_R2D
106
PMU_CLK32K_SOC
CKP S_W IVE=CLK_DATA_CON
CKPLUS_WAIVE=CLK_DATA_CON
BE21
BE16
BE19
BD5
BF15
BF14
BF17
BF18
BF19
BF20
BF21
BB3
BB4
BE6
BF10
BB5
AOP_PDM_IN_DATA1/AOP_I2S1_MCK
AOP_PDM_IN_DATA2/AOP_I2S1_LRCK
IPD
AOP_PDM_IN_DATA3/AOP_I2S1_DOUT/AOP_PDM_IN_CLK7
IPD
AOP_PDM_IN_DATA4/AOP_I2S1_DIN/AOP_PDM_IN_CLK8
AOP_SPI0_MISO
AOP_SPI0_MOSI
AOP_SPI0_SCLK
AOP_SPMI0_SCLK/AOP_UART0_TXD
AOP_SPMI0_SDATA/AOP_UART0_RXD
AOP_SPMI1_SCLK/AOP_UART1_TXD
AOP_SPMI1_SDATA/AOP_UART1_RXD
AOP_UART2_RXD
AOP_UART2_TXD
RT_CLK32768
CFSB_AON
COLD_RESETN
AOP SPI
AOP SPMI
AOP UART
AOP RESET
JTAG
SMC I2C
SMC UART
JTAG_SEL
IPU
IPU
IPU
IPD
SMC_I2CM0_SCL
SMC_I2CM0_SDA
SMC_I2CM1_SCL/SMC_UART1_TXD
SMC_I2CM1_SDA/SMC_UART1_RXD
SMC_I2CM2_SCL
SMC_I2CM2_SDA
SMC_I2CM3_SCL
SMC_I2CM3_SDA
SMC_I2CM4_SCL
SMC_I2CM4_SDA
IPU
SMC_UART0_RXD
SMC_UART0_TXD
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
BE4
BF5
BF16
BC1
BB1
BF7
BC3
BC2
BD4
BB2
BD6
BC5
BC7
BD7
BE7
BF9
BF4
BF8
SOC_JTAG_SEL
SWD_SOC_SWCLK
TP_JTAG_SOC_TDI
TP_JTAG_SOC_TDO
SWD_SOC_SWDIO
TP_JTAG_SOC_TRST_L
I2C_SMC_PWR_SCL
I2C_SMC_PWR_SDA
I2C_SMC_UPC_SCL
I2C_SMC_UPC_SDA
I2C_SMC_SNS1_SCL
I2C_SMC_SNS1_SDA
I2C_SMC_IPD_SCL
I2C_SMC_IPD_SDA
I2C_SMC_SNS0_SCL
I2C_SMC_SNS0_SDA
UART_SMC_DEBUGPRT_D2R
UART_SMC_DEBUGPRT_R2D
18
18
18
IN
IN
BI
O T
BI
OUT
BI
OUT
BI
OUT
OUT
BI
IN
OUT
I
4 18
18 56 89
18 56 89
106
106
43 89
3
43
43
106
106
43
43
56 89
56 89
102 11 9
PP1V25_S2
TP_AON_SLEEP1_RESET_L
18
33100
OUT
XW1022
SHORT-14L-0.1MM SM
1860
BI
1860
BI
SOC_WDOG
21
SOC_DBG_PROBE_VALID
EUSB_DBG_P
EUSB_DBG_N
SOC_USBDBG_RESREF
1
2
R1042
200
1%
1/20W
MF
1
BB21
BF12
BF6
BF24
BE24
BE23
AON_SLEEP1_RESETN
WDOG
DBG_PROBE_VALID
DBG_USB_EDP
DBG_USB_EDM
DBG_USB_RESREF
AOP DEBUG
SMC GPIO
IPU
SMC_GPIO0
SMC_GPIO1
SMC_FPWM0
SMC_FPWM1
BF11
BF13
BE12
BE9
UPC_SMC_I2C_INT_L
NC_SMC_GPIO1
SMC_FAN_PWM
SMC_FAN_TACH
106
IN
OUT
IN
107
52 106
52
SOC_DOCK_CONNECT
1
R1066
47K
5%
1/20W
MF
201
2
9 96
PAGE TITLE
SOC: AOP
BOM_COST_GROUP=SOC
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
SOC: POWER (DDR,SRAM)
101 10
PP1V8_S2SW_VDD1
104
PP1V2_AWAKE_PLL
102
101 1
PP1V06_S2SW_DRAM
PP0V6_S1_VDDQL
DDR0_ZQ
10
DDR1_ZQ
10
DDR4_ZQ
10
DDR5_ZQ
10
CRITICAL
1
C1100
1.0UF
20%
4V
2
X6S
0201
PLACE_NEAR=U0600 A5:5MM
PLACE_NEAR=U0600 A7:5MM
PLACE_NEAR=U0600 A33:5MM
PLACE_NEAR=U0600 A35:5MM
CRITICAL
1
C1101
2
1
C1113
0.22UF
20%
6.3V
2
X6S-CERM
0201
1
R1161
240
%
1/20W
MF
201
2
1.0UF
20%
4V
X6S
0201
CRITICAL
1
2
1
C1112
0.1UF
10%
6.3V
2
X6S
0201
1
C1111
2.2UF
20%
4V
2
X6S-CERM
0201
1
R1162
240
1%
1/20W
MF
201
2
C1102
1.0UF
20%
4V
X6S
0201
80UM_STEN
C1105
11UF
1
2
1
R1163
240
1/20W
MF
201
2
1
2
20%
2.5V
X6T
0402
3
4
1
C1110
0.1UF
10%
6.3V
2
X6S
0201
1
C1115
1.0UF
20%
4V
2
X6S
0201
DDR0_RREF
10
DDR1_RREF
10
DDR2_RREF
10
DDR3_RREF
10
DDR4_RREF
10
DDR5_RREF
10
DDR6_RREF
10
DDR7_RREF
10
DDR0_ZQ
10
DR1_ZQ
10
DDR4_ZQ
10
DDR5_ZQ
10
DDR0_ZQ1
10
DDR1_ZQ1
10
DDR4_ZQ1
10
DDR5_ZQ1
10
%
C1103
12PF
5%
25V
NP0-C0G
0201
80UM_STEN
C1106
11UF
20%
2.5V
X6T
0402
1
4
2
1
R1164
240
1%
1/20W
MF
201
2
1
2
80UM_STEN
C1107
1
3
1
C1114
0.01UF
10%
25V
2
X7R
0201
C1104
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
11UF
20%
2.5V
X6T
0402
3
4
2
1
R1165
240
%
1/20W
MF
201
2
D21
D22
D48
D49
D7
D8
E21
E35
E48
E8
D34
D35
AJ19
AG19
AE13
T25
AA29
Y31
T33
AC43
AJ14
AH14
AC14
R25
T29
T30
T36
AA42
J1
H1
G1
A26
A31
A32
G55
H55
A5
A7
A33
A35
A6
A8
A34
A36
1
R1166
240
1%
1/20W
MF
201
2
U0600
TMLR68A0-B09
BGA
SYM 9 OF 23
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDD1_S2
VDDIO12_PLL_DDR0
VDDIO12_PLL_DDR1
VDDIO12_PLL_DDR2
VDDIO12_PLL_DDR3
VDDIO12_PLL_DDR4
VDDIO12_PLL_DDR5
VDDIO12_PLL_DDR6
VDDIO12_PLL_DDR7
VDDIO11_RET_DDR0_S2
VDDIO11_RET_DDR1_S2
VDDIO11_RET_DDR2_S2
VDDIO11_RET_DDR3_S2
VDDIO11_RET_DDR4_S2
VDDIO11_RET_DDR5_S2
VDDIO11_RET_DDR6_S2
VDDIO11_RET_DDR7_S2
DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF
DDR4_RREF
DDR5_RREF
DDR6_RREF
DDR7_RREF
DDR0_ZQ[0]
DDR1_ZQ[0]
DDR4_ZQ[0]
DDR5_ZQ[0]
DDR0_ZQ[1]
DDR1_ZQ[1]
DDR4_ZQ[1]
DDR5_ZQ[1] VDD2_S2
1
R1167
240
%
1/20W
MF
201
2
1
R1168
240
1%
1/20W
MF
201
2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
VDD2_S2
B30
B31
B52
F23
F25
F50
F52
G24
G26
G51
G53
H23
H25
H50
H52
J24
J26
J51
J53
P5
P24
P32
P51
B4
B3
B25
B26
B53
F4
F6
F31
F33
G3
G5
G30
G32
H4
H6
H31
H33
J3
J5
J30
J32
P6
P23
P33
P50
PP1V06_S2SW_DRAM
3
4
3
4
80UM_STEN
C1121
4.3UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1126
4.3UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1120
4.3UF
20%
2.5V
X6T
0402
1
2
80UM_STEN
C1125
4.3UF
20%
2.5V
X6T
0402
1
2
80UM_STEN
C1122
4.3UF
1
3
80UM_STEN
C1127
4.3UF
1
3
10110
20%
2.5V
X6T
0402
2
20%
2.5V
X6T
0402
2
3
4
3
4
80UM_STEN
C1123
4.3UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1128
4.3UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1124
4.3UF
1
3
80UM_STEN
C1129
4.3UF
1
3
20%
2.5V
X6T
0402
2
20%
2.5V
X6T
0402
2
PP0V6_S1_VDDQL
3
4
3
4
3
4
80UM_STEN
C1132
4.3UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1136
4 3UF
20%
5
X6T
0402
1
4
2
1
C1150
12PF
5%
25V
2
NP0-C0G
3
3
0201
1
C1151
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
80UM_STEN
C1131
4.3UF
U0600
TMLR68A0-B09
BGA
SYM 8 OF 23
AA14
AA16
AA40
AB15
AB41
AC16
AC40
AD15
AE16
AF15
AG14
AH15
AK15
AL14
AL16
AM15
AM17
3
4
3
4
B21
B23
B33
B35
B50
B6
B8
C22
C24
C3
C32
C34
C49
C5
C51
C53
C7
D23
D25
D31
D33
D4
D50
D52
D6
E24
E26
E3
E30
E32
E51
E53
K24
K26
K3
K30
K32
K5
K51
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
VDDQL_S1
K53
L23
L25
L31
L33
L4
L50
L52
L6
M24
M26
M3
M30
M32
M5
M51
M53
N25
N31
N4
N52
T16
T18
T20
T22
T26
T28
T32
T38
T40
U14
U15
U17
U19
U21
U23
U25
U27
U29
U31
U33
U35
U37
U39
V16
V22
V24
V26
V32
V34
V40
W14
W40
Y15
80UM_STE
C1133
4.3UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1140
4.3UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1134
1
3
80UM_STEN
C1141
1
3
4.3UF
20%
5V
X6T
0402
4
2
4 3UF
20%
2.5V
X6T
0402
4
2
3
3
20%
2.5V
X6T
0402
1
2
80UM_STEN
C1135
4.3UF
20%
2.5V
X6T
0402
1
2
80UM_STEN
C1142
4.3UF
20%
2.5V
X6T
0402
1
2
10110
101 10
DDR0_ZQ1
10
DDR1_ZQ1
10
DDR4_ZQ1
10
DDR5_ZQ1
10
PP0V6_S1_VDDQL
DDR0_RREF
10
DDR1_RREF
10
DDR2_RREF
10
DDR3_RREF
10
DDR4_RREF
10
DDR5_RREF
10
DDR6_RREF
10
DDR7_RREF
10
PLACE_NEAR=U0600 A6:5MM
PLACE_NEAR=U0600 A8:5MM
PLACE_NEAR=U0600 A34:5MM
PLACE_NEAR=U0600 A36:5MM
1
R1169
240
1%
1/20W
MF
201
2
PLACE_NEAR=U0600 J1: MM
PLACE_NEAR=U0600 H1: MM
PLACE_NEAR=U0600.G1:5MM
PLACE_NEAR=U0600 A26:5MM
PLACE_NEAR=U0600 A31:5MM
PLACE_NEAR=U0600 A32:5MM
PLACE_NEAR=U0600 G55:5MM
PLACE_NEAR=U0600.H55:5MM
1
R1170
240
1%
1/20W
MF
201
2
1
R1171
240
1%
1/20W
MF
201
2
1
R1172
240
1%
1/20W
MF
201
2
1
R1173
240
1%
1/20W
MF
201
2
1
R1174
240
1%
1/20W
MF
201
2
1
R1175
240
1%
1/20W
MF
201
2
1
R1176
240
1%
1/20W
MF
201
2
PAGE TITLE
SOC: POWER (DDR,SRAM)
BOM_COST_GROUP=SOC
2
1
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
102 9
102
PP1V25_S2
PP1V25_S2
Internally generated rail
PP0V6_S2_GRP1
VOLTAGE=0.6V
PP0V6_S2_GRP2
20%
2.5V
X6S
0201
1
2
1
C1210
2.2UF
20%
4V
2
X6S-CERM
0201
1
C1213
2.2UF
20%
4V
2
X6S-CERM
0201
C1200
4UF
C1201
4UF
20%
2.5V
X6S
0201
1
C1211
0.1UF
10%
6.3V
2
X6S
0201
SOC: POWER (IO)
VOLTAGE=0.6V
1
2
U0600
TMLR68A0-B09
BGA
SYM 14 OF 23
C1234
2.2UF
20%
X6S-CERM
4V
0201
AR40
AP40
BB22
AY23
1
2
AY25
AY27
BA24
BA26
VDD06_GRP1_S2
VDD06_GRP2_S2 VDD2_S2_SENSE2
VDDDIO_HIB_S4
VDDIO12_ OP_S2
VDDIO12_AOP_S2
VDDIO12_AOP_S2
VDDIO12_AOP_ 2
VDDIO12_AOP_S2
VDD2_S2_SENSE1
VDD_PCPU_SENSE
VDD_ECPU_ ENSE
VDD_GPU_SENSE
VDD_SOC_S1_SENSE
VDD_DISP_S1_SENSE
VDD_DCS_SENSE
VDDQL_SENSE
B10
B37
AD36
AN23
AC23
AH22
Y17
AN17
AN15
VSNS_VDD2_1
VSNS_VDD2_2
VSNS_VDD_PCPU
VSNS_VDD_ECPU
VSNS_VDD_GPU
VSNS_VDD_SOC
VSNS_VDD_DISP
VSNS_VDD_DCS
VSNS_VDDQL
48
48
45 48
45 48
45 48
45 48
48
48
48
102 8 6 5 4
PP1V25_AWAKE_IO
CRITIC L
20%
6.3V
0402
1
2
C1233
10UF
CER-X6S
138S00073
XW1232
SM
21
XW1231
SM
VOLTAGE=1.25V
97
PP1V25_AWAKE_GRP5
VOLTAGE=1.25V
21
PP1V25_AWAKE_GRP4
97
C1232
2.2UF
20%
X6S-CERM
0201
102 97
PP1V8_AWAKE
AP39
XW1230
SM
20%
4V
0201
1
2
C1231
2.2UF
X6S-CERM
1
2
VOLTAGE=1.25V
21
PP1V25_AWAKE_GRP3
97
20%
4V
0201
1
2
C1230
2.2UF
X6S-CERM
AF41
AG42
AH40
AL40
AN40
AT40
AV40
AP16
AR17
AT16
AU17
AV16
AW17
AP41
AR41
VDDIO12_GRP1_S2
VDDIO12_GRP3
VDDIO12_GRP3
VDDIO12_GRP3
VDDIO12_GRP3
VDDIO12_GRP3
VDDIO12_GRP4
VDDIO12_GRP4
VDDIO12_GRP5
VDDIO12_GRP5
VDDIO12_GRP5
VDDIO12_GRP5
VDDIO12_GRP5
VDDIO12_GRP5
VDDIO18_GRP1
VDDIO18_GRP1
VSS_PCPU_SENSE
VSS_DDR_SENSE
VSS_SENSE1
VSS_S NSE2
AD37
AN16
B9
B36
VSNS_VSS_PCPU
VSNS_VSS_DDR
VSNS_VSS_1
VSNS_VSS_2
45 48
48
48
48
C1240
2.2UF
2 %
X6S-CERM
0201
1
V
2
SOC: POWER (IO)
BOM_COST_GROUP=SOC
12
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
4
SOC: POWER (CPU, GPU)
80UM_STEN
C1310
11UF
20%
2.5V
X6T
0402
1
3
4
2
80UM_STEN
C1318
11UF
20%
2.5V
X6T
0402
1
2
101 12
80UM_STEN
C1311
11UF
1
3
20%
2 5V
X T
0402
2
4
80UM_STEN
C1312
11UF
20%
2.5V
X6T
0402
1
3
2
80UM_STEN
C1319
11UF
20%
2.5V
X6T
0402
1
3
4
2
PPVDD_PCPU WAKE
25V
0201
3
1
2
80UM_STEN
C1314
11UF
2.5V
0402
1
2
C1300
3.0PF
+/-0.1PF
NP0-C0G
80UM_STEN
C1313
11UF
20%
2.5V
X6T
0402
1
3
4
4
2
C1301
NP0-C0G
20%
X6T
3
4
12PF
5%
25V
0201
80UM_STEN
C1315
11UF
20%
2.5V
X6T
0402
1
2
0.575V @ 4400MA
U0600
TMLR68A0-B09
BGA
SYM 11 OF 23
AE33
AE35
AE36
AE37
AF33
AF36
AF39
AG34
AG38
AH34
AH39
AJ33
AJ34
AK29
AK33
1
2
80UM_STEN
C1316
11UF
20%
2.5V
X6T
0402
1
3
4
4
2
80UM_STEN
C1317
1
3
11UF
20%
2.5V
X6T
0402
4
2
3
AK35
AK36
AK38
AK40
AK41
AK42
AK43
AK44
AK45
AK46
AL30
AL32
AL37
AL41
AL42
AL43
AL44
AL45
AL46
AM29
AM34
AM38
AM41
AM42
AM43
AM44
AM45
AM46
AM47
AM48
AM49
AM50
AM51
AM52
AM53
AM54
AM55
AN33
AN34
AN38
AN42
AN43
AN44
AN45
AN46
AN47
AN48
AN49
AN50
AN51
AN52
AN53
AN54
AN55
AP29
AP33
AP38
AP43
AP44
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_ CPU
VDD_PC U
VDD_PCPU
VDD_PCPU
VDD_PCPU
VDD_ECPU
VDD_ECPU
VDD_ECPU
VDD_ECPU
VDD_ CPU
VDD_EC U
VDD_ECPU
VDD_ECPU
VDD_ECPU
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SO _S1
VDD_SOC_ 1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SO _S1
VDD_SOC_ 1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SO _S1
VDD_SOC_ 1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SO _S1
VDD_SOC_ 1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
VDD_SOC_S1
AP45
AP46
AP47
AP48
A 49
AP50
AP51
AP52
AR30
AR32
AR33
AR35
AR36
AR37
A 39
AK25
AL26
AL28
AL29
AN24
AN29
AP25
AR26
A 28
AB23
AC33
AC38
AE23
AE32
AE38
AF28
AG23
AG39
AJ20
AJ22
AJ24
AJ26
AJ28
AJ30
AJ32
AL20
AL22
A 24
AM39
AN18
AN20
AN22
AR18
AR22
AR24
AT33
AT35
A 37
AU18
AU20
AU22
AU24
AU26
AU28
AU30
AU38
Y21
6
Y36
PPVDD_PCPU_AWAKE
PPVDD_ECPU_AWAKE
80UM_STEN
C1320
1
80UM_STEN
C1330
11UF
20%
2.5V
X6T
0402
80UM_STEN
C1334
11UF
20%
2.5V
X6T
0402
1
3
11UF
20%
2.5V
X6T
0402
4
2
31
4
80UM_STEN
C1335
1
80UM_STEN
C1321
3
1
80UM_STEN
C1331
11UF
20%
2.5V
X6T
0402
1
2
11UF
20%
2.5V
X6T
0402
11UF
20%
2.5V
X6T
0402
4
2
3
4
80UM_STEN
C1336
1
3
80UM_STEN
C1322
3
1
80UM_STEN
C1332
11UF
20%
2.5V
X6T
0402
1
2
11UF
20%
2.5V
X6T
0402
3
11UF
20%
2.5V
X6T
0402
4
2
3
80UM_STEN
C1337
1
10112
80UM_STEN
C1323
3
1
80UM_STEN
C1333
11UF
20%
2.5V
X6T
0402
1
2
11UF
20%
2.5V
X6T
0402
3
11UF
PPVDD_GPU_AWAKE
101 12
80UM_STEN
C1324
20%
2.5V
X6T
0402
2
4
3
4
PPVDD_SOC_S1
3
11UF
2.5V
0402
1
2
20%
X6T
20%
2.5V
X6T
0402
3
101
4
1
C1341
3.0PF
+/-0.1PF
25V
2
N 0-C0G
02 1
3
80UM_STEN
C1351
11UF
2 %
2.5V
X6T
0402
1
3
4
2
101
80UM_STEN
C1352
11UF
20%
2.5V
X6T
0402
1
3
4
2
AA24
AA26
AA28
AA31
A 33
AA35
AA37
AB25
AB27
AB28
AB30
AB32
AB34
AB36
AC24
AC26
AC31
AC35
AC37
AD25
AD27
AD32
AD34
AD41
A 42
AD43
AD44
AD45
AD46
AD47
AD48
AD49
AD50
AD51
A 52
AD53
AD54
AD55
AE24
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
1
C1340
12PF
5%
25V
2
NP0-C0G
0201
80UM_STEN
C1325
11UF
3
4
1
2
80UM_STEN
C1350
11UF
20%
2.5V
X6T
0402
1
4
2
U0600
TMLR68A0-B09
BGA
SYM 12 OF 23
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_GPU
VDD_DISP_S1
VDD_DISP_S1
VDD_DISP_S1
VDD_DISP_S1
VDD_DISP_S1
VDD_DISP_S1
VDD_DISP_S1
VDD_DISP_S1
VDD_DISP_S1
AE26
AE27
AE29
AE30
AE31
AE42
AE43
AE44
AE45
AE46
AE47
AE48
AE49
AE50
AE 1
AE52
AE53
AE54
AE55
AF24
AF32
AG25
AG27
AG31
AG33
AA19
AA21
AA23
AB22
AC19
AD22
AE19
AE21
AG 1
PPVDD_GPU_ WAKE
80UM_STEN
C1353
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1354
3
1
PPVDD_DISP_S1
1
C1370
12PF
5%
25V
2
NP0-C0G
0201
11UF
20%
2 5V
X6T
0402
3
4
2
80UM_STEN
C1361
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1365
11UF
2.5V
0402
1
2
80UM_STEN
C1355
11UF
20%
2.5V
X6T
0402
1
2
80UM_STEN
C1362
11UF
1
3
20%
X6T
3
4
4
20%
2.5V
X6T
0402
2
80UM_STEN
C1356
3
1
3
4
11UF
20%
2 5V
X6T
0402
3
4
2
80UM_STEN
C1363
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1366
11UF
20%
2.5V
X6T
0402
31
4
80UM_STEN
C1357
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1364
11UF
20%
2.5V
X6T
0402
1
3
2
10112
3
101
3
4
4
4
4
4
2
2
2
2
PAGE TITLE
SOC: POWER (SOC, CPU, GPU)
BOM_COST_GROUP=SOC
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
SOC: POWER (SRAM, SOC)
U0600
TMLR68A0-B09
BGA
SYM 10 OF 23
101
PVDD_CPU_SRAM_AWAKE
80UM_STEN
C1400
11UF
20%
2.5V
X6T
0402
1
PPVDD_DCS_S1
101
3
4
2
80UM_STEN
C1401
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1402
11UF
2.5V
0402
1
3
2
80UM_STEN
C1410
11UF
20%
2.5V
X6T
0402
1
2
20%
X6T
4
80UM_STEN
3
4
80UM_STEN
C1411
3
C1403
11UF
20%
2.5V
X6T
0402
1
4
2
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
3
80UM_STEN
3
C1404
11UF
20%
2.5V
X6T
0402
1
3
4
2
C1412
11UF
20%
2.5V
X6T
0402
1
3
4
2
80UM_STEN
C1405
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
C1413
11UF
20%
2.5V
X6T
0402
1
4
2
AE34
AE39
AG36
AH35
AH37
AJ36
AJ38
AK27
AK31
AK37
AL33
AL35
AL38
1
C1406
12PF
5%
25V
NP0-C0G
0201
3
3
1
C1407
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
AM25
AM26
AM31
AM36
AN26
AN27
AN30
AN32
AN35
AN37
AP27
AP36
AR31
AR34
AR38
AA39
AB17
AB38
AC18
AC39
AD17
AE18
AF17
AG18
AJ18
AK17
AL18
VDD CPU_SRAM
VDD CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD CPU_SRAM
VDD CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD CPU_SRAM
VDD CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD DCS_S1
VDD DCS_S1
VDD_DCS_S1
VDD_DCS_S1
VDD_DCS_S1
VDD_DCS_S1
VDD_DCS_S1
VDD_DCS_S1
VDD_DCS_S1
VDD_DCS_S1
VDD DCS_S1
VDD DCS_S1
W17
VDD_DCS_S1
W22
VDD_DCS_S1
W24
VDD_DCS_S1
W26
VDD_DCS_S1
W31
VDD_DCS_S1
W33
VDD_DCS_S1
W35
VDD_DCS_S1
W39
VDD_DCS_S1
Y18
VDD DCS_S1
Y20
VDD DCS_S1
Y23
VDD_DCS_S1
Y25
VDD_DCS_S1
Y27
VDD_DCS_S1
Y29
VDD_DCS_S1
Y32
VDD_DCS_S1
Y34
VDD_DCS_S1
Y38
VDD_DCS_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_ 1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_ 1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_ 1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_ 1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
VDD_SRAM_S1
AA18
AA32
B2
AB24
AB31
AB35
AC21
AC28
AC30
AD20
AD21
AD24
AD2
AD30
AD35
AF20
AF22
AF26
AF30
AG28
AH19
AH21
H2
AH25
AH27
AH29
AH31
AK19
AK21
AK23
AM19
AM21
M2
AP21
AP23
AT19
AT21
AT23
AT25
AT27
AT29
AT31
AT3
AU36
AV37
PP0V764_S1_SRAM
C1420
11UF
20%
2.5V
X6T
0402
1
3
4
2
80UM_STEN80UM_STEN
C1421
11UF
20%
2.5V
X6T
0402
1
2
3
4
80UM_STEN
C1422
11UF
20%
2.5V
X6T
0402
1
4
2
80UM_STEN
3
C1423
11UF
20%
2.5V
X6T
0402
1
3
4
2
80UM_STEN
C1424
11UF
20%
2.5V
X6T
0402
1
4
2
101482
80UM_STEN
C1425
11UF
20%
2.5V
X6T
0402
3
1
3
4
2
PAGE TITLE
SOC: POWER (SRAM)
BOM_COST_GROUP=SOC
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
PP0V805_S1_VDD_FIXED
103
PP0V805_S1_VDD_FIXED
103
103 14
103 14
PP0V805_S1_VDD_FIXED
PP0V805_S1_VDD_FIXED
80UM_STEN
C1513
4.3UF
103 14
103 97
102 48
PP0V805_S1_VDD_FIXED
PP0V805_S1_VDD_FIXED
103
PP0V805_S1_VDD_FIXED
PP0V72_S2_VDD_LOW
PP0V72_S2_VDD_LOW
102
PP0V72_S2_VDD_LOW
102
20%
2.5V
X6T
0402
4
2
C1520
C1507
2.2UF
X6S-CERM
3
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
2 %
0201
1
2
V
1
2
C1508
0.1UF
10%
6.3V
X6S
0201
1
2
FL1510
120OHM-25%-0.25A-0.5OHM
21
0201
1
C1510
2.2UF
20%
4V
2
X6S-CERM
0201
C1521
2.2UF
20%
X6S-CERM
4V
0201
1
2
C1511
2.2UF
20%
X6S-CERM
4V
0201
PP0V805_S1_VDD_FIXED
103
PP0V805_S1_VDD_FIXED
103
C1505
0.1UF
PP0V805_S1_VDD_FIXED
R1500
0
5%
1/20W
MF
0201
C1514
0.1UF
103 14
21
10%
6.3V
X6S
0201
PP0V805_S1_VDD_FIXED
VOLTAGE=0.805V
103
VOLTAGE=0.805V
PP0V805_S1_SOC_VDDFIXEDPCIE_R
10%
6.3V
X6S
0201
6.3V
0201
10%
X6S
1
2
1
C1503
0.1UF
2
1
2
C1515
0.1UF
C1502
0.1UF
PP0V805_S1_SOC_VDDFIXEDPLL_F
10%
6.3V
X6S
0201
1
2
1
C1512
0.1UF
2
R1590
10
5%
1/20W
MF
201
117S0004
1
10
6.3V
X6S
0201
VOLTAGE=0 805V
21
PP0V805_S1_SOC_VDDFIXEDXTAL_R
C1516
0.1UF
1
C1590
4UF
20%
2.5V
2
X6S
0201
138S00329
80UM_STEN
C1530
4.3UF
1
R1535
10
2 1
5%
1/20W
MF
201
R1536
49.9
1%
1/20W
MF
201
PP0V72_S2_VDD_LOW
102
VOLTAGE=0.72V
PP0V72_S2_VDD_LOWFLPLL_R
20%
6.3V
0201
1
C1536
4UF
20%
2.5V
2
X6S
0201
1
2
C1535
0.22UF
X6S-CERM
VOLTAGE=0.72V
21
PP0V72_S2_VDD_LOWULPPLL_R
1
10%
6.3V
2
X6S
0201
C1500
2.2UF
20%
10
X6S
4V
0201
1
2
X6S-CERM
6.3V
0201
C1517
0.22UF
20%
2.5V
X6T
0402
2
20%
6.3V
X6S-CERM
0201
3
4
C1506
2.2UF
X6S-CERM
0201
1
C1501
0.1UF
2
C1504
2.2UF
20%
X6S-CERM
0201
1
2
80UM_STEN
C1531
4.3UF
20%
2.5V
X6T
0402
1
4
2
20%
4V
4V
6.3V
0201
3
10%
X6S
1
2
PP0V855_S2SW_CIO
80UM_STEN
80UM_STEN
C1547
1
4.3UF
20%
2.5V
X T
0402
4
2
C1543
4.3UF
20%
2.5V
X6T
0402
1
4
2
4.3UF
20%
2.5V
X6T
0402
3
4
2
3
3
LPDP_RX POWER MAY BE GROUNDED
BUT J293 IS NOT DOING THIS PER
<RDAR://61722166>
80UM_STEN
3
80UM_STEN
C1542
4.3UF
20%
2.5V
X6T
0402
1
4
2
C1546
4.3UF
20%
2.5V
X6T
0402
1
3
4
2
3
102
103
102
102
102
102
102
80UM_STEN
C1556
1
102
102
U0600
TMLR68A0-B09
BGA
10%
6.3V
X6S
0201
10%
6.3V
X6S
0201
1
4V
2
0.1UF
10%
6.3V
X6S
0201
1
C1584
4.7UF
20%
6.3V
2
CER
0402
1
2
1
2
R1574
0
5%
1/20W
MF
0 01
1
2
R1584
49.9
21
C1571
0.1UF
10%
6.3V
X6S
0201
21
1%
/ 0W
MF
201
1
C1572
2.2UF
2
X6S-CERM
PP1V25_S2
80UM_STEN
C1555
4.3UF
1
1
20%
4V
2
0201
20%
2.5V
X6T
0402
2
4
SYM 13 OF 23
C1540
0.1UF
AM28
AW19
AW20
AW21
BA37
1
2
1
2
BA38
BA39
AY18
AV33
AV29
AV30
AV32
AL34
AT32
AF29
AR20
AH13
AG13
AC13
AC42
AD40
AG40
AJ39
AP17
AU32
AV39
AY16
AV23
AV25
AV27
AW26
AY26
BA23
AW24
AW22
AW28
BA22
VDD_FIXED_ECPU_S1
VDD_FIXED_LPDP_RX_S1
VDD_FIXED_LPDP_RX_S1
VDD_FIXED_LPDP_RX_S1
VDD_FIXED_LPDP_TX_S1
VDD_FIXED_LPDP_TX_S1
VDD_FIXED_LPDP_TX_S1
R11
VDD_FIXED_MIPIC_S1
R12
VDD_FIXED_MIPIC_S1
R13
VDD_FIXED_MIPIC_S1
R10
VDD_FIXED_MIPID_PLL_S1
P9
VDD_FIXED_MIPID_S1
R9
VDD_FIXED_MIPID_S1
VDD_FIXED_MTR_S1
VDD_FIXED_PCIE_REFBUF_S1
VDD_FIXED_PCIE_S1
VDD_FIXED_PCIE_S1
V31
VDD_FIXED_PCIE_S1
VDD_FIXED_PCIE_S1
VDD_FIXED_PCPU_S1
VDD_FIXED_PLL_ANE_S1
VDD_FIXED_PLL_GPU_S1
VDD_FIXED_PLL_SOC_S1
VDD_FIXED_PLL_DDR0_S1
VDD_FIXED_PLL_DDR1_S1
VDD_FIXED_PLL_DDR2_S1
T24
VDD_FIXED_PLL_DDR3_S1
R28
VDD_FIXED_PLL_DDR4_S1
R29
VDD_FIXED_PLL_DDR5_S1
T34
VDD_FIXED_PLL_DDR6_S1
VDD_FIXED_PLL_DDR7_S1
A32
VDD_FIXED_XTAL_S1
VDD_FIXED_S1
VDD_FIXED_S1
VDD_FIXED_S1
VDD_FIXED_S1
VDD_FIXED_S1
VDD_FIXED_S1
VDD_FIXED_S1
V17
VDD_FIXED_S1
VDD_LOW_S2
VDD_LOW_S2
VDD_LOW_S2
VDD_LOW_S2
VDD_LOW_S2
VDD_LOW_S2
VDD_LOW_FLPPLL_S2
VDD_LOW_ULPPLL_S2
VDD_LOW_USB_DEBUG_S2
VDD_HIB_S4
VDD_CIO
VDD_CIO
VDD_CIO
VDD12_CIO_S2
VDD12_CIO_S2
VDD12_CIO_S2
VDD12_CIO_S2
VDD12_CIO_S2
VDD12_CIO_S2
VDD12_CIO_S2
VDD_CIO_USB
VDD12_CIO_USB_S2
VDD12_AMUX_S2
VDD12_LPDP_RX
VDD12_LPDP_RX
VDD12_LPDP_RX
VDD12_LPDP_RX
VDD12_LPDP_RX
VDD12_LPDP_RX
VDD12_LPDP_RX
VDD12_LPDP_RX
VDD12_LPDP_TX
VDD12_LPDP_TX
VDD12_LPDP_TX
VDD12_MIPIC
VDD12_MIPIC
VDD12_MIPIC
VDD12_MIPID
VDD12_MIPID
VDD12_MTR
VDD12_PCIE
VDD12_PCIE
VDD12_PCIE
VDD12_PCIE
VDD12_PCIE
VDD12_PCIE
VDD12_PCIE
VDD12_PCIE_REFBUF
VDD12_PLL_ANE
VDD12_PLL_CPU
VDD12_PLL_GPU
VDD12_PLL_SOC
VDD12_TSADC_CPU
VDD12_TSADC_SOC0
VDD12_TSADC_SOC1
VDD12_TSADC_SOC2
VDD12_TSADC_SOC3
VDD12_TSADC_SOC4
VDD12_ULPPLL_S2
VDD12_USB_DEBUG_S2
VDD12_XTAL
AV34
AV36
AW35
AU42
AU43
AV42
AV43
AY34
AY36
BA35
AU34
AU35
AT42
AV11
AV20
AW11
AW13
AY13
AY19
AY20
AY21
AW37
AW38
AW39
P11
P12
P13
P
R8
AW18
AY29
AY30
AY31
AY32
AY43
B 42
BA43
AW33
AP31
AK34
AG29
AP19
AK32
U20
Y33
AH32
AY15
AE40
AW23
AY28
BA33
PP1V2_S2_CIO
C1544
0.1UF
PP0V855_S2SW_CIO
PP1V2_S2_CIO
PP1V25_S2
PP1V25_AWAKE_IO
PP1V2_AWAKE_PLL
10%
6.3V
X6S
0201
1
2
C1550
2.2UF
20%
X6S-CERM
4V
0201
1
C1551
0.1UF
PP1V25_AWAKE_IO
C1560
2.2UF
2 %
X6S-CERM
0201
1
C1561
0.1UF
V
10%
6.3V
X6S
0201
1
2
PP1V25_AWAKE_IO
PP1V2_AWAKE_PLL
10%
6 3V
X6S
020
1
2
C1554
0.1UF
10%
6.3V
X6S
0201
C1553
0.1UF
VOLTAGE=1.2V
PP1V2_AWAKE_PLL_PCIE_R
C1573
0.1UF
PP1V2_AWAKE_PLL
PP1V25_AWAKE_IO
VOLTAGE=1.25V
PP1V25_S2_ULPPLL_R
PP1V25_S2
1
C1582
0.1UF
10%
6.3V
2
X6S
0201
1
10%
6.3V
2
X6S
0201
1
10%
6.3V
2
X6S
020
C15622
1
2
10%
6.3V
X6S X6S-CERM
0201
C1541
C1545
2.2UF
20%
X6S-CERM
1
2
4V
201
C1574
2.2UF
0.1UF
0.1UF
1
2
20%
0201
C1570
102
102
102
103
102
FL1580
VDD12_EFUSE1
VDD12_EFUSE2
VDD12_EFUSE3
VDD12_FMON
AU40
AT20
AB43
AU19
VOLTAGE=1.25V
PP1V25_AWAKE_XTAL_F
VOLTAGE=1.25V
PP1V25_AWAKE_FMON_R
1
C1583
2.2UF
20%
4V
2
X6S-CERM
0201
240-OHM-0.2A-0.9-OHM
2 1
0201
1
C1580
0 1UF
10%
6.3V
2
X6S
0201
R1583
49.9
1/20W
1%
MF
201
21
1
C1581
2.2UF
20%
4V
2
X6S-CERM
0201
PP1V25_AWAKE_IO
PP1V25_AWAKE_IO
1 2
102
PAGE TITLE
SOC: POWER (Fixed, PLL's, Filtered)
PP0V72_S2_VDD_LOW
102
C1537
0.1UF
10%
6.3V
X6S
0201
1
2
BOM_COST_GROUP=SOC
2
1
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
SOC: GND (1)
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A2
A20
A21
A22
A23
A24
A25
A27
A28
A29
A3
A30
A37
A38
A39
A4
A40
A41
A42
A43
A4
A45
A46
A47
A48
A49
A50
A51
A52
A53
A5
A9
AA10
AA11
AA12
AA13
AA15
AA17
AA20
AA22
AA
AA27
AA30
AA34
AA36
AA38
AA41
AA43
AA44
AA45
AA4
AA47
AA8
AA9
AB10
AB11
AB12
AB13
AB14
AB16
AB18
AB19
AB2
AB21
AB26
AB29
AB33
AB37
AB39
AB40
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
SYM 15 OF 23
VSS VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB42
AB44
AB45
AB46
AB47
AB48
AB5
AB51
AB54
AB8
AB9
AC10
AC11
AC12
AC15
AC17
AC20
AC22
AC25
AC27
AC29
AC32
AC34
AC36
AC41
AC44
AC45
AC46
AC47
AC8
AC9
AD10
AD11
AD12
AD13
AD14
AD16
AD18
AD19
AD23
AD26
AD29
AD31
AD33
AD38
AD39
AD8
AD9
AE10
AE11
AE12
AE14
AE15
AE17
AE2
AE20
AE22
AE25
AE28
AE41
AE5
AE8
AE9
AF10
AF11
AF12
AF13
AF14
AF16
AF18
AF19
AF21
AF23
AF25
AF27
AF31
AF34
AF35
AF37
AF38
AF40
AF42
AF43
AF44
AF45
AF46
AF47
AF8
AF9
AG10
AG11
AG12
AG15
AG20
AG22
AG24
AG26
AG30
AG32
AG35
AG37
AG41
AG43
AG44
AG45
AG46
AG47
AG48
AG51
AG54
AG8
AG9
AH10
AH11
AH12
AH18
AH2
AH20
AH24
AH26
AH28
AH30
AH33
AH36
AH38
AH41
AH42
AH43
AH44
AH45
AH46
AH47
AH5
AH8
AH9
AJ10
AJ11
AJ12
AJ13
AJ15
AJ21
AJ23
AJ25
AJ27
AJ29
AJ31
AJ35
AJ37
AJ40
AJ41
AJ42
AJ43
AJ44
AJ45
AJ46
AJ47
AJ8
AJ9
AK10
AK11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
SYM 16 OF 23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK12
AK13
AK14
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
AK39
AK47
AK49
AK51
AK54
AK8
AK9
AL10
AL11
A 12
AL13
AL15
AL17
AL19
AL2
AL21
AL23
AL25
AL27
A 31
AL36
AL39
AL47
AL5
AL55
AL8
AL9
AM10
AM11
AM12
AM13
AM14
AM16
AM18
AM20
AM22
AM24
AM27
AM30
AM32
AM33
AM35
AM37
AM40
AM6
AM7
AM8
AM9
AN1
AN10
AN11
AN12
AN13
AN14
AN19
AN2
AN21
AN25
AN28
AN3
AN31
AN36
AN39
AN4
AN41
AN5
AN6
AN7
AN8
AN9
AP10
AP11
AP12
AP13
AP14
AP15
AP18
AP20
AP22
AP24
AP26
AP28
AP3
AP30
AP32
AP34
AP35
AP37
AP42
AP53
AP54
AP55
AP6
AP9
AR10
AR11
AR12
AR13
AR14
AR15
AR16
AR19
AR21
AR23
AR25
AR27
AR29
AR3
AR42
AR43
AR44
AR45
AR46
AR47
AR48
AR49
AR50
AR51
AR52
AR53
AR6
AR9
AT10
AT11
AT12
AT13
AT14
AT15
AT17
AT18
AT22
AT24
AT26
AT28
AT3
AT30
AT34
AT36
AT38
AT41
AT43
AT44
AT45
AT46
AT47
AT48
AT49
AT50
AT51
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
SYM 17 OF 23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT52
AT53
AT6
AT9
AU10
AU11
AU12
AU13
AU14
AU15
AU16
AU21
AU23
AU25
AU27
AU29
AU3
AU31
AU33
AU37
AU39
AU41
AU44
AU45
AU46
AU47
AU48
AU49
AU50
AU53
AU6
AU7
AU8
AU9
AV10
AV12
AV13
AV14
AV15
AV17
AV18
AV19
AV21
AV22
AV24
AV26
AV28
AV3
AV35
AV38
AV41
AV44
AV45
AV46
AV47
AV48
AV49
AV50
AV53
AV6
AV9
AW10
AW12
AW14
AW15
AW16
AW25
AW27
AW29
AW3
AW30
AW31
AW32
AW34
AW36
AW40
AW41
AW42
AW43
AW44
AW45
AW46
AW47
AW48
AW49
AW50
AW51
AW52
AW53
AW6
AW9
AY10
AY11
AY12
AY14
AY17
AY22
AY24
AY3
AY33
AY35
AY37
AY38
AY39
AY40
AY41
AY42
AY44
AY45
AY46
AY47
AY48
AY49
AY50
AY53
AY6
AY9
B1
B11
B12
B13
B14
B15
B16
B17
B18
B19
B2
B20
B22
B24
B27
B28
B29
B32
B34
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B49
B5
B51
B54
B55
B7
BA1
BA18
BA19
BA2
BA20
BA21
BA25
BA27
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
SYM 18 OF 23
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA 8
BA29
BA3
BA30
BA31
BA34
BA36
BA4
BA40
BA41
BA 4
BA45
BA46
BA47
BA48
BA49
BA5
BA50
BA53
BA54
BA 5
BA6
BA7
BA8
BA9
BB11
BB14
BB17
BB20
BB23
BB 6
BB27
BB28
BB29
BB30
BB31
BB32
BB33
BB34
BB35
BB 6
BB39
BB40
BB41
BB42
BB43
BB44
BB45
BB46
BB47
BB 8
BB49
BB50
BB51
BB52
BB6
BB8
BC22
BC23
BC26
BC 8
BC30
BC32
BC34
BC36
BC39
BC4
BC40
BC41
BC42
BC 4
BC46
BC48
BC50
BC51
BC52
BD1
BD2
BD23
BD24
BD25
BD26
BD28
BD30
BD32
BD34
BD36
BD37
BD38
BD39
BD40
BD41
BD42
BD44
BD46
BD48
BD50
BD51
BD52
BD53
BD54
BD55
BE1
BE11
BE14
BE17
BE2
BE20
BE22
BE25
BE27
BE29
BE3
BE31
BE33
BE35
BE37
BE41
BE43
BE45
BE47
BE49
BE5
BE51
BE53
BE54
BE55
BE8
BF2
BF22
BF23
BF25
BF27
BF29
BF3
BF31
BF33
BF35
BF37
BF41
BF43
BF45
BF47
BF49
BF51
BF53
BF54
C1
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C2
C20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
TMLR68A0-B09TMLR68A0-B09TMLR68A0-B09TMLR68A0-B09TMLR68A0-B09
BGABGABGABGA
SYM 19 OF 23
VS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C21
C23
C25
C26
C27
C28
C29
C30
C31
C33
C35
C36
C37
C38
C39
C4
C40
C41
C42
C43
C44
C45
C46
C47
C48
C50
C52
C54
C55
C6
C8
C9
D1
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D2
D20
D24
D26
D27
D28
D29
D3
D30
D32
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D5
D51
D53
D54
D55
D9
E1
E10
E11
E12
E13
E14
E15
E16
E17
PAGE TITLE
SOC: GND
BOM_COST_GROUP=SOC
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
SOC: GND (2)
E18
E19
E2
E20
E22
E23
E25
E27
E28
E29
E31
E33
E34
E36
E37
E38
E39
E4
E40
E41
E42
E43
E44
E45
E46
E47
E49
E5
E50
E52
E54
E55
E6
E7
E9
F1
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F2
F20
F21
F22
F24
F26
F27
F28
F29
F3
F30
F32
F34
F35
F36
F37
F38
F39
F40
F41
F42
F43
F44
F45
F46
F47
F48
F49
F5
F51
F53
F54
F55
F7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
BGA BGA BGA BGA
SYM 20 O 23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F8
F9
G10
G11
G12
G13
G14
G15
G16
G17
G18
G19
G2
G20
G21
G22
G23
G25
G27
G28
G29
G31
G33
G34
G35
G36
G37
G38
G39
G4
G40
G41
G42
G43
G44
G45
G46
G47
G48
G49
G50
G52
G54
G6
G7
G8
G9
H10
H11
H12
H13
H14
H15
H16
H17
H18
H19
H2
H20
H21
H22
H24
H26
H27
H28
H29
H3
H30
H32
H34
H35
H36
H37
H38
H39
H40
H41
H42
H43
H44
H45
H46
H47
H48
H49
H5
H51
H53
H54
H7
H8
H9
J10
J11
J12
J13
14
J15
J16
J17
J18
J19
J2
J20
J21
J22
23
J25
J27
J28
J29
J31
J33
J34
J35
J36
37
J38
J39
J4
J40
J41
J42
J43
J44
J45
46
J47
J48
J49
J50
J52
J54
J55
J6
J7
J8
J9
K1
K10
K13
K16
K18
K19
K2
K20
K21
K22
K23
K25
K27
K28
K29
K31
K33
K34
K35
K36
K37
K38
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
SYM 21 OF 23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SS
VSS
VSS
VSS
K3
K4
K40
K41
K42
K43
K44
K45
K46
K47
K4
K49
K50
K52
K54
K55
K6
K7
L1
L10
L1
L16
L18
L19
L2
L20
L21
L22
L24
L26
L2
L28
L29
L3
L30
L32
L34
L35
L36
L37
L3
L39
L40
L41
L42
L43
L44
L45
L46
L47
L4
L49
L5
L51
L53
L54
L55
L7
M1
M10
M1
M16
M17
M18
M19
M2
M20
M21
M22
M23
M2
M27
M28
M29
M31
M33
M34
M35
M36
M37
M38
M39
M4
M40
M41
M42
M43
M44
M45
M46
M47
M48
M49
M50
M52
M54
M55
M6
M7
M8
N1
N10
N11
N12
N13
N14
N15
N16
N17
N18
N19
N2
N20
N21
N22
N23
N24
N26
N27
N28
N29
N3
N30
N32
N33
N34
N35
N36
N37
N38
N39
N40
N41
N42
N43
N44
N45
N46
N47
N48
N49
N5
N50
N51
N53
N54
N6
N7
N8
N9
P1
P10
P14
P15
P16
P17
P18
P19
P2
P20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
SYM 22 OF 23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P21
P22
P25
P26
P27
P28
P29
P3
P30
P31
P34
P35
P36
P37
P38
P39
P4
P40
P41
P42
P43
P44
P45
P46
P47
P48
P49
P52
P53
P7
R1
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R26
R27
R3
R30
R31
R32
R33
R34
R35
R36
R37
R38
R39
R4
R40
R41
R42
R43
R44
R45
R46
R47
R5
R6
R7
T1
T10
T11
T12
T13
T14
T15
T17
T19
T2
T21
T23
T27
T31
T35
T37
T39
T4
T41
T42
T43
T44
T 5
T46
T47
T48
T5
T51
T54
T6
T7
T8
U1
U10
U11
U12
U13
U16
U18
U2
U22
U 4
U26
U28
U3
U30
U32
U34
U36
U38
U4
U 0
U41
U42
U43
U44
U45
U46
U47
U48
U5
U7
U8
U9
V1
V10
V11
V12
V13
V14
V 5
V2
V21
V23
V25
V27
V3
V31
V33
V35
V 9
V4
V41
V42
V43
V44
V45
V46
V47
V5
3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U0600
TMLR68A0-B09TMLR68A0-B09TMLR68A0-B09TMLR68A0-B09
SYM 23 OF 23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V6
V7
V8
V9
W10
W11
W12
W13
W15
W16
W2
W21
W23
W25
W27
W32
W34
W41
W42
W43
W44
W45
W46
W47
W48
W5
W51
W54
W8
W9
Y10
Y11
Y12
Y13
Y14
Y16
Y19
Y22
Y24
Y28
Y30
Y35
Y37
Y39
Y40
Y41
Y42
Y43
Y44
Y45
Y46
Y47
Y51
Y8
Y9
B48
PAGE TITLE
SOC: GND-2
BOM_COST_GROUP=SOC
www.repairlap.com
**OK2INTEGRATE**
www.teknisi-indonesia.com
www.teknisi-indonesia.com
SPI NOR (1.8V 64 M-BIT)
PP1V8_AWAKE
102
102 17
R1974
6
SPI_SOCROM_MOSI_R
IN
1/20W
R1975
6
SPI_SOCROM_CLK_R
IN
1
R1972
47K
5%
1/20W
MF MF
201
2
1
R1973
47K
5%
1/20W
201
2
1/20W
102 17
PP1V25_AWAKE_IO
33
21
5%
MF
201
33
5%
MF
201
21
SPI_SOCROM_MOSI
SPI_SOCROM_CLK
PP1V8_AWAKE
1
C1974
0.1UF
10%
6.3V
2
X6S
0201
U1974
74AVC2T45
1A
2A
5
DIR
VSSOP
GND
PP1V8_AWAKE
VCCBVCCA
72
1B
2B
SPI_SOCROM_1V8_MOSI_R
63
SPI_SOCROM_1V8_CLK_R
PP1V25_AWAKE_IO
10217
1
C1975 2
0 1UF
10
6 3V
2
X6S
0201
10217
R1976
33
5%
1/20W
MF
201
R1977
33
5%
1/20W
MF
201
21
SPI_SOCROM_1V8_MOSI
21
SPI_SOCROM_1V8_CLK
17
17
17
17
1
C1970
0.1UF
10%
6.3V
X6S
0201
R1971
10K
1/20W
201
SPI_SOCROM_1V8_CLK
SPI_SOCROM_1V8_CS_L
5%
MF
1
2
R1970
100K
5%
1/20W
MF
201
2
SPI_SOCROM WP_L
VCC
U1970
W25Q64JWUUIQ
64MB-1.8V
6
CLK
1
CS*
3
WP*/IO2
7
HOLD*/RESET*/(IO3)
USON
335S00494
PACK_OPTION=SMALL_NOR
5
DI(IO0)
DO(IO1)
EPADGND
SPI_SOCROM_1V8_MOSI
2
SPI_SOCROM_1V8_MISO_R
17
17
SPI_SOCROM_1V8_MISO_R
17
1
R1980
100K
5%
1/20W
MF
201
2
R1983
33
5%
1/20W
MF
201
1
C1983
0.1UF
10%
6.3V
2
X6S
0201
VCCA VCCB
5
DIR
21
SPI_SOCROM_1V8_MISO SPI_SOCROM_MISOSPI_SOCROM_MISO_R
A
GND
U1983
SN74AXC1T45
SOT- X3
43
B
1
C1984
0.1UF
10%
6.3V
2
X6S
0201
R1984
33
5%
1/20W
MF
201
21
OUT
6
102 17
6
IN
SPI_SOCRO _CS_L PI_SOCROM_1V8_CS_
PP1V25_AWAKE_IO
1
C1992
0.1UF
10%
6.3V
2
X6S
0201
1
R1992
47K
5%
1/20W
MF
201
2
VCCA VCCB
5
DIR
A
PP1V8_AWAKE
U1992
SN74AXC1T45
SOT-5X3
43
B
1
C1993
0.1UF
10%
6.3V
2
X6S
0201
10217
SYNC_MASTER=REF_SOC_H13G SYNC_DATE=01/27/2020
17
PAGE TITLE
SPI NOR
GND
BOM_COST_GROUP=SOC
2
1
www.repairlap.com
TGA SPMI SE SOURCE TERMINATIONS
www.teknisi-indonesia.com
R2103
20
5%
MF
201
21
SPMI_SE_CLK
PLACE_NEAR=U0600.BF20:10MM
OUT
20
IN
SPMI_SE_CLK_R
1/20W
R2102
20
5%
MF
21
201
BI
PLACE_NEAR=U0600.BF21:10MM
9 20
BI
SPMI_SE_DATA_R SPMI_SE_DATA
1/20W
TGA SPMI MPMU SOURCE TERMINATIONS
TGA SPI SENSOR SOURCE TERMINATIONS
SENSOR_IMU
R2104
20
21
9
IN
SPI_AOP_GYRO_R1_MOSI_R
5%
1/20W
MF
201
SPI_AOP_SENSOR_MOSI
PLACE_NEAR=U0600.BF14:10MM
SENSOR_IMU
R2105
20
21
9
IN
SPI_AOP_GYRO_R1_CLK_R
%
1/20W
MF
201
SPI_AOP_SENSOR_CLK
PLACE_NEAR=U0600.BF17:10MM
TGA SPI IPD SOURCE TERMINATIONS
OUT
OUT
TGA 1V2 TDM SOURCE TERMINATIONS
R2110
20
5%
MF
201
20
5%
MF
201
21
21
TDM_SPKRAMP_L_BCLK
MAKE_BASE=TRUE
TDM_SPKRAMP_L_BCLK
TDM_SPKRAMP_L_R2
MAKE_BASE=TRUE
TDM_SPKRAMP_L_R2D
75
75
519
51
6
IN
6
IN
TDM_SPKRAMP_L_BCLK_R
1/20W
PLACE_NEAR=U0600.AK4:10MM
R2111
TDM_SPKRAMP_L_R2D_R
1/20W
PLACE_NEAR=U0600.AJ5:10MM
R2107
20
5%
MF
201
21
PLACE_NEAR=U0600.BB15:10MM
OUT
9 33
IN
SPMI_NUB_MPMU_CLK_R SPMI_NUB_MPMU_CLK
1/20W
R2106
20
5%
MF
21
201
BI
PLACE_NEAR=U0600.BC14:10MM
9 33
BI
SPMI_NUB_MPMU_DATA_R SPMI_NUB_MPMU_DATA
1/20W
TGA SPMI SPMU SOURCE TERMINATIONS
R2109
20
5%
MF
201
21
PLACE_NEAR=U0600.BA12:10MM
OUT
9 29
IN
SPMI_NUB_SPMU_CLK_R SPMI_NUB_SPMU_CLK
1/20W
R2108
20
5%
MF
21
201
9
BI
SPMI_NUB_SPMU_DATA_R
1/20W
SPMI_NUB_SPMU_DATA
PLACE_NEAR=U0600.BC11:10MM
BI
TGA MISC DEBUG TEST-POINTS
R2100
20
5%
201
21
PLACE_NEAR=U0600 W1:10MM
F
OUT
6 84
IN
SPI_IPD_MOSI_R SPI_IPD_MOSI
1/20W
6
IN
TDM_SPKRAMP_L_FSYNC_R
PLACE_NEAR=U0600.AJ4:10MM
R2112
20
5%
1/20W
MF
201
21
TDM_SPKRAMP_L_FSYNC
MAKE_BASE=TRUE
TDM_SPKRAMP_L_FSYNC
75
R2101
20
5%
MF
201
20
5%
MF
201
20
5%
MF
201
21
SPI_IPD_CLK
PLACE_NEAR=U0600.AB1:10MM
OUT
84
6
OUT
TDM_SPKRAMP_L_D2R
MA E_BASE=TRUE
TDM_SPKRAMP L_D2R
75
R2120
20
5%
MF
201
21
TDM_SPKRAMP_R_BCLK
MAKE_BASE=TRUE
TDM_SPKRAMP_R_BCLK
75
6
IN
21
SPI_DFR_MOSI
PLACE_NEAR=U0600.AK2:10MM
OUT
88
TDM_SPKRAMP_R_BCLK_R
1/20W
PLACE_NEAR=U0600.AG3:10MM
R2121
21
SPI_DFR_CLK
PLACE_NEAR=U0600.AK1:10MM
OUT
88
6
IN
TDM_SPKRAMP_R_R2D_R
PLACE_NEAR=U0600.AG4:10MM
20
5%
1/20W
MF
201
21
TDM_SPKRAMP_R_R2D
MAKE_BASE=TRUE
TDM_SPKRAMP_R_R2
75
6
IN
SPI_IPD_CLK_R
1/20W
TGA SPI DFR SOURCE TERMINATIONS
R2113
46
IN
29
4
IN
SPI_DFR_MOSI_R
1/20W
R2114
SPI_DFR_CLK_R
1 20
TP2126
933
BI
9106
BI
9
BI
989
BI
PMU_CLK32K_SOC
TP_SOC_DOCK_ATTENTION
TP_AON_SLEEP1_RESET_L
SMC_FIXTURE_MODE_L
1
TP-P5
TP2127
1
TP-P5
TP2128
1
TP-P5
TP2129
1
TP-P5
A
A
A
A
TGA JTAG TEST-POINTS
TP2110
49
BI
95689
BI
9
BI
9
BI
95689
BI
9
BI
SOC_JTAG_SEL
SWD_SOC_SWCLK
TP_JTAG_SOC_TDI
TP_JTAG_SOC_TDO
SWD_SOC_SWDIO
TP_JTAG_SOC_TRST_L
1
TP-P5
TP2111
1
TP-P5
TP2112
1
TP-P5
TP2113
1
TP-P5
TP2114
1
TP-P5
TP2115
1
TP-P5
A
A
A
A
A
A
TGA DEBUG TEST-POINTS
TP2120
5
BI
TP_TST_CLKOUT
1
TP-P5
A
PLACE_SIDE=BOTTOM
PLACE_SIDE=TOP
PLACE_SIDE=BOTTOM
PLACE_SIDE=BOTTOM
PLACE_SIDE=TOP
TGA SPI TOUCHID SOURCE TERMINATIONS
R2115
20
5%
MF
01
21
SPI_TOUCHID_MOSI
PLACE_NEAR=U0600.AF54:10MM
6
IN
SPI_TOUCHID_MOSI_R
1/20
R2116
20
5%
MF
201
21
SPI_TOUCHID_CLK
PLACE_NEAR=U0600.AF55:10MM
6
IN
SPI_TOUCHID_CLK_R
1/20W
EUSB SERIES RESISTORS AND TEST POINTS
R2150
0
5
BI
PP2190
PLACE_NEAR=U0600.BB54:10MM
5
BI
EUSB_ATC0_P
P4MM
PP
SM
EUSB_ATC0_N
1
PP2191
P4MM
PLACE_NEAR=U0600.BB55:10MM
5
BI
PP
SM
EUSB_ATC1_P
PP2192
P4MM
PLACE_NEAR=U0600.BC54:10MM
5
BI
PP
SM
EUSB_ATC1_N
PP2193
P4MM
PLACE_NEAR=U0600.BC55:10MM
PP
SM
1/20W
0201
R2151
1/20W
0201
R2152
1/20W
0201
R2153
1/20W
0201
21
5%
MF
0
21
5%
MF
0
21
5%
PP2196
MF
0
21
5%
PP2197
MF
(TP ON FCT PAGE)
(TP ON FCT PAGE)
P4MM
PLACE_NEAR=UF750.A1:10MM
P4MM
PLACE_NEAR=UF750.B1:10MM
PP
S
PP
SM
EUSB_ATC0_R_P
MAKE_BASE=TRUE
EUSB_ATC0_R_P
EUSB_ATC0_R_N
MAKE_BASE=TRUE
EUSB_ATC0_R_N
EUSB_ATC1_R_P
MAKE_BASE=TRUE
EUSB_ATC1_R_P
EUSB_ATC1_R_N
MAKE_BASE=TRUE
EUSB_A C1_R_N
OUT
OUT
BI
BI
80 9
80 89
89
60
89
60
60
60
R2122
20
5%
MF
201
21
TDM_SPKRAMP_R_FSYNC
MAKE_BASE=TRUE
TDM_SPKRAMP_R_FSYNC
TDM_SPKRAMP_R_D2R
75
75
6
IN
6
OUT
TDM_SPKRAMP_R_FSYNC_R
1/20W
LA E_NEAR=U0600.AF2:10MM
TDM_SPKRAMP_R_D2R
MAKE_BASE=TRUE
R2130
20
5%
MF
201
21
TDM_CODEC_BCLK
OUT
76
6
IN
TDM_CODEC_BCLK_R
1/20W
PLACE_NEAR=U0600.AK5:10MM
R2131
20
5%
MF
201
21
TDM_CODEC_R2D
OUT
76
6
IN
TDM_CODEC_R2D_R
1/20W
PLACE_NEAR=U0600.AJ7:10MM
R2132
20
5%
MF
201
21
TDM_CODEC_FSYNC
OUT
76
6
IN
TDM_CODEC_FSYNC_R
1/20W
PLACE_NEAR=U0600.AM4:10MM
TP2121
1
TP-P5
TP2122
5106
BI
65689
BI
65689
BI
TP_SOC_AMUX_OUT
UART_DEBUGPRT_D2R
UART_DEBUGPRT_R2D
1
TP-P5
TP2123
1
TP-P5
TP2124
1
TP-P5
TP2125
1
TP-P5
PLACE_SIDE=BOTTOM
A
A
PLACE_SIDE=BOTTOM
A
PLACE_SIDE=TOP
A
PLACE_SIDE=BOTTOM
A
PLACE_SIDE=BOTTOM
960
BI
PP21A0
PLACE_NEAR=U0600.BF24:10MM
960
BI
PLACE_NEAR=U0600.BE24:10MM
EUSB_DBG_P
P4MM
PP
SM
EUSB_DBG_N
P4MM
SM
PP21A
P4MM
PLACE_NEAR UF 00.A1:10MM
PP
SM
PP21A3PP21A2
P4MM
PLACE_NEAR=UF700.B1:10MM
PPPP
SM
SYNC_MASTER=AITKEN_T668_MLB SYNC_DATE=09/18/2019
PAGE TITLE
PROJECT SUPPORT (1/2)
BOM_COST_GROUP=SOC
2
1
www.repairlap.com
5568994
www.teknisi-indonesia.com
IN
SOC_DFU_STATUS
NOSTUFF
1
R2200
47K
5%
1/20W
MF
201
2
NOSTUFF
R2205
0
33
MPMU_BUTTONO1
1
5%
1/20W
MF
0201
OPTION FOR SW TO READ POWER BUTTON, NOT USED
SOC_REQUEST_DFU1
5
OUTN
7
IN
7
IN
7
IN
7
IN
LPDPRX0_RCAL_POS
LPDPRX0_RCAL_NEG
LPDPRX1_RCAL_POS
LPDPRX1_RCAL_NEG
NOSTUFF
1
R2201
47K
5%
1/20W
MF
201
2
NOSTUFF
1
R2202
47K
5%
1/20W
MF
01
2
NOSTUFF
1
R2203
47K
5%
1/20W
MF
201
2
NOSTUFF
1
R2204
47K
5%
1/20W
MF
201
2
SOC_THROTTLE2
R2299
0
IN OUT
1/ 0W
0201
21
5%
MF
<RDAR://59954844>
SOC_THROTTLE_TRIGGER2RSVD_GPU_TRIGGER1_L
63334
SYNC_MASTER=AITKEN_T668_MLB SYNC_DATE=11/11/2019
PAGE TITLE
PROJECT SUPPORT (2/2)
BOM_COST_GROUP=SOC
www.repairlap.com
Timing Requirements:
www.teknisi-indonesia.com
- VBAT supply ramp time: 20ms
Ceres - Secure Element
*** OK2INTEGRATE ***
Per TGA Power Block Diagram v0.3
U5000.B5:3mm
C5008
0.22UF
6.3V
X5R
0201
PP1V8_S2
101
U5000.E8:3mm
1
2
C5009
0.22UF
20%20%
X5R
0201
1
2
U5000.F9:3mm
C5014
1.0UF
0201-1
U5000.E9:3mm
C5010
0.22UF
20%
6.3V6.3V
X5R
0201
20%
6.3V
X5R
PP1V25_S2
U5000.F8:3mm
20%
6.3V
X5R
0201
0
1
2
21
VUP_SEVDDBOOST_SE
5%0201
1
C5002
0.22UF
2
R5030
MF1/20W
U5000.E7:3mm
C5003
0.22UF
20%
6.3V
X5R
0201
1
2
IccMax SE only: 10mAIccMax SE only: 125mA
102
Based on SPMI only use case
VDDPLL_SE
VDDNV_SE
VDDC_SE
20%
10V
X5R
0201
1
2
C5051
2.2UF
1
2
PP3V8_AON 10120
IccMax: 100mA
As per NXP preliminary stimate, final pending
NC
D4
NFC_CLK_32K
H6
NC
SE_CTLR_FW_DWLD
20
TP_SE_GPIO0
NC
NC
NC
R5042
MF1/20W 201
R5041
1/20W MF 201
18
18
BI
SPMI_SE_CLK
IN
SPMI_SE_DATA
1
R5050
1M
5% 5%
1/20W
MF
201
2
5%
5%
47K
47K
1
R5051
1M
1/20W
MF
201
2
21
UART_SE_R2D_RTS_L
NC_UART_SE_D2R_CTS_L
NO_TEST
21
UART_SE_R2D
NC_UART_SE_D2R
2
SE_DEV_WAKE
NO TEST
NC
NC
NC
NC
NC
NC
NFC_CLK_REQ
A6
NFC_CLK_XTAL1
G4
NFC_DWL_REQ
F6
NFC_GPIO0
J7
NFC_GPIO1
J5
NFC_GPIO2_AO
NFC_GPIO3_AO
E6
NFC_HSU_CTS
F5
NFC_HSU_RTS
G5
NFC_HSU_RX
E5
NFC_HSU_TX
E4
NFC_I2C_SCL
F4
NFC_I2C_SDA
J6
NFC_IRQ
NFC_SIM_SWIO1
J8
NFC_SIM_SWIO2
H7
NFC_SPMI_SCLK
G7
NFC_SPMI_SDATA
H5
NFC_WKUP_REQ
B6
NFC_XTAL2
G6
TM
A3
RXP
A4
RXN
50K internal pull-down
SN210VUK/B101V7
U5000
WLCSP
OMIT_TABLE
NC
NCNCNC
SE_GPIO0
SE_GPIO1
SE_I2C_SCL
SE_I2C_SDA
SE_ISO_CLK
SE_ISO_IO
SE_ISO_RST
SE_SPI_CLK
SE_SPI_CS
SE_SPI_MISO
SE_SPI_MOSI
TXVCASCP
TXVCASCN
RXVCM
TXVCM
TX1
TX2
VCASCHI
VCASCLO
BOOST_LX
BOOST_LX
VHV
VTUNE
VEN
VREF
H3
NC
F3
NC
G1
H1
F2
NC
F1
NC
G3
NC
G2
NC
J2
NC
H2
NC
E2
NC
D2
NC
D1
NC
B3
NC
C2
NC
A1
NC
C1
NC
D7
NC
C7
NC
B8
B9
B7
VHV_SE
D3
NC
D5
SE_PWR_EN
C5
VREF_SE
Pulls to be added in system, can be NC'd if unused
NC_I2C_SE_SCL
NC_I2C_SE_SDA
PP3V8_AON
IN
33
IN
BI
107
107
10120
1
C5004
0.1UF
10%
6.3V
2
CERM-X5R
0201
1
C5017
0.22UF
20%
6.3V
2
X5R
0201
SYNC_DATE=02/26/2020SYNC_MASTER=REF_SE_CERES
PAGE TITLE
Secure Element
R5000
R5006
47K
47K
21
5% MF
21
2011/20W
MF1/20W5% 201
SE_CTLR_FW_DWLD
SE_DEV_WAKE
20
20
<rdar://problem/52067756> [SN200V] Wired Mode SE Only Reference Design Material
<rdar://problem/45108950> Mac - Venus Reference guide and De-coupling requirements
BOM_COST_GROUP=SECURE ELEMENT
www.repairlap.com
BATTERY (BMU) LOGIC CONNECTOR
www.teknisi-indonesia.com
BATTERY (BMU) FLEX SOLDER PADS
BMU POWER FLEX IS SOLDERED TO MLB.
518S00014
CRITICAL
J5151
FF18-10A-R11AD-B-3H
F-RT-SM-A
TP5100
A
PLACE_SIDE=TOP
TP5101
A
PLACE_SIDE=TOP
11
1
2
3
4
5
6
7
8
9
10
12
1
TP P5
1
TP-P5
NC
NC
NC
NC
I2C_SMC_PWR_3V3_SCL
I2C_SMC_PWR_3V3_SDA
89
SYS_DETECT_L
NOSTUFF
1
R5155
10K
5%
1/16W
MF-LF
402
2
998-03828
CRITICAL
J5150
TP5103
A
PLACE_SIDE=BOTTOM
CRITICAL
U5150
RCLAMP3552T
SLP1006N3T
PLACE_SIDE=BOTTOM
376S00282
3
D
Q5155
NTNS4CS69N
XDFN
SYM_VER_2
1
2
GS
89
SYS_DETECT
PLACE_SIDE=TOP
1
TP-P5
TP5104
A
1
TP-P5
PLACE_SIDE=BOTTOM
43
IN
43
BI
PP3V8_AON
1
R5156
10K
5%
1/16W
MF-LF
402
2
TP5102
1
TP-P5
PLACE_SIDE=TOP
A
101
SYS_DET_BTN SYS_DET_BTN
S5191S5190
STO-060A16AE
SM
705S00069
STO-060A16AE
SM
705S00069
PWR-MLB-X520
HB-SM
11 10
12
1
2
3
54
9
8
TP5105
7
PLACE_SIDE=BOTTOM
6
C5150
0.1UF
10%
25V
X5R
402
1
2
C5160
603-1
1
1UF 3PF
10%
25V
2
X5R
A
C5161
+/-0.1PF
TP- 5
25V
C0G
201
1
PPVBAT_AON
1
2
C5162
3PF
+/-0.1PF
25V
C0G
0201
1
2
101
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
J5150632-00731 1 PCBA,FLEX,BMU PWR,X502
CRITICAL
SYNC_MASTER=AITKEN_T668_MLB SYNC_DATE=09/18/2019
PAGE TITLE
BATTERY CONNECTORS
BOM_COST_GROUP=BATTERY
www.repairlap.com
*** OK2INTEGRATE ***
www.teknisi-indonesia.com
PPDCIN_AON_CHGR_R
8998
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1800
VOLTAGE=20V
CRITICAL
1
C5201
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
CRITICAL
1
C5202
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
CRITICAL
1
C5203
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
CRITICAL
1
C520A
2.2UF
20%
35V
2
X5R-CERM
0402
CRITICAL
1
C520B
2.2UF
20%
35V
2
X5R-CERM
0402
CRITICAL
1
C520C
2.2UF
20%
35V
2
X5R-CERM
0402
CRITICAL
1
C520D
2.2UF
20%
35V
2
X5R-CERM
0402
CKPLUS_WAIVE=CAPDERATE
CRITICAL
1
C5250
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
CAPMAT=POLY-TANT
PACK_OPTION=CHGR_60W
CKPLUS_WAIVE CAPDERATE
CRITICAL
1
C5251
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
CAPMAT=POLY-TANT
PACK_O TION=CHGR_60W
CKPLUS_WAIVE=CAPDERATE
CRITICAL
1
C5252
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
CAPMAT=POLY-TANT
PACK_IGNORE=TRUE
PACK_OPTION CHGR_75W
CKPLUS_WAIVE=CAPDERATE
CRITICAL
1
C5253
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
CAPMAT=POLY-TANT
PACK_IGNORE=TRUE
PACK_OPTION=CHGR_75W
FROM USB-C SOURCE
101 22
PACK_OPTION=CHGR_TP_TOP
PACK_OPTION=CHGR_TP_TOP
PACK_OPTION=CH R_TP_TOP
PACK_OPTION=CHGR_TP_TOP
PACK_OPTION=CHGR_TP_TOP
PACK_OPTION=CHGR_T _ O
PACK_OPTION=CHGR_TP
PACK_OPTION=CHGR_TP
101 22
PPDCIN_USBC_AON
PP5201
P2MM
SM
1
CHGR_GATE_Q1
22
PP
PLACE_SIDE=TOP
PP5202
P2MM
SM
1
CHGR_GATE_Q2
22
PP
PLACE_SIDE=TOP
PP5203
P2MM
SM
1
CHGR_GATE_Q3
22
PP
PLACE_SIDE=TOP
PP5204
P2MM
SM
1
CHGR_GATE_Q4
22
PP
PLACE_SIDE=TOP
PP5205
P2MM
SM
1
CHGR_PHASE1
22
PP
PLACE_SIDE=TOP
PP5206
P2MM
SM
1
CHGR_PHASE2
22
PP
PLACE_SIDE=TOP
PP5207
P2MM
SM
1
PP
PP5208
P2MM
SM
PP
CHGR_EN_MVR
1
CHGR_INT_1V8_L
PPDCIN_USBC_AON
101
NOSTUFF
C5216
0.01UF
PP1V8_S2
CRITICAL
1
C520
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
PP5211
P2MM
SM
1
PP
PLACE_SIDE=BOTTOM
PACK_OP ION=CHGR_TP_BOT
PP5212
P2MM
M
1
PP
PLACE_SIDE=BOTTOM
PACK_OPTION=CHGR_TP_BOT
PP5213
P2MM
SM
1
PP
PLACE_SIDE=BOTTOM
PACK_ PTION=CHGR_TP_BOT
PP5214
P2MM
M
1
P
PLACE_SIDE=BOTTOM
PACK_OPTION=CHGR_TP_BOT
PP5215
P2MM
SM
1
PP
PLACE_SIDE=BOTTOM
PACK_OPTION=CHGR_TP_BOT
PP5216
P2MM
SM
1
PP
PLACE SIDE=BOTTOM
PACK_OPT ON C GR_TP_BOT
22 23
228997
22 23
1
R5215
750K
1%
/20W
MF
1
1
2
PPVBAT_AON_CHGR_REG
CHGR_AUX_DET
10%
25V
X5R-CERM
020
C5280
1.0UF
1
2
20%
6.3V
X5R
0201-1
1
R5216
255K
1%
1/20W
MF
201
2
1
2
CRITICAL
C5205
6.8UF
20%
35V-0.09OHM
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
PACK_OPTION=CHGR_60W
48 48
PLACE_NEAR=U5200.D5:2M
CRITICAL
1
C5206
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
PACK_OPTION=CHGR_60W
CHGR_CSI_FILT_P
CRITICAL
20%
35V
0402
1
2
C5278
2.2UF
X5R-C RM
CRITICAL
1
C5205
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
PACK_IGNORE=TRUE
PACK_OPTION=CHGR_75W
CRITICAL
1
C5206
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
PACK_IGNORE=TRUE
PACK_OPTION=CHGR_75W
CRITICAL
R5220
0.01
0 5%
0. W
MF
0306
NO_XNET_CONNECTION=1
(AMON)
2-CELL: 0.02 OHM
3-CELL: 0.01 OHM
107S00053
21
43
CHGR_CSI_P CHGR_CSI_N
PLACE_NEAR=U5200.C5:2MM
R5221
1.00
1%
1/20W
MF-LF
0201
1
2
1
R5222
1.00
1%
1/20W
MF-LF
0201
2
CHGR_CSI_FILT_N
CRITICAL
C5221
0.047UF
10%
50V
CER-X7R
0402
1
2
1
C5222
0.047UF
10%
50V
2
CER-X7R
0402
CRIT CAL
C5220
0.47UF
21
20%
4V
CERM-X5R-1
201
NO_XNET_CONNECTION=1
43
BI
43
IN
34
IN
NOSTUFF
CRITICAL
C5270
0.12UF
10%
10V
X5R
0402
1
2
CRITICAL
C5271
0.12UF
CRITICAL
1
C5207
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CAPMAT=POLY-TANT
PACK_IGNORE=TRUE
PACK_OPTION=CHGR_75W
I2C_SMC_PWR_1V8_SDA
I2C_SMC_PWR_1V8_SCL
CHGR_RST_IN
CHGR_COMP
H:3-C LL
L:2 CELL
1
10%
10V
2
X5R
0402
CHGR_GATE_Q1
22
SWITCH_NODE=TRUE
VOLTAGE=5V
PPCHGR_VDDA
23
CRITICAL
1
C5275
2.2UF
20%
25V
2
X5R-CERM
0402-1
B5
P_IN
C5
CSIN
D5
CSIP
A5
PBUS_PWR
D3
AUX_DET
F5
VDDIO1P8
G5
SDA
H5
SCL
G2
SMC_RST_IN
G3
HPWR_EN*
E5
COMP
G4
CELL
B2
NC0
C2
NC1
E4
CRITICAL
L5230
2.7UH-20%-12.5A-0.0196OHM
CHGR_PHASE1
22 22
DIDT=TRUE
SWITCH_NODE=TRUE SWITCH_NODE=TRUE
CRITICAL
ALLOW_APPLE_PREFIX=Q
CHGR_GATE_Q2
22
DIDT=TRUE
DIDT=TRUE
GATE_NODE=TRUE
CHGR_LX1
DIDT=TRUE
SWITCH_NODE=TRUE
CRITICAL
1
C5230
0.1UF
10%
25V
2
X7R-CERM-1
0402
IHLP4040BD-PIMA102D-COMBO
152S00198
2
XW5230
1
21
CHGR_GATE_Q3
GATE_NODE=TRUE
2
XW5240
SMSM
1
SWITCH_NODE=TRUE
CRITICAL
ALLOW_APPLE_PREF X=Q
DIDT=TRUE
22
CHGR_LX2
DIDT=TRUE
CRITICAL
C5240
0.1UF
X7R-CERM-1
0402
CHGR_PHASE2
DIDT=TRUE
CHGR_GATE_Q4
DIDT=TRUE
SWITCH_NODE=TRUE
1
10%
25V
2
NO_XNET_CONNECTION=1
CHGR_BOOT1_RC CHGR_BOOT2_RC
DIDT=TRUE
SWITCH_NODE=TRUE
1
R5230
0
5%
1/16W
MF-LF
402
2
CHGR_BOOT1
DIDT=TRUE
SWITCH_NODE=TRUE
SWITCH_NODE=TRUE
SWITCH_NODE=TRUE
DIDT=TRUE
R5240
0
5%
1/16W
MF-LF
402
CHGR_BOOT2
DIDT=TRUE
1
2
R5275
4.7
1/20W
5%
MF
201
21
PPCHGR_VDDP
U5200
ISL9240 I
WCSP
CRITICAL
SCH SYMBOL
353S01525
(5V)
(OD)
VOLTAGE=5V
CRITICAL
C5277
10UF
0603-1
GATE_Q1
BOOT1
LX1
GATE_Q2
GATE_Q3
LX2
BOOT2
GATE_Q4
PBUS
CSOP
CSON
BGATE
VBAT
EN_VR1
SMC_RST*
IRQ*
CBC_ON
EN_MVR
AUX_OK
AMON
BMONNC2
20%
10V
X5R
H1
F1
G1
E1
D1
B1
C1
A1
A3
A4
B4
B3
C3
F2
H4
H3
H2
F4
F3
D4
C4
PLACE_NEAR=Q5240.3:2MM
1
2
CHGR_PBUS_SNS
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
CHGR_BGATE
CHGR_VBAT
NC_CHGR_EN_VR1
TP_CHGR_SMC_RST_L
CHGR_INT_1V8_L
TP_CHGR_CBC_ON
CHGR_EN_MVR
CHGR_AUX_OK
CHGR_AMON
CHGR_BMON
XW5260
SM
21
PLACE_NEAR=U5200. 4:2MM
48 48
CHGR_CSO_P CHGR_CSO_N
R5261
1.00 1.00
1%
1/20W
MF-LF
0201
CHGR_CSO_FILT_P
CRITICAL
C5261
0.047UF
CER-X7R
107
OUT
OUT
OUT
O T
OUT
1
1 %
50
2
0402
NO_XNET_CONNECTION=1
22 23
22 23
23
44 48
4 48
22
CRITICAL
R5260
0.005
1%
1W
MF
0612-8
1 2
3 4
1
2
(BMON)
2-CELL: 0.010 OHM
3-CELL: 0.005 OHM
107S00087
PLACE_NEAR=U5200.B4:2MM
1
R5262
2
CHGR_CSO_FILT_N
CRITICAL
C5260
0.47UF
21
20% 4V
CERM-X5R-1
201
1%
1/20W
MF-LF
0201
CRITICAL
1
C5262
0.047UF
2
10%
50
CER-X7R
0402
PPVBAT_AON_CHGR_REG
228997
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=13.05V
PPVBAT_AON_CHGR_R
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1500
VOLTAGE=13.05V
CRITICAL
Q5265
SI7655DN-COMBO
PWRPK-1212-8
SYM-VER-2
3
S
2
1
G
4
C5264
1000PF
21
10%
25V
X7R
0201
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
NTNS4CS69N
1
R5263
1K
5%
1/20W
MF
201
2
CRITICAL
1
C5254
33UF
20%
16V
2
TANT
CASED12-SM
CAPMAT=POLY-TANT
PACK_IGNORE=TRUE
PACK_OPTION=CHGR_40W
CRITICAL
1
C5255
33UF
20%
16V
2
TANT
CASED12-SM
CAPMAT=POLY-TANT
PACK_IGNORE=TRUE
PACK_OPTION=CHGR_40W
CRITICAL
12A-32V-0.0045OHM
1
2
5
D
1
C5263
4700PF
10%
25V
2
CER X5R
0201
CRITICAL
Q5270
XDFN
SYM_VER_1
CRITICAL
C5265
2.2UF
20%
25V
X5R
0402-1
3
D
S
2
G
CRITICAL
1
C5266
2.2UF
20%
25
2
X5R
0402
1
C5269
0.1UF
10%
25V
2
X5R
0201
<rdar://37259372&39763505>
1
SAVE_BAT_S SAVE_BAT_G
CRITICAL
R5270
24K
5%
/2 W
MF
201
1
2
PAGE TITLE
D5270
DFN0201
ALLOW APPLE_PREFIX=D
GDZ5V6LP3-55
PBUS SUPPLY & BATTERY CHARGER
CRITICAL
1
C5256
2.2UF
20%
25V
2
X5R
0402-1
F5200
1206
CRITICAL
1
C5267
0.1UF
10%
25V
2
X5R
0201
CRITICAL
1
C5257
2.2UF
20%
25V
2
X5R
0402-1
TO SYSTEM
21
1
2
PPBUS_AON
CRITICAL
C5268
0.01UF
10%
25V
X5R-CERM
0201
TO/FROM BATTERY
PPVBAT_AON
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1500
VOLTAGE=13.05V
PPDCIN_USBC_AON
1
R5271
200K
1%
1/20W
MF
201
2
1
C5258
1000PF
10%
25V
2
X7R
0201
101
101
10122
SYNC_DATE=02/25/2020SYNC_MASTER=REF_CHARGER_SUONA
BOM_COST_GROUP=BATTERY
www.repairlap.com
*** OK2INTEGRATE ***
www.teknisi-indonesia.com
CHGR I2C Level Translation
SMBUS_CHGR_1V8_[SCL/SDA]: Level translation circuit to be placed in project specific I2C page.
CHGR_INT_L Level Translation
Stuff R5320 in case, glitch during power sequencing is a concern.
101 22
PP1V8_S2
PP1V25_S2
NOSTUFF
1
R5320
47K
5%
1/20W
MF
201
2
U5320
SN74AUP1G17
GND
SON
Y
42
CHGR_INT_L
CHGR_INT_1V8_L
VCC
A
NC
NC
CHGR_AUX_OK Pull Up
Pull up to MPMU LDO9, or rely on MPMU internal pull up.
OK, to compl te y remove pull up , but co sult PMU architecture and check OTP before that.
PP1V8_AON
104
NOSTUFF
1
R5330
47K
5%
1/20W
MF
201
2
102
PLACE_NEAR=U5320.6:5MM
1
C5320
0.1UF
10%
6.3V
2
CERM-X5R
0201
>> SOC NUB_GPIO_5
10622
OUTIN
22 33
IN
CHGR_AUX_OK
CHGR_AUX_OK
MAKE_BASE=TRUE
Delay for 3.8V VR Enable
RDAR://59315467
R5340 and C5340 might need tweaking afer charz.
R5342
2 2K
1/20W
5%
MF
201
21
CHGR_EN_MVR_A
NSR01L30MXT5G-COMBO
R5340
22
IN
CHGR_EN_MVR
200K
1/20W
1
MF
201
21
CHGR_EN_MVR_DLY
1
C5340
1UF
20%
10V
2
X5R
0201
D5340
X3DFN2
KA
PPCHGR_VDDA
22
PLACE_NEAR=U5340.5:2MM
1
C5341
0.1UF
10%
6.3V
2
CERM-X5R
0201
>> MPMU GPIO2
OUT
NOSTUFF
R5341
1/20W
0201
2
0
5%
MF
NC
21
5
U5340
74LVC1G17
X2SON5
1 3
4
PLACE_NEAR=U5200:5MM
P3V8AON_PWR_EN
OUT
24
SYNC_DATE=04/01/2020SYNC_MASTER=REF_CHARGER_SUONA
PAGE TITLE
BATTERY CHARGER SUPPORT
BOM_COST_GROUP=BATTERY
www.repairlap.com
*** OK2RELEASE ***
www.teknisi-indonesia.com
3V8 AON CONTROLLER
105 25
26
101
25
5.5 < VIN < 13.5 V
4.75 < VDRV < 5.5 V
VDRV IS EXTERNAL OPTION TO
POWER IC INSTEAD OF VIN
TO SAVE POWER
4.75 < LDO5 < 5.25 V
MAX I_OUT TYP 160 MA
LDO5 NOT TO BE USED BY
SYSTEM IN 30A DESIGNS
PPBUS_VMAIN_VIN_ISNS
1
C5704
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
BYPASS=U5700.8::15MM
PP5V_S2_P3V8AON_VDRV
1
C5700
10UF
20%
16V
2
X6S
0603-1
138S00248
BYPASS=U5700.6::15MM
0603 SIZE REQUESTED BY DCDC
PP5V_AON
1
C5702
10UF
20%
16V
2
X6S
0603-1
138S00248
BYPASS=U5700.7::15MM
0603 SIZE REQUESTED BY DCDC
P3V8AON_PVCC
6
7
5
VIN
VDRV
LDO5
PVCC
U5700
RAA225501A-BOM1
QFN
OMIT_TABLE
"BOM1" SCH SYMBOL
FOR 30A OTP
APN OF SYMBOL
353S02326
BOOT1
UGATE1
PHASE1
LGATE1
BOOT2
UGATE2
PHASE2
LGATE2
BOOT3
UGATE3
PHASE3
LGATE3
4
3
2
1
29
30
31
32
28
27
26
25
F_SW IS REGISTER CONTROLLED
ICCMAX 30A DESIGN: 1 MHZ
P3V8AON_BST1
P3V8AON_DRVH1
P3V8AON_SW1
P3V8AON_DRVL1
P3V8AON_BST2
P3V8AON_DRVH2
P3V8AON_SW2
P3V8AON_DRVL2
P3V8AON_BST3
P3V8AON_DRVH3
P3V8AON_SW3
P3V8AON_DRVL3
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
25
25
25
25
2
25
25 99
25
25
25
25 99
25
23
33
101
IN
IN
ONLY FOR USE BY GATE
DRIVE CIRCUITRY
P3V8AON_PWR_EN
P3V8AON_LPM
PP5V_AON
PU TO INT LDO5 OR OTHER RAIL
P3V8AON_FAULT_L
R5710
0
21
5%
1/20W
MF
0201
R5711
0
21
5%
1/20W
MF
P3V8AON_LPM
0201
1
R5712
47K
5%
1/20W
MF
201
2
1
C5701
10UF
20%
16V
2
X6S
0603-1
138S00248
BYPASS=U5700.5::15MM
0603 SIZE REQUESTED BY DCDC
P3V8AON_PWR_EN_R
VIH_MAX 1.07 V
VIL_MIN 0.63 V
P3V8AON_LPM_R
VIH_MAX 1.1 V
VIL_MIN 0.5 V
24117
24117
I2C_P3V8AON_SCL
I2C_P3V8AON_SDA
VIH_MAX 1.1 V
VIL_MIN 0.5 V
GND'ED FOR POR (DATASHEET TABLE 1.5)
FAULT PULL DOWN CURRENT 1-2 MA TYPICAL
12
13
10
9
14
ENABLE
LPM
SCL
SDA
FAULT*
(9M PD)
(9M PD)
(OD)
VSEN
VRTN
CSP1
CSN1
CSP2
CSN2
15
16
19
20
21
22
P3V8AON_VSENSE
P3V8AON_VRTN
P3V8AON_ISEN1_P
P3V8AON_ISEN1_N
P3V8AON_ISEN2_P
P3V8AON_ISEN2_N
IN
IN
IN
IN
IN
IN
25
25
2
25
25
25
P3V8AON_IMON
IMON NOT TO BE USED SYSTEM SIDE
<RDAR://58648650>
IMON IS 2.52 V @ 30 A
VENDOR REQUIRES R > 1M, C < 50 PF
1
C5751
10PF
5%
25V
2
C0G
0201
131S00003
NOSTUFF
1
R5751
2.21K
1%
1/20W
MF
201
2
118S0199
R5750
1M
5%
1/20W
MF
201
117S0009
21
P3V8AON_IMON_P3V8AON
P3V8AON_GPIO
OPEN FOR PRODUCTION APPLICATION
PER DATASHEET REV 1.0
P3V8AON_SS
LONG STARTUP TIME SO INRUSH
NOSTUFF
1
R5700
100K
5%
1/20W
MF
201
2
BELOW 0.5A USB LIMIT
1
C5703
0.22UF
10%
25V
2
X5R
0201-1
18
IMON
11
GPIO
17
SOFTSTART
(0-4.5V)
CSP3
CSN3
EPAD
23
24
P3V8AON_ISEN3_P
P3V8AON_ISEN3_N
IN
IN
25
25
132S00202
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
IC,RAA225501,3-PH VOLT REG,TQFN32353S02326 1 U5700 CRITICAL P3V8AON_IC:A0
BOM OPTIONCRITICAL
P3V8AON_IC:A1_R0B0IC AA 5501B,ICE,BOM1,A1,OTP-R0B0,QFN32353S02472 CRITICALU57001
TA LE_5_ EAD
TA LE_5_ TEM
TA LE_5_ TEM
3V8_AON_I2C-DEV
NOSTUFF
1
R5760
1K
5%
1/20W
MF
201
2
3V8_AON_I2C-DEV
1
R5762
0
5%
1/20W
MF
0201
2
TPT_P3V8AON_PU_RAIL
3V8_AON_I2C-DEV
NOSTUFF
1
R5761
1K
5%
1/20W
MF
201
2
3V8_AON_I2C-DEV
1
R5763
0
5%
1/20W
MF
0201
2
TP5700
1
TP
TP-P5
3V8_AON_I2C-DEV
CKPLUS_WAIVE=I2C_PULLUP
I2C_P3V8AON_SCL
CKPLUS_WAIVE=I2C_PULLUP
I2C_P3V8AON_SDA
3V8_AON_I2C-POR 3V8_AON_I2C-POR
GND
MAKE_BASE=TRUE
GND
MAKE_BASE=TRUE
24 117
24 117
SYNC_MASTE =REF_VR_ICEMAN SYNC_DATE=04/09/2020
PAGE TITLE
POWER: 3V8 AON (1/2)
BOM_COST_GROUP=PLATFORM POWER
8
2
www.repairlap.com
*** OK2RELEASE ***
www.teknisi-indonesia.com
105 25 24
24
24
24
24
PPBUS_VMAIN_VIN_ISNS
CRITICAL
R5804
IN
OUT
P3V8AON_DRVH1
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
DIDT=TRUE
SWITCH_NODE=TRUE
R5803
0
5%
1/20W
F
0201
117S0201
NOSTUFF
2.2
1/20W
117S0056
<RDAR://59524111>
21
P3V8AON_BST1_RCP3V8AON_BST1
MIN_LINE_WIDTH=0 2000
MIN_NECK_WIDTH=0.1000
DIDT=TRUE
SWITCH_NODE=T UE
5%
MF
201
21
C5811
0.1UF
21
10%
25V
X7R-CERM-1
0402
132S0438
P3V8AON_DRVH1_R
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
P3V8AON_SW1
MIN_ INE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
SWITCH NODE=TRUE
DIDT TRUE
24
OUT
CRITICAL
Q5800
CSD58889Q3D
3
TG
4
TGR
Q3D
376S00012
VIN
VSW
1
6
7
8
99
D5800
SOD523
KA
5
BG
R5805
1
5%
1 16
MF-LF
402
116S0006
21
P3V8AON_DRVL1_R
MIN_LINE_WIDTH=0.2000
MIN_NECK WIDTH=0.1000
GATE_N DE=TRUE
DIDT=TRUE
2425
IN
P3V8AON_PVCC
P3V8AON_DRVL1
MIN_LINE_WIDTH=0.2000
MIN NECK_WIDTH=0.1000
AT _ ODE=TRUE
DID =TRUE
SBR1A30T5
371S00245
3V8_EXT_DIODE
1
C5800
33UF
20%
16V
2
TANT
CASE-T
128S00009
CKPLUS_WAIVE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-B12
P3V8AON_VSW1 PP3V8AON_PH1
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
SWITCH_NODE=TRUE
DIDT=TRUE
116S0007
1
R5809
1.5
5%
1/16W
MF-LF
402
2
P3V8AON_SNUB1
SWITCH_NODE=TRUE
DIDT=TRUE
C ITICAL
1
C5801
33UF
20%
16V
2
TANT
CASE-T
128S00009
CKPLUS_WAIVE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-B12
CRITIC L
1
C5800
33UF
20%
16V
2
TANT
CASED12-SM
128S0436
CKPLUS_WAIVE=CAPDERATE
PACK_ GNORE=TRUE
3V8_AON PBUS-D12
1
2
1
2
NOSTUFF
C5814
220PF
5%
50V
C0G
0201-1
CRITICAL
C5801
33UF
20%
16V
TANT
CASED12-SM
128S0436
CKPLUS_WAIVE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-D12
1UH-20%-11A-0.0127OHM
NO_XNET_CONNECTION=1
1
C5810
5600PF
10%
10V
2
CERM-X7R
0201
132S0370
131S0514
1
OUT
P3V8AON_ISEN1_P
C5809
150PF
5%
50V
2
C0G-CERM
0402
<RDAR://59524111>
NOSTUFF
1
C5815
220PF
5%
50V
2
C0
0201-1
CRITICAL
1
C5800
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
128S0264
CKPLUS_WAIVE=CAPDERATE
3V8_AON_PBUS-D2
CRIT C L
L5800
PIHA052D-SM
152S00265
R5801
2 1
118S0744
R5802
118S0744
CRITICAL
1
C5801
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
128S0264
CKPLUS_WAIVE=CAPDERATE
3V8_AON_PBUS-D2
21
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=5V
1.00
1%
1/20W
MF-LF
0201
1.00
1%
1/20W
MF-LF
0201
P3V8AON_ISNS1_P
21
P3V8AON_ISNS1_N
1
C5804
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
MIRROR_WITH=C5804
1
C5805
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
NO_XNET_CONNECT ON=1
107S00373
R5800
0 004
1%
1/3W
LF
0306
95
ICCMAX = 30 A
21
43
1
C5890
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
128 00067
CKPLUS_WAI =CAPDERATE
MIRROR_WITH=C5887
1
C5886
2.2UF
20%
25V
2
95
X6S-CERM
0402
138S00042
CRITICALCRITICAL
1
C5891
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
128S00067
CKPLUS_WAIVE=CAPDERATE
1
C5887
2.2UF
20%
25V
2
X6S-CERM
0402
138S0 042
CRITICAL
1
C5892
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
128S00067
CKPLUS_WAIVE=CAPDERATE
MIRROR_WITH=C5889
1
C5888
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
CRITICAL
1
C5893
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
128S00067
CKPL _WAIVE=CAPDERATE
1
C5889
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
CRITICAL
1
C5894
150UF
20%
6 3V
2
TANT-POLY
CASE-B1S-1
128S00067
CKPLUS_WAIVE=CAPDERAT
PP3V8_AON
CRITICAL
1
C5895
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
128S00067
CKPLUS_WAIVE=CAPDERATE
101
24
105 25 24
24
24
24
24
24
OUT
P3V8AON_ISEN1_N
PPBUS_VMAIN_VIN_ISNS
CRITICAL
1
C5820
ALLOW_APPLE_PREFIX=Q
IN
OUT
P3V8AON_DRVH2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
P3V8AON_BST2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
DIDT=TRUE
SWITCH_NODE=TRUE
R5823
0
0%
1/16W
MTL-FILM
0402
116 0 0
R5824
1 5
1
5%
1/8W
TK
0402
107S00371
P3V8AON_DRVH2_R
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
C5831
0.22UF
10%
25V
X7R
0402
21
P3V8AON_SW2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
SWITCH_NODE=TRUE
DIDT= RUE
OUT
24 25 99
1
2
3
4
21
P3V8AON_BST2_RC
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH 0.1000
DIDT=TRUE
SWITCH_NODE=TRUE
132S0401
CRITICAL
Q5820
AONE36196
376S00281
G1
D2/S1
DFN
D1
D1
8
9
NOSTUFF
D5820
SOD523
1%
1/4W
MF
0402
KA
G2
7
R5826
21
P3V8AON_DRVL2_R
MIN_NECK_WIDTH=0. 00
MIN_LINE_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
0.100
1%
1/4W
MF
0402
104S0050
21
P3V8AON_DRVL2_RR
MIN_ IN _WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
VER-1
2425
P3V8AON_PVCC
SBR1A30T5
371S00245
8_EXT_DIODE
R5825
0.100
104S0050
IN
OUT
OUT
P3V8AON_DRVL2
M N_ ECK_WIDTH=0.2000
MIN LINE_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
P3V8AON_ISEN2_P
P3V8AON_ISEN2_N
33UF
20%
16V
2
TANT
CASE-T
128S00009
CKPLUS_WAIVE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-B12
242599
IN
SAME SW NET
ON BOTH SIDES
P3V8AON_SW2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
SWITCH_NODE=TRUE
DIDT=TRUE
1
R5829
2.2
5%
1/16W
MF-LF
402
2
P3V8AON_SNUB2
1
C5829
100PF
5%
50V
2
C0G
0402
CRITICAL
1
C5821
33UF
20%
16V
2
TANT
CAS -T
128S00009
CKPLUS_WAIVE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-B12
NOSTUFF
DIDT=TRUE
SWITCH_NODE=TRUE
NOSTUFF
CRITICAL
1
C5820
33UF
20%
16V
2
TANT
CASED12-SM
128S0436
CKPLUS_WAIVE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-D12
CRITICAL
1
C5820
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
128S0264
CKPLUS_WAIVE=CAPDERATE
3V8_AON_PBUS-D2
0.56UH-20%-22.0A-0.0067OHM
NOSTUFF
1
C5834
220PF
5%
50V
2
C0G
0201-1
NOSTUFF
1
C5835
220PF
5%
50V
2
C0G
0201-1
1
C5824
2.2UF
20%
25V
2
X6S CERM
0402
138S00042
CRITICAL
L5820
PILA062D-SM- OMBO
152S01248
NO_XNET_CONNECTION=1
1
C5830
5600PF
10%
10V
2
CERM-X7R
0201
132 3 0
MIRROR_WITH=C5824
1
C5825
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
21
PP3V8AON_PH2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=5V
R5821
1.00
2 1
1%
1/20W
MF-LF
0201
118S0744
R5822
1.00
1%
1/20W
MF-LF
0201
118S0744
P3V8AON_ISNS2_P
21
P3V8AON_ISNS2_N
107S00090
R5820
0.001
1%
1/3W
MF
030
NO_XNET_CONNECT ON=1
21
43
95
95
105 25 24
24
24
24
24
24
PPBUS_VMAIN_VIN_ISNS
CRITICAL
ALLOW_APPLE_PREFIX=Q
IN
OUT
P3V8AON_DRVH3
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
P3V8AON_BST3
MIN LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
DIDT=TRUE
SWITCH_NODE=TRUE
R5843
0
1
0%
1/16W
MTL-FILM
0402
116S00006
R5844
1.5
1/8W
0402
107S00371
P3V8AON_BS 3_RC
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
DIDT=TRUE
SWITCH_NODE=TRUE
21
5%
TK
C5851
0.22UF
21
10%
25V
X7R
0402
132S0401
P3V8AON_DRVH3_R
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
P3V8AON_SW3
MIN_L NE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
SWITCH_NODE=TRUE
DIDT=TRUE
24 25 99
OUT
1
2
3
4
CRITICAL
Q5840
AONE36196
376S00281
G1
D2/S1
DFN
D1
D1
8
9
NOSTUFF
D5840
SOD5 3
1%
1/4W
MF
0402
KA
G2
7
R5846
21
P3V8AON_DRVL3_R
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
0.100
1%
1/4W
MF
0402
104S0050
21
P3V8AON_DRVL3_RR
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
VER-1
2425
P3V8AON_PVCC
SBR1A30T5
371S00245
3V8_EXT_DIODE
R5845
0.100
104S0050
IN
OUT
OUT
P3V8AON_DRVL3
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1000
GATE_NODE=TRUE
DIDT=TRUE
P3V8AON_ISEN3_P
P3V8AON_ISEN3_N
1
C5840
33UF
20%
16V
2
TANT
CASE-T
128S00009
CKPLUS_WAIVE=CAPDERA
PACK_IGNORE=TRUE
3V8_AON_PBUS-B12
242599
IN
SAME SW NET
ON BOTH SIDES
P3V8AON_SW3
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
SWITCH_NODE=TRUE
DIDT=TRUE
1
R5849
2.
5%
1/16W
MF-LF
402
2
P3V8AON_SNUB3
1
C5849
100PF
5%
50V
2
C0G
0402
CRITICAL
1
C5841
33UF
20%
16V
2
TANT
CASE-T
128S00009
CKPLUS_WAIVE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-B12
NOSTUFF
DIDT=TRUE
SWITCH_NODE=TRUE
NOSTUFF
CRITICAL
1
C5840
33UF
20%
16V
2
TANT
CASED12-SM
128S0436
CKPLUS_W VE=CAPDERATE
PACK_IGNORE=TRUE
3V8_AON_PBUS-D12
CRITICAL
1
C5840
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
128S0264
CKPLUS_WAIVE=CAPDERATE
3V8_AON_PBUS-D2
0.56UH-20%-22.0A-0.0067OHM
NOSTUFF
1
C5854
220PF
5%
50V
2
C0G
0201-1
NOSTUFF
1
C5855
220PF
5%
50V
2
C0G
0201-1
1
C5844
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
CRITICAL
L5840
PILA062D-SM-COMBO
152S01248
NO_XNET_CONNECTION=1
1
C5850
5600PF
10%
10V
2
CERM-X7R
0201
132S0370
MIRROR_WITH=C5844
1
C5845
2.2UF
20%
25V
2
X6S-CERM
0402
138S00042
21
PP3V8AON_PH3
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=5V
R5841
1.00
2 1
1%
1/20W
MF-LF
0201
118S0744
R5842
1.00
1%
1/20W
MF-LF
0201
118S0744
P3V8AON_ISNS3_P
21
P3V8AON_ISNS3_N
107S00090
R5840
0 001
1%
1/3W
MF
0306
NO_XNET_CONNECT ON=1
21
43
95
NO_XNET_CONNECTION=1
XW5870
2 1
SM
NO_XNET_CONNECTION=1
P3V8AON_VSNS_XW_P
XW5871
2 1
S
95
P3V8AON_VSNS_XW_N
NO_XNET_CONNEC ON
R5870
0
21
5%
1/20W
MF
0201
117S0201
NO_XNET_CONNECTION=1
R5871
0
21
5%
1/20W
MF
0201
117S0201
PAGE TITLE
P3V8AON_VSENSE
OUT
24
NOSTUFF
1
C5870
1UF
20%
10V
2
X6S-CERM
0201
138S00044
NO_XNET_CONNECTION=1
P3V8AON_VRTN
OU
24
POWER: 3V8 AON (2/2)
SYNC_DATE=03/30/2020SYNC_MASTER=REF_VR_ICEMAN
BOM_COST_GROUP=PLATFORM POWER
2
1
www.repairlap.com
104
www.teknisi-indonesia.com
ZERO OHM RESISTOR TO ALLOW ACCESS TO VDRV
PP5V_S2
R5900
0
21
5%
1/16W
MF-LF
402
116S0004
PP5V_S2_P3V8AON_VDRV
MAKE_BASE=TRUE
VOLTAGE=5V
MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000
PP5V_S2_P3V8AON_VDRV
24
BOM_COST_GROUP=PLATFORM POWER
PAGE TITLE
POWER: 3V8 AON SUPPORT
2
1
www.repairlap.com
SLAVE PMU INPUT POWER & BUCKS
www.teknisi-indonesia.com
105 28 27
PP3V8_AON_SPMU_ISNS_VIN
CRITICAL
1
C7700
10UF
20%
6.3V
2
CER-X6S
0402
1
C7708
1UF
20%
10V
2
X6S-CERM
0201
1
C770G
1UF
20%
10V
2
X6S-CERM
0201
1
C771M
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.C13:10MM
FED BY SPMU BUCK13 (1.2V)POWER ALIAS=>
FED BY MPMU BUCK3 (1.8V)POWER ALIAS=>
PLACE_NEAR=U7700 C13:10MM
CRITICAL
1
C7701
10UF
20%
6.3V
2
CER-X6S
0402
1
C7709
1UF
20%
10V
2
X6S-CERM
0201
1
C770H
1UF
20%
10V
2
X6S-CERM
0201
1
C771N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
02
PLACE_NEAR=U7700.G13:10MM
1
C7702
10UF
20%
6.3V
2
CER-X6S
0402
1
C770A
1UF
20%
10V
2
X6S-CERM
0201
1
C770I
1UF
20%
10V
2
X6S-CERM
0201
1
C772M
12PF
5%
25V
2
NP0-C0G
0201
1
C7703
10UF
20%
6.3V
2
CER-X6S
0402
1
C770B
1UF
20%
10V
2
X6S-CERM
0201
1
C770J
1UF
20%
10V
2
X6S- ERM
0201
1
C772N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.G13:10MM
28
102
101
PLACE_NEAR=U7700.M2:10MM
PLACE_NEAR=U7700.L13:10MM
PP5V_BSTLQ_SPMU
VOLTAGE=5V
1
C7716
10%
10V
2
X6S-CERM
0201
1
2
1
2
1
2
1
2
1
2
CRITICALCRITICALCRITICALCRITICAL
1
C7704
10UF
20%
6.3V
CER-X6S
0402
C770C
1UF
20%
10V
X6S-CERM
0201
C770K
1UF
20%
10V
X6S-CERM
0201
C773M
12PF
5%
25V
NP0-C0G
0201
PLACE_NEAR=U7700.M2:10MM
C775M
12PF
5%
25V
NP0-C0G
0201
PLACE_NEAR=U7700.L13:10MM
PP1V5_VLDOINT_SPMU
28
105 28 27
PLACE_NEAR=U7700.D4:5MM
PP3V8_AON_SPMU_ISNS_VIN
1
C7717
0.1UF
10%
10V
2
X6S-CERM
0201
C7705
10UF
20%
6.3V
2
0402
1
C770D
1UF
20%
10V
2
X6S-CERM
0201
1
C770L
1UF
20%
10V
2
X6S-CERM
0201
1
C773N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
C775N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.L7:5MM
PP1V25_S2
PP1V8_S2
CRITICALCRITICAL
1
C771A
0.1UF0.1UF
10%
10V
2
X6S-CERM
0201
1
C7706
1UF
20%
10V
2
X6S-CERMCER-X6S
0201
1
C770E
1UF
20%
10V
2
X6S-CERM
0201
1
C770M
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700 L1 0MM
1
C774M
12PF
5%
25V
2
NP0-C0G
02
PLACE_NEAR=U7700.N6:10MM
1
C776M
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.D9:10MM
1
C7714
0.1UF
10%
10V
2
X6S-CERM
0201
PLACE_NEAR=U7700.C9:5MM
1
C7707
1UF
20%
10V
2
X6S-CERM
0201
1
C770F
1UF
20%
10V
2
X6S-CERM
0201
1
C770N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PLACE_N AR=U7700.L1:10MM
1
C774N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.N6:10MM
1
C776N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.D9:10MM
CRITICALCRITICALCRITICAL
1
C7715
0.1UF
1 %
10V
2
X6S-CERM
0201
30 29 27
VSS_ANA_SPMU
C13
VDD_BUCK5_4_10
C14
VDD_BUCK5_4_10
G13
VDD_BUCK5_4_10
G14
VDD_BUCK5_4_10
M2
VDD_BUCK6
N2
VDD_BUCK6
P2
VDD_BUCK6
N6
VDD_BUCK12
P6
VDD_BUCK12
L13
VDD_BUCK13
L14
VDD_BUCK13
L1
VDD_MAIN_BUCK6
L9
VDD_MAIN_SOUTH
E8
VDD_MAIN
D2
VDD_MAIN_LDO
E2
VDD_MAIN_LDO
D8
VDD_MAIN_SNS
E10
VDD_SNS_SPARE
C12
VDD_ANA
D3
VDD_ANA
E7
VDD_ANA
G12
VDD_ANA
K3
VDD_ANA
L8
VDD_ANA
L12
VDD_ANA
M6
VDD_ANA
D5
VDD_DIG
D10
VDD_DIG
J3
VDD_DIG
J10
VDD_DIG
D9
VDD_BOOST
B2
VDD_BOOST_LDO
C2
VDD_BOOST_LDO
E9
VDD_BOOST_SNS
D4
VDD_HI_INT1
L4
VDD_HI_INT2
L7
VDD_HI_INT3
M10
VDD_HI_INT4
J11
VDD_HI_INT5
A11
VDD_HI_INT6
C9
VDD_HI_INT7
G10
VDDIO_1V2
H10
VDDIO_BUCK3
K6
VPP
998-22526
OMIT_TABLE
U7700
TMLT47A1-JPE
WLCSP
SYM 1 OF 4
BUCK4_LX0
BUCK4_LX1
BUCK4_LX1
BUCK4_FB
BUCK4_VSS_FB
BUCK5_LX_0
BUCK5_LX_1
BUCK5_FB
BUCK5_VSS_FB
BUCK6_LX_0
BUCK6_LX_1
BUCK6_LX_2
BUCK6_FB
BUCK6_VSS_FB
BUCK6_VOUT_0
BUCK6_VOUT_1
BUCK6_VOUT_2
BUCK10_LX_0
BUCK10_LX_1
BUCK10_FB
BUCK10_VSS_FB
BUCK12_LX_0
BUCK12_LX_1
BUCK12_FB
BUCK12_VSS_FB
BUCK13_LX_0
BUCK13_LX_1
BUCK13_FB
BUCK13_VSS_FB
F14
D13
D14
F11
F12
H13
H14
H11
H12
M3
N3
P3
L3
K2
M1
N1
P1
B13
B14
B11
B12
N5
P5
L5
M5
K13
K14
K11
K12
L7740
OUT
30
1.0UH-20%-4A-0.038OHM
BUCK4_LX0
DIDT=TRUE
SWITCH_NODE=TRUE
30
OUT
0.22UH-20%-6.7A-0.023OHM
PIKA20161B-COMBO
L7741
BUCK _LX1
DIDT=TRUE
SWITCH_NODE=TRUE
PINA20121T-SM
R770A
0
21
BUCK4_FB
5
PLACE_NEAR=U7700.F11:15MM
VSS_ANA_SPMU
30
OUT
0.47UH-20%-4A-0.027OHM
BUCK4 FB_R
0201MF1/20W
302927
L7750
BUCK5_LX0
DIDT=TRUE
SWITCH_NODE=TRUE
2012
R770B
0
BUCK5_FB BUCK5_FB_R
PLAC _NEAR=U7700.H12:15MM
VSS_ANA_SPMU
30
OUT
21
0201
MF1/20W5%
302927
L7760
0.47UH-20%-6.9A-0.022OHM
BUCK6_LX0
DIDT= RUE
SWITCH_NODE=TRUE
IUA25201B-SM
R770C
0
BUCK6_FB BUCK6_FB_R
1/20W 0201MF
5%
PLACE_NEAR=U7700.L3:15MM
VSS_ANA_SPMU
21
302927
PP2V5_AWAKE_NAND
L77A0
OUT
30
0.47UH-20%-4A-0.027OHM
BUCK10_LX0
DIDT=TRUE
SWITCH_NODE=TRUE
2012
R770D
0
21
BUCK10_FB
PLACE_NEAR=U7700.B11:15MM
VSS_ NA_SPMU
30
OUT
0.47UH-20%-4A-0.027OHM
BUCK10_FB_R
0201
MF5% 1/20W
302927
L77C0
BUCK12_LX0
DIDT=TRUE
SWITCH_NODE=TRUE
2012
R770E
BUCK12_FB
PLACE_NEAR=U7700.L5:15MM
VSS_ANA_SPMU
21
BUCK12_FB_R
02015% 1/20W0MF
2927
L77D0
0.47UH-20%-4A-0.027OHM
30
BUCK13_LX0
DIDT=TRUE
SWITCH_NODE=TRUE
2012
R770F
0
BUCK13_FB
PLACE_NEAR=U7700.K11:15MM
VSS_ANA_SPMU
5%
1/20W
21
BUCK13_FB_R
MF 0201
302927
CRITICAL
21
CRITICAL
21
XW7700
SHORT-14L-0.1MM-SM
21
NO_XNET_CONNECTION=1
CRITICAL
21
XW7701
SHORT-14L-0.1MM-SM
21
NO_XNET_CONNECTION=1
CRITICAL
21
XW7760
SHORT-14L-0.1MM-SM
21
NO_XNET_CONNECTION=1
10127
CRITICAL
21
XW77A0
SHORT-14L-0.1MM-SM
21
NO_XNET_CONNECTION=1
CRITICAL
21
XW77C0
SHORT-14L-0.1MM-SM
21
NO_XNET_CONNECTION=1
CRITICAL
21
XW77D0
SHORT-14L-0.1MM-SM
21
NO_XNET_CONNECTION=1
CRITICAL
1
C7740
15UF
20%
2V
2
X6S
0402
CRITICAL CRITICAL CRITICAL
1
C7710
20% 20% 20%
2V
2
X6S X6S
CRITICAL
1
C7750
15UF
2V
2
X6S
0402 04 0402 0402 0402 0402 04
1
C778M
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=L7750.2:5MM
PLACE_NEAR=L7750.2:5MM
CRITICAL CRITICALCRITICALCRITICALCRITICALCRITICALCRITICALCRITICAL
1
C7760
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL
1
C7766
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1
C77A0
15UF
20%
2V
2
0402 0402 0402 0402
1
C77C0
15UF 15UF
2V
2
X6S
1
C7792
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=L77C0.2:5MM
PLACE_NEAR=L77C0.2:5MM
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1
C77D3
15UF
20%
2V
2
X6S
0402 0402 0402 0402 0402 0402
PP1V06_S2SW_DRAM
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1
C7741
15UF
20%
2V
2
X6S
0402 0402 0402 0402 0402 0402
1
C7742
15UF
20%
2V
2
0402
1
C7743
15UF
20%
2V
2
1
C7744
15U
20%
2
1
C7745
15UF
20%
2V2V
2
CRITICAL CRITICAL
1
C7746
15UF
20%
2V
2
1
C7747
15UF
20%
2V
2
X6SX6SX6SX6SX6SX6S
CRITICAL
1
C7711
15UF15UF
2V
2
1
C7712
15UF
2V
2
X6S
1
C7713
15UF
20%
2V
2
X6S
0402040204020402
1
C777M
12PF
5%
5V
2
NP0-C0G
0201
PLACE_NEAR=L7740.2:5MM
P CE N AR=L7741.2:5MM
1
C777N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP0V764_S1_SRAM
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1
C7751
20%20%
2V
2
X6S
0402
1
C778N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
C7752
15UF15UF
20%
2
X6S
1
C7753
15UF
20%
2V2V
2
1
C779M
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=L7760.2:5MM
PLACE_NEAR=L7760.2:5MM
1
C7754
15UF
2
X6SX6S
1
C779N
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
C7755
20%20%
2V2V
2
X6S
1
C7756
15UF15UF
2V
2
X6S
1
C7757
15UF
20%20%
2V
2
X6S
PP2V5_AWAKE_NAND
1
C7761
10UF
20%
6 3V
2
C R-X6S
0402
1
2
CRITICAL
1
C7767
10UF 10UF
20%
6.3V
2
CER-X6S
0402
1
2
C7762
10UF
20%
6.3V
CER-X6
0402
C7768
20%
6 3V
CER-X6S
04
1
C7763
10UF
20%
6.3V
2
CER-X6S
0402
1
C7769
10UF
20%
6.3V
2
0402
1
C7764
10UF
20%
6 3V
2
C R- 6S
0402
1
C776A
10UF
20%
6.3V
2
CER-X6SCER-X6S
0402
1
C7765
10UF
20%
6.3V
2
CER-X6S
0402
1
C776B
10UF
20%
6.3V
2
CER-X6S
0402
1
C776C
10UF
20%
6 3V
2
C R-X6S
1
C776E
10UF
20%
6.3V
2
CER-X6S
0402 04
1
C776D
10UF
20%
6.3V
2
CER-X6S
04020402
CRITICALCRITICALCRITICALCRITICALCRITICALCRITICAL
1
C776F
10UF
20%
6 3V
2
CER-X6S
PP0V6_S1_VDDQL
1
C77A1
15UF
2V
2
X6SX6S
NOSTUFF
1
C77A2
15UF
20%20%
2
X6S
1
C77A3
15UF
20%
2V2V
2
X6S
NOSTUFF
1
C7722
15UF
20%
2
0402 0402
1
2
C7723
15UF
20%
2V2V
X6SX6S
PLACE_NEAR=L77A0.2:5MM
1
C7790
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=L77A0.2:5MM
1
C7791
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP0V88_S1 1 1
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICALCRITICAL
1
C77C1
20%
2V 2V
2
X6S
1
C7793
3.0PF
+/-0.1PF
25V
2
N 0-C0G
0201
1
C77C2
15UF
20%
2
X6S
040204020402 0402
1
2
C77C3
15UF
20%20%
2V
X6S
1
C7718
15UF
20%
2V 2V
2
X6S
1
C7719
15UF
20%
2
X6S
1
C7720
15UF 15UF
20%
2V
2
X6S
1
C7721
20%
2V
2
X6S
0402040204020402
PP1V25_S2
1
C77D4
15UF
2
X6S
1
C77D5
15UF
20%20%
2V2V
2
1
C77D6
15UF
20%
2V
2
X6SX6S
1
C77D7
15UF
20%
V
2
X6S
1
C77D8
15UF
20%
2V
2
X6S
1
C7794
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=L77D0.2:5MM
PLACE_NEAR=L77D0.2:5MM
1
C7795
3.0PF
+/-0 1PF
25V
2
NP0-C0G
0201
101
101
10127
101
102
PLACE_NEAR=U7700.G10:5MM
PLACE_NEAR=U7700.H10:5MM
C TECM TE E T M
PAGE TITLE
PMU: SLAVE INPUT PWR & BUCKS
BOM COST GROUP=PLATFORM POWER
www.repairlap.com
SLAVE PMU LDO, SWITCHES & BOOST
www.teknisi-indonesia.com
FROM BUCK13 =>
FROM BUCK13 OR =>
POST EVT: BUCK14
FROM BUCK4 =>
FROM BUCK12 =>
102
34 28
101
101 28
105 28 27
LDO/SW INPUTS LDO/SW OUTPUTS
PP1V25_S2
PPVDD_PMU_LDO_PREREG
PP1V06_S2SW_DRAM
PP0V88_S1
PP3V8_AON_SPMU_ISNS_VIN
M7
C4
N7
P7
A1
A2
VDD_LDO4
VDD_LDO8
VDD_LDO11
VDD_LDO12
VDD_LDO15
VDD_LDO15
998-22526
OMIT_TABLE
U7700
TMLT47A1-JPE
WLCSP
SYM 2 OF 4
VLDO4
VLDO6
VLDO8
VLDO9
VLDO11
VLDO12
VLDO15
VLDO17
M8
D1
C3
E3
N8
P8
A3
B1
PP0V72_S2_VDD_LOW
NC SPMU VLDO6
PP1V2 AWAKE PLL
PP1V8_AON_SPMU
PP0V855 S2SW CIO
PP0V805_S1_VDD_FIXED
NC SPMU VLDO15
NC SPMU VLDO17
10228
102
10228
10228
10228
10328
103
103
FROM BUCK3 POWER ALIAS =>
FROM BUCK13 POWER ALIAS =>
FROM BUCK12 POWER ALIAS =>
102 29
101 28
101
1
C7810
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL
1
C7811
10UF
20%
6.3V
2
CER-X6S
0402
FROM BUCK13 OR =>
POST EVT: BUCK14
34 28
CRITICALCRITICAL
1
C7812
10UF
20%
6.3V
2
CER-X6S
0402
THIS IS AN OUTPUT(1.5V) =>
105 28 27
27
PPVDD_PMU_LDO_PREREG
PP1V8_S2
PP1V25_S2
PP0V88_S1
PP3V8_AON_SPMU_ISNS_VIN
PP1V5_VLDOINT_SPMU
VOLTAGE=1.5V
B4
M11
M13
N13
P13
N11
P11
N9
P9
J2
E1
VDD_LDO20
VDD_SW4
VDD_SW5
VDD_SW5
VDD_SW5
VDD_SW6
VDD_SW6
VDD_SW7
VDD_SW7
VDD_MAIN_BSTLQ
VLDOINT
SWITCHED RAILS
VLDO18
VLDO20
BUCK_SW4
BUCK_SW5
BUCK_SW5
BUCK_SW5
BUCK_SW6
BUCK_SW6
BUCK_SW7
BUCK_SW7
BSTLQ_LX
BSTLQ_FB
BSTLQ_VOUT
VCP_OUT_SPARE
VMBX_SPARE
C1
B3
M12
M14
N14
P14
N12
P12
N10
P10
G1
J1
H1
M9
F10
NC_SPMU_VLDO18
PP1V2 S2 CIO
PP1V8_AWAKE_SPMU_GPIO
VOLTAGE=1.8V
PP1V25_AWAKESW_VCCQ
PP0V88_AWAKESW_NAND
SPMU_BSTLQ_LX
30
SWITCH_NODE=TRUE
DIDT=TRUE
PP5V_BSTLQ_SPMU
27
NO_TEST=1
VOLTAGE=5V
NC_SPMU_VCP_OUT_SPARE
NC_SPMU_VMBX_SPARE
NO_TEST=1
103
10328
10228
10228
CRITICAL
L7800
0.47UH-20%-1.7A-0.175OHM
21
0402-COMBO
XW78D0
SHORT-12L-0.25MM-SM
1
C7800
20UF
20%
10V
2
X5R
0402
21
CRITICAL
1
C7801
20UF
20%
10V
2
X R
PLACE_NEAR=U7700.H1:5MM
1
C7822
1UF
20%
10
2
X6S-CERM
0201
PLACE_NEAR=U7700.M12:5MM
1
C7898
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.M12:5MM
PP3V8_AON_SPMU_ISNS_VIN
PP5V_BSTLQ_VOUT_SPMU
1
C7892
5%
25V
2
NP0-C0
02010402
PLACE_NEAR=U7700.H1:5MM
1
C7893
3.0PF12PF
+/-0.1PF
25V
2
NP0-C0G
0201
<= BUCK_SW4 USED FOR SPMU GPIO
1
C7899
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
CRITICALCRITICAL
1
C7831
0.1UF
1 %
10V
2
X S ERM
02 1
VOLTAGE=5V
PLACE_NEAR=U7700 H :5MM
GND
1052827
3029
Decoupling: VDD_LDO8
PPVDD_PMU_LDO_PREREG
CRITICAL
1
C7813
10UF
20%
6.3V 6.3V
2
CER-X6S
0402 0402
Decoupling: LDO4
PP0V72_S2_VDD_LOW
CRITICAL
1
C7820
10UF 10UF
20% 20%
6.3V 6.3V
2
CER-X6S CER-X6S
0402 0402
CRITICAL
1
C780D
2
Decoupling: LDO11
3428
PP0V855_S2SW CIO
CRITICAL
1
C7809
10UF
20%
2
CER-X6S
Decoupling: LDO12
10228
PP0V805_S1_VDD_FIXED
CRITICAL
1
C7821
10UF
20%
2
CER-X6S
Decoupling: SW5
PP1V25_AWAKESW_VCCQ
1
C7802
10UF
20%
6.3V
2
CER-X6S
0402
1
C780C
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
10228
Decoupling: SW6/7
10328
CRITICAL CRITICALCRITICALCRITICAL
1
C780B
10UF
20%
6.3V6.3V
2
CER-X6S
04020402
PP0V88_AWAKESW_NAND
1
C7830
10UF
20%
6.3V
2
CER-X6S
1
C7803
10UF
20%
6.3V
2
CER-X6S
0402
1
C7829
10UF
20%
6.3V
2
CER-X6S
04020402
1
C7896
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=U7700.M14:5MM
PLACE_NEAR=U7700.M14:5MM
1
C7828
10UF
20%
6.3V
2
CER-X6S
0402
PLACE_NEAR=U 700.N12:5MM
1
2
1
2
PLACE_NEAR=U7700.N12:5MM
C7897
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
C7894
12PF
5%
25V
NP0-C0G
0201
10228
1
2
C7895
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
CRITICAL
1
C7825
0.1UF
10%
Decoupling: LDO.INT
PP1V5_VLDOINT_SPMU
1
C7807
220PF
10%
16V
2
CER-X7R
0201
1
C7808
220PF 10UF
10%
16V
2
CER-X7R
0201
CRITICAL
1
C7823
10UF
20%
6.3V
2
CER-X6S
0402
CRITICALCRITICAL CRITICALCRITICAL
1
C7834
20%
6.3V
2
CER-X6S
0402
27 28
10V
2
X6S-CERM
0201
PLACE_NEAR=U7700.J1:5MM
Decoupling and Desense: BSTLQ
10228
PP3V8_AON_SPMU_ISNS_VIN
CRITICAL CRITICAL
1
C7815
1UF
20%
10V
2
X6S-CERM
0201
PLACE_NEAR= 7700.J2:5MM
PLACE_NEAR=U7700.J2:5MM PLACE_NEAR=L7800.2:5MM
1
C7816
1UF
20%
10V
2
X6S-CERM
1
C7890
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=L7800.2:5MM
1
C7891
3.0PF
+/-0.1PF
25V
2
NP0-C0G
02010201
1052827
Decoupling: LDO8
PP1V2_AWAKE_PLL
CRITICAL
1
C7805
10UF 10UF
20%
2
1
C7806
20%
6.3V6.3V
2
CER-X6SCER-X6S
04020402
Decoupling: VDD_LDO20
10228
PPVDD_PMU_LDO_PREREG
CRITICALCRITICAL
1
C7814
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
Decoupling: LDO9 Decoupling: LDO20
PP1V8_AON_SPMU
CRITICAL
1
C7824
1UF
20%
2
1
2
CRITICAL
C7835
1UF
20%
10V10V
X6S-CERMX6S-CERM
10228
PP1V2_S2_CIO
1
C7804
2
0402
NOSTUFF
CRITICALCRITICAL
1
C780A
10UF10UF
20%20%
6.3V6.3V
2
CER-X6SCER-X6S
04020201 0201
3428
CM TE E T M
PAGE TITLE
PMU: SLAVE LDO
10328
BOM COST GROUP=PLATFORM POWER
www.repairlap.com
SLAVE PMU GND,ADC,& GPIO
www.teknisi-indonesia.com
998-22526
OMIT_TABLE
PLACEMENT NOTE:
CONNECT VSS_REF THROUGH ALL GND PLANES PLACE XW AT VSS_REF PIN, ROUTE VSS_RTN
BACK FROM THE VREF / IREF PASSIVES
XW79D0
SHORT-14L-0.1MM-SM
49 30 29
VSS_ANA_SPMU
2 1
SPMU_VREF_IREF_RTN
C7985
0.1UF
10%
6.3V
CERM-X5R
0201
30 29
VSS_ANA_SPMU
U7700
TMLT47A1-JPE
WLCSP
SYM 3 OF 4
SPMU_IREF
1
R7903
200K
0.1%
1/20W
TF
0201
2
NOSTUFF
1
C7906
0.1UF
10%
6.3V
2
CERM-X5R
0201
1
C7905
1.5UF
20%
6.3V
2
CER-X5R
0201
49 30 29
SPMU_VREF
SPMU_VREF_ADC
VSS_ANA_SPMU
SPMU_TCAL
49
1
2
VSS_ANA_SPMU
30
103S00511
CRITICAL
R7940
3.92K
0201-2
1/20W
DFT_CTRL0=0 ==> DFT_CTRL1=SWDCLK
0.1%
MF
2
1
1
C7940
100PF
5%
25V
2
C0G
0201
IN
49
IN
49
IN
49
IN
49
IN
30
IN
30
IN
30
IN
3
IN
30
IN
30
OUT
30
IN
30
IN
30
IN
30
IN
30
OUT
30
IN
30 29 27
933
IN
SPMU_THMSNS
AMB_THMSNS
NAND0_THMSNS
NAND1_THMSNS
FINSTACK_THMSNS
SPMU_ADC_IN
SOC_VDDPCPU_VSENSE
SOC_VSSPCPU_VSENSE
SOC_VDDPGPU_VSENSE
SOC_VDDSOC_VSENSE
SPMU_AMUX_AY
SOC_VDDECPU_VSENSE
SPMU_AMUX_B<1>
WLANBT_3V3_ISENSE
SPMU_HS_ISENSE
SPMU_AMUX_BY
SPMU_RESET_IN
VSS_ANA_SPMU
SWD_NUB_SWCLK
SPMU_EXT32K_EN
D7
D6
C7
C6
A7
A6
A5
B8
B7
B6
E6
B10
A10
A9
A8
C8
D11
E11
B9
C10
B5
J4
H8
J8
F9
IREF
VREF
VREF_ADC
VSS_REF
TCAL
TDEV1
TDEV2
TDEV3
TDEV4
TDEV5
ADC_IN
AMUX_A<0>
AMUX_A<1>
AMUX_A<2>
AMUX_A<3>
AMUX_AY
AMUX_B<0>
AMUX_B<1>
AMUX_B<2>
AMUX_B<3>
AMUX_BY
DFT_CTRL_0
DFT_CTRL_1
EXT32K_EN
TDEV
AMUX
GPIO
SPMI_SCLK
SPMI_SDATA
SPMI
SGPIO_READY_REQ
SGPIO_SCLK
SGPIO_SDATA
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
UVWARN*RESET_IN
SCRASH*
NC_SPMU_GPIO1
K8
NC_SPMU_GPIO2
K7
SWD_NUB_PMU_SWDIO
J7
NC_SPMU_GPIO4
G7
NC_SPMU_GPIO5
F7
NC_SPMU_GPIO6
F6
NC_SPMU_GPIO7
H6
NC_SPMU_GPIO8
G6
NC_SPMU_GPIO9
J6
NC_SPMU_GPIO10
F5
NC_SPMU_GPIO11
H5
NC_SPMU_GPIO12
J5
NC_SPMU_GPIO13
G5
NC_SPMU_GPIO14
F4
NC_SPMU_GPIO15
F3
NC_SPMU_GPIO16
J9
SPMI_NUB_SPMU_CLK
H9
SPMI_NUB_SPMU_DATA
H3
SGPIO_SCLK
G3
SGPIO_SDATA
G8
VDD_MAIN_PRE_UVLO_L
G4
PMU_SCRASH_R_L
H4
PMU_SGPIO_READY_REQ
30
OUT
30
OUT
9 33
BI
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
30
OUT
18
IN
18
BI
33
IN
33
BI
29
R7904
5%1K1/20W
33
IN
PP1V8_AON_MPMU
102
<== FROM LDO9 POWER ALIAS
353433
NOSTUFF
1
R7900
10K
5%
1/20W
MF
201
2
21
201MF
<== IPU on Sera enabled.
PMU_SCRASH_L
33 9133 91
BI
BI
R7920
10K
1/20W
201 201
1%
MF
1
R7902
2
30
10K
1%
1/20W
MF
SPMU_EXT32K_IN
IN
FORCE_SYNC
1
2
GND30 28
GND30
GND30
GND30
GND30
VSS_ANA_SPMU30
K9
EXT32K_IN
G9
FORCE_SYNC
F1
VSS_BSTLQ
E13
VSS_BUCK4
E14
VSS_BUCK4
A13
VSS_BUCK10
A14
VSS_BUCK10
N4
VSS_BUCK12_6
P4
VSS_BUCK12_6
J13
VSS_BUCK13_5
J14
VSS_BUCK13_5
F8
VSS_DFT_2
998-22526
OMIT_TABLE
U7700
TMLT47A1-JPE
WLCSP
SYM 4 OF 4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A4
A12
C5
C11
D12
E4
E5
E12
F2
F13
G2
G11
H2
J12
K1
K4
K5
K10
L2
L6
L10
L11
M4
VSS_ANA_SPMU 3029
VSS_ANA_SPMU 2927
VSS_ANA_SPMU 3029
VSS_ANA_SPMU 2927
VSS_ANA_SPMU
VSS_ANA_SPMU 3029
VSS_ANA_SPMU
VSS_ANA_SPMU 3029
VSS_ANA_SPMU 2927
VSS_ANA_SPMU 3029
VSS_ANA_SPMU 302927
VSS_ANA_SPMU 3029
VSS_ANA_SPMU 302927
VSS_ANA_SPMU 302927
VSS_ANA_SPMU 302927
VSS_ANA_SPMU 302927
VSS_ANA_SPMU 302927
VSS_ANA_SPMU 302927
Pulls
PP1V25_S2
R7 01
5% MF1/20W
2927
2927
10K
21
VDD_MAIN_PRE_UVLO_L
201
<== FROM BUCK13 POWER ALIAS
10228
29
NC TECM TE E T M
PAGE TITLE
PMU: SLAVE GPIO & GND
BOM COST GROUP=PLATFORM POWER
www.repairlap.com
SLAVE PMU AMUX ALIAS
www.teknisi-indonesia.com
SLAVE PMU GPIOS SLAVE PMU PROBE POINTS
45
IN
45
IN
45 29
IN
45
IN
45
IN
46 29
IN
45 29
IN
SOC_VDDPCPU_VSENSE
MAKE_BASE=TRUE
NO_TEST=1
SOC_VSSPCPU_VSENSE
MAKE_BASE=TRUE
NO_TEST=1
SOC_VDDPGPU_VSENSE
MAKE_BASE=TRUE
NO_TEST=1
SOC VDDSOC_VSENSE
MAKE_BASE=TRUE
NO_TEST=1
SOC_VDDECPU_VSENSE
MAKE_BASE=TRUE
R8004
5% 1/20W
NO_TEST=1
21
1M
MF 201
WLANBT_3V3_ISENSE
MAKE_BASE=TRUE
NO_TEST=1
SPMU_HS_ISENSE
MAKE_BASE=TRUE
NO_TEST=1
SOC_VDDPCPU_VSENSE
SOC_VSSPCPU_VSENSE
SOC_VDDPGPU_VSENSE
SOC_VDDSOC_VSENSE
SOC_VDDECPU_VSENSE
SPMU_AMUX_B<1>
NO_TEST=1
WLANBT_3V3_ISENSE
SPMU_HS_ISENSE
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
29
29
29
29
VSS alias connection
GND
29
GND
29
GND
29
GND
29 28
GND
PP8001
NC_SPMU_GPIO1
29
NC_SPMU_GPIO2
9
29
NC_SPMU_GPIO4
29
NC_SPMU_GPIO5
29
NC_SPMU_GPIO6
29
NC_SPMU_GPIO7
29
NC_SPMU_GPIO8
29
NC_SPMU_GPIO9
29
NC_SPMU_GPIO10
29
NC_SPMU_GPIO11
29
NC_SPMU_GPIO12
29
NC_SPMU_GPIO13
29
NC_SPMU_GPIO14
29
NC_SPMU_GPIO15
29
NC_SPMU_GPIO16
29
NC_SPMU_GPIO1
MAKE_BASE=TRUE
NC_SPMU_GPIO2
MAKE_BASE=TRUE
NC_SPMU_GPIO4
MAKE_BASE=TRUE
NC_SPMU_GPIO5
MAKE_BASE=TRUE
NC_SPMU_GPIO6
MAKE_BASE=TRUE
NC_SPMU_GPIO7
MAKE_BASE=TRUE
NC_SPMU_GPIO8
MAKE_BASE=TRUE
NC_SPMU_GPIO9
MAKE_BASE=TRUE
NC_SPMU_GPIO10
MAKE_BASE=TRUE
NC_SPMU_GPIO11
MAKE_BASE=TRUE
NC_SPMU_GPIO12
MAKE_BASE=TRUE
NC_SPMU_GPIO13
MAKE_BASE=TRUE
NC_SPMU_GPIO14
MAKE_BASE=TRUE
NC_SPMU_GPIO15
MAKE_BASE=TRUE
NC_SPMU_GPIO16
MAKE_BASE=TRUE
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
P4MM
SM
1
PP8002
P4MM
SM
1
PP
PP8003
P4MM
SM
1
PP
2
IN
29
IN
SPMU_EXT32K_IN
NO_TEST=1
SPMU_ADC_IN
NO_TEST=1
SPMU_RESET_IN
SPMU_AMUX_AY
NO_TEST=1
SPMU_AMUX_BY
NO_TEST=1
R8001
5% 1/20W MF 201
R8002
R8003
21
21
21
100K
1M
MF5% 1/20W 201
100K
MF1/20W5%
PP8004
PP8005
201
P4MM
1
P4MM
1
SM
PP
SM
PP
OUTPP
OUT
OUT
29
29
29
27
IN
27
IN
27
IN
27
IN
IN
27
IN
27
IN
28
IN PP
BUCK4_LX0
NO_TEST=1
BUCK4_LX1
NO_TEST=1
BUCK5_LX0
NO_TEST=1
BUCK6_LX0
NO_TEST=1
BUCK10_LX0
NO_TEST=1
BUCK12_LX0
NO_TEST=1
BUCK13_LX0
NO_TEST=1
SPMU_BSTLQ_LX
NO_TEST=1
PP8040
P4MM
SM
1
PP
PP8041
P4MM
SM
1
PP
PP8050
P4MM
SM
1
PP
PP8060
P4MM
SM
1
PP
PP80A0
P4MM
SM
1
PP
PP80C0
P4MM
SM
1
PP
PP80D0
P4MM
SM
1
PP
PP80E0
P4MM
SM
1
2 27
29
29 27
49 29
VSS_ANA_SPMU
29
VSS_ANA_SPMU
29
VSS_ANA_SPMU
VSS_ANA_SPMU
VSS_ANA_SPMU
VSS_ANA_SPMU
29
VSS_ANA_SPMU
VSS_ANA_SPMU
29
VSS_SPMU_AMUX
4546
XW8000
SHORT-12L-0.25MM-SM
21
VSS_ANA_SPMU
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.1000
MIN_LINE_WIDTH=0.2000
VOLTAGE=0
# & WIDTH XW IS LAYOUT DEPENDENT
2
XW8001
1
SHORT-12L-0.25MM-SM
2
XW8002
1
SH RT-12L-0.25MM-SM
CM TE E T M
PAGE TITLE
PMU: SLAVE SUPPORT
BOM_COST_GROUP=PLATFORM POWER
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