Apple IPHONE XS Schematics
D
www.schematic-x.blogspot.com
8
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
7
6 5 4 3
D33 MLB Bottom Ice : EVT
LAST_MODIFICATION=Fri Mar 16 10:21:05 2018
2 1
CK
ECNREV DESCRIPTION OF REVISION
APPD
DATE
2018-03-1600116697994 ENGINEERING RELEASED
D
DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE
TABLE OF CONTENTS
2
3
4 6
5
6
7
8
9
10
11
12
13
14
11
2 SYSTEM:BOM Tables
4
7
34
56
66
77
80
81
82
83
84
TABLE OF CONTENTS
SYSTEM: Mechanical Components
BOOTSTRAPPING
SYSTEM: Testpoints (Bottom)
SYSTEM POWER: Iktara
CG: Power Supplies - Touch & Display
Interposer: B2B Symbol
B2B: Interposer Loft
RADIOS
Interposer: Pins 1-144
Interposer: Pins 145-285
Hall
Interposer: Top Aliases
07/29/2016
06/06/2017
08/08/2017
11/01/2017
11/01/2017
11/01/2017
11/01/2017
06/07/2017
03/31/2017
11/02/2017
11/02/2017
11/02/2017
11/01/2017
46
47
1
75
NFC: TABLE OF CONTENTS
NFC
C
15
16
17
18
19
20
21
22
23
24
25
26
27
28
85
1
2
3
4
5
6
7
8
9
10
11
12
13
Interposer: Pins 286-359
RADIO: TABLE OF CONTENTS
BOM TABLES
ANTENNA DIAGRAM
ANTENNA: B2BS
ANTENNA: N-PLEX SHARED
BBPMU: CONTROL
BBPMU: RAILS
BB: INTERFACE
BB: DDR PWR & JTAG
BB: DIGITAL PWR
XCVR: TX & GNSS
XCVR: INTERFACE & PWR
XCVR: PRX DRX
11/02/2017
C
B
29
30
31
32
33
34
35
36
37
38
39
40
41
42
14
17
18
19
20
21
22
23
24
25
26
27
HW CONFIG OPTIONS
ET15
LB SPAD16
HB SPAD
UHB LMB SPAD
LB DIVERSITY RECEIVE LNA
B
HB DIVERSITY RECEIVE LNA
MIMO RECEIVE LNAS
COUPLER + LOWER ANTENNA
UPPER ANTENNA FEEDS
SIM: ESIM
SIM: PSIM
TEST POINTS
SYMBOL: WIFI
A
43
44
45
1
2
3
WIFI: TABLE OF CONTENTS
DIETCOKE
FEM MODULES
MCO:056-04080
SS ROW:639-04880
SS JP:639-04881
SS NA:639-05085
SSV ROW:639-05086
SSV JP:639-05496
SSV NA:639-05497
DS ROW:639-05640
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
051-02695 SCH1 ?SCH,MLB_BOT_ICE,D33 CRITICAL
820-01063 1 PCB CRITICAL ?PCB,MLB_BOT_ICE,D33
Sub Designs
TABLE OF CONTENTS
REVISION
SYNC_DATE=07/29/2016
SIZEDRAWING NUMBER
051-02695
SOURCE PROJECT SUB-DESIGN NAME VERSION
0.46.17 SHIER_RADIO_ICED33 2018_03_12_16:55:29
HARD/
SOFT
S 2018_03_12_10:49:29D32 HIER_NFC 0.43.2
SYNC_DATE/TIME
TABLE_HIERARCHY_CONFIG_HEAD
TABLE_HIERARCHY_CONFIG_ITEM
TABLE_HIERARCHY_CONFIG_ITEM
DRAWING TITLE
SCH,MLB,BOT,ICE,D33
Apple Inc.
4.0.0
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
BRANCH
PAGE
1 OF 85
SHEET
1 OF 47
A
D
8
3
124567
D
EEEE Codes
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
EEEE (MLB_BOT_ICE,SS,ROW,639-04880)
825-7691 1 CRITICAL
825-7691 CRITICAL1
825-7691 1 CRITICAL
825-7691 CRITICAL1
825-7691 CRITICAL1
825-7691 CRITICAL1
EEEE (MLB_BOT_ICE,SS,JP,639-04881)
EEEE (MLB_BOT_ICE,SS,NA,639-05085)
EEEE (MLB_BOT_ICE,SSV,ROW,639-05086)
EEEE (MLB_BOT_ICE,SSV,JP,639-05496)
EEEE (MLB_BOT_ICE,SSV,NA,639-05497)
EEEE (MLB_BOT_ICE,DS,ROW,639-05640)
EEEE_J90K SSJP
EEEE_JG58 SSNA
EEEE_JG59 SSVROW
EEEE_JM18 SSVJP
EEEE_JM19 SSVNA
EEEE_JN5M DSROW
CRITICAL1825-7691 EEEE_J90J SSROW
Global Capacitors
TABLE_ALT_HEAD
PART NUMBER
138S00149138S00148 ALLBOM_TABLE_ALTS
138S00149 ALL138S00150
138S00151 138S00149
PART NUMBER
BOM_TABLE_ALTS
BOM_TABLE_ALTS ALL
138S00143 138S00144 ALLBOM_TABLE_ALTS
138S00163 138S00144
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TABLE_ALT_ITEM
0402-3T,10.5uF@1V, Kyocera
TABLE_ALT_ITEM
0402-3T,10.5uF@1V, SEMCO
TABLE_ALT_ITEM
0402-3T,10.5uF@1V, TY
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TABLE_ALT_ITEM
0402,16uF@1V, Kyocera
TABLE_ALT_ITEM
ALLBOM_TABLE_ALTS
0402,16uF@1V, Taiyo
CRITICAL PART# COMMENT
138S00149
CRITICAL PART# COMMENT
138S00144
678
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
3 245
1
D
TABLE_5_ITEM
TABLE_ALT_HEAD
TABLE_ALT_ITEM
CRITICAL
CRITICAL371S00133
CRITICAL4
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
COMMON
TABLE_5_ITEM
DIODES_DS
TABLE_5_ITEM
ONSEMI_DS
0402-3T,10.5uF@1V
0402,16uF@1V
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
685-00243
371S00189
PART NUMBER
685-00182
SUBBOM,MLB,BOT,DIODES,DIODES,X891
1 SUBBOM_DS685-00242
4
DIODES,SHOTTKY DIODE,30V,2A,0603
ONSEMI,SHOTTKY DIODE,30V,2A,0603
BOM_TABLE_ALTS
SUBBOM_DS
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
SUBBOM,MLB,BOT,DIODES,ONSEMI,X891
D3400,D3401,D3402,D3403
D3400,D3401,D3402,D3403
C
PART NUMBER
138S00138 138S00139 ALLBOM_TABLE_ALTS
138S00164 ALLBOM_TABLE_ALTS138S00139
PART NUMBER
138S00221 BOM_TABLE_ALTS138S00146
PART NUMBER
BOM_TABLE_ALTS138S00140 ALL138S00141
BOM_TABLE_ALTS138S00142
BOM_TABLE_ALTS
ALL
ALL138S00141
ALL138S00166 138S00141
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
0201,3uF@1V, Kyocera
0201,3uF@1V, Taiyo
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
0402,5.1uF@3V, Kyocera
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
0201,1.1uF@3V, Kyocera
0201,1.1uF@3V, SEMCO
0201,1.1uF@3V, Taiyo
Global Ferrites
PART NUMBER
152S00558 BOM_TABLE_ALTS152S00557 ALL
155S00194
ALL155S0610 BOM_TABLE_ALTS
155S00200 BOM_TABLE_ALTS ALL155S0610
155S0661
BOM_TABLE_ALTS ALL155S00338
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
IND,MLD,0.47UH,20%,2.5A,80MO,1608
FERR BD,150 OHM,25%,200MA,0.7 DCR,01005
FERR BD,150 OHM,25%,200MA,0.7 DCR,01005
FERR BD,33 OHM,25%,1.5A,55MOHM DCR,0201
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
CRITICAL PART# COMMENT
138S00139
CRITICAL PART# COMMENT
138S00146
CRITICAL PART# COMMENT
138S00141
CRITICAL PART# COMMENT
152S00557
155S0610
155S0661
0201,3uF@1V
0402,5.1uF@3V
0201,1.1uF@3V
IND,MLD,0.47UH,20%,2.5A,80MO,1608
FERR BD,150 OHM,25%,200MA,0.7 DCR,01005
FERR BD,33 OHM,25%,1.5A,55MOHM DCR,0201
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
Hall Effect Alts
TABLE_ALT_HEAD
PART NUMBER
353S3697353S01327
ALLBOM_TABLE_ALTS
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TABLE_ALT_ITEM
ROHM HES
IKTARA
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
RES, High Current 0 Ohm
132S00186 1
132S00187 3 UNBALNACED CAPSCRITICAL
CAP, 0.033uF, 10%, 100V, X6S
CAP, 0.047uF. 10%, 100V, X6S
C3461,C3462,C3463,C3464,C3465,C3466
C3451
C3452,C3453,C3456
CRITICAL116S00002 6
CRITICAL UNBALNACED CAPS
C
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
UNBALNACED CAPS
TABLE_5_ITEM
TABLE_5_ITEM
B
A
Global R/C Alternates
TABLE_ALT_HEAD
PART NUMBER
138S0652 ALL138S0648 BOM_TABLE_ALTS
138S0986 ALL
BOM_TABLE_ALTS138S00024
ALLBOM_TABLE_ALTS138S0739138S0706
138S0945 138S0739 BOM_TABLE_ALTS ALL
138S0739 ALL138S0706
138S0831 ALL138S00049
138S00133 ALL
138S00116
138S00128
138S00071 ALL
138S00071
138S00048
131S00172
138S00003
131S00164
131S00173
131S00185
131S0316 ALL
138S00048 138S00003
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
BOM_TABLE_ALTS
ALL138S00117
ALL
ALL
ALL131S00164
ALL
ALL132S00185 132S0316
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO
CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK
CAP,CER,1UF,20%,10V,X5R,0201,MURATA
CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA
CAP,CER,X5R,0.22UF,20%,6.3V,20%
CAP,CER,X5R,2.2UF,20%,6.3V,0201
CAP,X5R,0.47UF,20%,6.3V,MUR,01005
CAP,X5R,4UF,20%,6.3V,0201,T=0.55MM
CAP,X5R,4UF,20%,6.3V,0201,T=0.55MM
CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402
CAP,CER,C0G,220PF,5%,16V,01005
CAP,CER,C0G,220PF,5%,16V,01005
CAP,CER,X5R,0.1uF,20%,6.3V,01005
CAP,CER,X5R,15uF,20%,6.3V,0402
CAP,CER,X5R,15uF,20%,6.3V,0402
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
CRITICAL PART# COMMENT
138S0652
138S0986
138S0739
138S0706
132S0400
138S0831
138S00128
138S00071
138S00003
131S00164
CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO
CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK
CAP,CER,1UF,20%,10V,X5R,0201,MURATA
CAP,CER,X5R,0.22UF,20%,6.3V,20%
CAP,CER,X5R,0.22UF,20%,6.3V,01005
CAP,CER,X5R,2.2UF,20%,6.3V,0201
CAP,X5R,0.47UF,20%,6.3V,KYO,01005
CAP,X5R,4UF,20%,6.3V,0201,T=0.55MM
CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402
CAP,CER,C0G,220PF,5%,16V,01005
Global Inductors
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
IND,1.2UH,3A,2016,0.65Z
IND,1.2UH,3A,2016,0.8Z
TABLE_ALT_ITEM
TABLE_ALT_ITEM
CRITICAL PART# COMMENT
152S00651
152S00652
IND,1.2UH,3A,2016,0.65Z
IND,1.2UH,3A,2016,0.8Z
152S00653
PART NUMBER
ALLBOM_TABLE_ALTS152S00651
BOM_TABLE_ALTS152S00654 152S00652 ALL
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
Multi-Vendor Criticals
CRITICAL PART# COMMENT
138S0979
138S0683
132S0663
132S0288
132S0275
132S0245
138S0692
CAP,CER,X5R,10UF,20%,10V,0402,H=0.65MM
CAP,CER,X5R,1UF,10%,25V,0402
CAP,CER,X5R,1UF,10%,25V,0402
CAP,CER,X5R,0.1UF,10%,16V,0201
CAP,CER,X5R,470PF,10%,10V,01005
CAP,CER,X5R,0.01UF,10%,6.3V,01005
CAP,CER,X5R,1UF,20%,6.3V,0201
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
CRITICAL PART# COMMENT
132S00008
131S0804
131S0307
131S00053
117S0055
107S0257
131S00170
131S0643
131S0316
CAP,CER,0.1UF,10%,50V,X7R,0402
CAP,CER,27PF,5%,C0G,25V,0201
CAP,CER,NP0/C0G,100PF,5%,16V,01005
CAP,CER,C0G,220PF,5%,10V,01005
RES,MF,1/20W,2M OHM,5,0201,SMD
THERMISTOR,NTC,10K OHM,1%,B=3435,01005
CAP,CER,C0G,220PF,5%,25V,01005
CAP,CER,NP0/C0G,56PF,5%,25V,01005
CAP,CER,X5R,0.1UF,20%,6.3V,01005
TABLE_CRITICAL_HEAD
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
TABLE_CRITICAL_ITEM
PAGE TITLE
SYSTEM:BOM Tables
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-02695
REVISION
4.0.0
BRANCH
PAGE
2 OF 85
SHEET
2 OF 47
B
A
SIZE
D
8
67
35 4
2
1
678
3 245
1
D
ST0403
STIFFENER-UAT-D32
SM
1
FIDUCIALS
Crosses
FIDUCIALS
D
FD0401
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0402
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0403
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
FD0404
FID
0P5SQ-CROSS-NSP
1
ROOM=ASSEMBLY
C
NFC_ANT
10
ZT401
HOL-3.0OD2.45ID-2.2NP
1
FD0405
0P5SQ-CROSS-NSP
FID
1
ROOM=ASSEMBLY
FD0410
0P5SQ-SMP3SQ-NSP
FID
1
ROOM=ASSEMBLY
FD0411
0P5SQ-SMP3SQ-NSP
FID
1
ROOM=ASSEMBLY
FD0412
0P5SQ-SMP3SQ-NSP
FID
1
ROOM=ASSEMBLY
C
B
B
SB0403
STDOFF-2.6OD1.087H-TH-0.311-1.6
1
ST0402
STIFFENER-UNIBODY-D33
SM
1
SB0402
STDOFF-2.6OD1.087H-TH-0.311-1.6
1
A
8
A
D
PAGE TITLE
SYSTEM: Mechanical Components
Apple Inc.
DRAWING NUMBER
051-02695
REVISION
SYNC_DATE=06/06/2017
SIZE
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
PAGE
4 OF 85
SHEET
3 OF 47
1
678
3 245
1
D
D
BOOTSTRAPPING:BOARD ID[3]
C
C
SELECTED-->
B
11
BOARD_ID2
OUT
CKPLUS_WAIVE=SINGLE_NODENET
B
A
8
SYNC_MASTER=
SYNC_DATE=08/08/2017
PAGE TITLE
A
BOOTSTRAPPING
SIZE
D
Apple Inc.
DRAWING NUMBER
051-02695
REVISION
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
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3 245
1
D
14 10 7 6 5
PP_BATT_VCC
14
PP_VDD_MAIN
TP0700
1
TP-P55
ROOM=TEST
TP0701
1
TP-P55
ROOM=TEST
TP0702
ROOM=TEST
TP0703
ROOM=TEST
TP0515
ROOM=TEST
TP0522
ROOM=TEST
1
TP-P55
1
TP-P55
1
TP-P55
1
TP-P55
A
A
A
A
A
A
Test Points
VDD_MAIN
VBATT
Probe Points
Iktara Debug
15 6
6
6
6
15 6
PMU_TO_IKTARA_EN_EXT_1V8
IN
IKTARA_ANA1
IN
IKTARA_GPIO3
IN
IKTARA_GPIO4
IN
IKTARA_TO_SMC_INT
IN
PP0700
P2MM-NSM
SM
1
PP0701
P2MM-NSM
PP0702
P2MM-NSM
PP0703
P2MM-NSM
PP0704
P2MM-NSM
1
1
1
PP
1
SM
PP
SM
PP
SM
PP
SM
PP
ROOM=TEST
ROOM=TEST
ROOM=TEST
D
ROOM=TEST
ROOM=TEST
C
TP0705
1
TP-P55
ROOM=TEST
TP0706
1
TP-P55
ROOM=TEST
PMU_AMUX_AY
11
PMU_AMUX_BY
11
HYDRA_TO_AP_FORCE_DFU
11
A
TP0707
1
TP-P55
ROOM=TEST
TP0708
1
TP-P55
ROOM=TEST
A
A
TP0709
1
TP-P55
ROOM=TEST
TP0710
1
TP-P55
ROOM=TEST
AA
A
AMUX
TP0713
1
TP-P55
ROOM=TEST
TP0715
1
TP-P55
ROOM=TEST
A
A
DFU
TP0714
1
TP-P55
ROOM=TEST
A
ANALOG MUX A OUTPUT
ANALOG MUX B OUTPUT
FORCE DFU
12 10 9
12 9
11 9
11 9
12 9
15 9
TOUCH_TO_MANY_FORCE_PWM
PMU_TO_TOUCH_CLK32K
AP_TO_TOUCH_SCAN_CLK
AP_TO_RACER_RESET_L
UART_RACER_TO_AOP_RXD
RACER_TO_AOP_INT_L
TP0757
1
TP-P55
ROOM=TEST
TP0758
1
TP-P55
ROOM=TEST
TP0759
1
TP-P55
ROOM=TEST
TP0761
1
TP-P55
ROOM=TEST
TP0762
1
TP-P55
ROOM=TEST
TP0763
1
TP-P55
ROOM=TEST
A
A
A
A
A
A
REL BIAS
PMU_TO_SYSTEM_COLD_RESET_L
11
REL_BIAS_VBUS_EN
12
AP_TO_CAMPMU_RESET_L
11
TP0772
1
TP-P55
ROOM=TEST
TP0773
1
TP-P55
ROOM=TEST
TP0774
1
TP-P55
ROOM=TEST
A
A
A
10 7 6 5
VDD_MAIN TRADEOFF CAPS
PP_VDD_MAIN
14
C
B
PP_GPU_LVCC
12
PP_CPU_PCORE_LVCC
12
IKTARA_COIL1
14 6
LVCC
TP0720
1
TP-P55
ROOM=TEST
TP0721
1
TP-P55
ROOM=TEST
A
A
COIL
TP0730
1
TP-P55
ROOM=TEST
A
UART_AOP_TO_RACER_TXD
12 9
14 6
PP_VBUS2_IKTARA
TP0764
1
TP-P55
ROOM=TEST
TP0765
A
1
TP-P55
ROOM=TEST
A
1
C0701
15UF
20%
6.3V
2
X5R
0402-0.1MM-1
1
C0702
15UF
20%
6.3V
2
X5R
0402-0.1MM-1
B
A
IKTARA_COIL2
14 6
PP_VDD_MAIN_OV_R
11
TP0731
1
TP-P55
ROOM=TEST
A
OV COMP
TP0741
1
TP-P55
ROOM=TEST
A
PAGE TITLE
SYSTEM: Testpoints (Bottom)
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-02695
REVISION
4.0.0
BRANCH
PAGE
7 OF 85
SHEET
5 OF 47
SYNC_DATE=11/01/2017
SIZE
D
A
8
67
35 4
2
1
Iktara
678
3 245
1
D
C3445
220PF
5%
25V
COG
01005
ROOM=IKTARA
PP_IKTARA_VRECT
20%
25V
X5R
20%
25V
X5R
1
2
1
2
1
2
C3411
2.2UF
0402-4
ROOM=IKTARA
C3440
2.2UF
0402-4
ROOM=IKTARA
C3412
2.2UF
0402-4
ROOM=IKTARA
C3441
2.2UF
0402-4
ROOM=IKTARA
20%
25V
X5R
20%
25V
X5R
D
6
6
1
2
I2C0_SMC_SDA
I2C0_SMC_SCL
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I2C0_SMC_SDA
I2C0_SMC_SCL
R3401
0.02
1
1/6W
2
D7
D6
D5
D4
D3
D2
D1
0402
2
XW3401
SHORT-10L-0.05MM-SM
SHORT-10L-0.05MM-SM
1
PP_IKTARA_VRECT_SENSE
NO_XNET_CONNECTION=1
E1
NO_XNET_CONNECTION=1
21
1%
MF
ROOM=IKTARA
XW3400
ROOM=IKTARA
ROOM=IKTARA
PP_IKTARA_VMID_SENSE
1
C3413
2.2UF
2
1
L1
K1
J1
E4
H1
F1
20%
25V
2
X5R
0402-4
PP_IKTARA_VMID
1
C3442
2.2UF
20%
25V
2
X5R
ROOM=IKTARA
0402-4
ROOM=IKTARA
1
C3443
220PF
5%
25V
2
COG
01005
ROOM=IKTARA
15
15
C
B
To Coil
IKTARA_COIL1
14 5
1
R3450
100K
1%
1/20W
MF
201
2
To Coil
IKTARA_COIL2
14 5
1
R3460
100K
1%
1/20W
MF
201
2
1
C3451
10%
50V
2
X7S
0402
ROOM=IKTARA
1
C3461
100NF
10%
50V
2
X7S
0402
1
C3452
68NF100NF
10%
50V
2
X7S
0402
ROOM=IKTARA
1
C3462
68NF
10%
50V
2
X7S
0402
ROOM=IKTARAROOM=IKTARA
1
C3453
68NF
10%
50V
2
X7S
0402
ROOM=IKTARA
1
C3463
68NF
10%
50V
2
X7S
0402
ROOM=IKTARA
1
C3454
68NF
10%
50V
2
X7S
0402
ROOM=IKTARA
1
C3464
68NF
10%
50V
2
X7S
0402
1
C3455
47NF
10%
50V
2
X7S
0402
ROOM=IKTARA
1
C3465
47NF
10%
50V
2
X7S
0402
ROOM=IKTARAROOM=IKTARA
14 10 7 6 5
NOSTUFF
1
C3456
0.047UF
10%
100V
2
X6S
0402
ROOM=IKTARA
NOSTUFF
1
C3466
0.047UF
10%
100V
2
X6S
0402
ROOM=IKTARA
PP_VDD_MAIN
OMIT_TABLE
K
D3400
DSN2
NSR20F30NX
ROOM=IKTARA
A
20%
50V
X7R
0201
1
2
C3402
330PF
ROOM=IKTARA
R3422
0.00
0%
1/32W
MF
01005
ROOM=IKTARA
1
2
1
2
1
2
21
OMIT_TABLE
K
D3401
DSN2
NSR20F30NX
ROOM=IKTARA
A
C3406
0.033UF
10%
50V
X7R
0402
ROOM=IKTARA
C3403
2200PF
10%
50V
X5R
0201
ROOM=IKTARA
C3407
0.033UF
10%
50V
X7R
0402
ROOM=IKTARA
5
IKTARA_ANA1
OUT
PP_VDD_MAIN_IKTARA
C3404
0.1UF
21
10%
16V
X5R-CERM
0201
ROOM=IKTARA
C3405
0.1UF
21
10%
16V
X5R-CERM
0201
ROOM=IKTARA
OMIT_TABLE
K
D3402
DSN2
NSR20F30NX
ROOM=IKTARA
A
OMIT_TABLE
K
D3403
DSN2
NSR20F30NX
ROOM=IKTARA
A
IKTARA_COMM1
IKTARA_BOOT1
IKTARA_AC1
IKTARA_AC2
IKTARA_BOOT2
IKTARA_COMM2
NC
NC
NC
B5
CLAMP1
C5
COMM1
C7
BOOT1_VDD
B6
AC1
B7
AC1
C6
AC1
B1
AC2
B2
AC2
C2
AC2
C1
BOOT2_VDD
C3
COMM2
B3
CLAMP2
E2
ANA1
F2
ANA2
G3
ANA3
G2
ANA4
G6
REFBP
G5
DIGTEST
VRECT_VDD
VRECT_VDD
VRECT_VDD
VRECT_VDD
A3
A2
A1
VRECT_S
VRECT_VDD
VRECT_VDD
VRECT_VDD
CRITICAL
BC59355A2
A7
A6
A5
A4
U3400
WLCSP
ROOM=IKTARA
PGNDRGND
J3
B4
K3
L3
VMID_S
VMID_VDD
VMID_VDD
VMID_R_VDD
HV_GPO2
BOOTB_VDD
VMID_AUX_SW_VDD
VMID_AUX_VDD
VDIG_CORE_VDD
VAUX_1P8_VDD
GPIO3/SWDIO
GPIO4/SWCLK
EN_EXT_1P8
VSYS_ANA_VDD
VSYS_1P8_VDD
OTP_WREN
AVSS
L7
F5
H3
C4
G4
VMID_VDD
VMID_VDD
HV_GPO1
SW
SW
SW
VOUT
VDD5V
VDDO
SDA
SCL
INT
RESET*
GPIO1
GPIO2
GPIO5
GPIO6
GPIO7
F4
H4
H5
H2
J2
K2
L2
G1
E6
E5
E3
F7
H7
G7
L4
L5
K4
J4
H6
L6
J6
K5
J5
K7
K6
E7
F3
F6
J7
NC
NC
NC
NC
NC
NC
IKTARA_VOUT_SNS
1
C3419
1.0UF
20%
6.3V
2
X5R
0201-1
ROOM=IKTARA
1
R3408
1.00K
5%
1/32W
MF
01005
2
ROOM=IKTARA
1
C3418
1.0UF
20%
6.3V
2
X5R
0201-1
OMIT
XW3402
SHORT-20L-0.05MM-SM
21
ROOM=IKTARA
NO_XNET_CONNECTION=1
1
C3417
4UF
20%
6.3V
2
CERM-X5R
0201
ROOM=IKTARA
1
R3410
1.00K
5%
1/32W
MF
01005
2
ROOM=IKTARA
ROOM=IKTARA
PP5V0_VMID_AUX_IKTARA
PP5V0_VDD_IKTARA
PP1V5_VDIG_CORE_IKTARA
1
C3416
2.2UF
20%
6.3V
2
X5R-CERM
0201
ROOM=IKTARA
PP1V8_IKTARA
I2C0_SMC_SDA
I2C0_SMC_SCL
IKTARA_TO_SMC_INT
6
6
6
OUT
PMU_TO_IKTARA_RESET_R_L
IKTARA_GPIO3
IKTARA_GPIO4
OUT
OUT
IKTARA_DEVICE_ID1
IKTARA_DEVICE_ID2
PMU_TO_IKTARA_EN_EXT_1P8V_R
PP_VDD_MAIN
PP1V8_S2
1
C3415
2.2UF
20%
25V
2
X5R
0402-4
ROOM=IKTARA
15 5
5
5
14 10 7 6 5
14 13 10
PP_VBUS2_IKTARA
1
C3444
220PF
5%
25V
2
COG
01005
ROOM=IKTARA
14 10 7 6 5
R3420
100
1/32W
01005
ROOM=IKTARA
21
5%
MF
R3421
100
1/32W
01005
ROOM=IKTARA
21
5%
MF
14 5
Pull-Ups
PP_VDD_MAIN
R3406
2M
5%
1/20W
MF
ROOM=IKTARA
PP1V8_IKTARA
6
ROOM=IKTARA
PMU_TO_IKTARA_RESET_L
PMU_TO_IKTARA_EN_EXT_1V8
201
R3407
10K
5%
1/32W
MF
01005
C
1
2
1
2
B
12
IN
15 5
IN
A
8
SYNC_DATE=11/01/2017
PAGE TITLE
A
SYSTEM POWER: Iktara
DRAWING NUMBER
051-02695
Apple Inc.
REVISION
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
PAGE
34 OF 85
SHEET
6 OF 47
1
SIZE
D
678
3 245
1
Acorn PMU
D
D
C
B
U5600
LM3373A2YKA
PP1V1_RACER_S2
14 9
1
C5692
0.1UF
20%
6.3V
2
X5R-CERM
01005
ROOM=ACORN
1
C5650
220PF
5%
25V
2
COG
01005
ROOM=ACORN
1
C5652
220PF
5%
25V
2
COG
01005
ROOM=ACORN
1
C5654
220PF
5%
25V
2
COG
01005
ROOM=ACORN
1
C5651
4UF
20%
6.3V
2
CERM-X5R
0201
ROOM=ACORN
1
C5653
10UF
20%
10V
2
X5R
0402
ROOM=ACORN
1
C5655
10UF
20%
10V
2
X5R
0402
ROOM=ACORN
PP_CP1_OUT_ACORN
PP5V45_BOOST2_ACORN
PP_BOOST1_ACORN
L5600
1.5UH-20%-1.6A-0.18OHM
2 1
PIWA2012FE-SM
ROOM=ACORN
ACORN_LX
14 10 6 5
1
C5691
4UF
20%
6.3V
2
CERM-X5R
0201
ROOM=ACORN
PP_VDD_MAIN
1
C5690
4.7UF
20%
6.3V
2
CER
0402
ROOM=ACORN
A1
VJ
A2
VK
A4
VL
VG
F4
VB
B4 H1
IN
G4
SW
DSBGA
ROOM=ACORN
LOAD SWITCH
LDO1
CP1
LDO2
CP2
CP3
AGND
F1
CP23_GND
CP1_GND
E1
D1
HWEN
AMUX
SIDO_GND
H3
VC
VA
C1+
C1-
C2+
C2-
VH
VN
C3+
C3-
VP
C4+
C4-
C5+
C5-
EN1
EN2
SCL
SDA
B1
C1
B2
B3
A3
C3
H2H4
D4
C2
C4
E4
D2
D3
E2
E3
F2
F3
G2
G3
G1
ACORN_CP1_CAP1_POS
ACORN_CP1_CAP1_NEG
ACORN_CP1_CAP2_POS
ACORN_CP1_CAP2_NEG
ACORN_CP2_CAP_POS
ACORN_CP2_CAP_NEG
ACORN_CP3_CAP1_POS
ACORN_CP3_CAP1_NEG
ACORN_CP3_CAP2_POS
ACORN_CP3_CAP2_NEG
ACORN_HWEN
RACER_TO_ACORN_ORB_SCAN
TOUCH_TO_ACORN_PP5V25_EN
I2C3_AP_SCL
I2C3_AP_SDA
ACORN_GECKO_ANSEL_TO_PMU_ADC
7
7
7
7
7
7
7
7
7
SHORT-10L-0.05MM-SM
OUT
7
XW5601
21
ROOM=ACORN
OMIT
9
IN
9
IN
IN
12 9
BI
12 9
15
1
C5640
4.7UF
20%
16V
2
X5R
0402
ROOM=ACORN
PP1V8_TOUCH_RACER_S2
1
2
C5641
10UF
20%
10V
X5R
0402
ROOM=ACORN
1
C5642
4UF
20%
6.3V
2
CERM-X5R
0201
ROOM=ACORN
1
C5645
4UF
20%
6.3V
2
CERM-X5R
0201
ROOM=ACORN
PP1V1_RACER
PP3V5_RACER
PP5V25_TOUCH_VDDH
PN6V7_RACER
PP10V0_RACER
14 9
Charge Pump 1 Caps
1
C5611
0.22UF
9
9
9
ACORN_CP1_CAP1_POS
7
ACORN_CP1_CAP1_NEG
7
ACORN_CP1_CAP2_POS
7
ACORN_CP1_CAP2_NEG
7
20%
6.3V
2
X5R
01005-1
ROOM=ACORN
1
C5612
0.22UF
20%
6.3V
2
X5R
01005-1
ROOM=ACORN
C
Charge Pump 2 Caps
1
C5621
1UF
9
ACORN_CP2_CAP_POS
7
ACORN_CP2_CAP_NEG
7
20%
16V
2
CER-X5R
0201
ROOM=ACORN
Charge Pump 3 Caps
1
C5631
0.22UF
20%
ACORN_CP3_CAP1_POS
7
ACORN_CP3_CAP1_NEG
7
ACORN_CP3_CAP2_POS
7
ACORN_CP3_CAP2_NEG
7
6.3V
2
X5R
01005-1
ROOM=ACORN
1
C5632
0.22UF
20%
6.3V
2
X5R
01005-1
ROOM=ACORN
B
A
8
A
SYNC_DATE=11/01/2017
PAGE TITLE
CG: Power Supplies - Touch & Display
SIZE
D
Apple Inc.
DRAWING NUMBER
051-02695
REVISION
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
PAGE
56 OF 85
SHEET
7 OF 47
1
678
Top Board Interposer APN:998-12513
Bot Board Interposer APN:998-12514 <--- Stuffed
3 245
1
D
C
B
A
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
PMU_TO_SYSTEM_COLD_RESET_L
11
GND
11
AP_TO_CAMPMU_RESET_L
11
GND
11
BB_TO_MANY_GSM_BURST_IND
11
GND
11
HALL_CASE_TO_AOP_NORTH_L
11
GND
11
AP_TO_TOUCH_SCAN_CLK
11
GND
11
I2S_BB_TO_AP_BCLK
11
GND
11
I2S_BB_TO_AP_DIN
11
GND
11
I2S_AP_TO_BB_DOUT
11
GND
11
I2S_BB_TO_AP_LRCLK
11
GND
11
PP1V8_ALWAYS
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
NFC_TO_ARC_RESET_L
11
GND
11
NFC_TO_ARC_TRIG
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
GND
11
AP_TO_BB_RESET_L
11
GND
11
SWD_AOP_BI_BB_SWDIO
11
GND
11
UART_GNSS_TO_AP_CTS_L
11
GND
11
UART_AP_TO_GNSS_RTS_L
11
GND
11
PCIE_AP_TO_WLAN_PERST_L
11
GND
11
AP_TO_RACER_RESET_L
11
GND
11
AP_TO_WLAN_TIME_SYNC
11
GND
11
GNSS_TO_AP_LOW_PWR_IND
11
GND
11
HYDRA_TO_AP_FORCE_DFU
11
GND
11
PP1V8_S2
11
PP1V8_S2
11
GND
11
GND
11
GND
11
GND
11
GND
11
PP_VDD_MAIN_OV_R
11
AP_TO_BB_COEX
11
BB_TO_AP_COEX
11
GND
11
AP_TO_NFC_DEV_WAKE
11
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
J_INT_TOP
SYM 1 OF 2
1
IO1
2
IO2
3
IO3
4
IO4
5
IO5
6
IO6
7
IO7
8
IO8
9
IO9
IO10
IO11
IO12
IO13
IO14
IO15
IO16
IO17
IO18
IO19
IO20
IO21
IO22
IO23
IO24
IO25
IO26
IO27
IO28
IO29
IO30
IO31
IO32
IO33
IO34
IO35
IO36
IO37
IO38
IO39
IO40
IO41
IO42
IO43
IO44
IO45
IO46
IO47
IO48
IO49
IO50
IO51
IO52
IO53
IO54
IO55
IO56
IO57
IO58
IO59
IO60
IO61
IO62
IO63
IO64
IO65
IO66
IO67
IO68
IO69
IO70
IO71
IO72
IO73
IO74
IO75
IO76
IO77
IO78
IO79
IO80
IO81
IO82
IO83
IO84
IO85
IO86
IO87
IO88
IO89
IO90
IO91
IO92
IO93
IO94
SMT-PAD
95
IO95
96
IO96
97
IO97
98
IO98
99
IO99
IO100
IO101
IO102
IO103
IO104
IO105
IO106
INTERPOSER-MLB-TOP-V3-D32
IO107
IO108
IO109
IO110
IO111
IO112
IO113
IO114
IO115
IO116
IO117
IO118
IO119
IO120
IO121
IO122
IO123
IO124
IO125
IO126
IO127
IO128
IO129
IO130
IO131
IO132
IO133
IO134
IO135
IO136
IO137
IO138
IO139
IO140
IO141
IO142
IO143
IO144
IO145
IO146
IO147
IO148
IO149
IO150
IO151
IO152
IO153
IO154
IO155
IO156
IO157
IO158
IO159
IO160
IO161
IO162
IO163
IO164
IO165
IO166
IO167
IO168
IO169
IO170
IO171
IO172
IO173
IO174
IO175
IO176
IO177
IO178
IO179
IO180
IO181
IO182
IO183
IO184
IO185
IO186
IO187
IO188
100
101
102
103
104
105
106
107
108
109
110
AP_TO_BB_PEAK_POWER_INDICATOR
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
BB_TO_AP_PEAK_POWER_INDICATOR
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
BB_TO_PMU_PCIE_HOST_WAKE_L
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
AP_TO_NFC_FW_DWLD_REQ
PMU_TO_NFC_VDD_MAIN_EN
UART_AOP_TO_BB_TXD
UART_AP_TO_GNSS_TXD
AP_TO_BB_COREDUMP_TRIG
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
BB_TO_AP_RESET_DETECT_L
AP_TO_GNSS_TIME_MARK
PCIE_BB_BI_AP_CLKREQ_L
AP_TO_BBPMU_RADIO_ON_L
90_PCIE_BB_TO_AP_RXD_N
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_AP_TO_BB_TXD_N
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
UART_BB_TO_AOP_RXD
UART_GNSS_TO_AP_RXD
PCIE_AP_TO_BB_PERST_L
UART_NFC_TO_AP_CTS_L
UART_AP_TO_NFC_RTS_L
PMU_TO_BBPMU_RESET_L
PMU_TO_TOUCH_CLK32K
PCIE_WLAN_BI_AP_CLKREQ_L
WLAN_TO_PMU_HOST_WAKE
PMU_TO_WLAN_CLK32K
NFC_TO_AOP_HOST_WAKE
TOUCH_TO_MANY_FORCE_PWM
UART_AP_TO_BT_TXD
UART_AP_TO_BT_RTS_L
GND
GND
GND
GND
BOARD_ID2
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
GND
GND
GND
GND
GND
GND
GND
PMU_AMUX_BY
PMU_AMUX_AY
GND
GND
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PP_VDD_MAIN
PP_VDD_MAIN
GND
PP_VDD_MAIN
PP_VDD_MAIN
GND
PMU_TO_NFC_EN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
PP1V8_NFC_S2
12
PMU_TO_GNSS_EN
12
PMU_TO_BT_REG_ON
12
GND
12
90_PCIE_AP_TO_WLAN_REFCLK_N
12
90_PCIE_AP_TO_WLAN_REFCLK_P
12
GND
12
90_PCIE_AP_TO_WLAN_TXD_P
12
90_PCIE_AP_TO_WLAN_TXD_N
12
GND
12
90_PCIE_WLAN_TO_AP_RXD_N
12
90_PCIE_WLAN_TO_AP_RXD_P
12
GND
12
PP3V0_S2
12
PP1V8_TOUCH_RACER_S2
12
PP1V8_TOUCH_RACER_S2
12
PMU_TO_WLAN_REG_ON
12
RADIO_PA_NTC
12
BT_TO_AP_TIME_SYNC
12
UART_BT_TO_AP_RXD
12
GND
12
GND
12
UART_BT_TO_AP_CTS_L
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
REL_BIAS_VBUS_EN
12
GND
12
PP_GPU_LVCC
12
GND
12
PP_CPU_PCORE_LVCC
12
GND
12
PP_BATT_VCC
12
PP_BATT_VCC
12
GND
12
AP_TO_BT_DEVICE_WAKE
12
AOP_TO_WLAN_CONTEXT_A
12
UART_AOP_TO_RACER_TXD
12
SWD_AOP_TO_MANY_SWCLK
12
SPI_AP_TO_RACER_MOSI
12
SPI_AP_TO_RACER_SCLK
12
PP1V1_RACER_S2
12
PP1V1_RACER_S2
12
PP1V1_RACER_S2
12
AP_TO_RACER_REF_CLK
12
GND
12
AOP_TO_BBPMU_COEX
12
PP_VBUS2_IKTARA
12
PP_VBUS2_IKTARA
12
PP_VBUS2_IKTARA
12
PP_VBUS2_IKTARA
12
GND
12
AOP_TO_WLAN_CONTEXT_B
12
GND
12
UART_RACER_TO_AOP_RXD
12
GND
12
SPI_RACER_TO_AP_MISO
12
GND
12
SPI_AP_TO_RACER_CS_L
12
GND
12
PMU_TO_IKTARA_RESET_L
12
GND
12
SWD_AOP_BI_RACER_SWDIO
12
GND
12
I2C3_AP_SDA
12
GND
12
I2C3_AP_SCL
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
GND
12
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
J_INT_TOP
SMT-PAD
SYM 2 OF 2
IO189
IO190
IO191
IO192
IO193
IO194
IO195
IO196
IO197
IO198
IO199
IO200
IO201
IO202
IO203
IO204
IO205
IO206
IO207
IO208
IO209
IO210
IO211
IO212
IO213
IO214
IO215
IO216
IO217
IO218
IO219
IO220
IO221
IO222
IO223
IO224
IO225
IO226
IO227
IO228
IO229
IO230
IO231
IO232
IO233
IO234
IO235
IO236
IO237
IO238
IO239
IO240
IO241
IO242
IO243
IO244
IO245
IO246
IO247
IO248
IO249
IO250
IO251
IO252
IO253
IO254
IO255
IO256
IO257
IO258
IO259
IO260
IO261
IO262
IO263
IO264
IO265
IO266
IO267
IO268
IO269
IO270
IO271
IO272
IO273
IO274
IO275
IO276
IO277
IO278
IO279
IO280
IO281
INTERPOSER-MLB-TOP-V3-D32
IO282
IO283
IO284
IO285
IO286
IO287
IO288
IO289
IO290
IO291
IO292
IO293
IO294
IO295
IO296
IO297
IO298
IO299
IO300
IO301
IO302
IO303
IO304
IO305
IO306
IO307
IO308
IO309
IO310
IO311
IO312
IO313
IO314
IO315
IO316
IO317
IO318
IO319
IO320
IO321
IO322
IO323
IO324
IO325
IO326
IO327
IO328
IO329
IO330
IO331
IO332
IO333
IO334
IO335
IO336
IO337
IO338
IO339
IO340
IO341
IO342
IO343
IO344
IO345
IO346
IO347
IO348
IO349
IO350
IO351
IO352
IO353
IO354
IO355
IO356
IO357
IO358
282
283
284
285
286
287
ACORN_GECKO_ANSEL_TO_PMU_ADC
288
289
RACER_TO_AOP_INT_L
290
291
HALL_CASE_TO_AOP_SOUTH_L
292
293
PMU_TO_IKTARA_EN_EXT_1V8
294
295
IKTARA_TO_SMC_INT
296
297
298
I2C0_SMC_SCL
I2C0_SMC_SDA
299
300
301
302
303
304
305
306
307
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL1
IKTARA_COIL1
IKTARA_COIL1
IKTARA_COIL1
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
12
12
12
12
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
Apple Inc.
?
DRAWING NUMBER
051-02695
REVISION
4.0.0
BRANCH
PAGE
66 OF 85
SHEET
8 OF 47
SYNC_DATE=11/01/2017
SIZE
D
D
C
B
A
8
67
35 4
2
1
D
C
B
A
678
LOFT INTERPOSER
SELECTED -->
50_PRX_LB_PAD_LB2_SDR_IN_XCVR
10
50_PRX_MB2_PAD_MB_B_SDR_IN_XCVR
10
50_PRX_MB1_PAD_MB_A_SDR_IN_XCVR
10
50_PRX_HB2_PAD_LHB_SDR_IN_XCVR
10
50_PRX_HB1_PAD_HB_SDR_IN_XCVR
10
LOFT_CANARY_1
10
SHIELD_RFFE_RX_SDATA
10
SHIELD_RFFE_RX_SCLK
10
PP_1V8_VIO
10
SHIELD_RFFE_TX_SDATA
10
SHIELD_RFFE_TX_SCLK
10
PP_ET_PA
10 9
PP_ET_PA
10 9
PP_ET_PA
10 9
PP_ET_PA
10 9
PP_ET_PA
10 9
PP_1V8_VBIAS_LNA
10
50_TX_LB_PA_IN
10
998-10998 ON MLB_LOFT_INT
998-10900 ON MLB_BOT
INTERPOSER-RF-MLB-TOP-D33
1
IO1
2
IO2
3
IO3
4
IO4
5
IO5
6
IO6
7
IO7
8
IO8
9
IO9
10
IO10
11
IO11
12
IO12
13
IO13
14
IO14
15
IO15
16
IO16
17
IO17
18
IO18
19
IO19
20
IO20
21
IO21
22
IO22
23
IO23
24
IO24
25
IO25
26
IO26
27
IO27
28
IO28
29
IO29
30
IO30
31
IO31
32
IO32
33
IO33
34
IO34
35
IO35
36
IO36
37
IO37
38
IO38
39
IO39
40
IO40
41
IO41
42
IO42
43
IO43
44
IO44
45
IO45
46
IO46
47
IO47
48
IO48
49
IO49
50
IO50
51
IO51
52
IO52
53
IO53
54
IO54
55
IO55
56
IO56
57
IO57
58
IO58
59
IO59
60
IO60
61
IO61
62
IO62
63
IO63
64
IO64
65
IO65
66
IO66
67
IO67
68
IO68
69
IO69
70
IO70
71
IO71
72
IO72
73
IO73
74
IO74
BOT INTERPOSER
J_LFT_TOP
SMT-PAD
SYM 1 OF 2
IO75
IO76
IO77
IO78
IO79
IO80
IO81
IO82
IO83
IO84
IO85
IO86
IO87
IO88
IO89
IO90
IO91
IO92
IO93
IO94
IO95
IO96
IO97
IO98
IO99
IO100
IO101
IO102
IO103
IO104
IO105
IO106
IO107
IO108
IO109
IO110
IO111
IO112
IO113
IO114
IO115
IO116
IO117
IO118
IO119
IO120
IO121
IO122
IO123
IO124
IO125
IO126
IO127
IO128
IO129
IO130
IO131
IO132
IO133
IO134
IO135
IO136
IO137
IO138
IO139
IO140
IO141
IO142
IO143
IO144
IO145
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
10
PP_1V2_VDD_LNA
PP1V8_TOUCH_RACER_S2
PP1V8_TOUCH_RACER_S2
PP10V0_RACER
PN6V7_RACER
PP3V5_RACER
LOFT_CANARY_2
AP_TO_RACER_REF_CLK
7
7
7
10
12
AP_TO_RACER_RESET_L
RACER_TO_ACORN_ORB_SCAN
7
AP_TO_TOUCH_SCAN_CLK
UART_RACER_TO_AOP_RXD
UART_AOP_TO_RACER_TXD
SWD_AOP_TO_MANY_SWCLK
SWD_AOP_BI_RACER_SWDIO
SPI_AP_TO_RACER_MOSI
12
RACER_TO_AOP_INT_L
SPI_AP_TO_RACER_SCLK
SPI_RACER_TO_AP_MISO
TOUCH_TO_ACORN_PP5V25_EN
SPI_AP_TO_RACER_CS_L
12
12
7
12
TOUCH_TO_MANY_FORCE_PWM
I2C3_AP_SDA
CKPLUS_WAIVE=I2C_PULLUP
PP5V25_TOUCH_VDDH
7
I2C3_AP_SCL
PMU_TO_TOUCH_CLK32K
CKPLUS_WAIVE=I2C_PULLUP
PP1V1_RACER
PP1V1_RACER
50_LBPAD_2G_OUT_CPL2_IN_JPN
50_HBPAD_2G_OUT_CPL2_IN_JPN
50_PAD_ANT_HB_CPL2_IN
50_PAD_ANT_LB_CPL2_IN
50_TDD_PAD_ANT_HB_CPL2_IN
PP_VBATT_PA
50_TX_2G_HB_IN
50_TX_MB1_IN
50_TX_HB_PA_IN
10
10
10
10
10
10
10
10
10
3 245
1
J_LFT_TOP
INTERPOSER-RF-MLB-TOP-D33
SMT-PAD
146
IO146
147
IO147
148
IO148
149
IO149
150
IO150
151
IO151
152
IO152
153
IO153
154
IO154
155
IO155
156
IO156
157
IO157
158
IO158
159
160
161
162
163
164
165
166
167
168
IO159
IO160
IO161
IO162
IO163
IO164
IO165
IO166
IO167
IO168
14 9 7
14 9 7
SYM 2 OF 2
D
C
11 5
11 5
12 5
12 5
12 10
12 9
15 5
12 10 5
12 7
B
12 7
12 5
9 7
9 7
1
R7701
100K
5%
1/32W
MF
01005
2
SWD_AOP_BI_RACER_SWDIO
Moved here from Loft
12 9
SYNC_DATE=06/07/2017
PAGE TITLE
A
B2B: Interposer Loft
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-02695
REVISION
4.0.0
BRANCH
PAGE
77 OF 85
SHEET
9 OF 47
8
67
35 4
2
1
47 22 14 10 7 6 5
19 14 13 6
19 12
PP_VDD_MAIN
PP1V8_S2
PP3V0_S2
POWER
PP_VDD_MAIN
PP1V8_APPMU_S2_TO_RADIO
PP3V0_APPMU_S2_TO_RADIO
678
I120
3 245
1
D
C
23 11
23 11
23 11
23 11
23 11
23 11
23 11
23 11
23 12
23 11
23 11
23 11
23 11
23 11
23 11
41 12
41 11
23 11
23 11
23 11
41 12
22 12 9 5
23 11
23 11
24 11
23 11
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_BB_TO_AP_RXD_N
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
PCIE_BB_BI_AP_CLKREQ_L
PCIE_AP_TO_BB_PERST_L
BB_TO_PMU_PCIE_HOST_WAKE_L
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DIN
I2S_BB_TO_AP_LRCLK
I2S_BB_TO_AP_BCLK
UART_AOP_TO_BB_TXD
UART_BB_TO_AOP_RXD
PMU_TO_BBPMU_RESET_L
AP_TO_BBPMU_RADIO_ON_L
AP_TO_BB_RESET_L
AP_TO_BB_COREDUMP_TRIG
BB_TO_AP_RESET_DETECT_L
AOP_TO_BBPMU_COEX
TOUCH_TO_MANY_FORCE_PWM
AP_TO_BB_COEX
BB_TO_AP_COEX
BB_TO_MANY_GSM_BURST_IND
AP_TO_BB_PEAK_POWER_INDICATOR
NC
NC
NC
CELLULAR
PCIE
90_PCIE_AP_TO_BB_TX_N
90_PCIE_BB_TO_AP_TX_P
90_PCIE_BB_TO_AP_TX_N
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
PCIE_AP_BI_BB_CLKREQ_L
PCIE_AP_TO_BB_PERST_L
PCIE_BB_TO_APPMU_WAKE_L
BB USB
90_USB_BB_P
90_USB_BB_N
PP_1V8_BB_USB_VBUS
BB I2S
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DOUT
I2S_BB_TO_AP_LRCLK_WS
I2S_BB_TO_AP_SCLK
AOP BB UART
UART_AOP_TO_BB_TXD
UART_BB_TO_AOP_TXD
POWER KEEPING
APPMU_TO_BBPMU_ON
AP_TO_BBPMU_SDWN_L
AP_TO_BB_RESET_L
AP_TO_BB_COREDUMP_TRIG
BB_TO_AP_RESET_DETECT_L
COEXISTENCE
AP_TO_BBPMU_FORCE_PWM
TOUCH_TO_MANY_SCAN_STATE
AP_TO_BB_COEX_GPIO1
BB_TO_AP_COEX_GPIO1
PEAK POWER MGMT
BB_TO_AP_GSM_TXBURST
AP_TO_BB_PEAK_PWR_IND
hier_radio_ice
CELL + WLAN
WLAN
PCIE
90_PCIE_AP_TO_WLAN_TX_P90_PCIE_AP_TO_BB_TX_P
90_PCIE_AP_TO_WLAN_TX_N
90_PCIE_WLAN_TO_AP_TX_P
90_PCIE_WLAN_TO_AP_TX_N
90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
PCIE_AP_BI_WLAN_CLKREQ_L
PCIE_AP_TO_WLAN_PERST_L
PCIE_BTWLAN_TO_APPMU_WAKE
DOTARA COEX
BTWLAN UART
UART_AP_TO_BTWLAN_TXD
UART_BTWLAN_TO_AP_TXD
UART_AP_TO_BTWLAN_RTS_L
UART_BTWLAN_TO_AP_RTS_L
CONTEXT
AOP_TO_WLAN_CONTEXT_B
AOP_TO_WLAN_CONTEXT_A
CONTROL
APPMU_TO_WLAN_REG_ON
APPMU_TO_BT_REG_ON
CLK_APPMU_TO_WLAN_32K
AP_TO_BTWLAN_DEV_WAKE
AP_TO_WLAN_TIME_SYNC
BT_TO_AP_TIME_SYNC
GNSS
CONTROL
APPMU_TO_GNSS_EN
GNSS_TO_AP_LOW_PWR_IND
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
PCIE_WLAN_BI_AP_CLKREQ_L
PCIE_AP_TO_WLAN_PERST_L
WLAN_TO_PMU_HOST_WAKE
UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L
AOP_TO_WLAN_CONTEXT_B
AOP_TO_WLAN_CONTEXT_A
PMU_TO_WLAN_REG_ON
PMU_TO_BT_REG_ON
PMU_TO_WLAN_CLK32K
AP_TO_BT_DEVICE_WAKE
AP_TO_WLAN_TIME_SYNC
BT_TO_AP_TIME_SYNC
PMU_TO_GNSS_EN
GNSS_TO_AP_LOW_PWR_IND
42 11
42 12
26 11
D
42 12
42 12
42 12
42 12
42 12
42 12
42 12
42 11
42 12
11
PP1V8_ALWAYS
R8000
10K
42 12
42 12
42 12
47 11
42 12
42 12
42 12
42 12
42 12
42 12
42 12
26 12
PMU_TO_NFC_VDD_MAIN_EN
1/20W
201
47 22 14 10 7 6 5
1
5%
MF
2
PP_VDD_MAIN
PP1V8_NFC_S2
47 12
PMU_TO_NFC_EN
47 12
AP_TO_NFC_FW_DWLD_REQ
47 11
AP_TO_NFC_DEV_WAKE
47 11
NFC_TO_AOP_HOST_WAKE
47 12
UART_AP_TO_NFC_TXD
47 11
UART_NFC_TO_AP_RXD
47 11
UART_AP_TO_NFC_RTS_L
47 11
UART_NFC_TO_AP_CTS_L
47 11
47 11
47 11
47 3
NFC_TO_ARC_RESET_L
NFC_TO_ARC_TRIG
NFC_ANT
NC
POWER
PP_VDD_MAIN
PP1V8_SDRAM
HIER_NFC
CONTROL
PMU_TO_NFC_EN
AP_TO_NFC_FW_DWLD
AP_TO_NFC_DEV_WAKE
NFC_TO_PMU_HOST_WAKE
NFC UART
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L
MISC
AP_TO_NFC_BUTTON
PMU_TO_NFC_VDD_MAIN_EN
NFC_TO_ARC_RESET_L
NFC_TO_ARC_TRIG
NFC_ANT
I124
C
B
24 11
29 12 9
28 9
26 9
37 9
37 9
SWD_AOP_BI_BB_SWDIO
SWD_AOP_TO_MANY_SWCLK
50_PRX_LB_PAD_LB2_SDR_IN_XCVR
50_TX_LB_PA_IN
50_LBPAD_2G_OUT_CPL2_IN_JPN
50_PAD_ANT_LB_CPL2_IN
SWD
SWD_JTAG_BB_TMS_SWDIO
SWD_JTAG_TCK_SWDCLK
DOTARA
LB PAD
LB XCVR PRX
50_LBPAD_PRX_LB_TO_XCVR
LB XCVR TX
50_XCVR_TO_LBPAD_TX_LB1
LB CPLR
50_LBPAD_TO_CPL2_2GLB_JPN
50_TRX_LBPAD_TO_CPL2_LB
LOFT
AP_TO_GNSS_TIME_MARK
GNSS UART
UART_AP_TO_GNSS_TXD
UART_GNSS_TO_AP_TXD
UART_AP_TO_GNSS_RTS_L
UART_GNSS_TO_AP_RTS_L
POWER
VDD_LOFT_1V2
VDD_LOFT_1V8
VDD_LOFT_3V0
VDD_LOFT_ET
AP_TO_GNSS_TIME_MARK
UART_AP_TO_GNSS_TXD
UART_GNSS_TO_AP_RXD
UART_AP_TO_GNSS_RTS_L
UART_GNSS_TO_AP_CTS_L
PP_1V2_VDD_LNA
PP_1V8_VBIAS_LNA
PP_VBATT_PA
PP_ET_PA
26 11
26 11
26 11
27 11
26 11
B
RADIO PA NTC
1
I71
5%
16V
1
2
C3043
100PF
NP0-C0G
01005
ROOM=PMU
22 9
22 9
22 9
30 9
R3043
10KOHM-1%
01005
ROOM=PMU
2
RADIO_PA_NTC
PA_NTC_RETURN
SHORT-20L-0.05MM-SM
OMIT
XW3043
21
ROOM=PMU
PATH=I72
A
28 9
28 9
28 9
28 9
26 9
26 9
26 9
37 9
37 9
37 9
50_PRX_MB1_PAD_MB_A_SDR_IN_XCVR
50_PRX_MB2_PAD_MB_B_SDR_IN_XCVR
50_PRX_HB1_PAD_HB_SDR_IN_XCVR
50_PRX_HB2_PAD_LHB_SDR_IN_XCVR
50_TX_HB_PA_IN
50_TX_MB1_IN
50_TX_2G_HB_IN
50_HBPAD_2G_OUT_CPL2_IN_JPN
50_PAD_ANT_HB_CPL2_IN
50_TDD_PAD_ANT_HB_CPL2_IN
HB PAD
HB XCVR PRX
50_HB_PRX_MB1_TO_XCVR
50_HB_PRX_MB2_TO_XCVR
50_HB_PRX_HB1_TO_XCVR
50_HB_PRX_HB2_TO_XCVR
HB XCVR TX
50_XCVR_TO_HBPAD_TX_HB
50_XCVR_TO_HBPAD_TX_MB1
50_XCVR_TO_HBPAD_TX_2G_HB
HB CPLR
50_HBPAD_TO_CPL2_2GHB_JPN
50_TRX_HBPAD_TO_CPL2
50_TRX_HBPAD_TDD_TO_CPL2_HPUE
RFFE
RFFE_RX_CLK
RFFE_RX_DATA
RFFE_TX_CLK
RFFE_TX_DATA
RFFE_VIO_1V8
CANARY
LOFT_CANARY1
LOFT_CANARY2
SHIELD_RFFE_RX_SCLK
SHIELD_RFFE_RX_SDATA
SHIELD_RFFE_TX_SCLK
SHIELD_RFFE_TX_SDATA
PP_1V8_VIO
LOFT_CANARY_1
LOFT_CANARY_2
27 9
27 9
27 9
27 9
27 9
PAGE TITLE
RADIOS
DRAWING NUMBER
SYNC_DATE=03/31/2017
SIZE
051-02695
Apple Inc.
23 9
23 9
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
REVISION
4.0.0
BRANCH
PAGE
80 OF 85
SHEET
10 OF 47
A
D
8
67
35 4
2
1
678
Interposer Aliases: Pins 1-144
3 245
1
D
C
B
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
PMU_TO_SYSTEM_COLD_RESET_L
8
GND
8
AP_TO_CAMPMU_RESET_L
8
GND
8
BB_TO_MANY_GSM_BURST_IND
8
GND
8
HALL_CASE_TO_AOP_NORTH_L
8
GND
8
AP_TO_TOUCH_SCAN_CLK
8
GND
8
I2S_BB_TO_AP_BCLK
8
GND
8
I2S_BB_TO_AP_DIN
8
GND
8
I2S_AP_TO_BB_DOUT
8
GND
8
I2S_BB_TO_AP_LRCLK
8
GND
8
PP1V8_ALWAYS
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
NFC_TO_ARC_RESET_L
8
GND
8
NFC_TO_ARC_TRIG
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
GND
8
AP_TO_BB_RESET_L
8
GND
8
SWD_AOP_BI_BB_SWDIO
8
GND
8
UART_GNSS_TO_AP_CTS_L
8
GND
8
UART_AP_TO_GNSS_RTS_L
8
GND
8
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
14
GND
14
GND
14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
PMU_TO_SYSTEM_COLD_RESET_L
AP_TO_CAMPMU_RESET_L
BB_TO_MANY_GSM_BURST_IND
HALL_CASE_TO_AOP_NORTH_L
AP_TO_TOUCH_SCAN_CLK
I2S_BB_TO_AP_BCLK
I2S_BB_TO_AP_DIN
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_LRCLK
NFC_TO_ARC_RESET_L
NFC_TO_ARC_TRIG
AP_TO_BB_RESET_L
SWD_AOP_BI_BB_SWDIO
UART_GNSS_TO_AP_CTS_L
UART_AP_TO_GNSS_RTS_L
PP1V8_ALWAYS
5
5
10
13
10
10
10
10
10
10
10
10
10
10
10
D
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE
PCIE_AP_TO_WLAN_PERST_L
8
8
8
8
8
8
8
8
8
8
8
8
8
9 5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
AP_TO_BB_PEAK_POWER_INDICATOR
8
8
8
8
8
8
8
8
8
8
8
8
8
8
90_PCIE_AP_TO_BB_REFCLK_P
8
90_PCIE_AP_TO_BB_REFCLK_N
8
8
8
8
8
8
8
8
8
8
8
BB_TO_AP_PEAK_POWER_INDICATOR
8
8
8
8
8
8
8
8
8
AP_TO_RACER_RESET_L
AP_TO_WLAN_TIME_SYNC
GNSS_TO_AP_LOW_PWR_IND
HYDRA_TO_AP_FORCE_DFU
PP_VDD_MAIN_OV_R
AP_TO_BB_COEX
BB_TO_AP_COEX
AP_TO_NFC_DEV_WAKE
AP_TO_NFC_FW_DWLD_REQ
PMU_TO_NFC_VDD_MAIN_EN
UART_AOP_TO_BB_TXD
UART_AP_TO_GNSS_TXD
AP_TO_BB_COREDUMP_TRIG
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
BB_TO_AP_RESET_DETECT_L
BOARD_ID2
AP_TO_GNSS_TIME_MARK
PCIE_BB_BI_AP_CLKREQ_L
AP_TO_BBPMU_RADIO_ON_L
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
90_PCIE_BB_TO_AP_RXD_N
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_AP_TO_BB_TXD_N
90_PCIE_AP_TO_BB_TXD_P
UART_BB_TO_AOP_RXD
UART_GNSS_TO_AP_RXD
PCIE_AP_TO_BB_PERST_L
PMU_AMUX_BY
PMU_AMUX_AY
UART_NFC_TO_AP_CTS_L
UART_AP_TO_NFC_RTS_L
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
GND
GND
GND
GND
GND
PP1V8_S2
PP1V8_S2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
14
GND
14
GND
14
GND
11 12 14
GND
14
GND
14
GND
14
GND
14
GND
14
AP_TO_BB_PEAK_POWER_INDICATOR
GND
11 12 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
GND
11 14
BB_TO_AP_PEAK_POWER_INDICATOR
GND
11 14
GND
11 12 14
GND
11 12 14
GND
11 12 14
GND
11 12 14
PCIE_AP_TO_WLAN_PERST_L
10
AP_TO_RACER_RESET_L
AP_TO_WLAN_TIME_SYNC
GNSS_TO_AP_LOW_PWR_IND
HYDRA_TO_AP_FORCE_DFU
PP1V8_S2
PP1V8_S2
PP_VDD_MAIN_OV_R
AP_TO_BB_COEX
BB_TO_AP_COEX
AP_TO_NFC_DEV_WAKE
AP_TO_NFC_FW_DWLD_REQ
PMU_TO_NFC_VDD_MAIN_EN
UART_AOP_TO_BB_TXD
UART_AP_TO_GNSS_TXD
AP_TO_BB_COREDUMP_TRIG
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
BB_TO_AP_RESET_DETECT_L
BOARD_ID2
AP_TO_GNSS_TIME_MARK
PCIE_BB_BI_AP_CLKREQ_L
AP_TO_BBPMU_RADIO_ON_L
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
90_PCIE_BB_TO_AP_RXD_N
90_PCIE_BB_TO_AP_RXD_P
90_PCIE_AP_TO_BB_TXD_N
90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N
UART_BB_TO_AOP_RXD
UART_GNSS_TO_AP_RXD
PCIE_AP_TO_BB_PERST_L
PMU_AMUX_BY
PMU_AMUX_AY
UART_NFC_TO_AP_CTS_L
UART_AP_TO_NFC_RTS_L
PP_VDD_MAIN
PP_VDD_MAIN
SIG_NAME=PP_VDD_MAIN
10
10
5
14
14
5
10
10
10
10
10
10
10
10
10
10
10
4
10
10
10
10
14
14
14
10
10
10
10
10
10
10
10
10
5
5
10
10
14
14
14
9 5
C
B
A
8
SYNC_DATE=11/02/2017
PAGE TITLE
A
Interposer: Pins 1-144
SIZE
D
Apple Inc.
DRAWING NUMBER
051-02695
REVISION
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
PAGE
81 OF 85
SHEET
11 OF 47
1
678
Interposer Aliases: Pins 145-285
3 245
1
D
C
B
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PMU_TO_BBPMU_RESET_L
8
8
8
8
8
8
8
BB_TO_PMU_PCIE_HOST_WAKE_L
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
90_PCIE_AP_TO_WLAN_REFCLK_N
8
90_PCIE_AP_TO_WLAN_REFCLK_P
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PMU_TO_TOUCH_CLK32K
PCIE_WLAN_BI_AP_CLKREQ_L
WLAN_TO_PMU_HOST_WAKE
PMU_TO_WLAN_CLK32K
NFC_TO_AOP_HOST_WAKE
TOUCH_TO_MANY_FORCE_PWM
UART_AP_TO_BT_TXD
UART_AP_TO_BT_RTS_L
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_WLAN_TO_AP_RXD_P
PP1V8_TOUCH_RACER_S2
PP1V8_TOUCH_RACER_S2
PMU_TO_WLAN_REG_ON
BT_TO_AP_TIME_SYNC
UART_BT_TO_AP_RXD
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
PMU_TO_NFC_EN
PP1V8_NFC_S2
PMU_TO_GNSS_EN
PMU_TO_BT_REG_ON
RADIO_PA_NTC
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PP3V0_S2
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
11 12 14
11 12 14
11 14 15
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
PMU_TO_BBPMU_RESET_L
11 12 14
PMU_TO_TOUCH_CLK32K
11 12 14
PCIE_WLAN_BI_AP_CLKREQ_L
11 12 14
11 12 14
BB_TO_PMU_PCIE_HOST_WAKE_L
11 12 14
11 12 14
WLAN_TO_PMU_HOST_WAKE
11 12 14
PMU_TO_WLAN_CLK32K
11 12 14
NFC_TO_AOP_HOST_WAKE
11 12 14
TOUCH_TO_MANY_FORCE_PWM
11 12 14
UART_AP_TO_BT_TXD
11 12 14
UART_AP_TO_BT_RTS_L
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
11 12 14
14
14
14
14
14
12 14
PMU_TO_BT_REG_ON
12 14
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_REFCLK_P
12 14
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N
12 14
90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_WLAN_TO_AP_RXD_P
12 14
PP1V8_TOUCH_RACER_S2
PP1V8_TOUCH_RACER_S2
PMU_TO_WLAN_REG_ON
BT_TO_AP_TIME_SYNC
UART_BT_TO_AP_RXD
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
PP_VDD_MAIN
PMU_TO_NFC_EN
PP1V8_NFC_S2
PMU_TO_GNSS_EN
PP3V0_S2
RADIO_PA_NTC
14
14
14
14
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
14
14
10
10
10
10
D
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
9 5
10 9 5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
UART_BT_TO_AP_CTS_L
REL_BIAS_VBUS_EN
PP_GPU_LVCC
PP_CPU_PCORE_LVCC
PP_BATT_VCC
PP_BATT_VCC
AP_TO_BT_DEVICE_WAKE
AOP_TO_WLAN_CONTEXT_A
UART_AOP_TO_RACER_TXD
SWD_AOP_TO_MANY_SWCLK
SPI_AP_TO_RACER_MOSI
SPI_AP_TO_RACER_SCLK
PP1V1_RACER_S2
PP1V1_RACER_S2
PP1V1_RACER_S2
AP_TO_RACER_REF_CLK
AOP_TO_BBPMU_COEX
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
AOP_TO_WLAN_CONTEXT_B
UART_RACER_TO_AOP_RXD
SPI_RACER_TO_AP_MISO
SPI_AP_TO_RACER_CS_L
PMU_TO_IKTARA_RESET_L
SWD_AOP_BI_RACER_SWDIO
I2C3_AP_SDA
I2C3_AP_SCL
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
14
14
12 14
12 14
12 14
14
14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
12 14
UART_BT_TO_AP_CTS_L
REL_BIAS_VBUS_EN
PP_GPU_LVCC
PP_CPU_PCORE_LVCC
PP_BATT_VCC
PP_BATT_VCC
AP_TO_BT_DEVICE_WAKE
AOP_TO_WLAN_CONTEXT_A
10
5
5
5
14
14
10
10
UART_AOP_TO_RACER_TXD
SWD_AOP_TO_MANY_SWCLK
SPI_AP_TO_RACER_MOSI
SPI_AP_TO_RACER_SCLK
PP1V1_RACER_S2
PP1V1_RACER_S2
PP1V1_RACER_S2
AP_TO_RACER_REF_CLK
AOP_TO_BBPMU_COEX
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
AOP_TO_WLAN_CONTEXT_B
9
9
14
14
14
9
10
14
14
14
14
10
UART_RACER_TO_AOP_RXD
SPI_RACER_TO_AP_MISO
SPI_AP_TO_RACER_CS_L
PMU_TO_IKTARA_RESET_L
SWD_AOP_BI_RACER_SWDIO
I2C3_AP_SDA
I2C3_AP_SCL
9
9
6
9
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
C
9 5
10 9
9 5
B
9 7
9 7
A
8
SYNC_DATE=11/02/2017
PAGE TITLE
A
Interposer: Pins 145-285
SIZE
D
Apple Inc.
DRAWING NUMBER
051-02695
REVISION
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
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3 245
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D
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C
14 10 6
PP1V8_S2
1
C8301
0.1UF
20%
6.3V
2
X5R-CERM
01005
VDD
U8301
AK8789
DFN
OUT1
OUT2
C
4
3
HALL_CASE_TO_AOP_SOUTH_L
HALL_CASE_TO_AOP_NORTH_L
15
11
B
VSS
215
THRM
PAD
B
A
8
SYNC_DATE=11/02/2017
PAGE TITLE
A
Hall
DRAWING NUMBER
051-02695
Apple Inc.
REVISION
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
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2
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Interposer Top Level Aliases
3 245
1
D
PP_VDD_MAIN
11
PP_VDD_MAIN
11
PP_VDD_MAIN
11
PP_VDD_MAIN
11
PP_VDD_MAIN
12
PP_VDD_MAIN
12
PP_VDD_MAIN
12
PP_VDD_MAIN
12
PP_VDD_MAIN
11
PP_VDD_MAIN
PP_VDD_MAIN
11
PP_BATT_VCC
12
PP_BATT_VCC
12
PP1V1_RACER_S2
12
PP1V1_RACER_S2
12
PP1V1_RACER_S2
12
Power Aliases
PP_VDD_MAIN
MAKE_BASE=TRUE
PP_BATT_VCC
MAKE_BASE=TRUE
PP1V1_RACER_S2
MAKE_BASE=TRUE
10 7 6 5
5
7
IKTARA_COIL1
15
IKTARA_COIL1
15
IKTARA_COIL1
15
IKTARA_COIL1
15
IKTARA_COIL2
15
IKTARA_COIL2
15
IKTARA_COIL2
15
IKTARA_COIL2
15
12
12
12
12
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
PP_VBUS2_IKTARA
IKTARA_COIL1
IKTARA_COIL2
PP_VBUS2_IKTARA
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
D
6 5
6 5
6 5
C
11
11
PP1V8_S2
PP1V8_S2
PP1V8_TOUCH_RACER_S2
PP1V8_S2
MAKE_BASE=TRUE
13 10 6
12
PP1V8_TOUCH_RACER_S2
12
Ground Aliases
GND
11
11
11
12
15
GND
GND
GND
GND
MAKE_BASE=TRUE
PP1V8_TOUCH_RACER_S2
MAKE_BASE=TRUE
9 7
C
B
A
11 12
11
11 12 15
12
12
11
11
11
11
11
11
11
11
11
11
11
12
12
12
12
12
12
12
15
15
11
15
15
15
15
15
15
15
12
15
12
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
MAKE_BASE=TRUE
MAKE_BASE=TRUE
PAGE TITLE
Interposer: Top Aliases
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-02695
REVISION
4.0.0
BRANCH
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SHEET
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SYNC_DATE=11/01/2017
SIZE
D
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A
8
67
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1
678
3 245
1
D
C
B
8
ACORN_GECKO_ANSEL_TO_PMU_ADC
8
8
8
8
HALL_CASE_TO_AOP_SOUTH_L
8
8
PMU_TO_IKTARA_EN_EXT_1V8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
RACER_TO_AOP_INT_L
IKTARA_TO_SMC_INT
I2C0_SMC_SCL
I2C0_SMC_SDA
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL1
IKTARA_COIL1
IKTARA_COIL1
IKTARA_COIL1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE
GND
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
14 15
ACORN_GECKO_ANSEL_TO_PMU_ADC
GND
14 15
RACER_TO_AOP_INT_L
GND
14 15
HALL_CASE_TO_AOP_SOUTH_L
GND
14 15
PMU_TO_IKTARA_EN_EXT_1V8
GND
14 15
IKTARA_TO_SMC_INT
GND
14
GND
14
GND
14 15
GND
14 15
GND
14 15
GND
14
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14 15
GND
14
GND
14
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
14
GND
14
GND
14
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
11 12 14 15
GND
14
GND
14
GND
11 12 14 15
GND
11 12 14 15
I2C0_SMC_SCL
I2C0_SMC_SDA
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL2
IKTARA_COIL1
IKTARA_COIL1
IKTARA_COIL1
IKTARA_COIL1
GND
GND
7
9 5
13
6 5
6 5
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
14
14
14
14
14
14
14
14
D
THIS SIDE HAS ATTRIBUTE
MAKE_BASE=TRUE
8
8
GND
GND
MAKE_BASE=TRUE
MAKE_BASE=TRUE
GND
11 12 14 15
GND
11 12 14 15
C
B
A
8
SYNC_DATE=11/02/2017
PAGE TITLE
A
Interposer: Pins 286-359
SIZE
D
Apple Inc.
DRAWING NUMBER
051-02695
REVISION
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
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2
CDS_LIB=apple
BRANCH
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