Apple IMAC M51 Schematics

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_5_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_TABLEOFCONTENTS_ITEM

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

TABLE_TABLEOFCONTENTS_ITEM

DVT -- 06/29/06

SANTANA - M51 MLB

Schematic / PCB #’s

80

06/29/2006

1.5V_S0 & 1.05V_S0 VREG

63

M51_PAUL

ETHERNET CONTROLLER

4135

M50_DOUG

06/29/2006

94

(MASTER)

Internal Display Conns

68

M51_DAVE

76

(MASTER)

CPU & SYSTEM SENSE

59

M51_DAVE

54

06/29/2006

43

M51_DOUG

PCI-E CONNECTIONS

58

06/29/2006

SMC44

M51_HENRY

11

06/29/2006

11

M50_HENRY

CPU ITP700FLEX DEBUG

ASIC TEMP SENSORS

10

(MASTER)

10

M51_DAVE

CPU 2 OF 2-PWR/GND

8

06/29/2006

8

M50_HENRY

25

06/29/2006

25

M51_DOUG

SB:DECOUPLING

78

06/29/2006

3V DC/DC 2.5V

61

M51_PAUL

POWER CONN / MISC

6

06/29/2006

6

M51_PAUL

SB: 4 OF 4

24

06/29/2006

24

M50_DOUG

ETHERNET CONNECTOR

43

06/29/2006

37

M51_DOUG

42

06/29/2006

36

M51_DOUG

ETHERNET MISC

Disk Connectors

38

06/29/2006

34

M51_DOUG

CLOCKS: TERMINATIONS

34

06/29/2006

33

M51_HENRY

CLOCKS33

06/29/2006

32

M50_HENRY

Memory Vtt Supply

31

06/29/2006

31

M50_HENRY

Memory Active Termination

30

06/29/2006

30

M50_HENRY

DDR2 SO-DIMM Connector B

29

06/29/2006

29

M51_HENRY

28

06/29/2006

28

M51_HENRY

DDR2 SO-DIMM Connector A

27

(MASTER)

27

M51_DAVE

M51 SMBus Connections

26

06/29/2006

26

SB: MISC

M50_DOUG

SB: 3 OF 4

2323

M51_DOUG

06/29/2006

SB: 2 OF 4

22

06/29/2006

22

M50_DOUG

SB: 1 OF 4

21

06/29/2006

21

M50_DOUG

NB Config Straps

20

06/29/2006

20

M50_HENRY

NB (GM) Decoupling

19

(MASTER)

19

M51_DAVE

1818

M50_HENRY

NB Grounds

06/29/2006

NB Power 2

17

06/29/2006

17

M51_HENRY

NB Power 1

16

06/29/2006

16

M51_HENRY

NB DDR2 Interfaces

1515

M50_HENRY

06/29/2006

NB Misc Interfaces

06/29/2006

14

M50_HENRY

14

NB PEG / Video Interfaces

13

06/29/2006

13

M50_HENRY

NB CPU Interface

12

06/29/2006

12

M50_HENRY

9

06/29/2006

9

M51_HENRY

CPU DECAPS & VID<>

7

06/29/2006

7

M50_HENRY

CPU 1 OF 2-FSB

FUNC TEST 1 OF 2

5

06/29/2006

5

M51_HENRY

BOM Config

4

(MASTER)

4

M51_DAVE

Power Block Diagram

3

06/29/2006

3

M51_PAUL

97

(MASTER)

External Display Conns

69

M51_DAVE

85

(MASTER)

MXM I/O

67

M51_DAVE

84

(MASTER)

MXM PCI-E & PWR

66

M51_DAVE

83

06/29/2006

S0 AND S3 FETS

65

M51_PAUL

82

06/29/2006

5V DC/DC

64

M50_PAUL

79

06/29/2006

1.8V & 1.2V VREG

62

M51_PAUL

77

06/29/2006

PWR GOOD

60

M51_PAUL

75

06/29/2006

IMVP6 CPU VCore Regulator

58

M51_PAUL

74

06/29/2006

AUDIO: POWER SUPPLIES

57

AUDIO

73

06/29/2006

AUDIO: CONNECTORS

56

AUDIO

72

06/29/2006

AUDIO: SPEAKER AMP

55

AUDIO

71

06/29/2006

AUDIO: SPEAKER AMP_1

54

AUDIO

70

06/29/2006

AUDIO: COMBO OUT AMP

53

AUDIO

69

06/29/2006

AUDIO: LINE INPUT AMP

52

AUDIO

68

06/29/2006

AUDIO: CODEC

51

AUDIO

67

06/29/2006

TPM50

M51_HENRY

66

06/29/2006

CPU FAN, HD & OD TEMP

49

M51_HENRY

65

HD AND OD FAN

48

M51_HENRY

06/29/2006

63

06/29/2006

SPI BOOTROM

47

M50_DOUG

60

06/29/2006

LPC+ CONN

46

M51_HENRY

53

06/29/2006

AIRPORT CONN

42

M51_DOUG

06/29/2006

USB Device Interfaces

41

M51_DOUG

47

46

FIREWIRE CONNECTORS

40

M51_DOUG

06/29/2006

45

06/29/2006

FW: 1394B MISC

39

M51_DOUG

1

PCB,FAB,MLB,M51

820-1984 MLB1

CSAPDF MASTER

CONTENTS

DATE

06/29/2006

2

M51_PAUL

2

System Block Diagram

MASTER DATE

CONTENTS

CSAPDF

1

PCB,SCHEM,MLB,M51

051-7039 SCH1

44

06/29/2006

FW: 1394B-LINK/PHY

38

M51_DOUG

051-7039

SCHEM SANTANA

21

1

97

06/29/06 06/22/04

21 446951 ENGINEERING RELEASED

59

06/29/2006

SMC & TPM SUPPORT

M51_HENRY

45

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SEE I2C PG 27

TEMP SENSE

PG 3

POWER SENSE

SEE POWER BLOCK DIAGRAM

ADC

PAGE 28-29

B,0

A

SMB

U5800

FAN

PAGE 27

CORE (1.05V)

CK410M

PAGE 22

PAGE 63

CONTROL = 2.5V

64-BIT

1.8V/667MHZ

DDR2 - DUAL CHAN

J2800

AZALIA

U6800

STA9221

PAGE 68

PORT A

J2901 ALS+AMBIENT TSENS P. 59

U6300/01

FSB

USB

CONNECTORS

CAMERA

JE310/JE320/JE330

PAGE 47

4-BIT (3.3V/33MHZ)

PAGE 67

CAMERA

PAGE 47

JE351

IR RCV

PAGE 58

IR

7

PAGE 47

J5300 (AIRPORT CONN)

TPM

LPC+

JE350

NB- GM

(TMDS - VGA)

2 Diff pairs

JE000, JE001

FIREWIRE B CONNECTORS

PAGE 21

PAGE 14

DMI

PAGE 16-17

CORE (1.05V)

J5300

0

1.2V/1.5GHZ

PAGE 15

PCI-E

PAGE 12

U1200

MAIN MEMORY

PAGE

6DUAL CHANNEL LVDS - 6BIT

MXM CONNECTOR

LVDS

PAGE 97 PAGE 94

8-BIT

TSB82AA2

33MHZ

PAGE 46

3.3V/133MHZ

PAGE 38

OPTICAL

CONNECTOR

PCI-E

UATA

PAGES 84-85

J8400

U2100

667MHZ

J0700

CORE

CONNECTOR

SATA

JC900

(1.83/2.17GHZ)

PAGE 7

PAGE 8

CORE (~1.2V)

CPU

MINI-DVI

(INTERNAL)

J9402J9700

SB

SATA2

PAGE 38

HARD DRIVE

SATA0

PAGE 21

SATA

UATA/133

UATA

JC901

PORT

#0

#2-5

PAGE 22

#1

MINI-PCIE

PAGE 53

AIRPORT

X1 - 1.5GHZ

YUKON

GIG ETHERNET

ETHERNET CONNECTOR

JD600

PAGE 43

U4101

PAGE 41

PAGES 30

PARALLEL

TERM

J2900

DIMM

PAGE 21

PORT PORT

PAGE 22

PCI

DMI

PAGE 22 PAGE 22

SPI

PAGE 21

04

J5300

3,7

2 3

156

PAGE 48

J4700

CONN

BT

USB

AIRPORT

U3301

DIMM’S

J2900

J2800

PAGE 24

GPIOS

PAGE 23

ITP CONN

J1101

PAGE 11

PAGE 60

J6000

PAGE 34

TERMS

CLOCKS

PAGE 33

CK410

U3301

64-BIT

4 Diff pairs

MISC

SPI

CONN

DMI

SMC

U6700

4-BIT

LPC

0,2,4

BOOTROM

SMB

100MHZ

FIREWIRE B

2

PAGE 45

1

TSB81BA3

32-BIT

PAGE 73

COMBO OUT CONNECTOR

J7303

OPTICAL OUT

S/PDIF

R/L SPEAKER

CONNECTORS

PAGE 73

J7301,J7302

LINE OUT

PAGE 72

SPEAKER

AMP

AUDIO CODEC

PORT B

PORT C

MIC IN

JE350

BNDI

INTERFACE

PORT F

CONNECTOR

J7303

OPTICAL IN

COMBO IN

LINE IN

PAGE 73

PAGE 44

FIREWIRE B

13

PAGE 14

1.2V/800MHZ

J6500,J6501,J6600 FAN CONNS

System Block Diagram

97

051-7039

21

2

SYNC_MASTER=M51_PAUL SYNC_DATE=06/29/2006

www.Vinaﬁx.vn

Preliminary

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PAGE 78

5.8A PEAK

0.2A PEAK

3.3V, 7.1A PK [4.1A AVG]

LINEAR PG 82

1.5A PEAK

FET PG 83

1.1A PEAK

0.9A AVG

24V, 3.7A PK [3.3A AVG]

FET PG 83

2.2A AVG

3.4A PEAK

FET PG 83

24V, ?A

PAGE 45

LINEAR PAGE 83

0.2A AVG

0.6A PEAK

GRAPHICS

LINEAR

0.2A AVG

0.6A PEAK

ON IN RUN AND SLEEP

"S3" RAILS

"S5" RAILS

"S0" RAILS

ONLY ON IN RUN

ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)

U7650

ISENSE AND VSENSE

SYSTEM (12V)

S5S5

3.3A PEAK

3.0A AVG FET PG ?

0.4A PEAK

0.3A AVG AC/DC

FET PG 83

6.0A PEAK

3.4A AVG

PAGE 78

SWITCHER

ODD

HDD

0.2A AVG

LINEAR

0.1A AVG

0.1A PEAK LINEAR

12V, ?A

1.5A AVG

?A AVG

?A PEAK

PAGE 82

SWITCHER

1.7A PEAK

AC/DC BOARD

?A PEAK ?A AVG

FET PG 83

?A AVG

FET PG 83

ISENSE + VSENSE U8450

MXM_PWRSRC (12V)

12V, 14.5A PK [9.4A AVG]

PAGE 81

8.4A PEAK SWITCHER

4.5A AVG

PAGE 79

0.3A AVG

0.4A PEAK

5.5A AVG

7.4A PEAK

14.5A PEAK

6.3A AVG SWITCHER PAGE 79

LINEAR

0.4A AVG

1.0A PEAK

PAGE 31

FET PG 83

1.2A AVG

2.4A AVG SWITCHER PAGE 80

ISENSE AND VSENSE U7600

5V, 3.4A PK [2.2A AVG]

230W AC/DC POWER SUPPLY

3.5A PEAK

CPU VCORE (1.25V)

36A PEAK 34A AVG SWITCHER PAGE 75

1.7A AVG

?A PEAK

83

78

5

OMIT

SM

XW302

12

1UH-20A-4.5MOHM

TH-VERT-LF

L300

12

SM

OMIT

XW301

12

SYNC_DATE=06/29/2006

Power Block Diagram

051-7039

21

973

SYNC_MASTER=M51_PAUL

=PP1V5_S0_AIRPORT

=PP1V5_S0_NB

=PP1V5_S0_NB_PCIE

=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB_VCCAUX

=PP1V5_S0_NB_VCCD_HMPLL

=PP1V5_S0_SB

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCCUSBPLL

=PP2V5_S0_MXM

=PP2V5_S0_NB_VCCA_3GBG

=PP1V05_S0_CPU

=PP1V05_S0_FSB_NB =PP1V05_S0_NB_VTT

=PP1V05_S0_SB_CPU_IO

=PPVCORE_S0_NB

=PPVCORE_S0_SB

PP1V05_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.15MM

VOLTAGE=1.05V

VOLTAGE=12V

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15MM

PP12V_S0_B

VOLTAGE=12V

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.3MM

PP12V_S5_CPU_REG

=PPVCORE_S0_CPU

PPVCORE_CPU

VOLTAGE=1.25V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.15MM

=PP0V9_S0_MEMVTT_LDO

=PP0V9_S0_MEM_TERM

=PP1V8_S3_MEM

=PP1V8_S0_MEMVTT

=PP1V8_S3_MEM_NB

=PP1V8_S0_MXM

MIN_LINE_WIDTH=0.3MM

PP0V9_S0

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15MM

VOLTAGE=0.9V

=PP12V_S0_SATA

PP12V_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

VOLTAGE=12V

MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE

PP12V_S5_AUDIO_SPKRAMP

=PP12V_S5_AUDIO_SPKRAMP

PP1V2_S3

VOLTAGE=1.8V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM

VOLTAGE=3.3V

PP3V3_S0

MAKE_BASE=TRUE

=PP3V3_S0_SB_PM

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S0_SB_GPIO

=PP3V3_S0_MXM

=PP12V_S0_FAN

=PPV_S0_LCD

=PP5V_S5_AUDIO_LDO

=PP5V_S0_SATA

=PP5V_S0_SB

=PP5V_S3_USB

=PP5V_S5_SB

=PP3V3_S3_ENET

=PP3V3_S0_AUDIO

=PP3V3_S0_IMVP

MIN_NECK_WIDTH=0.25MM

PP5V_S0

VOLTAGE=5V

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

=PP3V3_S0_AIRPORT

=PP3V3_S0_CK410

=PP3V3_S0_FAN

=PP3V3_S0_HD_TSENS

=PP3V3_S0_NB

=PP3V3_S0_NB_VCC_HV

=PP3V3_S0_ODD_TSENS

=PP3V3_S0_PATA

=PP3V3_S0_SATA

=PP3V3_S0_SB

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S0_SB_PCI

=PP3V3_S0_SB_VCC3_3

=PP3V3_S0_SB_VCC3_3_PCI

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_TPM

=PP3V3_S0_VIDEO

=PPSPD_S0_MEM

VOLTAGE=4.5V

MIN_NECK_WIDTH=0.25MM

PP4V5_S5_AUDIO_ANALOG

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

=PP4V5_S5_AUDIO_ANALOG

=PP5V_S3_BNDI

=PP1V2_S3_LAN

=PP5V_S0_MXM

=PP3V3_S5_ROM

=PP3V3_S5_2V5_LDO

=PP3V3_S5_SMC

=PP3V3_S5_FW

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA

=PP3V3_S5_SB_PM

=PPV_S5_FW

=PPV_S0_INVERTER

PP24V_S5

VOLTAGE=24V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

PP24V_S0

MIN_NECK_WIDTH=0.25MM

VOLTAGE=24V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

=PP5V_S0_DEBUG

=PP3V3_S3_TPM

=PP1V95_S5_FWPHY

=PP3V3_S5_DEBUG

=PP5V_S0_PATA

=PP3V3_S5_SB_IO

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB_USB

=PP3V3_S5_SB

PP5V_S3

VOLTAGE=5V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

=PP5V_S0_AUDIO

=PP5V_S0_MEMVTT

MAKE_BASE=TRUE

VOLTAGE=1.8V

PP1V8_S0

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.15MM

MIN_NECK_WIDTH=0.2MM

MAKE_BASE=TRUE

VOLTAGE=1.8V

MIN_LINE_WIDTH=0.6MM

PP1V8_S3

=PP1V8_S3_1V2_LDO

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

PP5V_S5

MIN_NECK_WIDTH=0.2MM

=PP3V3_S3_FW

=PP3V3_S3_I2C

=PP3V3_S3_BT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

PP3V3_S3

VOLTAGE=3.3V

=PPV_S0_MXM_PWRSRC

=PP1V5_S0_CPU

VOLTAGE=12V

MIN_LINE_WIDTH=0.60MM

PP12V_S5

MIN_NECK_WIDTH=0.25MM

MAKE_BASE=TRUE

=PP1V5_S0_NB_PLL

=PP1V5_S0_SB_VCC1_5_A

=PP1V5_S0_NB_3GPLL

=PP1V5_S0_SB_VCCSATAPLL

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE

PP2V5_S5

VOLTAGE=2.5V

MAKE_BASE=TRUE

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MM

PP3V3_S5

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

VOLTAGE=1.95V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP1V95_S5

MAKE_BASE=TRUE

PP2V5_S0

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.3MM

VOLTAGE=2.5V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.3MM

PP1V5_S0

VOLTAGE=1.5V

83 80

84

83

79

83

82

78 76

80 83

77 41

79 82

76 27

74

97 78 80

66

11

26

73

83 77

83

79

65

19

9

25

80

76

19

10

27

43

72

75

66

59

46

26

83

75

53

78

26

17

25

19

8

19

24

19

25

34

83

9

75

30

29

16

72

79

6

25

23

66

42

71

59

34

65

20

19

25

97

29

58

45

23

83 83

45

25

83

79

59

45

27

77

25

6

83

80

53

19

13

19

16

17

25

24

85

17

7

12

17

21

16

24

5

76

75

8

5

31

29

28

31

14

84

79

6

83

71

5

26

24

21

85

65

94

82

6

25

47

25

41

68

75

5

53

33

59

66

14

17

66

38

6

22

24

26

24

67

94

28

82

68

47

42

84

63

78

27

44

24

11

46

94

6 5

60

67

44

60

38

22

24

22

23

59

70

31

83

5

79

5

44

47

6

84

8

76

19

24

19

24

5

45

78

5

www.Vinaﬁx.vn

Preliminary

TABLE_5_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_5_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

WHEN DEVELOPMENT SENSORS ARE GONE

FOR DVT, TRYING AN EVEN BRIGHTER LED ON 2.16GHZ CONFIG

MUST STUFF WHEN SYS_PWR_SENSE IS NOT STUFFED (I.E. WHEN DEVELOPMENT BOM IS NOT STUFFED)

SENSOR STUFFING OPTIONS

MUST STUFF WHEN CPU_PWR_SENSE IS NOT STUFFED (IF THIS MOVES TO DEV BOM)

WHEN DEVELOPMENT SENSORS ARE GONE

MUST STUFF WHEN MXM_PWR_SENSE IS NOT STUFFED (IF THIS MOVES TO DEV BOM)

MEROM BOM OPTION DUE TO PAGE 76 SHARING W/ M50

PULL-DOWNS FOR UNUSED PINS

BOMOPTION Groups

(335S0384)

(338S0274)

Misc. Parts

BATTERY IS INSTALLED AT FATP

(335S0382)

Alternate Parts

BarCode Label / EEE #’s

Module Parts

PULL-DOWNS FOR UNUSED PINS

Development BOM

Production BOM

1946-0743 ADH1 CRITICAL

IO ALIGNMENT BOARD ADHESIVE

MEROM 2.3GHZ, M51

CPU M51_BEST1 CRITICAL337S3292

[EEE:VMD]

1 CRITICAL

BAR CODE LABLE, MLB, M51

825-6447 EEE_VMD

1 U3301359S0101

IC,CY28445-5,CLK GEN,68PIN QFN

CRITICAL

F9710

DVI DDC (LITTLEFUSE)

740S0028740S0044

U3301

SILEGO CK410 CLOCK

359S0101359S0117

Sanyo alt for Nich.

126S0099 126S0073

ALL

Sanyo alt for Nich.

ALL

126S0078126S0086

Sanyo alt for Nich.

126S0068

ALL

126S0088

SANYO ALT

ALL

124-0361 124-0339

378S0141

GREEN LED ALT.

ALL

378S0140

IC,945PM,NORTHBRIDGE

U1200338S0328 1 CRITICAL

341T0019 U63011

IC,EFI BOOT ROM,M51

CRITICAL

630-7512

PCBA,MLB,2.33GHz,M51

M51_COMMON,M51_BEST,EEE_V4K

630-7595

PCBA,MLB,2.16GHz,M51 M51_COMMON,M51_BETTER,EEE_VMD,PRODUCTION

353S1465

U7500

CPU VREG NEW REV

353S1461

J8400

516S0460516S0511

MXM CONN SPEEDTECH

M51_COMMON

COMMON,M51_COMMON1,M51_COMMON2,ALTERNATE

M51_COMMON1

CPU_TSENS_EXT,GPU_TSENS_INT,GPU_TSENS_EXT,MXM_ROM,NBCFG_PEG_REVERSE

M51_COMMON2

SB_SYSRST_4_PVT,ITP,MEROM,AMB_TSENS,CPU_PWR_SENSE,MXM_PWR_SENSE

M51_DEV1

CPU_TSENS_INT,SYS_PWR_SENSE

[EEE:V4K]

CRITICAL

BAR CODE LABLE, MLB, M51

1825-6447 EEE_V4K

102S0699

1

R7650

PRODUCTION

RES,0-OHM,2010

1

116S0090

RES,10K-OHM,5%,0402

C7650

PRODUCTION

1

116S0090

C7650

PRODUCTION

RES,10K-OHM,5%,0402

1

116S0090

RES,10K-OHM,5%,0402

NOSTUFF

C7612

116S0090

C7602

1

NOSTUFF

RES,10K-OHM,5%,0402

1

C8459

116S0090

NOSTUFF

RES,10K-OHM,5%,0402

C8458

1

116S0090

NOSTUFF

RES,10K-OHM,5%,0402

1

R8450

107S0070

NOSTUFFRES,0-OHM,2512

U21001343S0385

IC,SB,652BGA

CRITICAL

IC,CPU-SKT,479BGA

511S0025 1 J0700 CRITICAL

IC,88E8053,GIGABIT ENET XCVR,64P QFN,NO

1338S0270 CRITICALU4101

IC,ENET LAN ROM

341S1797 U41021 CRITICAL

CRITICAL341S1789 1

IC,TPM,TSSOP,28P

U6700 TPM

1353S1465

IC,CPU VREG,IMVP,TWO PHASE,SCREENED

U7500 CRITICAL

MXM_ROM341S1892 1

IC,2K I2C EEPROM,MXM,M51

U8570 CRITICAL

341T0020 U58001

IC,SMC,M51

CRITICAL

MEROM 2.16GHZ, M51

CPU1 CRITICAL337S3293

M51_BETTER

BAT,COIN,3V,220MAH,CR2032

1 BT2600742-0048 CRITICAL NOSTUFF

IO ALIGNMENT BOARD, M51

PCB21820-2038 CRITICAL

1378S0193 CRITICAL M51_BESTLED5950

LED,WHITE,740MCD,LF,3X2MM

1378S0199 LED5950 CRITICAL

M51_BETTER

LED,WHITE,DUAL,2500MCD,SMD

603-8960

PCBA,DEVBOM,M51 M51_DEVELOPMENT

M51_DEVELOPMENT

DEVELOPMENT,M51_DEV1

SYNC_MASTER=M51_DAVE

051-7039

21

4 97

SYNC_DATE=(MASTER)

BOM Config

www.Vinaﬁx.vn

Preliminary

PP

IN

PP

IN

PP

IN

PP

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

INVERTER DOES NOT USE THIS SIGNAL

LAYOUT NOTE: PLACE NEAR NORTHBRIDGE

ALL I2C BUSSES (PLACE IN ACCESSIBLE LOCATION TOP SIDE)

SPARE USB PORT

LAYOUT NOTE: PLACE NEAR SOUTHBRIDGE

MISC GROUND VIAS

FSB SIGNALS

* OPPOSITE END FROM CLOCK BUFFER

LAYOUT: PLACE CLOSE TO DESTINATION

P4MM

SM

OMIT

PP6C5

1

OMIT

SM

P4MM

PP6C4

1

P4MM

OMIT

SM

PP6C6

1

OMIT

P4MM

SM

PP6C8

1

SM

P4MM

OMIT

PP6C7

1

OMIT

P4MM

SM

PP6D0

1

OMIT

P4MM

SM

PP6D3

1

OMIT

P4MM

SM

PP6D4

1

OMIT

SM

P4MM

PP6D8

1

P4MM

OMIT

SM

PP6D9

1

SM

OMIT

P4MM

PP6E0

1

SM

OMIT

P4MM

PP6E1

1

60 59 58

60 58

11

7

11

7

11

7

11

7

11

7

60 59 58

59

5

26

5

HOLE-VIA

ZH500

1

HOLE-VIA

ZH501

1

HOLE-VIA

ZH502

1

HOLE-VIA

ZH503

1

HOLE-VIA

ZH504

1

HOLE-VIA

ZH505

1

HOLE-VIA

ZH506

1

HOLE-VIA

ZH507

1

HOLE-VIA

ZH508

1

HOLE-VIA

ZH509

1

HOLE-VIA

ZH510

1

HOLE-VIA

ZH511

1

HOLE-VIA

ZH512

1

HOLE-VIA

ZH513

1

HOLE-VIA

ZH514

1

HOLE-VIA

ZH515

1

HOLE-VIA

ZH516

1

HOLE-VIA

ZH517

1

HOLE-VIA

ZH518

1

HOLE-VIA

ZH519

1

HOLE-VIA

ZH520

1

HOLE-VIA

ZH521

1

HOLE-VIA

ZH522

1

HOLE-VIA

ZH523

1

HOLE-VIA

ZH524

1

HOLE-VIA

ZH525

1

HOLE-VIA

ZH526

1

HOLE-VIA

ZH527

1

HOLE-VIA

ZH528

1

HOLE-VIA

ZH529

1

P4MM

OMIT

SM

PP600

1

OMIT

P4MM

SM

PP601

1

P4MM

OMIT

SM

PP604

1

SM

P4MM

OMIT

PP605

1

P4MM

OMIT

SM

PP611

1

SM

OMIT

P4MM

PP610

1

P4MM

OMIT

SM

PP612

1

SM

OMIT

P4MM

PP613

1

84 13

84

84 13

I473

I474

I475

I476

I477

I478

I479

I480

I481

I482

I483

68

59

68

59

NC_AUD_BI_PORT_E_L

68

59

68

84

SM

P4MM

OMIT

PP626

1

P4MM

OMIT

SM

PP627

1

I513

NB_TSENS_HS_DXP

10

NB_TSENS_HS_DXN

10

CPU_XDP_CLK_N

34 11

CPU_XDP_CLK_P

34 11

11

7

11

7

11

7

11

7

11

7

26 11

7

26

5

59

5

67 60 58 21

5

60 58 22

67 60 58 23

60 59 21

60

6

67 60 58 23

60 34

60 58

67 60 58 23

60 59 58

60 23

60 58

76 58

94

94 85

75

8

75

8

75

8

75

8

75

8

75

8

75

8

75 23 14

75 26 14

5

75 21

7

26 23

84 77 58 26

77 58 23

76 75

3

80 79 77 58 23

83

80 79 78 77 76 66 65 26

6 5 3

83 78

3

83 79

3

80

3

79

3

80 34

3

83 82 80 79 78 77 75 59

5 3

11

7

97 83 75 59

3

83

80 79 78 77 76 66 65 26

6 5 3

83 82 80 79 78 77 75 59

5 3

84 83 76 41 27 26 10

6 3

83

3

NC_J7302_3

73

29

P4MM

SM

OMIT

PP621

1

SM

OMIT

P4MM

PP666

1

P4MM

SM

OMIT

PP665

1

P4MM

SM

OMIT

PP673

1

P4MM

SM

OMIT

PP674

1

SM

OMIT

P4MM

PP675

1

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

FUNC TEST 1 OF 2

051-7039

975

21

NO_TEST=TRUE

NC_AUD_BI_PORT_E_R

TP_MEM_B_A<14>

NO_TEST=TRUE

TP_MEM_B_A<15>

NO_TEST=TRUENO_TEST=TRUE

NC_AUD_BI_PORT_H_L

NO_TEST=TRUE

NC_SMC_MEM_ISENSE

NO_TEST=TRUE

NC_J7302_6

NO_TEST=TRUE

NC_AUD_BI_PORT_H_R

NO_TEST=TRUE

NC_AUD_VREF_PORT_B

SB_CLK48M_USBCTLR

PEG_R2D_N<0>

NO_TEST=TRUE

PEG_R2D_P<0>

NO_TEST=TRUE

NC_SMC_SYS_VSET

FSB_CPURST_L

SB_CLK14P3M_TIMER

SB_CLK100M_SATA_P SB_CLK100M_SATA_N

PP1V05_S0

FUNC_TEST=TRUE

PP1V5_S0

FUNC_TEST=TRUE

SMBUS_SMC_A_S3_SDA

LPC_FRAME_L

FUNC_TEST=TRUE

BOOT_LPC_SPI_L

FUNC_TEST=TRUE

PP24V_S0

FUNC_TEST=TRUE

PP3V3_S0

PP5V_S5

FUNC_TEST=TRUE

PP3V3_S5

PP5V_S0

FUNC_TEST=TRUE

PP5V_S5

FUNC_TEST=TRUE

PP1V2_S3

FUNC_TEST=TRUE

PP1V8_S3

FUNC_TEST=TRUE

PPVCORE_CPU

FUNC_TEST=TRUE

PP3V3_S5

FUNC_TEST=TRUE

PP2V5_S5

FUNC_TEST=TRUE

PM_SLP_S4_L

FUNC_TEST=TRUE

PM_SLP_S3_L

FUNC_TEST=TRUE

VR_PWRGD_CK410

FUNC_TEST=TRUE

ALL_SYS_PWRGD

FUNC_TEST=TRUE

VR_PWRGOOD_DELAY

FUNC_TEST=TRUE

CPU_DPRSTP_L

FUNC_TEST=TRUE

CPU_VID<6>

FUNC_TEST=TRUE

CPU_VID<5>

FUNC_TEST=TRUE

CPU_VID<4>

FUNC_TEST=TRUE

CPU_VID<3>

FUNC_TEST=TRUE

CPU_VID<2>

FUNC_TEST=TRUE

CPU_VID<1>

FUNC_TEST=TRUE

LCD_PWM

FUNC_TEST=TRUE

INV_ENABLE_BL

FUNC_TEST=TRUE

CPU_VID<0>

ISENSE_CAL_EN

FUNC_TEST=TRUE

SV_SET_UP

FUNC_TEST=TRUE

SMC_RST_L

FUNC_TEST=TRUE

SMC_NMI

FUNC_TEST=TRUE

SMC_MD1

FUNC_TEST=TRUE

PM_SUS_STAT_L

FUNC_TEST=TRUE

INT_SERIRQ

FUNC_TEST=TRUE

FWH_INIT_L

FUNC_TEST=TRUE

PCI_CLK_PORT80

FUNC_TEST=TRUE

DEBUG_RST_L

FUNC_TEST=TRUE

PM_CLKRUN_L

LPC_AD<3>

FUNC_TEST=TRUE

LPC_AD<1>

FUNC_TEST=TRUE

LPC_AD<2>

FUNC_TEST=TRUE

LPC_AD<0>

FUNC_TEST=TRUE

SW_RST_BTN_L

FUNC_TEST=TRUE

POWER_BUTTON_L

FUNC_TEST=TRUE

XDP_DBRESET_L

FUNC_TEST=TRUE

XDP_BPM_L<1>

FUNC_TEST=TRUE

XDP_BPM_L<0>

FUNC_TEST=TRUE

XDP_BPM_L<3>

FUNC_TEST=TRUE

XDP_BPM_L<2>

FUNC_TEST=TRUE

NO_TEST=TRUE

PEG_R2D_N<2>

PEG_R2D_P<1>

NO_TEST=TRUE

NC_SMC_BATT_ISET

FUNC_TEST=TRUE

XDP_BPM_L<5>

FUNC_TEST=TRUE

XDP_BPM_L<4>

FUNC_TEST=TRUE

ITPRESET_L

FUNC_TEST=TRUE

SMC_TX_L

FUNC_TEST=TRUE

SMC_TRST_L

FUNC_TEST=TRUE

SMC_TMS

FUNC_TEST=TRUE

SMC_TDI

FUNC_TEST=TRUE

SMC_TDO

FUNC_TEST=TRUE

SMC_MANUAL_RST_L

FUNC_TEST=TRUE

XDP_TMS

FUNC_TEST=TRUE

POWER_BUTTON_L

FUNC_TEST=TRUE

XDP_TDO

FUNC_TEST=TRUE

XDP_TDI

FUNC_TEST=TRUE

SMC_RX_L

FUNC_TEST=TRUE

XDP_TCK

FUNC_TEST=TRUE

SW_RST_BTN_L

NO_TEST=TRUE

PEG_D2R_P<3>

PEG_R2D_C_P<0>

NO_TEST=TRUE

MAKE_BASE=TRUE

TP_PCI_GNT3_L

PCI_GNT3_L

DMI_S2N_N<0>

MEM_VREF_NB_1

MEM_VREF_NB_0

LPC_FRAME_L

SPI_SO

DMI_N2S_N<0>

PCIE_B_D2R_P

PCI_CLK_SB

NO_TEST=TRUE

NC_AUD_VREF_PORT_D

NO_TEST=TRUE

NC_SMS_X_AXIS

NO_TEST=TRUE

NC_SMC_P23

NO_TEST=TRUE

PEG_R2D_C_P<15>

NO_TEST=TRUE

PEG_R2D_C_N<15>

NO_TEST=TRUE

PEG_R2D_C_P<14>

NO_TEST=TRUE

PEG_R2D_C_N<14>

NO_TEST=TRUE

PEG_R2D_C_N<13>

NO_TEST=TRUE

PEG_R2D_C_P<13>

NO_TEST=TRUE

PEG_R2D_C_P<12>

NO_TEST=TRUE

PEG_R2D_C_N<12>

NO_TEST=TRUE

PEG_R2D_C_P<11>

NO_TEST=TRUE

PEG_R2D_C_N<11>

NO_TEST=TRUE

PEG_R2D_C_P<10>

NO_TEST=TRUE

PEG_R2D_C_N<10>

NO_TEST=TRUE

PEG_R2D_C_P<9>

NO_TEST=TRUE

PEG_R2D_C_N<9>

NO_TEST=TRUE

PEG_R2D_C_P<8>

NO_TEST=TRUE

PEG_R2D_C_N<8>

NO_TEST=TRUE

PEG_R2D_C_P<7>

NO_TEST=TRUE

PEG_R2D_C_N<7>

NO_TEST=TRUE

PEG_R2D_C_P<6>

NO_TEST=TRUE

PEG_R2D_C_N<6>

NO_TEST=TRUE

PEG_R2D_C_P<5>

NO_TEST=TRUE

PEG_R2D_C_N<5>

NO_TEST=TRUE

PEG_R2D_C_P<4>

NO_TEST=TRUE

PEG_R2D_C_N<4>

NO_TEST=TRUE

PEG_R2D_C_P<3>

NO_TEST=TRUE

PEG_R2D_C_N<3>

NO_TEST=TRUE

PEG_R2D_C_P<2>

NO_TEST=TRUE

PEG_R2D_C_N<2>

PEG_R2D_C_P<1>

NO_TEST=TRUE

PEG_R2D_C_N<1>

NO_TEST=TRUE

PEG_R2D_P<15>

NO_TEST=TRUE

PEG_R2D_N<15>

NO_TEST=TRUE

PEG_R2D_P<14>

NO_TEST=TRUE

PEG_R2D_N<14>

NO_TEST=TRUE

PEG_R2D_N<13>

NO_TEST=TRUE

PEG_R2D_P<13>

NO_TEST=TRUE

PEG_R2D_P<12>

NO_TEST=TRUE

PEG_R2D_N<12>

NO_TEST=TRUE

PEG_R2D_P<11>

NO_TEST=TRUE

PEG_R2D_N<11>

NO_TEST=TRUE

PEG_R2D_P<10>

NO_TEST=TRUE

PEG_R2D_N<10>

NO_TEST=TRUE

PEG_R2D_N<9>

NO_TEST=TRUE

PEG_R2D_P<9>

NO_TEST=TRUE

PEG_R2D_P<8>

NO_TEST=TRUE

PEG_D2R_P<15>

NO_TEST=TRUE

PEG_D2R_N<15>

NO_TEST=TRUE

PEG_D2R_N<14>

NO_TEST=TRUE

PEG_D2R_P<14>

NO_TEST=TRUE

PEG_D2R_P<13>

NO_TEST=TRUE

PEG_D2R_N<13>

NO_TEST=TRUE

PEG_D2R_P<12>

NO_TEST=TRUE

PEG_D2R_N<12>

NO_TEST=TRUE

PEG_D2R_P<11>

NO_TEST=TRUE

PEG_D2R_N<11>

NO_TEST=TRUE

PEG_D2R_P<10>

NO_TEST=TRUE

PEG_D2R_P<9>

NO_TEST=TRUE

PEG_D2R_N<9>

NO_TEST=TRUE

PEG_D2R_N<10>

NO_TEST=TRUE

PEG_D2R_P<8>

NO_TEST=TRUE

PEG_R2D_P<7>

NO_TEST=TRUE

PEG_R2D_N<7>

NO_TEST=TRUE

PEG_R2D_N<8>

NO_TEST=TRUE

PEG_R2D_P<6>

NO_TEST=TRUE

PEG_R2D_N<6>

NO_TEST=TRUE

PEG_R2D_N<5>

NO_TEST=TRUE

PEG_R2D_P<4>

NO_TEST=TRUE

PEG_R2D_P<3>

NO_TEST=TRUE

PEG_R2D_N<3>

NO_TEST=TRUE

PEG_D2R_N<8>

NO_TEST=TRUE

PEG_D2R_N<7>

NO_TEST=TRUE

PEG_D2R_P<7>

NO_TEST=TRUE

PEG_D2R_P<6>

NO_TEST=TRUE

PEG_D2R_N<5>

NO_TEST=TRUE

PEG_D2R_P<5>

NO_TEST=TRUE

PEG_D2R_N<6>

NO_TEST=TRUE

PEG_D2R_P<4>

NO_TEST=TRUE

PEG_D2R_N<3>

NO_TEST=TRUE

PEG_D2R_N<1>

MAKE_BASE=TRUE

NC_NB_CFG<12>

NB_CFG<12>

NB_CFG<11>

NB_CFG<8>

NB_CFG<4>

MAKE_BASE=TRUE

NC_NB_CFG<6>

NB_CFG<3>

MAKE_BASE=TRUE

NC_NB_CFG<3>

MAKE_BASE=TRUE

NC_NB_CFG<4>

NB_CFG<6>

NC_NB_CFG<13>

MAKE_BASE=TRUE

NB_CFG<14>

NB_CFG<15>

NB_CFG<17>

NB_CFG<13>

NB_CFG<10>

MAKE_BASE=TRUE

NC_NB_CFG<10>

MAKE_BASE=TRUE

NC_NB_CFG<8>

MAKE_BASE=TRUE

NC_NB_CFG<11>

NC_NB_CFG<14>

MAKE_BASE=TRUE

NC_NB_CFG<15>

MAKE_BASE=TRUE

NC_NB_CFG<17>

MAKE_BASE=TRUE

FUNC_TEST=TRUE

SMC_TCK

FUNC_TEST=TRUE

XDP_TRST_L

NB_RST_IN_L_R

DMI_S2N_P<0>

SMBUS_SB_SCL

SMBUS_SMC_A_S3_SCL

VR_PWRGOOD_DELAY

SMBUS_SB_SDA

TP_LVDS_BKLTEN

MAKE_BASE=TRUE

USB_F_P

DMI_N2S_P<0>

IDE_PDIOR_L

IDE_PDD<9>

IDE_PDIORDY

PCIE_B_D2R_N

SPI_SI

PCI_CLK_FW

PCI_CLK_SMC

NO_TEST=TRUE

PEG_R2D_N<1>

FUNC_TEST=TRUE

PM_DPRSLPVR

PEG_D2R_N<4>

NO_TEST=TRUE

PEG_D2R_N<2>

NO_TEST=TRUE

PEG_D2R_P<1>

PEG_D2R_P<0>

NO_TEST=TRUE

PEG_D2R_N<0>

MAKE_BASE=TRUE

TP_USB_F_N

USB_F_N

MAKE_BASE=TRUE

TP_USB_F_P

LVDS_BKLTEN

NO_TEST=TRUE

NC_SMC_BATT_TRICKLE_EN_L

NO_TEST=TRUE

NC_SMC_BATT_VSET

NO_TEST=TRUE

NC_SMC_P20

NO_TEST=TRUE

NC_SMC_SYS_ISET

NO_TEST=TRUE

NC_SMC_P27

NC_SMC_P26

NO_TEST=TRUE

NC_SMC_P21

PEG_D2R_P<2>

NO_TEST=TRUE

NC_SMC_BATT_CHG_EN

NO_TEST=TRUE

NC_SMC_P22

NO_TEST=TRUE

NC_AUD_BI_PORT_G_L

NO_TEST=TRUE

NC_ALS_GAIN NC_AUD_VREF_PORT_C

NO_TEST=TRUE

NC_SMS_Y_AXIS NC_SMS_Z_AXIS

NO_TEST=TRUE

PEG_R2D_C_N<0>

NO_TEST=TRUE

PEG_R2D_P<5>

NO_TEST=TRUE

PEG_R2D_N<4>

NO_TEST=TRUE

PEG_R2D_P<2>

NO_TEST=TRUE

67 60

75

12

58

63

26

63

34

11

34

22

19

21

58

22

54

34

22

14

22

38

54

58

44

58

19

23

7

23

21

27

22

14

5

22

14

22

14

27

5

27

19

22

14

21

22

34

22

13

www.Vinaﬁx.vn

Preliminary

125

OUT

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SILKSCREEN:EFI OK

FROM AC/DC

NEEDED AND THERE IS NO FREE PIN ON THE CONNECTOR

NOT SENDING 3.3V TO THE DRIVE BECAUSE IT IS NOT

TO HDD

SILKSCREEN:3

SILKSCREEN:RUN

CHASSIS HOLE UPPER RIGHT CORNER OF BOARD

CHASSIS HOLE NEAR POWER SWITCH CONNECTOR (BOT RIGHT)

TO NONPLATED HOLE TO LEFT OF EXTERNAL AUDIO CONNECTORS

SILKSCREEN:1

SYSTEM STATUS

GND RAILS

TO SYS ISENSE

CHASSIS GND

TO NONPLATED SLOT TO RIGHT OF EXTERNAL IO

CHASSIS NEXT TO AUDIO CONNECTORS

CHASSIS HOLE NEAR MXM

LOCATED NORTH OF CPU

HEATSINK BACKER PLATE STANDOFFS

CHASSIS HOLE NEAR ODD CONNECTOR (TOP MID)

AC/DC CONN

SILKSCREEN:2

SM

OMIT

XW601

12

SM

OMIT

XW602

12

74LC125

TSSOP

CRITICAL

U600

2

71

14

3

10V

20%

402

CERM

0.1UF

C600

1

2

GREEN-3.6MCD

2.0X1.25MM-SM

LED601

1

2

OMIT

4P25R3P5

ZH631

1

20%

CERM

16V

402

0.01UF

NOSTUFF

C631

1

2

1K

1/16W

5%

MF-LF 402

R602

1

2

4P25R3P5

OMIT

ZH630

1

0.01UF

20%

402

NOSTUFF

CERM

16V

C630

1

2

74LC125

CRITICAL

TSSOP

U600

5

74

14

6

74LC125

TSSOP

CRITICAL

U600

9

7

10

14

8

TSSOP

74LC125

CRITICAL

U600

12

7

13

14

11

402

5%

1/16W

68

MF-LF

R612

12

4025%MF-LF

1/16W

68

R611

12

5%

402

MF-LF

1/16W

68

R614

12

402

5%

1/16W MF-LF

68

TPM

R615

12

5%

402

1/16W MF-LF

68

R616

12

402

5%

68

MF-LF

1/16W

R617

12

5%

68

402

MF-LF

1/16W

R618

12

1/16W MF-LF

68

5%

402

R619

12

1/16W

402

1K

5%

MF-LF

R600

1

2

GREEN-3.6MCD

2.0X1.25MM-SM

LED602

1

2

1K

1/16W MF-LF

DEVELOPMENT

402

5%

R605

1

2

DEVELOPMENT

2.0X1.25MM-SM

GREEN-3.6MCD

LED600

1

2

CRITICAL

HM9606E-M2

M-RT-TH

J601

1

10

11

12

2

3

4

5

6

7

8

9

2.0X1.25MM-SM

GREEN-3.6MCD

LED603

1

2

3.3K

402

1/16W MF-LF

5%

R601

1

2

1K

1/16W MF-LF

5%

402

R604

1

2

2.0X1.25MM-SM

GREEN-3.6MCD

LED604

1

2

100PF

NOSTUFF

402

CERM

50V

5%

C620

1

2

100PF

NOSTUFF

5% 50V CERM 402

C621

1

2

1/16W

1%

MF-LF

1.5K

402

R606

1

2

3

NOSTUFF

100PF

402

CERM

50V

5%

C622

1

2

SM

OMIT

XW603

12

4P25R3P5

OMIT

ZH611

1

NOSTUFF

6.3X5.5-SM

ELEC

16V

20%

100UF

C624

1

2

NOSTUFF

150UF

20%

6.3V

SM

ELEC

C623

1

2

HSK-NUT-6.5MM

TH

SDF600

1

TH

HSK-NUT-6.5MM

SDF601

1

OMIT

4P25R3P5

ZH632

1

OMIT

4P25R3P5

ZH633

1

20%

0.01UF

CERM

16V

402

NOSTUFF

C633

1

2

OMIT

4P25R3P5

ZH634

1

0.01UF

20%

CERM

16V

402

NOSTUFF

C634

1

2

402

MF-LF

1/16W

5%

10K

R607

1

2

SM1-LF

35V

100UF

ELEC

20%

NOSTUFF

C625

1

2

2N7002

SOT23-LF

Q600

3

1

2

5%

MF-LF

1/16W

10K

402

R609

1

2

051-7039

6 97

21

SYNC_DATE=06/29/2006

POWER CONN / MISC

SYNC_MASTER=M51_PAUL

GPU_PRESENT

PP3V3_S0

PP24V_S5

=PP5V_S0_SATA

GND_CHASSIS_POWER_CONN

pp3v3_s5

SYS_POWERFAIL_L

GND_AUDIO

PP12V_S5_AC_DC

GND_CHASSIS_USB

PLT_RST_L

LCD_SHOULD_ON

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0

GND_CHASSIS_NEAR_PWR_SW

GND_CHASSIS_CPU_TEMP

VOLTAGE=0

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

GND_CHASSIS_NEAR_ODD_CON

GND_CHASSIS_RJ45

GND_CHASSIS_GPU_TEMP

GND_CHASSIS_AUDIO_INTERNAL

GND_CHASSIS_IO_RIGHT

MAKE_BASE=TRUE VOLTAGE=0 MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

GND_CHASSIS_DVI

GND_CHASSIS_ODD_TEMP

MIN_LINE_WIDTH=0.6MM VOLTAGE=0 MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MM

GND_CHASSIS_BNDI

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0

MAKE_BASE=TRUE

GND_CHASSIS_TOP_RIGHT

GND_CHASSIS_HDD_TEMP

=PP3V3_S0_SATA

GND_AUDIO_SPKRAMP

FW_RST_L

GND_CHASSIS_AUDIO_EXTERNAL

GND_CHASSIS_FIREWIRE

ITS_ALIVE

ITS_PLUGGED_IN

U600_11

ENET_RST_L

U600_3

SMC_LRESET_L

NB_RST_IN_L

PEG_RESET_L

TPM_LRESET_L

AIRPORT_RST_L

PP12V_LCD_CONN

PP3V3_S3PP3V3_S5

DEBUG_RST_L

ITS_RUNNING

GND_CHASSIS_IO_LEFT

VOLTAGE=0 MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MM

PP3V3_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

VOLTAGE=0

GND_CHASSIS_NEAR_MXM

GPU_PRESENT_R

PP3V3_S0

=PP12V_S0_SATA

ACDC_TEMP

PP3V3_S5

U600_8

U600_6

83

80

84

79

84

79

83

78

83

78

76

77

76

77

41

76

41

76

27

66

27

66

26

65

26

65

10

26

83 26

10

26

6

82

53

6

5

83

5

78

72

74

27

5

60

5

3

76

74

76

47

22

10

43

10

73

97

66

47

66

71

45

73

46

42

58

14

85

67

53

94

3 3

5

3

23

3

59

3

www.Vinaﬁx.vn

Preliminary

IO

IN

IO

OUT

IO

OUT

IN

OUT

IN

OUT

IN

A3*

A4*

A5*

A6*

A8*

A10*

A11*

A12*

A13*

A16*

A15*

A14*

ADSTB0*

REQ2*

REQ0*

REQ1*

REQ3*

REQ4*

A17*

A18*

A19*

A20*

A21*

A23*

A22*

A24*

A25*

A26*

A29*

A28*

A27*

A31*

A30*

ADSTB1*

A20M*

FERR*

IGNNE*

STPCLK*

LINT1

LINT0

SMI*

RSVD10

RSVD9

RSVD5

RSVD4

RSVD3

RSVD2

RSVD1

RSVD8

RSVD7

RSVD6

RSVD11

ADS*

BNR*

BPRI*

DEFER*

DRDY*

DBSY*

BR0*

IERR*

INIT*

LOCK*

RESET*

RS0*

RS1*

RS2*

TRDY*

HIT*

HITM*

BPM0*

BPM2*

BPM1*

BPM3*

PRDY*

PREQ*

TCK

TDI

TDO

TMS

TRST*

DBR*

PROCHOT*

THERMDA

THERMDC

THERMTRIP*

RSVD12

RSVD13

RSVD16

RSVD19

RSVD18

RSVD17

RSVD20

BCLK0

BCLK1

RSVD15

RSVD14

A7*

A9*

ADDR GROUP0

XDP/ITP SIGNALS

CONTROL

ADDR GROUP1

RESERVED

HCLK

THERM

(1 OF 4)

PSI*

SLP*

PWRGOOD

DPRSTP*

DPSLP*

DPWR*

COMP2

COMP3

COMP1

COMP0

DSTBP3*

DSTBN3*

DINV3*

D63*

D62*

D61*

D60*

D59*

D58*

D57*

D56*

D55*

D54*

D52*

D53*

D51*

D50*

D49*

D48*

DINV2*

DSTBN2*

D47*

DSTBP2*

D45*

D46*

D44*

D43*

D42*

D41*

D40*

D39*

D38*

D37*

D36*

D35*

D34*

D33*

D32*

BSEL2

DSTBN1*

BSEL0

BSEL1

TEST2

GTLREF

DINV1*

DSTBP1*

D31*

D30*

D29*

D26*

D27*

D28*

D24*

D25*

D23*

D21*

D22*

D20*

D19*

D18*

D16*

D17*

DINV0*

DSTBP0*

DSTBN0*

D15*

D14*

D13*

D12*

D11*

D10*

D9*

D8*

D7*

D6*

D5*

D4*

D3*

D2*

D1*

D0*

TEST1

NC

(2 OF 4)

MISC

DATA GRP0

DATA GRP2

DATA GRP1

DATA GRP3

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

LAYOUT NOTE:

COMP1,3 CONNECT WITH ZO=55OHM, MAKE

COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE

TRACE LENGTH SHORTER THAN 0.5".

CPU IS HOT

AND CPU VR TO INFORM

CPU_PROCHOT_L TO SMC

CONNECTOR, NEED TERM

NO SPACE FOR ITP

ON ITP SIGNALS?

FSB_IERR# WITH A GND

SYMBOL NEED TO CHECK

0.1" AWAY

PLACE TESTPOINT ON

SHOULD CONNECT TO

PM_THRMTRIP#

ICH6-M AND GMCH

WITHOUT T-ING (NO

STUB)

NOTE:

DUMMY PIN PIN ACTUALLY DRIVEN BY ITP

LAYOUT NOTE: 0.5" MAX LENGTH

CPU SCH AND PCB

TP_CPU_M_TEST4

PLACE GND VIA W/IN 1000 MILS

ROUTE TO TP VIA AND

SPARE[7-0],HFPLL:

TP_CPU_M_TEST3

NO STUFF R0701 IF USING ITP

1/16W

402

MF-LF

54.9

1%

R0703

1

2

68

1/16W

5%

402

MF-LF

R0704

1

2

1K

MF-LF 402

1% 1/16W

R0705

1

2

2.0K

MF-LF 402

1% 1/16W

R0706

1

2

1/16W

1%

402

MF-LF

54.9

R0720

12

1/16W

402

MF-LF

54.9

1%

R0721

12

1/16W

1%

402

MF-LF

54.9

R0722

12

54.9

402

1%

R0719

12

27.4

R0718

12

54.9

402

1%

R0717

12

402

27.4

R0716

12

NOSTUFF

402

0

R0730

12

NOSTUFF

1/16W

5%

402

MF-LF

1K

R0712

1

2

51

1/16W

5%

402

MF-LF

R0707

1

2

OMIT

CPU

YONAH-SKT

BGA

J0700

N3

P5

P2

L1

P4

P1

R1

Y2

U5

R3

W6

A6

U4

Y5

U2

R4

T5

T3

W3

W5

Y4

J4

W2

Y1

L4

M3

K5

M1

N2

J1

H1

L2

V4

A22

A21

E2

AD4

AD3

AD1

AC4

G5

F1

C20

E1

H5

F21

A5

G6

E4

D20

C4

B3

C6

B4

H4

AC2

AC1

D21

K3

H2

K2

J3

L5

B1

F3

F4

G3

AA1

C3

B25

T22

D2

F6

D3

C1

AF1

D22

C23

AA4

C24

AB2

AA3

M4

N5

T2

V3

B2

A3

D5

AC5

AA6

AB3

A24

A25

C7

AB5

G2

AB6

OMIT

YONAH-SKT

CPU

BGA

J0700

B22

B23

C21

R26

U26

U1

V1

E22

F24

J24

J23

H26

F26

K22

H25

N22

K25

P26

R23

E26

L25

L22

L23

M23

P25

P22

P23

T24

R24

L26

H22

T25

N24

AA23

AB24

V24

V26

W25

U23

U25

U22

F23

AB25

W22

Y23

AA26

Y26

Y22

AC26

AA24

AC22

AC23

G25

AB22

AA21

AB21

AC25

AD20

AE22

AF23

AD24

AE21

AD21

E25

AE25

AF25

AF22

AF26

E23

K24

G24

J26

M26

V23

AC20

E5

B5

D24

H23

M24

W24

AD23

G22

N25

Y25

AE24

AD26

A2

AE6

D6

D7

C26

D25

402

MF-LF

1/16W

54.9

1%

R0702

1

2

54.9

MF-LF 402

1% 1/16W

R0701

1

2

SYNC_DATE=06/29/2006

SYNC_MASTER=M50_HENRY

CPU 1 OF 2-FSB

7

21

051-7039

97

CPU_INIT_L

FSB_BREQ0_L

=PP1V05_S0_CPU

FSB_A_L<6>

TP_CPU_A39_L

TP_CPU_EXTBREF

TP_CPU_A32_L

TP_CPU_SPARE0

XDP_BPM_L<2>

XDP_TDI

XDP_TRST_L

FSB_RS_L<2>

XDP_BPM_L<5>

XDP_BPM_L<4>

=PP1V05_S0_CPU

CPU_PROCHOT_L

FSB_DINV_L<0>

XDP_BPM_L<3>

CPU_PWRGD

XDP_TDI

XDP_TCK

XDP_TMS

=PP1V05_S0_CPU

FSB_A_L<3> FSB_A_L<4>

FSB_A_L<5>

FSB_A_L<8>

FSB_A_L<9> FSB_A_L<10>

FSB_A_L<11>

FSB_A_L<12> FSB_A_L<13>

FSB_A_L<16>

FSB_A_L<15>

FSB_A_L<14>

FSB_ADSTB_L<0>

FSB_REQ_L<2>

FSB_REQ_L<0>

FSB_REQ_L<1>

FSB_REQ_L<3>

FSB_REQ_L<4>

FSB_A_L<17>

FSB_A_L<18>

FSB_A_L<19> FSB_A_L<20>

FSB_A_L<21>

FSB_A_L<23>

FSB_A_L<22>

FSB_A_L<24>

FSB_A_L<25> FSB_A_L<26>

FSB_A_L<29>

FSB_A_L<28>

FSB_A_L<27>

FSB_A_L<31>

FSB_A_L<30>

FSB_ADSTB_L<1>

CPU_A20M_L

CPU_FERR_L CPU_IGNNE_L

CPU_STPCLK_L

CPU_NMI

CPU_INTR

CPU_SMI_L

TP_CPU_APM1_L

TP_CPU_APM0_L

TP_CPU_A36_L

TP_CPU_A35_L

TP_CPU_A34_L

TP_CPU_A33_L

TP_CPU_A38_L

TP_CPU_A37_L

TP_CPU_HFPLL

FSB_ADS_L FSB_BNR_L

FSB_BPRI_L

FSB_DEFER_L

FSB_DRDY_L FSB_DBSY_L

FSB_LOCK_L

FSB_CPURST_L

FSB_RS_L<0>

FSB_RS_L<1>

FSB_TRDY_L

FSB_HIT_L

FSB_HITM_L

XDP_BPM_L<0>

XDP_BPM_L<1>

XDP_TCK

XDP_TDO

XDP_TMS

XDP_DBRESET_L

CPU_THERMD_P

CPU_THERMD_N

PM_THRMTRIP_L

TP_CPU_SPARE6

TP_CPU_SPARE5

FSB_CLK_CPU_P

FSB_CLK_CPU_N

TP_CPU_SPARE1

FSB_A_L<7>

CPU_TEST1

FSB_D_L<0> FSB_D_L<1>

FSB_D_L<2>

FSB_D_L<3> FSB_D_L<4>

FSB_D_L<5>

FSB_D_L<6> FSB_D_L<7>

FSB_D_L<8> FSB_D_L<9>

FSB_D_L<10>

FSB_D_L<11> FSB_D_L<12>

FSB_D_L<13>

FSB_D_L<14> FSB_D_L<15>

FSB_DSTBN_L<0>

FSB_D_L<17>

FSB_D_L<16>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<20>

FSB_D_L<22>

FSB_D_L<21>

FSB_D_L<23>

FSB_D_L<25>

FSB_D_L<24>

FSB_D_L<28>

FSB_D_L<27>

FSB_D_L<26>

FSB_D_L<29>

FSB_D_L<30>

FSB_D_L<31>

FSB_DSTBP_L<1>

FSB_DINV_L<1>

CPU_TEST2

CPU_BSEL<1>

CPU_BSEL<0>

FSB_DSTBN_L<1>

CPU_BSEL<2>

FSB_D_L<32> FSB_D_L<33>

FSB_D_L<34>

FSB_D_L<35> FSB_D_L<36>

FSB_D_L<37>

FSB_D_L<38> FSB_D_L<39>

FSB_D_L<40> FSB_D_L<41>

FSB_D_L<42>

FSB_D_L<43> FSB_D_L<44>

FSB_D_L<46>

FSB_D_L<45>

FSB_DSTBP_L<2>

FSB_D_L<47>

FSB_DSTBN_L<2>

FSB_DINV_L<2>

FSB_D_L<48>

FSB_D_L<49> FSB_D_L<50>

FSB_D_L<51>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<54>

FSB_D_L<55> FSB_D_L<56>

FSB_D_L<57> FSB_D_L<58>

FSB_D_L<59>

FSB_D_L<60> FSB_D_L<61>

FSB_D_L<62>

FSB_D_L<63>

FSB_DINV_L<3>

FSB_DSTBN_L<3>

FSB_DSTBP_L<3>

CPU_COMP<0> CPU_COMP<1>

CPU_COMP<3>

CPU_COMP<2>

FSB_DPWR_L

CPU_DPSLP_L

CPU_DPRSTP_L

FSB_SLPCPU_L

CPU_PSI_L

FSB_DSTBP_L<0>

FSB_IERR_L

CPU_GTLREF

TP_CPU_SPARE2 TP_CPU_SPARE3

TP_CPU_SPARE4

TP_CPU_SPARE7

11

9

8

11

8

11

8

12

11

26

59

75

7

11

7

11

7

11

7

11

7

11

7

11

21

12

3

12

5

12

5

3

59

12

5

21

5

3

12

21

12

5

12

5

10

14

34

12

34

12

34

12

21

5

12

75

12

www.Vinaﬁx.vn

Preliminary

OUT

VCC_67

VCC_64

VCC_66

VCC_65

VCC_63

VCC_62

VCC_61

VCC_59

VCC_60

VCC_58

VCC_57

VCC_56

VCC_54

VCC_55

VCC_53

VCC_51

VCC_52

VCC_49

VCC_50

VCC_48

VCC_47

VCC_46

VCC_44

VCC_45

VCC_43

VCC_41

VCC_42

VCC_40

VCC_39

VCC_38

VCC_36

VCC_37

VCC_33

VCC_35

VCC_34

VCC_31

VCC_32

VCC_29

VCC_30

VCC_28

VCC_26

VCC_27

VCC_23

VCC_25

VCC_24

VCC_22

VCC_21

VCC_20

VCC_18

VCC_19

VCC_17

VCC_16

VCC_15

VCC_13

VCC_14

VCC_12

VCC_10

VCC_11

VCC_8

VCC_9

VCC_7

VCC_6

VCC_5

VCC_3

VCC_4

VCC_2

VCC_1 VCC_68

VCC_69

VCC_71

VCC_70

VCC_72

VCC_74

VCC_76

VCC_75

VCC_78

VCC_77

VCC_79

VCC_81

VCC_80

VCC_84

VCC_82

VCC_83

VCC_86

VCC_85

VCC_87

VCC_89

VCC_88

VCC_90

VCC_91

VCC_92

VCC_94

VCC_93

VCC_95

VCC_96

VCC_97

VCC_99

VCC_98

VCC_100

VCCP_1

VCCP_2

VCCP_3

VCCP_4

VCCP_5

VCCP_6

VCCP_7

VCCP_9

VCCP_8

VCCP_11

VCCP_10

VCCP_12

VCCP_13

VCCP_14

VCCP_16

VCCP_15

VCCA

VID0

VID1

VID2

VID3

VID4

VID5

VID6

VSSSENSE

VCCSENSE

VCC_73

(3 OF 4)

VSS_82

VSS_83

VSS_84

VSS_85

VSS_87

VSS_86

VSS_88

VSS_89

VSS_90

VSS_92

VSS_91

VSS_93

VSS_94

VSS_95

VSS_97

VSS_96

VSS_100

VSS_98

VSS_99

VSS_102

VSS_101

VSS_105

VSS_103

VSS_104

VSS_106

VSS_107

VSS_110

VSS_109

VSS_108

VSS_111

VSS_112

VSS_115

VSS_114

VSS_113

VSS_116

VSS_117

VSS_118

VSS_120

VSS_119

VSS_123

VSS_121

VSS_122

VSS_124

VSS_125

VSS_128

VSS_126

VSS_127

VSS_129

VSS_130

VSS_133

VSS_131

VSS_132

VSS_134

VSS_135

VSS_138

VSS_136

VSS_137

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_146

VSS_144

VSS_145

VSS_147

VSS_148

VSS_151

VSS_150

VSS_149

VSS_152

VSS_153

VSS_156

VSS_155

VSS_154

VSS_157

VSS_158

VSS_159

VSS_161

VSS_160

VSS_162

VSS_1

VSS_2

VSS_3

VSS_5

VSS_4

VSS_6

VSS_7

VSS_8

VSS_10

VSS_9

VSS_11

VSS_12

VSS_15

VSS_13

VSS_14

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_23

VSS_22

VSS_21

VSS_24

VSS_25

VSS_28

VSS_27

VSS_26

VSS_29

VSS_30

VSS_33

VSS_32

VSS_31

VSS_34

VSS_35

VSS_38

VSS_37

VSS_36

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_46

VSS_44

VSS_45

VSS_47

VSS_48

VSS_51

VSS_49

VSS_50

VSS_52

VSS_53

VSS_56

VSS_54

VSS_55

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_63

VSS_62

VSS_64

VSS_65

VSS_66

VSS_69

VSS_68

VSS_67

VSS_70

VSS_71

VSS_74

VSS_73

VSS_72

VSS_75

VSS_76

VSS_79

VSS_78

VSS_77

VSS_80

VSS_81

(4 OF 4)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

LAYOUT NOTE:

TO CONNECT A DIFFERENCTIAL PROBE

TRANSMISSION LINE

RESISTORS TERMINATE THE 55 OHM

LOCATION WHERE THE TWO 54.9 OHM

BETWEEN VCCSENSE AND VSSSENSE AT THE

PROVIDE A TEST POINT (WITH NO STUB)

TO VCCSENSE_P/N WITH NO STUB

LAYOUT NOTE: CONNECT R0802-03

VCCA=1.5 ONLY

0.01UF

CERM

402

20% 16V

C0800

1

2

6.3V

20%

10UF

CERM 805-1

C0801

1

2

1/16W

1%

402

MF-LF

100

R0803

1

2

1/16W

1%

402

MF-LF

100

R0802

1

2

YONAH-SKT

BGA

CPU

OMIT

J0700

A7

B7

AF20

B9

B10

B12

B14

B15

B17

B18

B20

C9

A9

C10

C12

C13

C15

C17

C18

D9

D10

D12

D14

A10

D15

D17

D18

E7

E9

E10

E12

E13

E15

E17

A12

E18

E20

F7

F9

F10

F12

F14

F15

F17

F18

A13

F20

AA7

AA9

AA10

AA12

AA13

AA15

AA17

AA18

AA20

A15

AB9

AC10

AB10

AB12

AB14

AB15

AB17

AB18

AB20

AB7

A17

AC7

AC9

AC12

AC13

AC15

AC17

AC18

AD7

AD9

AD10

A18

AD12

AD14

AD15

AD17

AD18

AE9

AE10

AE12

AE13

AE15

A20

AE17

AE18

AE20

AF9

AF10

AF12

AF14

AF15

AF17

AF18

B26

V6

N6

R21

R6

T21

T6

V21

W21

G21

J6

K6

M6

J21

K21

M21

N21

AF7

AD6

AF5

AE5

AF4

AE3

AF2

AE2

AE7

BGA

YONAH-SKT

CPU

OMIT

J0700

A4

B8

V25

W1

W4

W23

W26

Y3

Y6

Y21

Y24

AA2

B11

AA5

AA8

AA11

AA14

AA16

AA19

AA22

AA25

AB1

AB4

B13

AB8

AB11

AB13

AB16

AB19

AB23

AB26

AC3

AC6

AC8

B16

AC11

AC14

AC16

AC19

AC21

AC24

AD2

AD5

AD8

AD11

B19

AD13

AD16

AD19

AD22

AD25

AE1

AE4

AE8

AE11

AE14

B21

AE16

AE19

AE23

AE26

AF3

AF6

AF8

AF11

AF13

AF16

B24

AF19

AF21

AF24

C5

C8

C11

A8

C14

C16

C19

C2

C22

C25

D1

D4

D8

D11

A11

D13

D16

D19

D23

D26

E3

E6

E8

E11

E14

A14

E16

E19

E21

E24

F5

F8

F11

F13

F16

F19

A16

F2

F22

F25

G4

G1

G23

G26

H3

H6

H21

A19

H24

J2

J5

J22

J25

K1

K4

K23

K26

L3

A23

L6

L21

L24

M2

M5

M22

M25

N1

N4

N23

A26

N26

P3

P6

P21

P24

R2

R5

R22

R25

T1

B6 T4

T23

T26

U3

U6

U21

U24

V2

V5

V22

CPU 2 OF 2-PWR/GND

051-7039

21

8 97

SYNC_DATE=06/29/2006

SYNC_MASTER=M50_HENRY

CPU_VID<1>

CPU_VID<3>

CPU_VID<4>

CPU_VID<6>

CPU_VCCSENSE_P

=PP1V5_S0_CPU

=PPVCORE_S0_CPU

=PP1V5_S0_CPU

CPU_VCCSENSE_N

=PPVCORE_S0_CPU

=PP1V05_S0_CPU

CPU_VID<0>

CPU_VID<2>

CPU_VID<5>

76

11

9

75

8

7

75

5

75

3

75

3

5

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SECONDARY)

PRIMARY)

SECONDARY)

PLACE 6 INSIDE SOCKET

PLACE 8 INSIDE SOCKET CAVITY ON L8 (NORTH SIDE

PLACE 8 INSIDE SOCKET CAVITY ON L8 (SOUTH SIDE

SOUTH SIDE SECONDARY

PRIMARY)

DESIGN FOR 44 CERAMIC AND 3 ELECT BULK 1800UF

VCC CORE DECOUPLING

NEED LARGE BULK FOR 1.05V

PLACE INSIDE SOCKET CAVITY

ON L8 (NORTH SIDE SECONDARY)

VCCP CORE DECOUPLING

CPU HEATSINK MOUNTING HOLES

WE HAD A 330UF ELEC CAP HERE FOR 1.05V RAIL - CHECK WE CAN REMOVE

CAVITY ON L1 (SOUTH SIDE

PLACE 6 INSIDE SOCKET

CAVITY ON L1 (NORTH SIDE

805

X5R

20%

6.3V

22UF

C900

1

2

6.3V

20%

805

X5R

22UF

C996

1

2

6.3V

20%

805

X5R

22UF

C993

1

2

X5R 805

20%

6.3V

22UF

C994

1

2

6.3V

20%

805

X5R

22UF

C995

1

2

6.3V

20%

805

X5R

22UF

C988

1

2

X5R 805

20%

6.3V

22UF

C992

1

2

X5R 805

20%

6.3V

22UF

C991

1

2

6.3V

20%

805

X5R

22UF

C990

1

2

X5R 805

20%

6.3V

22UF

C989

1

2

X5R

20%

22UF

805

6.3V

C941

1

2

805

20%

X5R

6.3V

22UF

C942

1

2

805

20%

X5R

6.3V

22UF

C943

1

2

805

20%

X5R

22UF

6.3V

C944

1

2

805

20%

6.3V

22UF

X5R

C945

1

2

805

20%

X5R

6.3V

22UF

C946

1

2

20%

2.5V TANT D2T

470UF

NOSTUFF

C947

1

23

805

X5R

6.3V

20%

22UF

C901

1

2

X5R

20%

6.3V

22UF

805

C902

1

2

805

X5R

20%

6.3V

22UF

C904

1

2

6.3V

20%

805

22UF

NOSTUFF

X5R

C905

1

2

X5R

6.3V

20%

805

22UF

C906

1

2

805

X5R

6.3V

22UF

20%

C907

1

2

805

X5R

6.3V

20%

22UF

C908

1

2

805

X5R

6.3V

20%

22UF

C909

1

2

805

X5R

6.3V

20%

22UF

C910

1

2

805

X5R

6.3V

20%

22UF

C911

1

2

805

X5R

20%

6.3V

22UF

C912

1

2

805

6.3V X5R

20%

22UF

C913

1

2

X5R

6.3V

20%

805

22UF

NOSTUFF

C914

1

2

X5R

20%

22UF

805

6.3V

NOSTUFF

C915

1

2

22UF

20%

6.3V X5R 805

C916

1

2

X5R

20%

805

6.3V

22UF

NOSTUFF

C917

1

2

805

6.3V

20%

X5R

22UF

C918

1

2

X5R

20%

805

6.3V

22UF

C919

1

2

805

X5R

20%

6.3V

22UF

C920

1

2

20%

805

X5R

22UF

6.3V

C921

1

2

805

20%

X5R

6.3V

22UF

C922

1

2

20%

805

X5R

6.3V

22UF

C923

1

2

805

X5R

20%

6.3V

22UF

C924

1

2

20%

805

X5R

22UF

6.3V

C925

1

2

20%

0.1UF

402

10V CERM

C926

1

2

805

X5R

6.3V

20%

22UF

C928

1

2

805

X5R

6.3V

20%

22UF

C929

1

2

X5R

20%

6.3V

805

22UF

C930

1

2

805

6.3V X5R

22UF

20%

C931

1

2

6.3V X5R

20%

22UF

NOSTUFF

805

C932

1

2

0.1UF

CERM

10V 402

20%

C934

1

2

20%

402

10V CERM

0.1UF

C935

1

2

CERM

10V 402

0.1UF

20%

C936

1

2

20%

0.1UF

402

10V CERM

C937

1

2

CERM

10V 402

0.1UF

20%

C938

1

2

805

X5R

20%

6.3V

22UF

C939

1

2

6.3V X5R

20%

805

22UF

NOSTUFF

C903

1

2

4P75R4

OMIT

ZH607

1

16V

20%

CERM

0.01UF

402

C950

1

2

4P75R4

OMIT

ZH608

1

16V

20%

CERM

0.01UF

402

C951

1

2

4P75R4

OMIT

ZH609

1

16V

20%

CERM

0.01UF

402

C952

1

2

4P75R4

OMIT

ZH610

1

16V

20%

CERM

0.01UF

402

C953

1

2

X5R 805

20%

6.3V

22UF

C999

1

2

6.3V

20%

805

X5R

22UF

C998

1

2

X5R 805

20%

6.3V

22UF

C997

1

2

SYNC_MASTER=M51_HENRY

SYNC_DATE=06/29/2006

21

051-7039

9 97

CPU DECAPS & VID<>

=PPVCORE_S0_CPU

CPU_HS_ZH610CPU_HS_ZH607 CPU_HS_ZH609CPU_HS_ZH608

=PP1V05_S0_CPU

11

76 8 8 7 3

3

www.Vinaﬁx.vn

Preliminary

D+

D-

ALERT*/

THM*

SCLK

SDATA

VDD

GND

THM2*

DXP

SCLK

ALERT*

SDA THM PADGND

VCC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: I2C ADDR:98(1001 100) ON NVIDIA CARD

I2C ADDRESS: 90 (1001 000)

NB HEATSINK TEMPERATURE SENSE

CPU AND GPU REMOTE HEATSINK THERMAL SENSORS

ADD GND GUARD TRACES FOR CPU_THERMD_P/N

I2C ADDR:0x96

I2C ADDR:0x94

LAYOUT NOTE:

I2C ADDR:0x94

NOTE: SYMBOL SHOULD BE SHOWN ADT7461A

CPU INTERNAL DIODE THERMAL SENSOR

IF CPU T DIODE TO BE READ IN OFF STATE,

NOTE:

ROUTE ON SAME LAYER WITH 0.254MM TRACE WIDTH & SPACING.

THEN THIS SHOULD BE S5

MXM CARD TEMPERATURE SENSOR (GPU INTERNAL DIODE)

MAY NOT BE CONSISTENT WITH OTHER CARDS

AMBIENT TEMPERATURE (CPU FAN INTAKE) SENSOR

CPU_TSENS_INT

ADT7461

MSOP

CRITICAL

U1000

6

2

3

5

8

7

4

1

MF-LF

499

1%

1/16W

402

CPU_TSENS_INT

R1002

12

NOSTUFF

0.001UF

50V

402

CERM

10%

C1000

1

2

CPU_TSENS_INT

16V

10%

X5R

0.1UF

402

C1001

1

2

499

CPU_TSENS_INT

1/16W

1%

MF-LF

402

R1017

12

1/16W

CPU_TSENS_INT

5%

MF-LF 402

10K

R1001

1

2

402

5%

MF-LF

10K

1/16W

CPU_TSENS_INT

R1000

1

2

GPU_TSENS_INT

5%

1/16W

0

R1060

12

GPU_TSENS_INT

0

1/16W

5%

R1061

12

M-ST-SM

GPU_TSENS_EXT

53398-05

CRITICAL

J1050

1

3

4

5

6

7

402

20%

0.1UF

10V CERM

CPU_TSENS_EXT

C1012

1

2

20%

CERM

16V

NOSTUFF

0.01UF

402

C1010

12

0.01UF

40216V

20%

CERM

NOSTUFF

C1011

12

GPU_TSENS_EXT

0.1UF

20% 10V

402

CERM

C1052

1

2

0.01UF

402

CERM

16V

NOSTUFF

20%

C1050

12

20%

NOSTUFF

16V

CERM

402

0.01UF

C1051

12

NB_TSENS_EXT

MAX6642ATT90

CRITICAL

TDFN

U1080

6

3

2

4

5

7

1

NOSTUFF

MF-LF

402

0

5%

1/16W

R1005

12

402

0.1UF

X5R

10% 16V

NB_TSENS_EXT

C1080

1

2

NB_TSENS_EXT

MF-LF

5%

1/16W

47

402

R1080

12

CERM

50V

402

0.0022uF

10%

NB_TSENS_EXT

C1082

1

2

SM

OMIT

XW1080

12

CRITICAL

SM-2MT-BLK-LF

NB_TSENS_EXT

J1080

3

4

1

2

5%

1/16W

0

NB_TSENS_EXT

R1085

12

NB_TSENS_EXT

0

1/16W

5%

R1086

12

M-RT-SM

CPU_TSENS_EXT

CRITICAL

HS8804F-B

J1000

5

6

1

2

3

4

53398-05

M-ST-SM

AMB_TSENS

CRITICAL

J1070

2

3

4

5

6

7

AMB_TSENS

CERM 402

10V

20%

0.1UF

C1072

1

2

NOSTUFF

20% 16V

CERM

402

0.01UF

C1070

12

0.01UF

402

CERM

16V

NOSTUFF

20%

C1071

12

1/16W

10K

MF-LF

5%

402

NB_TSENS_EXT

R1087

1

2

ASIC TEMP SENSORS

SYNC_DATE=(MASTER)

051-7039

21

10 97

SYNC_MASTER=M51_DAVE

THERM_DX_N

THRM_ALERT_L

THRM_THM

=SMB_THRM_CLK

=SMB_THRM_DATA

PP3V3_S0

GND_CHASSIS_CPU_TEMP

SMB_GPU_THRM_DATA

GND_CHASSIS_AMB_TEMP

PP3V3_S0

SMB_GPU_THRM_CLK

=SMB_GPU_THRM_CLK

=SMB_GPU_THRM_DATA

GND_CHASSIS_AMB_TEMP

=SMB_AMB_TEMP_CLK

=SMB_AMB_TEMP_DATA

GND_CHASSIS_GPU_TEMP

=SMB_GPU_HS_THRM_CLK

=SMB_GPU_HS_THRM_DATA

=SMB_CPU_HS_THRM_CLK

CPU_THERMD_P

GND_CHASSIS_CPU_TEMP

CPU_THERMD_N

THERM_DX_P

PM_THRM_L

=SMB_CPU_HS_THRM_DATA

PP3V3_S0

=SMB_NB_HS_THRM_DATA

=SMB_NB_HS_THRM_CLK

NB_TSENS_HS_DXN

U1080_VCC

SMB_U1080_SDA

U1080_ALERT

SMB_U1080_SCL

NB_TSENS_HS_DXP

84

83

76

41

27

26

10

6

5

10

5

10

58

5

27

3

6

85

10

3

85 27

27

10

27

6

27

7

6

7

23

27

3

27

5

www.Vinaﬁx.vn

Preliminary

OUT

IN

IO

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX

ITP TCK SIGNAL LAYOUT NOTE:

THAT MAY IMPACT ITP FUNCTIONALITY

P7 HAS OTHER PULL UP RESISTORS

(FROM CK410M HOST 133/167MHZ)

(DEBUG PORT RESET)

(AND WITH RESET BUTTON)

TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC

INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.

NC

(DBA#)

(DBR#)

(DEBUG PORT ACTIVE)

CPU ITP700FLEX DEBUG SUPPORT

(FBO)

(TCK)

518S0320

ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S

CONNECTOR’S FBO PIN.

ITP

402

1/16W

1%

22.6

MF-LF

R1100

12

22.6

MF-LF

1/16W

1%

402

ITP

R1102

12

MF-LF

ITP

402

1% 1/16W

54.9

R1103

1

2

ITP

0.1UF

10% X5R

402

16V

C1100

1

2

ITP

1/16W

5%

MF-LF 402

240

R1104

1

2

DEVELOPMENT

52435-2872

F-RT-SM

J1101

1

10

11

12

13

14

15

16

17

18

19

2

20

21

22

23

24

25

26

27

28

29

3

30

4

5

6

7

8

9

1/16W MF-LF

1%

54.9

402

R1101

1

2

MF-LF

1/16W

5%

402

680

R1106

1

2

SYNC_MASTER=M50_HENRY

9711

21

051-7039

SYNC_DATE=06/29/2006

CPU ITP700FLEX DEBUG

XDP_DBRESET_L

XDP_TRST_L

XDP_BPM_L<0>

XDP_BPM_L<1>

XDP_BPM_L<3>

XDP_TCK

CPU_XDP_CLK_N CPU_XDP_CLK_P

XDP_TCK

XDP_TMS

XDP_TDI

XDP_BPM_L<2>

XDP_BPM_L<4>

XDP_BPM_L<5>

=PP1V05_S0_CPU

=PP3V3_S5_SB_PM

ITP_TDO

ITPRESET_L

XDP_TDO

FSB_CPURST_L

=PP1V05_S0_CPU

11

11 9 9

26

11

8

12

8

7

23

7

5

3

5

3

www.Vinaﬁx.vn

Preliminary

IO

OUT

IO

OUT

IO

OUT

IO

IN

IO

IN

IO

HD4*

HD6*

HD16*

HTRDY*

HSLPCPU*

HRS1*

HRS0*

HHITM*

HLOCK*

HHIT*

HDSTBP2*

HDTSBP3*

HDSTBP1*

HDSTBP0*

HDSTBN3*

HDSTBN1*

HDSTBN2*

HDSTBN0*

HDINV2*

HDINV3*

HDINV1*

HDINV0*

HDVREF

HDRDY*

HDPWR*

HDEFER*

HDBSY*

HCPURST*

HBREQ0*

HBPRI*

HBNR*

HAVREF

HCLKIN*

HCLKIN

HYSWING

HYRCOMP HYSCOMP

HXSWING

HXSCOMP

HXRCOMP

HA13*

HADS*

HADSTB0*

HD3*

HD2*

HD1*

HD0*

HD63*

HD62*

HD61*

HD60*

HD59*

HD58*

HD57*

HD56*

HD55*

HD54*

HD53*

HD52*

HD51*

HD50*

HD49*

HD48*

HD47*

HD46*

HD45*

HD44*

HD43*

HD42*

HD41*

HD40*

HD39*

HD38*

HD37*

HD36*

HD35*

HD34*

HD33*

HD32*

HD31*

HD29*

HD28*

HD27*

HD26*

HD25*

HD24*

HD23*

HD22*

HD21*

HD20*

HD19*

HD18*

HD17*

HD15*

HD10*

HD11* HD12*

HD13*

HD14*

HD5*

HD7*

HD8* HD9*

HA30*

HA29*

HA28*

HA27*

HA26*

HA25*

HA24*

HA23*

HA31*

HA20*

HA19*

HA18*

HA16*

HA15*

HA14*

HA21*

HA22*

HA17*

HA9*

HA8*

HA7*

HA6*

HA5*

HA4*

HA3*

HA10*

HA11* HA12*

HADSTB1*

HREQ0*

HREQ1*

HREQ2* HREQ3*

HD30*

HREQ4*

HRS2*

(1 OF 10)

HOST

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

0.1uF

10% 16V X5R 402

C1211

1

2

402

MF-LF

1/16W

1%

200

R1211

1

2

402

MF-LF

1/16W

1%

100

R1210

1

2

402

MF-LF

1/16W

1%

54.9

R1220

1

2

24.9

1% 1/16W MF-LF

402

R1221

1

2

402

MF-LF

1/16W

1%

221

R1225

1

2

100

402

MF-LF

1/16W

1%

R1226

1

2

10% 16V X5R 402

0.1uF

C1226

1

2

0.1uF

10% 16V X5R 402

C1236

1

2

402

MF-LF

1/16W

1%

221

R1235

1

2

402

MF-LF

1/16W

1%

54.9

R1230

1

2

100

402

MF-LF

1/16W

1%

R1236

1

2

24.9

1% 1/16W MF-LF

402

R1231

1

2

OMIT

945GM

NB

BGA

U1200

H11

J12

G14

D9

J14

H13

J15

F14

D12

A11

C11

A12

A13

E13

G13

F12

B12

B14

C12

A14

H9

C14

D14

C9

E11

G11

F11

G12

F9

E8

B9

C13

J13

C6

F6

C7

AG2

AG1

B7

F1

J1

K7

J8

H4

J3

K11

G4

T10

W11

T3

U7

H1

U9

U11

T11

W9

T1

T8

T4

W7

U5

T9

J6

W6

T5

AB7

AA9

W4

W3

Y3

Y7

W5

Y10

H3

AB8

W2

AA4

AA7

AA2

AA6

AA10

Y8

AA1

AB4

K2

AC9

AB11

AC11

AB3

AC2

AD1

AD9

AC1

AD7

AC6

G1

AB5

AD10

AD4

AC8

G2

K9

K1

A7

C3

J7

W8

U3

AB10

J9

H8

K4

T7

Y5

AC4

K3

T6

AA5

AC5

K13

D3

D4

B3

D8

G8

B8

F8

A8

B4

E6

D6

E3

E7

E1

E2

E4

Y1

U1

W1

051-7039

9712

21

NB CPU Interface

SYNC_DATE=06/29/2006

SYNC_MASTER=M50_HENRY

NB_FSB_XRCOMP

=PP1V05_S0_FSB_NB

FSB_RS_L<2>

FSB_REQ_L<4>

FSB_D_L<30>

FSB_REQ_L<3>

FSB_REQ_L<2>

FSB_REQ_L<1>

FSB_REQ_L<0>

FSB_ADSTB_L<1>

FSB_A_L<12>

FSB_A_L<11>

FSB_A_L<10>

FSB_A_L<3>

FSB_A_L<4> FSB_A_L<5>

FSB_A_L<6> FSB_A_L<7>

FSB_A_L<8>

FSB_A_L<9>

FSB_A_L<17>

FSB_A_L<22>

FSB_A_L<21>

FSB_A_L<14>

FSB_A_L<15> FSB_A_L<16>

FSB_A_L<18>

FSB_A_L<19>

FSB_A_L<20>

FSB_A_L<31>

FSB_A_L<23> FSB_A_L<24>

FSB_A_L<25>

FSB_A_L<26> FSB_A_L<27>

FSB_A_L<28>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<15>

FSB_D_L<18>

FSB_D_L<19>

FSB_D_L<20> FSB_D_L<21>

FSB_D_L<22>

FSB_D_L<23> FSB_D_L<24>

FSB_D_L<25> FSB_D_L<26>

FSB_D_L<27>

FSB_D_L<28> FSB_D_L<29>

FSB_D_L<31> FSB_D_L<32>

FSB_D_L<33>

FSB_D_L<34> FSB_D_L<35>

FSB_D_L<36> FSB_D_L<37>

FSB_D_L<38>

FSB_D_L<39> FSB_D_L<40>

FSB_D_L<41>

FSB_D_L<42> FSB_D_L<43>

FSB_D_L<44>

FSB_D_L<45> FSB_D_L<46>

FSB_D_L<47> FSB_D_L<48>

FSB_D_L<49>

FSB_D_L<50> FSB_D_L<51>

FSB_D_L<52>

FSB_D_L<53> FSB_D_L<54>

FSB_D_L<55>

FSB_D_L<56> FSB_D_L<57>

FSB_D_L<58> FSB_D_L<59>

FSB_D_L<60>

FSB_D_L<61> FSB_D_L<62>

FSB_D_L<63>

FSB_ADSTB_L<0>

FSB_ADS_L

FSB_A_L<13>

NB_FSB_XSCOMP

NB_FSB_XSWING

NB_FSB_YSCOMP

NB_FSB_YRCOMP

NB_FSB_YSWING

FSB_CLK_NB_P

FSB_CLK_NB_N

FSB_BNR_L FSB_BPRI_L

FSB_BREQ0_L

FSB_DBSY_L

FSB_DEFER_L

FSB_DPWR_L FSB_DRDY_L

FSB_DINV_L<3>

FSB_DSTBN_L<1>

FSB_DSTBP_L<0>

FSB_HIT_L

FSB_LOCK_L

FSB_HITM_L

FSB_RS_L<0>

FSB_RS_L<1>

FSB_SLPCPU_L

FSB_TRDY_L

FSB_D_L<16>

FSB_D_L<0>

FSB_D_L<3>

FSB_D_L<7>

FSB_D_L<8>

FSB_D_L<9> FSB_D_L<10>

FSB_D_L<6>

FSB_D_L<5>

FSB_D_L<4>

FSB_D_L<2>

FSB_D_L<1>

FSB_DINV_L<2>

FSB_DINV_L<1>

FSB_DSTBN_L<0>

FSB_DINV_L<0>

FSB_DSTBP_L<3>

FSB_DSTBP_L<2>

FSB_DSTBP_L<1>

FSB_DSTBN_L<3>

FSB_DSTBN_L<2>

FSB_D_L<17>

NB_FSB_VREF

FSB_A_L<30>

FSB_A_L<29>

FSB_CPURST_L

12

3

7

34

7

www.Vinaﬁx.vn

Preliminary

CRT_BLUE*

CRT_BLUE

CRT_GREEN*

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED*

HSYNC

CRT_DDC_DATA

CRT_VSYNC

CRT_IREF

TV_IRTNC

TV_IRTNB

TV_IREF

TV_IRTNA

TV_DACB_OUT

TV_DACC_OUT

TV_DACA_OUT

LB_DATA2

LB_DATA1

LB_DATA0

LB_DATA2*

LB_DATA1*

LB_DATA0*

LA_DATA2

LA_DATA1

LA_DATA0

LA_DATA2*

LA_DATA1*

LA_DATA0*

LB_CLK

LB_CLK*

LA_CLK

LA_CLK*

L_VDDEN

L_VREFL

L_VREFH

L_VBG

L_IBG

L_DDC_CLK

L_DDC_DATA

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN0

EXP_A_RXN1

EXP_A_RXN2

EXP_A_RXN3

EXP_A_RXN4

EXP_A_RXN5

EXP_A_RXN6

EXP_A_RXN7

EXP_A_RXN8

EXP_A_RXN9

EXP_A_RXN10

EXP_A_RXN11

EXP_A_RXN12

EXP_A_RXN13

EXP_A_RXN15

EXP_A_RXN14

EXP_A_RXP0

EXP_A_RXP1

EXP_A_RXP2

EXP_A_RXP4

EXP_A_RXP3

EXP_A_RXP5

EXP_A_RXP6

EXP_A_RXP7

EXP_A_RXP10

EXP_A_RXP9

EXP_A_RXP8

EXP_A_RXP11

EXP_A_RXP12

EXP_A_RXP14

EXP_A_RXP13

EXP_A_RXP15

EXP_A_TXN1

EXP_A_TXN0

EXP_A_TXN3

EXP_A_TXN2

EXP_A_TXN6

EXP_A_TXN5

EXP_A_TXN4

EXP_A_TXN7

EXP_A_TXN8

EXP_A_TXN9

EXP_A_TXN10

EXP_A_TXN11

EXP_A_TXN12

EXP_A_TXN14

EXP_A_TXN13

EXP_A_TXN15

EXP_A_TXP0

EXP_A_TXP2

EXP_A_TXP1

EXP_A_TXP3

EXP_A_TXP4

EXP_A_TXP5

EXP_A_TXP7

EXP_A_TXP6

EXP_A_TXP8

EXP_A_TXP9

EXP_A_TXP10

EXP_A_TXP12

EXP_A_TXP11

EXP_A_TXP13

EXP_A_TXP14

EXP_A_TXP15

L_CLKCTLB

L_BKLTEN

L_CLKCTLA

L_BKLTCTL

(3 OF 10)

LVDS

TV

VGA

PCI-EXPRESS GRAPHICS

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

IO

OUT

IN

OUT

IN

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SDVO_FLDSTALL#

SDVO Alternate Function

SDVO_TVCLKIN# SDVO_INT#

SDVO_TVCLKIN

SDVO_INT SDVO_FLDSTALL

SDVOB_GREEN

SDVOB_RED

SDVOC_CLKN

SDVOC_BLUE#

SDVOC_GREEN#

SDVOC_RED#

SDVOB_CLKN

SDVOB_BLUE#

SDVOB_GREEN#

SDVOB_RED#

SDVOB_CLKP

SDVOB_BLUE

SDVOC_RED SDVOC_GREEN

SDVOC_BLUE

SDVOC_CLKP

Otherwise, tie VCCD_LVDS to GND also.

LVDS Disable

VCCD_LVDS must remain powered with proper decoupling.

Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie

filtering components. Unused DAC outputs should

Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.

VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.

rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.

Component: DACA, DACB & DACC

Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and

connect to GND through 75-ohm resistors.

S-Video: DACB & DACC only

Unused DAC outputs must remain powered, but can omit

HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core

TV-Out Signal Usage:

Composite: DACA only

TV-Out Disable

CRT Disable

Can leave all signals NC if LVDS is not implemented Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used

BGA

NB

945GM

OMIT

U1200

E23

D23

C26

C25

C22

B22

J22

A21

B21

H23

D40

D38

F34

G38

V34

W38

Y34

AA38

AB34

AC38

H34

J38

L34

M38

N34

P38

R34

T38

D34

F38

T34

V38

W34

Y38

AA34

AB38

G34

H38

J34

L38

M34

N38

P34

R38

F36

G40

V36

W40

Y36

AA40

AB36

AC40

H36

J40

L36

M40

N36

P40

R36

T40

D36

F40

T36

V40

W36

Y40

AA36

AB40

G36

H40

J36

L40

M36

N40

P36

R40

G23

D32

J30

H30

H29

G26

G25

B38

C35

F32

C33

C32

A32

A33

B37

C37

B34

B35

A36

A37

E26

E27

F30

G30

D29

D30

F28

F29

A16

C18

A19

J20

B16

B18

B19

402

MF-LF

1/16W

1%

24.9

R1310

1

2

051-7039

21

9713

SYNC_MASTER=M50_HENRY

SYNC_DATE=06/29/2006

NB PEG / Video Interfaces

TV_DACA_OUT

TV_DACB_OUT TV_DACC_OUT

TV_IREF

TV_IRTNA TV_IRTNB

TV_IRTNC

CRT_BLUE_L

CRT_BLUE

CRT_GREEN_L

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED_L

CRT_DDC_DATA

CRT_IREF

LVDS_B_DATA_P<2>

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<0>

LVDS_B_DATA_N<2>

LVDS_B_DATA_N<1>

LVDS_B_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_A_DATA_P<1>

LVDS_A_DATA_P<0>

LVDS_A_DATA_N<2>

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<0>

LVDS_B_CLK_P

LVDS_B_CLK_N

LVDS_A_CLK_P

LVDS_A_CLK_N

LVDS_VDDEN

LVDS_VREFL

LVDS_VREFH

TP_LVDS_VBG

LVDS_IBG

LVDS_DDC_CLK LVDS_DDC_DATA

PEG_COMP

PEG_D2R_N<0> PEG_D2R_N<1>

PEG_D2R_N<2>

PEG_D2R_P<0>

PEG_D2R_P<2>

PEG_D2R_P<4>

PEG_D2R_P<3>

PEG_D2R_P<5>

PEG_D2R_P<6>

PEG_D2R_P<7>

PEG_D2R_P<10>

PEG_D2R_P<9>

PEG_D2R_P<8>

PEG_D2R_P<11>

PEG_D2R_P<12>

PEG_D2R_P<14>

PEG_D2R_P<13>

PEG_D2R_P<15>

PEG_R2D_C_N<1>

PEG_R2D_C_N<0>

PEG_R2D_C_N<3>

PEG_R2D_C_N<2>

PEG_R2D_C_P<0>

PEG_R2D_C_P<2>

PEG_R2D_C_P<1>

PEG_R2D_C_P<3>

PEG_R2D_C_P<4> PEG_R2D_C_P<5>

PEG_R2D_C_P<7>

PEG_R2D_C_P<6>

PEG_R2D_C_P<8>

PEG_R2D_C_P<9>

PEG_R2D_C_P<10>

PEG_R2D_C_P<12>

PEG_R2D_C_P<11>

PEG_R2D_C_P<13> PEG_R2D_C_P<14>

PEG_R2D_C_P<15>

LVDS_BKLTEN

=PP1V5_S0_NB_PCIE

LVDS_CLKCTLB

CRT_VSYNC_R

CRT_HSYNC_R

PEG_D2R_P<1>

LVDS_CLKCTLA

LVDS_BKLTCTL

PEG_D2R_N<15>

PEG_D2R_N<11> PEG_D2R_N<12>

PEG_D2R_N<13>

PEG_D2R_N<14>

PEG_D2R_N<7>

PEG_D2R_N<9>

PEG_D2R_N<3> PEG_D2R_N<4>

PEG_D2R_N<5>

PEG_D2R_N<6>

PEG_D2R_N<8>

PEG_D2R_N<10>

PEG_R2D_C_N<6>

PEG_R2D_C_N<5>

PEG_R2D_C_N<4>

PEG_R2D_C_N<7>

PEG_R2D_C_N<8>

PEG_R2D_C_N<9> PEG_R2D_C_N<10>

PEG_R2D_C_N<11> PEG_R2D_C_N<12>

PEG_R2D_C_N<14>

PEG_R2D_C_N<13>

PEG_R2D_C_N<15>

84

19

5

3

19

5

19

5

www.Vinaﬁx.vn

Preliminary

SM_CS0*

RSVD15

RSVD14

SM_CKE2

RSVD2

RSVD3

RSVD6

RSVD4

RSVD5

RSVD8

RSVD7

RSVD9

RSVD1

RSVD10

RSVD11

RSVD12

RSVD13

CFG1

CFG0

CFG2

CFG3

CFG4

CFG6

CFG5

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG14

CFG17

CFG16

CFG15

CFG18

CFG19

CFG20

PM_BM_BUSY*

PM_EXTTS0*

PM_EXTTS1*

PW_THRMTRIP*

PWROK

RSTIN*

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC*

CLK_REQ*

NC2

NC3

NC4

NC5

NC6

NC7

NC8

NC9

NC0

NC1

NC13

NC12

NC11

NC10

NC18

NC17

NC16

NC15

NC14

SM_CK0

SM_CK1

SM_CK2

SM_CK0*

SM_CK3

SM_CK1*

SM_CK2*

SM_CK3*

SM_CKE0

SM_CKE1

SM_CKE3

SM_CS1*

SM_CS2*

SM_CS3*

SMOCDCOMP0

SMOCDCOMP1

SM_ODT1

SM_ODT0

SM_ODT2

SMRCOMP*

SM_ODT3

SMRCOMP

SMVREF0

SMVREF1

G_CLKIN*

G_CLKIN

D_REFCLKIN*

D_REFCLKIN

D_REFSSCLKIN*

D_REFSSCLKIN

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP2

DMI_TXP1

DMI_TXP3

DDR MUXING

CFG

NC PM

CLKDMI

MISC

(2 OF 10)

RSVD

IN

OUT

IN

IO

OUT

IN

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

IPU

NC

IPU IPU

IPU

IPU IPU

IPU

IPD

IPU

NC

(D_PLLMON1#)

(VSS_MCHDETECT)

(H_PCREQ#)

(H_PLLMON1#)

(H_PLLMON1)

(TV_DCONSEL1)

(TV_DCONSEL0)

(TESTIN#)

(H_PROCHOT#)

(D_PLLMON1)

(H_EDRDY#)

(LB_DATAP3)

(LB_DATAN3)

(LA_DATAP3)

(LA_DATAN3)

IPD

NC

OMIT

945GM

NB

BGA

U1200

K16

K18

E16

D15

G15

K15

C15

H16

G18

H15

J25

K27

J18

J26

F18

E15

F15

E18

D19

D16

G16

H32

A26

A27

D41

C40

AE35

AF39

AG35

AH39

AC35

AE39

AF35

AG39

AE37

AF41

AG37

AH41

AC37

AE41

AF37

AG41

AG33

AF33

K28

D1

C41

B2

AY41

AY1

AW41

AW1

A40

A4

A39

A3

C1

BA41

BA40

BA39

BA3

BA2

BA1

B41

G28

F25

H26

G6

AH33

AH34

T32

J29

A41

A35

A34

D28

D27

R32

F3

F7

AG11

AF11

H7

J19

K30

H28

H27

AY35

AW35

AR1

AT1

AW7

AY7

AW40

AY40

AU20

AT20

BA29

AY29

AW13

AW12

AY21

AW21

BA13

BA12

AY20

AU21

AL20

AF10

AT9

AV9

AK1

AK41

100

5% 1/16W MF-LF

402

R1430

12

1/16W MF-LF

5%

402

10K

R1441

1

2

MF-LF

1/16W

5%

402

10K

R1440

1

2

20% 10V CERM 402

0.1uF

C1416

1

2

20% 10V

CERM

402

0.1uF

C1415

1

2

80.6

MF-LF 402

1% 1/16W

R1410

1

2

80.6

MF-LF 402

1% 1/16W

R1411

1

2

10K

MF-LF

402

5%

1/16W

R1420

1

2

14 97

21

051-7039

NB Misc Interfaces

SYNC_DATE=06/29/2006

SYNC_MASTER=M50_HENRY

TP_NB_RSVD4_F7

TP_NB_RSVD3_F3

PM_EXTTS_L

NB_RST_IN_L_R

CLK_NB_OE_L

NB_CLK_DREFCLKIN_N

NB_CLK_DREFCLKIN_P

NB_CLK_DREFSSCLKIN_N NB_CLK_DREFSSCLKIN_P

=PP3V3_S0_NB

NB_TV_DCONSEL1

NB_TV_DCONSEL0

TP_NB_XOR_LVDS_A35

TP_NB_TESTIN_L

PM_DPRSLPVR

=PP3V3_S0_NB

NB_CFG<18>

NB_CFG<13>

NB_CFG<11>

NB_CFG<8>

NB_RST_IN_L

DMI_N2S_P<3>

DMI_N2S_P<1> DMI_N2S_P<2>

DMI_N2S_P<0>

DMI_N2S_N<3>

DMI_N2S_N<2>

DMI_N2S_N<1>

DMI_N2S_N<0>

DMI_S2N_P<3>

DMI_S2N_P<2>

DMI_S2N_P<1>

DMI_S2N_P<0>

DMI_S2N_N<3>

DMI_S2N_N<2>

DMI_S2N_N<1>

DMI_S2N_N<0>

NB_CLK100M_GCLKIN_P

NB_CLK100M_GCLKIN_N

MEM_ODT<3>

MEM_ODT<0>

MEM_CKE<3>

MEM_CKE<1>

MEM_CKE<0>

MEM_CLK_N<3>

MEM_CLK_N<2>

MEM_CLK_N<1>

MEM_CLK_P<3>

MEM_CLK_N<0>

MEM_CLK_P<2>

MEM_CLK_P<1>

MEM_CLK_P<0>

NB_SB_SYNC_L

SDVO_CTRLDATA

SDVO_CTRLCLK

VR_PWRGOOD_DELAY

PM_THRMTRIP_L

PM_BMBUSY_L

NB_CFG<20>

NB_CFG<19>

NB_CFG<15> NB_CFG<16>

NB_CFG<17>

NB_CFG<14>

NB_CFG<10>

NB_CFG<9>

NB_CFG<7>

NB_CFG<5>

NB_CFG<6>

NB_CFG<4>

NB_CFG<3>

NB_BSEL<2>

NB_BSEL<0>

MEM_CS_L<0>

NB_CFG<12>

MEM_ODT<2>

MEM_ODT<1>

MEM_CS_L<3>

MEM_CS_L<2>

MEM_CS_L<1>

MEM_CKE<2>

=PP1V8_S3_MEM_NB

MEM_RCOMP_L

MEM_RCOMP

MEM_VREF_NB_0 MEM_VREF_NB_1

TP_NB_XOR_LVDS_A34 TP_NB_XOR_LVDS_D28

TP_NB_XOR_LVDS_D27

TP_NB_XOR_FSB2_H7

NB_BSEL<1>

20

75

20

75

19

59

14

23

14

22

30

26

30

16

58

5

33

19

3

5

3

20

5

6

22

5

22

5

22

5

22

5

34

29

28

29

28

29

28

29

28

29

28

22

19

5

23

20

5

20

5

20

5

34

28

5

29

28

29

28

29

3

34

www.Vinaﬁx.vn

Preliminary

SA_DQ1

SA_DQ0

SA_DQ2

SA_DQ3

SA_DQ4

SA_DQ5

SA_DQ6

SA_DQ7

SA_DQ8

SA_DQ9

SA_DQ10

SA_DQ12

SA_DQ11

SA_DQ13

SA_DQ14

SA_DQ15

SA_DQ16

SA_DQ17

SA_DQ18

SA_DQ19

SA_DQ20

SA_DQ21

SA_DQ22

SA_DQ23

SA_DQ24

SA_DQ25

SA_DQ26

SA_DQ27

SA_DQ29

SA_DQ28

SA_DQ30

SA_DQ31

SA_DQ32

SA_DQ33

SA_DQ35

SA_DQ34

SA_DQ36

SA_DQ37

SA_DQ38

SA_DQ39

SA_DQ40

SA_DQ41

SA_DQ42

SA_DQ43

SA_DQ44

SA_DQ46

SA_DQ45

SA_DQ47

SA_DQ48

SA_DQ49

SA_DQ50

SA_DQ51

SA_DQ52

SA_DQ53

SA_DQ54

SA_DQ55

SA_DQ56

SA_DQ57

SA_DQ58

SA_DQ59

SA_DQ60

SA_DQ61

SA_DQ62

SA_DQ63

SA_BS1

SA_BS0

SA_BS2

SA_CAS*

SA_DM0

SA_DM1

SA_DM2

SA_DM3

SA_DM5

SA_DM4

SA_DM7

SA_DM6

SA_DQS0

SA_DQS2

SA_DQS1

SA_DQS3

SA_DQS5

SA_DQS4

SA_DQS6

SA_DQS7

SA_DQS3*

SA_DQS2*

SA_DQS4*

SA_DQS5*

SA_DQS6*

SA_DQS7*

SA_MA1

SA_MA0

SA_MA2

SA_MA3

SA_MA5

SA_MA4

SA_MA6

SA_MA7

SA_MA9

SA_MA8

SA_MA10

SA_MA11

SA_MA12

SA_MA13

SA_RAS*

SA_RCVENIN*

SA_RCVENOUT*

SA_WE*

SA_DQS1*

SA_DQS0*

(4 OF 10)

DDR SYSTEM MEMORY A

IO

OUT

IO

OUT

IO

IO IO

IO

SB_DQ1

SB_DQ0

SB_DQ2

SB_DQ3

SB_DQ4

SB_DQ5

SB_DQ6

SB_DQ7

SB_DQ8

SB_DQ9

SB_DQ10

SB_DQ12

SB_DQ11

SB_DQ13

SB_DQ14

SB_DQ15

SB_DQ16

SB_DQ17

SB_DQ18

SB_DQ19

SB_DQ20

SB_DQ21

SB_DQ22

SB_DQ23

SB_DQ24

SB_DQ25

SB_DQ26

SB_DQ27

SB_DQ29

SB_DQ28

SB_DQ30

SB_DQ31

SB_DQ32

SB_DQ33

SB_DQ35

SB_DQ34

SB_DQ36

SB_DQ37

SB_DQ38

SB_DQ39

SB_DQ40

SB_DQ41

SB_DQ42

SB_DQ43

SB_DQ44

SB_DQ46

SB_DQ45

SB_DQ47

SB_DQ48

SB_DQ49

SB_DQ50

SB_DQ51

SB_DQ52

SB_DQ53

SB_DQ54

SB_DQ55

SB_DQ56

SB_DQ57

SB_DQ58

SB_DQ59

SB_DQ60

SB_DQ61

SB_DQ62

SB_DQ63

SB_BS1

SB_BS0

SB_BS2

SB_CAS*

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM5

SB_DM4

SB_DM7

SB_DM6

SB_DQS0

SB_DQS2

SB_DQS1

SB_DQS3

SB_DQS5

SB_DQS4

SB_DQS6

SB_DQS7

SB_DQS3*

SB_DQS2*

SB_DQS4*

SB_DQS5*

SB_DQS6*

SB_DQS7*

SB_MA1

SB_MA0

SB_MA2

SB_MA3

SB_MA5

SB_MA4

SB_MA6

SB_MA7

SB_MA9

SB_MA8

SB_MA10

SB_MA11

SB_MA12

SB_MA13

SB_RAS*

SB_RCVENIN*

SB_RCVENOUT*

SB_WE*

SB_DQS1*

SB_DQS0*

(5 OF 10)

DDR SYSTEM MEMORY B

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

BGA

945GM

NB

OMIT

U1200

AU12

AV14

BA20

AY13

AJ33

AM35

AL26

AN22

AM14

AL9

AR3

AH4

AJ35

AJ34

AR31

AP31

AN38

AM36

AM34

AN33

AK26

AL27

AM26

AN24

AM31

AK28

AL28

AM24

AP26

AP23

AL22

AP21

AN20

AL23

AP24

AM33

AP20

AT21

AR12

AR14

AP13

AP12

AT13

AT12

AL14

AL12

AJ36

AK9

AN7

AK8

AK7

AP9

AN9

AT5

AL5

AY2

AW2

AK35

AP1

AN2

AV2

AT3

AN1

AL2

AG7

AF9

AG4

AF6

AJ32

AG9

AH6

AF4

AF8

AH31

AN35

AP33

AK33

AK32

AT33

AU33

AN28

AN27

AM22

AM21

AN12

AM12

AN8

AL8

AP3

AN3

AG5

AH5

AY16

AU14

AU13

AT17

AV20

AV12

AW16

BA16

BA17

AU16

AV17

AU17

AW17

AT16

AW14

AK23

AK24

AY14

BGA

945GM

NB

OMIT

U1200

AT24

AV23

AY28

AR24

AK36

AR38

AT36

BA31

AL17

AH8

BA5

AN4

AK39

AJ37

AU38

AV38

AP38

AR40

AW38

AY38

BA38

AV36

AR36

AP36

AP39

BA36

AU36

AP35

AP34

AY33

BA33

AT31

AU29

AU31

AW31

AR41

AV29

AW29

AM19

AL19

AP14

AN14

AN17

AM16

AP15

AL15

AJ38

AJ11

AH10

AJ9

AN10

AK13

AH11

AK10

AJ8

BA10

AW10

AK38

BA4

AW4

AY10

AY9

AW5

AY5

AV4

AR5

AK4

AK3

AN41

AT4

AK5

AJ5

AJ3

AP41

AT40

AV41

AM39

AM40

AT39

AU39

AU35

AT35

AR29

AP29

AR16

AP16

AR10

AT10

AR7

AT7

AN5

AP5

AY23

AW24

AV24

BA27

AY27

AR23

AY24

AR28

AT27

AT28

AU27

AV28

AV27

AW27

AU23

AK16

AK18

AR27

SYNC_DATE=06/29/2006

SYNC_MASTER=M50_HENRY

NB DDR2 Interfaces

051-7039

21

9715

MEM_B_DQ<1>

MEM_B_DQ<0>

MEM_B_DQ<2>

MEM_B_DQ<3>

MEM_B_DQ<4> MEM_B_DQ<5>

MEM_B_DQ<6>

MEM_B_DQ<7> MEM_B_DQ<8>

MEM_B_DQ<9> MEM_B_DQ<10>

MEM_B_DQ<12>

MEM_B_DQ<11>

MEM_B_DQ<13>

MEM_B_DQ<14>

MEM_B_DQ<15> MEM_B_DQ<16>

MEM_B_DQ<17>

MEM_B_DQ<18> MEM_B_DQ<19>

MEM_B_DQ<20> MEM_B_DQ<21>

MEM_B_DQ<22>

MEM_B_DQ<23> MEM_B_DQ<24>

MEM_B_DQ<25>

MEM_B_DQ<26> MEM_B_DQ<27>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<30>

MEM_B_DQ<31> MEM_B_DQ<32>

MEM_B_DQ<33>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQ<36>

MEM_B_DQ<37> MEM_B_DQ<38>

MEM_B_DQ<39>

MEM_B_DQ<40> MEM_B_DQ<41>

MEM_B_DQ<42> MEM_B_DQ<43>

MEM_B_DQ<44>

MEM_B_DQ<46>

MEM_B_DQ<45>

MEM_B_DQ<47>

MEM_B_DQ<48> MEM_B_DQ<49>

MEM_B_DQ<50>

MEM_B_DQ<51> MEM_B_DQ<52>

MEM_B_DQ<53> MEM_B_DQ<54>

MEM_B_DQ<55>

MEM_B_DQ<56> MEM_B_DQ<57>

MEM_B_DQ<58>

MEM_B_DQ<59> MEM_B_DQ<60>

MEM_B_DQ<61>

MEM_B_DQ<62> MEM_B_DQ<63>

MEM_B_BS<1>

MEM_B_BS<0>

MEM_B_BS<2>

MEM_B_CAS_L

MEM_B_DM<0>

MEM_B_DM<1> MEM_B_DM<2>

MEM_B_DM<3>

MEM_B_DM<5>

MEM_B_DM<4>

MEM_B_DM<7>

MEM_B_DM<6>

MEM_B_DQS_P<0>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<3>

MEM_B_DQS_P<5>

MEM_B_DQS_P<4>

MEM_B_DQS_P<6>

MEM_B_DQS_P<7>

MEM_B_DQS_N<3>

MEM_B_DQS_N<2>

MEM_B_DQS_N<4>

MEM_B_DQS_N<5>

MEM_B_DQS_N<6> MEM_B_DQS_N<7>

MEM_B_A<1>

MEM_B_A<0>

MEM_B_A<2> MEM_B_A<3>

MEM_B_A<5>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<10> MEM_B_A<11>

MEM_B_A<12>

MEM_B_A<13>

MEM_B_RAS_L

MEM_B_WE_L

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_A_DQ<1>

MEM_A_DQ<0>

MEM_A_DQ<2>

MEM_A_DQ<3>

MEM_A_DQ<4>

MEM_A_DQ<6>

MEM_A_DQ<7> MEM_A_DQ<8>

MEM_A_DQ<9> MEM_A_DQ<10>

MEM_A_DQ<12>

MEM_A_DQ<11>

MEM_A_DQ<13>

MEM_A_DQ<14>

MEM_A_DQ<15> MEM_A_DQ<16>

MEM_A_DQ<17>

MEM_A_DQ<18> MEM_A_DQ<19>

MEM_A_DQ<20> MEM_A_DQ<21>

MEM_A_DQ<22>

MEM_A_DQ<23> MEM_A_DQ<24>

MEM_A_DQ<25>

MEM_A_DQ<26> MEM_A_DQ<27>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<30>

MEM_A_DQ<31> MEM_A_DQ<32>

MEM_A_DQ<33>

MEM_A_DQ<35>

MEM_A_DQ<34>

MEM_A_DQ<36>

MEM_A_DQ<37> MEM_A_DQ<38>

MEM_A_DQ<39>

MEM_A_DQ<40> MEM_A_DQ<41>

MEM_A_DQ<42> MEM_A_DQ<43>

MEM_A_DQ<44>

MEM_A_DQ<46>

MEM_A_DQ<45>

MEM_A_DQ<47>

MEM_A_DQ<48> MEM_A_DQ<49>

MEM_A_DQ<50>

MEM_A_DQ<51> MEM_A_DQ<52>

MEM_A_DQ<53> MEM_A_DQ<54>

MEM_A_DQ<55>

MEM_A_DQ<56> MEM_A_DQ<57>

MEM_A_DQ<58>

MEM_A_DQ<59> MEM_A_DQ<60>

MEM_A_DQ<61>

MEM_A_DQ<62> MEM_A_DQ<63>

MEM_A_BS<1>

MEM_A_BS<0>

MEM_A_BS<2>

MEM_A_CAS_L

MEM_A_DM<0>

MEM_A_DM<1> MEM_A_DM<2>

MEM_A_DM<3>

MEM_A_DM<5>

MEM_A_DM<4>

MEM_A_DM<7>

MEM_A_DM<6>

MEM_A_DQS_P<0>

MEM_A_DQS_P<2>

MEM_A_DQS_P<1>

MEM_A_DQS_P<3>

MEM_A_DQS_P<5>

MEM_A_DQS_P<4>

MEM_A_DQS_P<6>

MEM_A_DQS_P<7>

MEM_A_DQS_N<3>

MEM_A_DQS_N<2>

MEM_A_DQS_N<4>

MEM_A_DQS_N<5>

MEM_A_DQS_N<6> MEM_A_DQS_N<7>

MEM_A_A<1>

MEM_A_A<0>

MEM_A_A<2> MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<4>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<9>

MEM_A_A<8>

MEM_A_A<10> MEM_A_A<11>

MEM_A_A<12>

MEM_A_A<13>

MEM_A_RAS_L

MEM_A_WE_L

MEM_A_DQS_N<1>

MEM_A_DQS_N<0>

MEM_A_DQ<5>

30

29

28

www.Vinaﬁx.vn

Preliminary

VCC_SM19

VCC_SM107

VCC_SM105

VCC_SM106

VCC_SM102

VCC_SM104

VCC_SM103

VCC_SM100

VCC_SM101

VCC_SM98

VCC_SM99

VCC_SM97

VCC_SM95

VCC_SM96

VCC_SM93

VCC_SM94

VCC_SM92

VCC_SM91

VCC_SM90

VCC_SM89

VCC_SM88

VCC_SM86

VCC_SM87

VCC_SM85

VCC_SM84

VCC_SM83

VCC_SM81

VCC_SM80

VCC_SM82

VCC_SM79

VCC_SM78

VCC_SM77

VCC_SM74

VCC_SM75

VCC_SM76

VCC_SM73

VCC_SM72

VCC_SM70

VCC_SM71

VCC_SM68

VCC_SM67

VCC_SM69

VCC_SM65

VCC_SM66

VCC_SM64

VCC_SM63

VCC_SM62

VCC_SM61

VCC_SM60

VCC_SM59

VCC_SM58

VCC_SM56

VCC_SM57

VCC_SM55

VCC_SM53

VCC_SM54

VCC_SM52

VCC_SM50

VCC_SM51

VCC_SM49

VCC_SM48

VCC_SM46

VCC_SM47

VCC_SM44

VCC_SM45

VCC_SM43

VCC_SM41

VCC_SM42

VCC_SM40

VCC_SM39

VCC_SM37

VCC_SM38

VCC_SM36

VCC_SM34

VCC_SM35

VCC_SM32

VCC_SM33

VCC_SM30

VCC_SM31

VCC_SM28

VCC_SM29

VCC_SM27

VCC_SM26

VCC_SM25

VCC_SM23

VCC_SM24

VCC_SM22

VCC_SM21

VCC_SM20

VCC_SM18

VCC_SM16

VCC_SM17

VCC_SM15

VCC_SM13

VCC_SM14

VCC_SM11

VCC_SM12

VCC_SM10

VCC_SM9

VCC_SM8

VCC_SM7

VCC_SM6

VCC_SM5

VCC_SM4

VCC_SM3

VCC_SM0

VCC_SM1

VCC_SM2

VCC_110

VCC_109

VCC_108

VCC_105

VCC_106

VCC_107

VCC_104

VCC_103

VCC_101

VCC_100

VCC_102

VCC_98

VCC_99

VCC_96

VCC_97

VCC_95

VCC_94

VCC_93

VCC_92

VCC_91

VCC_90

VCC_88

VCC_89

VCC_87

VCC_86

VCC_85

VCC_83

VCC_84

VCC_82

VCC_80

VCC_81

VCC_79

VCC_78

VCC_76

VCC_77

VCC_74

VCC_73

VCC_75

VCC_72

VCC_71

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_65

VCC_64

VCC_62

VCC_63

VCC_61

VCC_60

VCC_59

VCC_57

VCC_58

VCC_55

VCC_56

VCC_53

VCC_54

VCC_52

VCC_50

VCC_51

VCC_49

VCC_46

VCC_47

VCC_48

VCC_44

VCC_45

VCC_43

VCC_42

VCC_41

VCC_40

VCC_39

VCC_38

VCC_37

VCC_36

VCC_34

VCC_35

VCC_33

VCC_32

VCC_31

VCC_30

VCC_28

VCC_29

VCC_25

VCC_26

VCC_27

VCC_24

VCC_23

VCC_21

VCC_20

VCC_22

VCC_13

VCC_14

VCC_12

VCC_16

VCC_15

VCC_17

VCC_18

VCC_19

VCC_11

VCC_10

VCC_9

VCC_8

VCC_7

VCC_4

VCC_5

VCC_6

VCC_2

VCC_3

VCC_0

VCC_1

(6 OF 10)

VCC

VCCAUX_NCTF57

VCCAUX_NCTF56

VCCAUX_NCTF55

VCCAUX_NCTF54

VCCAUX_NCTF53

VCCAUX_NCTF52

VCCAUX_NCTF51

VCCAUX_NCTF50

VCCAUX_NCTF49

VCCAUX_NCTF47

VCCAUX_NCTF48

VCCAUX_NCTF45

VCCAUX_NCTF44

VCCAUX_NCTF46

VCCAUX_NCTF40

VCCAUX_NCTF39

VCCAUX_NCTF37

VCCAUX_NCTF38

VCCAUX_NCTF36

VCCAUX_NCTF34

VCCAUX_NCTF35

VCCAUX_NCTF32

VCCAUX_NCTF33

VCCAUX_NCTF31

VCCAUX_NCTF30

VCCAUX_NCTF29

VCCAUX_NCTF27

VCCAUX_NCTF28

VCCAUX_NCTF26

VCCAUX_NCTF24

VCCAUX_NCTF25

VCCAUX_NCTF22

VCCAUX_NCTF21

VCCAUX_NCTF23

VCCAUX_NCTF42

VCCAUX_NCTF43

VCCAUX_NCTF41

VCCAUX_NCTF19

VCCAUX_NCTF20

VCCAUX_NCTF18

VCCAUX_NCTF17

VCCAUX_NCTF16

VCCAUX_NCTF14

VCCAUX_NCTF15

VCCAUX_NCTF13

VCCAUX_NCTF12

VCCAUX_NCTF11

VCCAUX_NCTF9

VCCAUX_NCTF10

VCCAUX_NCTF8

VCCAUX_NCTF7

VCCAUX_NCTF6

VCCAUX_NCTF5

VCCAUX_NCTF4

VCCAUX_NCTF3

VCCAUX_NCTF1

VCCAUX_NCTF0

VCCAUX_NCTF2

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF7

VSS_NCTF8

VSS_NCTF5

VSS_NCTF6

VSS_NCTF4

VSS_NCTF2

VSS_NCTF3

VSS_NCTF0

VSS_NCTF1

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF61

VCC_NCTF62

VCC_NCTF63

VCC_NCTF60

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF56

VCC_NCTF55

VCC_NCTF53

VCC_NCTF54

VCC_NCTF52

VCC_NCTF50

VCC_NCTF51

VCC_NCTF49

VCC_NCTF48

VCC_NCTF46

VCC_NCTF47

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF41

VCC_NCTF40

VCC_NCTF42

VCC_NCTF38

VCC_NCTF39

VCC_NCTF36

VCC_NCTF37

VCC_NCTF34

VCC_NCTF35

VCC_NCTF33

VCC_NCTF31

VCC_NCTF32

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCC_NCTF18

VCC_NCTF19

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF13

VCC_NCTF14

VCC_NCTF11

VCC_NCTF12

VCC_NCTF10

VCC_NCTF8

VCC_NCTF9

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF3

VCC_NCTF2

VCC_NCTF0

VCC_NCTF1

(7 OF 10)

NCTF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Place near pin BA15

Place near pin BA23

(Need to better define cavity)

Layout Note:

impacting part performance.

NCTF balls are Not Critical To Function

These connections can break without

Layout Note:

1.05V or 1.5V

Place in cavity

945GM

NB

BGA

OMIT

U1200

AA33

W33

P32

M19

L19

N18

M18

L18

P17

N17

M17

N16

M16

N32

L16

M32

L32

J32

AA31

W31

V31

T31

R31

P33

P31

N31

M31

AA30

Y30

W30

V30

U30

T30

R30

N33

P30

N30

M30

L30

AA29

Y29

W29

V29

U29

R29

L33

P29

M29

L29

AB28

AA28

Y28

V28

U28

T28

R28

J33

P28

N28

M28

L28

P27

N27

M27

L27

P26

N26

AA32

L26

N25

M25

L25

P24

N24

M24

AB23

AA23

Y23

Y32

P23

N23

M23

L23

AC22

AB22

Y22

W22

P22

N22

W32

M22

L22

AC21

AA21

W21

N21

M21

L21

AC20

AB20

V32

Y20

W20

P20

N20

M20

L20

AB19

AA19

Y19

N19

AU41

AT41

AR34

AR6

AP6

AN6

AL6

AK6

AJ6

AV1

AJ1

BA30

AY30

AW30

AV30

AU30

AT30

AR30

AP30

AN30

AM41

AM30

AM29

AL29

AK29

AJ29

AH29

AJ28

AH28

AJ27

AH27

AU40

BA26

AY26

AW26

AV26

AU26

AT26

AR26

AJ26

AH26

AJ25

BA34

AH25

AJ24

AH24

BA23

AJ23

BA22

AY22

AW22

AV22

AU22

AY34

AT22

AR22

AP22

AK22

AJ22

AK21

AK20

BA19

AY19

AW19

AW34

AV19

AU19

AT19

AR19

AP19

AK19

AJ19

AJ18

AJ17

AH17

AV34

AJ16

AH16

BA15

AY15

AW15

AV15

AU15

AT15

AR15

AJ15

AU34

AJ14

AJ13

AH13

AK12

AJ12

AH12

AG12

AK11

BA8

AY8

AT34

AW8

AV8

AT8

AR8

AP8

BA6

AY6

AW6

AV6

AT6

10%

0.47UF

CERM-X5R

6.3V

402

C1610

1

2

805-1

6.3V

20%

CERM

10UF

C1621

1

2

805-1

CERM

10UF

20%

6.3V

C1620

1

2

945GM

NB

BGA

OMIT

U1200

AD27

AC27

AD26

AC26

AB26

AA26

Y26

W26

V26

U26

T26

R26

AB27

AD25

AC25

AB25

AA25

Y25

W25

V25

U25

T25

R25

AA27

AD24

AC24

AB24

AA24

Y24

W24

V24

U24

T24

R24

Y27

AD23

V23

U23

T23

R23

AD22

V22

U22

T22

R22

W27

AD21

V21

U21

T21

R21

AD20

V20

U20

T20

R20

V27

AD19

V19

U19

T19

AD18

AC18

AB18

AA18

Y18

W18

U27

V18

U18

T18

T27

R27

AG27

AF27

AG22

AF22

AG21

AF21

AG20

AF20

AG19

AF19

R19

AG18

AG26

AF18

R18

AG17

AF17

AE17

AD17

AB17

AA17

W17

V17

AF26

T17

R17

AG16

AF16

AE16

AD16

AC16

AB16

AA16

Y16

AG25

W16

V16

U16

T16

R16

AG15

AF15

AE15

AD15

AC15

AF25

AB15

AA15

Y15

W15

V15

U15

T15

R15

AG24

AF24

AG23

AF23

AE27

AE26

AC17

Y17

U17

AE25

AE24

AE23

AE22

AE21

AE20

AE19

AE18

10%

0.47UF

CERM-X5R

6.3V

402

C1611

1

2

10%

0.47UF

CERM-X5R

6.3V

402

C1612

1

2

10%

0.47UF

CERM-X5R

6.3V

402

C1613

1

2

10%

0.47UF

CERM-X5R

6.3V

402

C1614

1

2

10%

0.47UF

CERM-X5R

6.3V

402

C1615

1

2

NB Power 1

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

051-7039

21

9716

NB_VCCSM_LF2

NB_VCCSM_LF1

=PPVCORE_S0_NB

=PP1V5_S0_NB_VCCAUX

=PPVCORE_S0_NB

NB_VCCSM_LF5

NB_VCCSM_LF4

=PP1V8_S3_MEM_NB

19

16

17

16

14

3

www.Vinaﬁx.vn

Preliminary

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT15

VTT14

VTT16

VTT18

VTT17

VTT19

VTT20

VTT21

VTT22

VTT23

VTT24

VTT25

VTT27

VTT26

VTT28

VTT29

VTT31

VTT30

VTT32

VTT34

VTT33

VTT35

VTT36

VTT37

VTT39

VTT38

VTT40

VTT41

VTT42

VTT43

VTT44

VTT45

VTT48

VTT46

VTT47

VTT49

VTT50

VTT52

VTT51

VTT53

VTT55

VTT54

VTT57

VTT56

VTT58

VTT59

VTT60

VTT61

VTT62

VTT64

VTT63

VTT65

VTT66

VTT67

VTT69

VTT68

VTT70

VTT71

VTT73

VTT72

VTT74

VTT76

VTT75

VCCSYNC

VCC_TXLVDS0

VCC_TXLVDS1

VCC_TXLVDS2

VCC3G0

VCC3G1

VCC3G3

VCC3G2

VCC3G4

VCC3G6

VCC3G5

VCCA_3GPLL

VCCA_3GBG

VSSA_3GBG

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCCA_DPLLB

VCCA_DPLLA

VCCA_HPLL

VSSA_LVDS

VCCA_LVDS

VCCA_MPLL

VCCA_TVBG

VSSA_TVBG

VCCA_TVDACC0

VCCA_TVDACC1

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACA0

VCCA_TVDACA1

VCCD_HMPLL0

VCCD_HMPLL1

VCCD_LVDS2

VCCD_LVDS0

VCCD_LVDS1

VCCD_TVDAC

VCC_HV1

VCC_HV2

VCC_HV0

VCCD_QTVDAC

VCCAUX19

VCCAUX18

VCCAUX17

VCCAUX16

VCCAUX14

VCCAUX15

VCCAUX13

VCCAUX12

VCCAUX11

VCCAUX10

VCCAUX0

VCCAUX1

VCCAUX2

VCCAUX3

VCCAUX4

VCCAUX6

VCCAUX5

VCCAUX9

VCCAUX8

VCCAUX7

VCCAUX21

VCCAUX20

VCCAUX23

VCCAUX24

VCCAUX22

VCCAUX25

VCCAUX26

VCCAUX29

VCCAUX28

VCCAUX27

VCCAUX30

VCCAUX31

VCCAUX33

VCCAUX32

VCCAUX34

VCCAUX35

VCCAUX36

VCCAUX38

VCCAUX37

VCCAUX39

VCCAUX40

POWER

(8 OF 10)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

945GM

NB

BGA

OMIT

U1200

AJ41

AB41

Y41

V41

R41

N41

L41

A23

B23

B25

C30

B30

A30

G41

AC33

F21

E21

B26

C39

AF1

A38

AF2

H20

E19

F19

C20

D20

E20

F20

AK31

AF31

AE30

AD30

AC30

AG29

AF29

AE29

AD29

AC29

AG28

AF28

AE31

AE28

AH22

AJ21

AH21

AJ20

AH20

AH19

P19

P16

AH15

AC31

P15

AH14

AG14

AF14

AE14

Y14

AF13

AE13

AF12

AE12

AL30

AD12

AK30

AJ30

AH30

AG30

AF30

AH1

AH2

A28

B28

C28

H19

D21

H22

H41

G21

B39

G20

AC14

AB14

AD13

AC13

AB13

AA13

Y13

W13

V13

U13

T13

R13

W14

N13

M13

L13

AB12

AA12

Y12

W12

V12

U12

T12

V14

R12

P12

N12

M12

L12

R11

P11

N11

M11

R10

T14

P10

N10

M10

P9

N9

M9

R8

P8

N8

M8

R14

P7

N7

M7

R6

P6

M6

A6

R5

P5

N5

P14

M5

P4

N4

M4

R3

P3

N3

M3

R2

P2

N14

M2

D2

AB1

R1

P1

N1

M1

M14

L14

402

CERM-X5R

6.3V

0.47UF

10%

C1711

1

2

0.22UF

X5R

20%

6.3V

402

C1712

1

2

402

6.3V

CERM-X5R

0.47UF

10%

C1713

1

2

17 97

21

051-7039

SYNC_DATE=06/29/2006

NB Power 2

SYNC_MASTER=M51_HENRY

=PP1V05_S0_NB_VTT

NB_VTTLF_CAP3

PP2V5_S0_NB_VCCA_CRTDAC

=PP1V5_S0_NB_VCCAUX

PP1V5_S0_NB_VCCD_QTVDAC

=PP3V3_S0_NB_VCC_HV

PP1V5_S0_NB_VCCD_TVDAC

=PP1V5_S0_NB_VCCD_LVDS

=PP1V5_S0_NB_VCCD_HMPLL

PP3V3_S0_NB_VCCA_TVDACA

PP3V3_S0_NB_VCCA_TVDACB

PP3V3_S0_NB_VCCA_TVDACC

GND_NB_VSSA_TVBG

PP3V3_S0_NB_VCCA_TVBG

PP1V5_S0_NB_VCCA_MPLL

=PP2V5_S0_NB_VCCA_LVDS

GND_NB_VSSA_LVDS

PP1V5_S0_NB_VCCA_HPLL

PP1V5_S0_NB_VCCA_DPLLA

GND_NB_VSSA_CRTDAC

GND_NB_VSSA_3GBG

=PP2V5_S0_NB_VCCA_3GBG

PP1V5_S0_NB_VCCA_3GPLL

PP1V5_S0_NB_VCC3G

=PP2V5_S0_NB_VCC_TXLVDS

=PP2V5_S0_NB_VCCSYNC

PP1V5_S0_NB_VCCA_DPLLB

NB_VTTLF_CAP1

NB_VTTLF_CAP2

19

16

19

3

19

3

19

3

19

3

19

3

19

www.Vinaﬁx.vn

Preliminary

VSS_1

VSS_0

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_9

VSS_8

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_19

VSS_18

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_28

VSS_27

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_37

VSS_36

VSS_39

VSS_38

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_49

VSS_48

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_57

VSS_56

VSS_59

VSS_58

VSS_61

VSS_60

VSS_64

VSS_63

VSS_62

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_73

VSS_72

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_82

VSS_80

VSS_81

VSS_84

VSS_83

VSS_85

VSS_87

VSS_86

VSS_89

VSS_88

VSS_91

VSS_90

VSS_92

VSS_93

VSS_94

VSS_96

VSS_95

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_114

VSS_113

VSS_115

VSS_117

VSS_116

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_127

VSS_126

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_137

VSS_136

VSS_138

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_158

VSS_157

VSS_159

VSS_160

VSS_161

VSS_162

VSS_164

VSS_163

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_172

VSS_171

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS

(9 OF 10)

VSS_272

VSS_271

VSS_269

VSS_270

VSS_268

VSS_266

VSS_267

VSS_265

VSS_264

VSS_263

VSS_261

VSS_262

VSS_260

VSS_259

VSS_258

VSS_256

VSS_257

VSS_255

VSS_254

VSS_253

VSS_251

VSS_252

VSS_250

VSS_248

VSS_249

VSS_247

VSS_246

VSS_245

VSS_243

VSS_244

VSS_242

VSS_241

VSS_240

VSS_238

VSS_239

VSS_237

VSS_236

VSS_235

VSS_233

VSS_234

VSS_232

VSS_231

VSS_230

VSS_228

VSS_229

VSS_227

VSS_225

VSS_226

VSS_224

VSS_223

VSS_222

VSS_220

VSS_221

VSS_219

VSS_218

VSS_217

VSS_215

VSS_216

VSS_214

VSS_213

VSS_212

VSS_210

VSS_211

VSS_209

VSS_207

VSS_208

VSS_205

VSS_206

VSS_204

VSS_202

VSS_203

VSS_201

VSS_200

VSS_199

VSS_197

VSS_198

VSS_196

VSS_195

VSS_194

VSS_192

VSS_193

VSS_191

VSS_190

VSS_189

VSS_187

VSS_188

VSS_186

VSS_184

VSS_185

VSS_183

VSS_182

VSS_180

VSS_181

VSS_273

VSS_274

VSS_276

VSS_275

VSS_277

VSS_279

VSS_278

VSS_281

VSS_280

VSS_282

VSS_283

VSS_284

VSS_286

VSS_285

VSS_287

VSS_288

VSS_289

VSS_291

VSS_290

VSS_293

VSS_292

VSS_294

VSS_296

VSS_295

VSS_297

VSS_299

VSS_298

VSS_301

VSS_302

VSS_300

VSS_304

VSS_303

VSS_305

VSS_306

VSS_307

VSS_309

VSS_308

VSS_311

VSS_310

VSS_312

VSS_313

VSS_314

VSS_315

VSS_317

VSS_316

VSS_318

VSS_319

VSS_320

VSS_322

VSS_321

VSS_323

VSS_324

VSS_325

VSS_327

VSS_326

VSS_328

VSS_329

VSS_330

VSS_332

VSS_331

VSS_334

VSS_333

VSS_335

VSS_337

VSS_336

VSS_338

VSS_339

VSS_340

VSS_342

VSS_343

VSS_341

VSS_345

VSS_344

VSS_346

VSS_347

VSS_348

VSS_350

VSS_349

VSS_352

VSS_351

VSS_353

VSS_354

VSS_355

VSS_356

VSS_357

VSS_358

VSS_359

VSS_360

VSS

(10 OF 10)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NB

945GM

BGA

OMIT

U1200

AC41

AA41

AN40

AE34

AC34

C34

AW33

AV33

AR33

AE33

AB33

Y33

V33

AK40

T33

R33

M33

H33

G33

F33

D33

B33

AH32

AG32

AJ40

AF32

AE32

AC32

AB32

G32

B32

AY31

AV31

AN31

AJ31

AH40

AG31

AB31

Y31

AB30

E30

AT29

AN29

AB29

T29

N29

AG40

K29

G29

E29

C29

B29

A29

BA28

AW28

AU28

AP28

AF40

AM28

AD28

AC28

W28

J28

E28

AP27

AM27

AK27

J27

AE40

G27

F27

C27

B27

AN26

M26

K26

F26

D26

AK25

B40

P25

K25

H25

E25

D25

A25

BA24

AU24

AL24

AW23

AY39

AW39

W41

AV39

AR39

AN39

AJ39

AC39

AB39

AA39

Y39

W39

V39

T41

T39

R39

P39

N39

M39

L39

J39

H39

G39

F39

P41

D39

AT38

AM38

AH38

AG38

AF38

AE38

C38

AK37

AH37

M41

AB37

AA37

Y37

W37

V37

T37

R37

P37

N37

M37

J41

L37

J37

H37

G37

F37

D37

AY36

AW36

AN36

AH36

F41

AG36

AF36

AE36

AC36

C36

B36

BA35

AV35

AR35

AH35

AV40

AB35

AA35

Y35

W35

V35

T35

R35

P35

N35

M35

AP40

L35

J35

H35

G35

F35

D35

AN34

AK34

AG34

AF34

NB

945GM

BGA

OMIT

U1200

AT23

AN23

AM23

AH23

AC23

W23

K23

J23

F23

C23

AA22

K22

G22

F22

E22

D22

A22

BA21

AV21

AR21

AN21

AL21

AB21

Y21

P21

K21

J21

H21

C21

AW20

AR20

AM20

AA20

K20

B20

A20

AN19

AC19

W19

K19

G19

C19

AH18

P18

H18

D18

A18

AY17

AR17

AP17

AM17

AK17

AV16

AN16

AL16

J16

F16

C16

AN15

AM15

AK15

N15

M15

L15

B15

A15

BA14

AT14

AK14

AD14

AA14

U14

K14

H14

E14

AV13

AR13

AN13

AM13

AL13

AG13

P13

F13

D13

B13

AY12

AC12

K12

H12

E12

AD11

AA11

Y11

J11

D11

B11

AV10

AP10

AL10

AJ10

AG10

AC10

W10

U10

BA9

AW9

AR9

AH9

AB9

Y9

R9

G9

E9

A9

AG8

AD8

AA8

U8

K8

C8

BA7

AV7

AP7

AL7

AJ7

AH7

AF7

AC7

R7

G7

D7

AG6

AD6

AB6

Y6

U6

N6

K6

H6

B6

AV5

AF5

AD5

AY4

AR4

AP4

AL4

AJ4

Y4

U4

R4

J4

F4

C4

AY3

AW3

AV3

AL3

AH3

AG3

AF3

AD3

AC3

AA3

G3

AT2

AR2

AP2

AK2

AJ2

AD2

AB2

Y2

U2

T2

N2

J2

H2

F2

C2

AL1

SYNC_DATE=06/29/2006

SYNC_MASTER=M50_HENRY

NB Grounds

051-7039

21

9718

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Place in cavity

Layout Note:

Layout Note: Route to caps, then GND

be placed in cavity

3GPLL 10uF cap should

Layout Note:

1uH, 20%

be within 5 mm of NB edge

TVOUT DISABLE

close to MCH

Place L and C

be close to MCH

Place on the edge

Layout Note:

10uF caps should

on opposite side.

LVDS DISABLE

Layout Note:

DISPLAY DISABLE

TVOUT DISABLE

Layout Note:

These 4 0.1uF caps should

2.5V POLY SMB2

220UF

20%

C1970

1

2

0.22uF

402

6.3V

20%

X5R

C1967

1

2

2.2UF

10%

6.3V

603

CERM1

C1966

1

2

CERM

4.7uF

6.3V

603

20%

C1965

1

2

CERM

20%

402

10V

0.1uF

C1976

1

2

10uF

20%

6.3V X5R 603

C1975

1

2

0.51

1%

402

MF-LF

1/16W

R1975

12

0805

1.0UH-220MA-0.12-OHM

L1975

12

0.1uF

10V CERM 402

20%

C1918

1

2

0.1uF

20%

402

CERM

10V

C1915

1

2

10uF

20%

6.3V X5R 603

C1914

1

2

10V CERM 402

20%

0.1uF

C1916

1

2

5%

402

MF-LF

1/16W

1K

R1980

12

402

MF-LF

1/16W

5%

1K

R1981

1

2

MF-LF 402

1/16W

5%

1K

R1983

1

2

5%

402

MF-LF

1/16W

1K

R1982

12

1210

91NH

L1970

12

OMIT

SM

XW1900

12

330UF

NOSTUFF

ELEC

6.3V

20%

CASE-C1

C1968

1

2

0603

FERR-120-OHM-0.2A

L1934

12

6.3V

20%

0.22uF

402

X5R

C1907

1

2

10uF

20%

6.3V X5R 603

C1972

1

2

603

6.3V

10uF

20%

X5R

C1971

1

2

X5R

20%

0.22uF

6.3V

402

C1906

1

2

X5R

20%

0.22uF

6.3V

402

C1905

1

2

1UF

402

6.3V

10%

CERM

C1904

1

2

402

10V CERM

20%

0.1uF

C1937

1

2

0.1uF

402

CERM

10V

20%

C1935

1

2

6.3V

20%

805

22uF

X5R

C1934

1

2

0603

FERR-120-OHM-0.2A

L1936

12

22uF

X5R 805

6.3V

20%

C1936

1

2

10uF

603

20%

6.3V X5R

C1903

1

2

603

20%

X5R

6.3V

10uF

C1902

1

2

20%

6.3V

CASE-C1

ELEC

330UF

C1901

1

2

330UF

CASE-C1

6.3V

20%

ELEC

C1900

1

2

SYNC_MASTER=M51_DAVE

NB (GM) Decoupling

SYNC_DATE=(MASTER)

19 97

21

051-7039

=PPVCORE_S0_NB

CRT_BLUE

CRT_BLUE_L

CRT_GREEN

CRT_GREEN_L

CRT_IREF

CRT_RED

CRT_RED_L

PP2V5_S0_NB_VCCA_CRTDAC

SDVO_CTRLCLK

GND_NB_VSSA_TVBG

SDVO_CTRLDATA

CRT_DDC_DATA

GND_NB_VSSA_CRTDAC

TP_LVDS_CLKCTLA

TRUE

=PP1V5_S0_NB_3GPLL

PP1V5_S0_NB_3GPLL_F

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.2 MM

=PP1V5_S0_NB_3GPLL

TP_NB_VCCA_DPLLA

TRUE

LVDS_DDC_CLK

LVDS_CLKCTLA

LVDS_BKLTCTL

=PP2V5_S0_NB_VCC_TXLVDS

TP_SDVO_CTRLDATA

TRUE

TP_SDVO_CTRLCLK

TRUE

TP_LVDS_BKLTCTL

TRUE

TP_LVDS_DDC_DATA

TRUE

=PP1V5_S0_NB_VCCD_LVDS

LVDS_VREFL

TP_LVDS_B_CLK_P

TRUE

TP_LVDS_B_CLK_N

TRUE

LVDS_A_DATA_P<0>

LVDS_VREFH

LVDS_B_DATA_N<1>

LVDS_B_DATA_N<2>

LVDS_A_DATA_P<2>

LVDS_B_DATA_N<0>

LVDS_A_DATA_N<2>

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<0>

LVDS_B_CLK_N

TP_LVDS_B_DATA_N<0>

TRUE

TP_LVDS_A_DATA_P<2>

TRUE

TP_LVDS_A_DATA_P<0>

TRUE

TP_LVDS_A_DATA_N<1>

TRUE

TP_LVDS_A_DATA_N<2>

TRUE

TP_LVDS_A_DATA_N<0>

TRUE

TP_LVDS_A_DATA_P<1>

TRUE

LVDS_A_DATA_P<1>

LVDS_B_DATA_P<2>

=PP2V5_S0_NB_VCCA_LVDS

TP_LVDS_VREFH

TRUE

GND_NB_VSSA_LVDS

LVDS_IBG

LVDS_VDDEN

LVDS_BKLTEN

TP_LVDS_IBG

TRUE

TP_GND_NB_VSSA_LVDS

TRUE

TP_LVDS_VDDEN

TRUE

TP_LVDS_BKLTEN

TRUE

TP_LVDS_CLKCTLB

TRUE

TP_LVDS_DDC_CLK

TRUE

LVDS_B_DATA_P<0> LVDS_B_DATA_P<1>

TP_LVDS_B_DATA_P<1>

TRUE

LVDS_B_CLK_P

LVDS_A_CLK_N

TP_LVDS_B_DATA_P<2>

TRUE

TP_LVDS_B_DATA_N<1>

TRUE

TP_LVDS_B_DATA_N<2>

TRUE

TP_LVDS_B_DATA_P<0>

TRUE

TP_LVDS_VREFL

TRUE

CRT_DDC_CLK

TRUE

TP_CRT_DDC_CLK

CRT_HSYNC_R

TRUE

TP_CRT_DDC_DATA

TP_NB_VCCA_DPLLB

TRUE

NB_CLK_DREFCLKIN_P

LVDS_A_CLK_P

TP_LVDS_A_CLK_P

TRUE

TP_LVDS_A_CLK_N

TRUE

=PP1V5_S0_NB_VCCAUX

=PP2V5_S0_NB_VCCSYNC

CRT_VSYNC_R

NB_CLK_DREFCLKIN_N

NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFSSCLKIN_P

PP1V5_S0_NB_VCCA_DPLLA PP1V5_S0_NB_VCCA_DPLLB

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_HPLL

=PP3V3_S0_NB_VCC_HV

=PP2V5_S0_NB_VCCA_3GBG

VOLTAGE=1.5V

PP1V5_S0_NB_VCCA_3GPLL

MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.2 MM

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCC3G

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_MPLL

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

LVDS_DDC_DATA

LVDS_CLKCTLB

=PP1V8_S3_MEM_NB

GND_NB_VSSA_3GBG

=PP1V5_S0_NB_PLL

=PP1V05_S0_NB_VTT

MEM_VREF_NB_1 MEM_VREF_NB_0

TV_IRTNC

TV_IRTNB

TV_IRTNA

TV_IREF

TV_DACC_OUT

TV_DACB_OUT

TV_DACA_OUT

PP3V3_S0_NB_VCCA_TVDACC

PP3V3_S0_NB_VCCA_TVDACB

PP3V3_S0_NB_VCCA_TVDACA

PP3V3_S0_NB_VCCA_TVBG

PP1V5_S0_NB_VCCD_TVDAC

PP1V5_S0_NB_VCCD_QTVDAC

=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB

19

17

16

19

13

16

17

14

17

14 14

3

13

17

14

17

14

13

17

3

13

17

13

17

13

5

13

14

13

3

17

13

14

17

3

17

13

3

17

3

5 5

13

17

3

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Internal pull-ups

Internal pull-up

RESERVED

NB_CFG<11>

NB_CFG<10>

High = Mobile CPU

NB_CFG<7>

RESERVED

Internal pull-up

DMI x2 Select

PROBABLY NOT NEEDED

Lane Reversal

NB_CFG<4>

NB_CFG<3>

RESERVED

NB_CFG<13:12>

NB_CFG<14>

NB_CFG<5>

NB_CFG<15>

NB_CFG<16>

NB_CFG<6>

NB_CFG<17>

NB_CFG<18>

NB_CFG<8>

NB_CFG<9>

NB_CFG<19>

NB_CFG<20>

Low = DMIx2

High = DMIx4

Low = RESERVED

High = Normal

PCIE Graphics

RESERVED

CPU Strap

RESERVED

Low = Reversed

Internal pull-up

11 = Normal Operation

10 = All-Z Mode Enabled

01 = XOR Mode Enabled

00 = Partial Clock Gating Disable

RESERVED

Internal pull-up

RESERVED

High = Enabled

Low = Disabled

RESERVED

FSB Dynamic

ODT

or PCIe x1

Low = Only SDVO

High = Both active

945 External Design Spec says reserved

Internal pull-down

Low = 1.05V

High = 1.5V

Low = Normal

High = Reversed DMI Lane

Reversal

VCC Select

Interop. Mode

PCIe Backward

NBCFG_DMI_X2

MF-LF

1/16W

2.2K

5%

402

R2075

1

2

NBCFG_DYN_ODT_DISABLE

402

MF-LF

1/16W

5%

2.2K

R2085

1

2

MF-LF

NBCFG_VCC_1V5

2.2K

5% 1/16W

402

R2058

1

2

NBCFG_DMI_REVERSE

2.2K

5% 1/16W MF-LF 402

R2059

1

2

2.2K

5% 1/16W MF-LF 402

NBCFG_SDVO_AND_PCIE

R2060

1

2

NO STUFF

2.2K

5% 1/16W MF-LF 402

R2077

1

2

NBCFG_PEG_REVERSE

2.2K

5% 1/16W MF-LF 402

R2079

1

2

SYNC_DATE=06/29/2006

SYNC_MASTER=M50_HENRY

NB Config Straps

051-7039

21

9720

=PP3V3_S0_NB

NB_CFG<18>

NB_CFG<19>

NB_CFG<20>

NB_CFG<16>

NB_CFG<5>

NB_CFG<7>

NB_CFG<9>

20

14

3

14

www.Vinaﬁx.vn

Preliminary

IO

IN

OUT

IN

OUT

IN

IO

IN

IO

DDACK*

SATARBIASN SATARBIASP

SATA_CLKN

SATA_CLKP

SATA_2TXP

SATA_2TXN

SATA_2RXN

SATA_2RXP

SATA_0TXP

SATA_0TXN

SATA_0RXP

SATA_0RXN

SATALED*

ACZ_SDOUT

ACZ_SDIN1 ACZ_SDIN2

ACZ_SDIN0

ACZ_SYNC

ACZ_BIT_CLK

LAN_TXD2

LAN_TXD0

LAN_TXD1

LAN_RXD1 LAN_RXD2

LAN_RSTSYNC

LAN_RXD0

LAN_CLK

EE_SHCLK

EE_CS

INTVRMEN

INTRUDER*

RTCRST*

RTCX2

RTCX1

THRMTRIP*

STPCLK*

NMI

SMI*

RCIN*

INTR

INIT*

INIT3_3V*

IGNNE*

GPIO49/CPUPWRGD

FERR*

TP1/DPRSTP*

TP2/DPSLP*

A20M*

CPUSPL*

A20GATE

LFRAME*

LDRQ1*/GPIO23

LDRQ0*

LAD3

LAD2

LAD0 LAD1

EE_DOUT

EE_DIN

ACZ_RST*

DIOR*

IDEIRQ

DIOW*

IORDY

DDREQ

DD0

DD1

DD3

DD2

DD5

DD4

DD6

DD7

DD8

DD11

DD9

DD10

DD12

DD13 DD14

DD15

DA0

DA1 DA2

DCS3*

DCS1*

AC-97/

AZALIA

RTC

LPC

LAN

CPU

IDE

SATA

(1 OF 6)

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(WEAK INT PU)

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S

LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE

NOTE: DDREQ HAS INTERNAL 11.5K PD

NOTE: LAD<0-3> HAVE INTERNAL 20K PU

INTEL HIGH DEFINITION AUDIO

ACZ_SDOUT

ACZ_SYNC

ACZ_BIT_CLK

ACZ_RST#

ACZ_SDIN[0-2]

INTERNAL 20K PD ENABLED WHEN

INTERNAL 20K PD

AC ’07

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

INTERNAL 20K PD ENABLED DURING RESET AND WHEN

INTERNAL 20K PD

INTERNAL 20K PD ENABLED WHEN

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

NONE

INTERNAL 20K PD

INTERNAL 20K PD ONLY ENABLED IN S3COLD

NOTE: ENABLE INTERNAL 1.05V SUSPEND REG

NOTE: DD<7> HAS INTERNAL 11.5K PD

(HSTROBE) (STOP)

20K PD

(DSTROBE)

< 2 IN OF R2107 W/O STUB

LAYOUT NOTE: R2108 TO BE

CHANGED TO 54.9 FOR

LAYOUT NOTE: R2107 TO BE

< 2 IN OF SB

BOM CONSOLIDATION

NOTE: RISING-EDGE TRIGGERED AT CPU

NOTE: KEYBOARD CONTROLLER RESET CPU

POR IS SMC WILL PUT LAN INT’F

NOTE:

INTO RESET STATE TO SAVE PWR.

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

INTEL CONFIRMS OK TO LEAVE PINS AS NC

NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU

NOTE: PULLED UP PER INTEL

NOTE: R2110=56 IN CV.

CHANGED TO 54.9 FOR

BOM CONSOLIDATION

NOTE: R2108=56 IN CV.

(WEAK INT PD)

(INT PU)

NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L

NOSTUFF

1/16W

MF-LF

0

5%

402

R2100

12

NOSTUFF

402

2.2K

5% 1/16W MF-LF

R2101

12

MF-LF

5%

39

402

1/16W

R2195

12

39

R2198

12

39

R2197

12

39

R2196

12

402

10K

5% 1/16W MF-LF

R2199

1

2

BGA

SB

ICH7-M

OMIT

U2100

AE22

AH28

U1

R5

T2 T3

T1

T4

R6

AG27

AH17 AE17

AF17

AE16 AD16

AB15

AE14

AB13

AC14

AF14 AH13

AH14

AC15

AG13

AF13

AD14 AC13

AD12 AC12

AE12

AF12

AF16

AE15

AF15

AH15

W1

W3

Y2

Y1

AG26

AG24

AH16

AG22

AF22

AG21

AF25

Y5 W4

AG16

AA6

AB5

AC4 Y6

V3

U3

U5 V4

T5

U7 V6

V7

AC3

AA5

AB3

AH24

AG23

AA3

AB1

AB2

AF3

AE3 AG2

AH2

AF7 AE7

AG6

AH6

AF1 AE1

AF18

AH10

AG10

AF23

AH22

AF26

AF24 AH25

402

10K

5% 1/16W MF-LF

R2194

1

2

332K

402

1%

1/16W

MF-LF

R2105

1

2

24.9

MF-LF 1/16W

1%

402

R2107

12

402

MF-LF 1/16W

1%

54.9

R2108

1

2

MF-LF 1/16W

402

54.9

1%

R2110

12

21

21 97

051-7039

SYNC_MASTER=M50_DOUG SYNC_DATE=06/29/2006

SB: 1 OF 4

TP_SB_XOR_V7

TP_SB_XOR_V6

TP_SB_XOR_U7

TP_SB_XOR_Y2

TP_SB_XOR_Y1

TP_SB_XOR_W1

SB_INTVRMEN

=PP1V05_S0_SB_CPU_IO

CPU_FERR_L

SB_A20GATE

CPU_RCIN_L

SATA_C_D2R_P

IDE_PDDACK_L

SATA_RBIAS_N

SATA_RBIAS_P

SB_CLK100M_SATA_N

SB_CLK100M_SATA_P

SATA_C_R2D_C_P

SATA_C_R2D_C_N

SATA_C_D2R_N

SATA_A_R2D_C_P

SATA_A_R2D_C_N

SATA_A_D2R_P

SATA_A_D2R_N

TP_SB_SATALED_L

SB_ACZ_SDATAOUT

TP_SB_ACZ_SDIN1

TP_SB_ACZ_SDIN2

ACZ_SDATAIN<0>

SB_ACZ_SYNC

SB_ACZ_BITCLK

SB_SM_INTRUDER_L

SB_RTC_X1

CPU_THERMTRIP_R

CPU_STPCLK_L

CPU_NMI

CPU_SMI_L

CPU_INTR

CPU_INIT_L

FWH_INIT_L

CPU_IGNNE_L

CPU_PWRGD

CPU_DPRSTP_L

CPU_DPSLP_L

CPU_A20M_L

TP_CPU_CPUSLP_L

SB_ACZ_RST_L

IDE_PDIOR_L

IDE_IRQ14

IDE_PDIOW_L

IDE_PDIORDY

IDE_PDDREQ

IDE_PDD<0> IDE_PDD<1>

IDE_PDD<5>

IDE_PDD<4>

IDE_PDD<7>

IDE_PDD<8>

IDE_PDD<11>

IDE_PDD<9>

IDE_PDD<10>

IDE_PDD<12>

IDE_PDD<13>

IDE_PDD<14> IDE_PDD<15>

IDE_PDA<0>

IDE_PDA<1>

IDE_PDA<2>

IDE_PDCS3_L

IDE_PDCS1_L

ACZ_SYNC

SMC_RCIN_L

=PP1V05_S0_SB_CPU_IO

PM_THRMTRIP_L

ACZ_SDATAOUT

IDE_PDD<6>

=PP3V3_S0_SB_GPIO

LPC_AD<0>

LPC_AD<1> LPC_AD<2>

LPC_AD<3>

TP_SB_DRQ0_L

TP_SB_GPIO23

LPC_FRAME_L

SB_RTC_X2

SB_RTC_RST_L

ACZ_BITCLK

ACZ_RST_L

PP3V3_S5_SB_RTC

TP_SB_XOR_U3

TP_SB_XOR_U5

TP_SB_XOR_V4

TP_SB_XOR_T5

TP_SB_XOR_W3

TP_SB_XOR_V3

IDE_PDD<2>

IDE_PDD<3>

25

25 27

27

67

24

60

75

24

59

23

60

26

21

34

59

7

38

21

14

21

58

25

3

7

38

5

38

59

68

26

7

5

7

5

7

5

38

5

38

5

38

68 58

3

7

68

38

3

5

26

68

24

38

www.Vinaﬁx.vn

Preliminary

IN

IO

IN

OUT

IN

OUT

IO

IN

IO

IN

OUT

IN

OUT

IO

DMI_ZCOMP

DMI_CLKP

DMI_IRCOMP

USBRBIAS*

USBRBIAS

DMI0RXN DMI0RXP

DMI0TXN

DMI0TXP

DMI2TXN DMI2TXP

DMI3RXN

DMI3TXP

DMI3TXN

DMI3RXP

USBP0N USBP0P

USBP1N

USBP1P USBP2N

USBP2P

USBP3N USBP3P

USBP4P

USBP5N

USBP5P USBP6N

USBP6P

USBP7N USBP7P

USBP4N

OC0*

OC1*

OC2* OC3*

OC4*

OC6*/GPIO30

OC5*/GPIO29

SPI_CLK

SPI_CS*

SPI_MOSI

SPI_MISO

SPI_ARB

DMI_CLKN

DMI2RXP

DMI2RXN

DMI1TXP

DMI1TXN

DMI1RXN DMI1RXP

PERN1 PERP1

PETN1

PETP1

PERN2 PERP2

PETN2

PETP2

PERN3

PERP3

PETN3 PETP3

PERN4

PERP4

PETN4 PETP4

PERN5

PERP5 PETN5

PETP5

PERN6

PERP6 PETN6

PETP6

OC7*/GPIO31

PCI-EXP

(3 OF 6)

DMI

SPI

USB

REQ4*/GPIO22

REQ0*

MCH_SYNC*

RSVD8

RSVD7

RSVD6

RSVD5

RSVD4

GPIO5/PIRQH*

GPIO4/PIRQG*

GPIO3/PIRQF*

GPIO2/PIRQE*

GPIO17/GNT5*

GPIO1/REQ5*

GNT4*/GPIO48

C/BE0* C/BE1*

DEVSEL*

PERR*

STOP*

PCIRST*

PME*

PLTRST*

TRDY*

FRAME*

IRDY*

PCICLK

PAR

PLOCK*

SERR*

AD0 AD1

AD2 AD3

AD4

AD5 AD6

AD7

AD8 AD9

AD10

AD11 AD12

AD13 AD14

AD15

AD16 AD17

AD18

AD19 AD20

AD21

AD22 AD23

AD24 AD25

AD26

AD27 AD28

AD29

AD30 AD31

C/BE2*

C/BE3*

GNT0*

REQ1* GNT1*

REQ2*

GNT2* REQ3*

GNT3*

PIRQA* PIRQB*

PIRQC* PIRQD*

RSVD0 RSVD1

RSVD2

RSVD3

MISC

INT I/F

PCI

(2 OF 6)

IO

IN

IO

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

R2211

NOTE: FWH_WP_L NOT USED

NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD

GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

(INT PD)

(AKA TP3, INTERNAL 20K PU)

GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

PLACE R2204 < 1/2 IN FROM SB

LAYOUT NOTE:

PLACE R2203 < 1/2 IN FROM SB

LAYOUT NOTE:

NOTE:

LPC (DEFAULT)

PCI

SPI

UNSTUFF

STUFF

UNSTUFFUNSTUFF

UNSTUFF

STUFF

01

10

11

STRAP R2210

(INT 20K PU)

NOTE: CHANGE SYMBOL

TO RSVD[1-9]

GNT5# GNT4#

SB BOOT BIOS SELECT

TARGETING FWH BIOS SPACE)

IE SB INVERTS A16 FOR ALL CYCLES

(STRAPPED TO TOP-BLOCK SWAP MODE

NO STUFF - DEFAULT

STUFF - A16 SWAP OVERRIDE

NOTE:

EXTERNAL 0

EXTERNAL 1

EXTERNAL 2

AIRPORT (MINI-PCIE)

CAMERA

CF/SD

BT

IR

BOM NOTE FOR PD ON PCI_GNT3_L:

NOTE: R2210 WAS PD ON PIN A14 = FWH_TBL_L

GNT[0-3]# HAVE INT 20K PU ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

1/16W

402

24.9

MF-LF

1%

R2203

12

10K

1/16W MF-LF

5%

402

R2222

1

2

402

22.6

1% 1/16W MF-LF

R2204

12

1/16W

5%

10K

MF-LF 402

R2223

1

2

10K

5% 1/16W MF-LF 402

R2225

1

2

402

MF-LF

1/16W

10K

5%

R2226

1

2

10K

5% 1/16W MF-LF 402

R2299

1

2

OMIT

BGA

SB

ICH7-M

U2100

V26

V25

U28 U27

Y26

Y25 W28

W27

AB26

AB25 AA28

AA27

AD25

AD24 AC28

AC27

AE28 AE27

D25

C25

D3

C4 D5

D4 E5

C3

A2 B3

F26

H26

K26

M26

P26

T25

F25

H25

K25

M25

P25

T24

E28

G28

J28

L28

N28

R28

E27

G27

J27

L27

N27

R27

P1

R2 P6

P2

P5

F1

F2

G4 G3

H1 H2

J4

J3 K1

K2

L4 L5

M1

M2 N4

N3

D1

D2

OMIT

BGA

ICH7-M

SB

U2100

E18

C18

E14

D14

B12 C13

G15

G13 E12

C11

D11 A11

A16

A10 F11

F10

E9 D9

B9

A8 A6

C7

B6

F18

E6

D6

E16 A18

E17

A17 A15

C14

B15

C12

D12 C15

A12

F16

E7

D16

D17

F13

A14 C8

D8

G8

F7 F8

G7

A7

AH20

E10 A9

B18

C9

A3

B4 C5

B5

E11

C26

B19

D7

C16

C17

E13

A13

AE5

AD5

AG4 AH4

AD9

AE9

AG8

AH8 F21

B10

F15 F14

MF-LF

5%

402

10K

1/16W

R2200

1

2

402

MF-LF

5%

10K

1/16W

R2250

1

2

10K

5% 1/16W MF-LF 402

R2251

1

2

MF-LF

1/16W

5%

10K

402

R2255

1

2

402

MF-LF

1/16W

5%

10K

R2298

1

2

MF-LF

402

5%

10K

1/16W

R2205

1

2

402

10K

MF-LF

5%

1/16W

NOSTUFF

R2206

1

2

MF-LF 1/16W

10K

402

5%

R2207

1

2

VOLTAGE=0

1/16W MF-LF

5%

1K

402

R2211

1

2

SYNC_DATE=06/29/2006SYNC_MASTER=M50_DOUG

SB: 2 OF 4

21

22 97

051-7039

SB_GPIO30

PCI_REQ1_L

SB_CRT_TVOUT_MUX

PCI_REQ3_L

PCI_AD<7>

PCI_AD<6>

TP_PCI_GNT2_L

PCI_REQ2_L

PCI_GNT3_L

PCI_PME_FW_L

BOOT_LPC_SPI_L

PCI_GNT1_L

SB_GPIO31

SPI_SO

SPI_SCLK

ODD_PWR_EN_L

SB_GPIO_48

SPI_SI

USB_D_OC_L

USB_B_OC_L

USB_E_OC_L

USB_A_OC_L

SB_GPIO31

SPI_CE_L

PCI_REQ0_L

NB_SB_SYNC_L

TP_SB_RSVD9

SB_GPIO4

SB_GPIO3

SB_GPIO2

PCI_C_BE_L<0>

PCI_C_BE_L<1>

PCI_DEVSEL_L

PCI_PERR_L

PCI_STOP_L

PCI_RST_L

TP_PCI_PME_L

PLT_RST_L

PCI_TRDY_L

PCI_FRAME_L

PCI_IRDY_L

PCI_CLK_SB

PCI_PAR

PCI_LOCK_L

PCI_SERR_L

PCI_AD<0> PCI_AD<1>

PCI_AD<2>

PCI_AD<3> PCI_AD<4>

PCI_AD<5>

PCI_AD<8>

PCI_AD<9> PCI_AD<10>

PCI_AD<11> PCI_AD<12>

PCI_AD<13>

PCI_AD<14> PCI_AD<15>

PCI_AD<16>

PCI_AD<17> PCI_AD<18>

PCI_AD<19>

PCI_AD<20> PCI_AD<21>

PCI_AD<22> PCI_AD<23>

PCI_AD<24>

PCI_AD<25> PCI_AD<26>

PCI_AD<27>

PCI_AD<28> PCI_AD<29>

PCI_AD<30>

PCI_AD<31>

PCI_C_BE_L<2>

PCI_C_BE_L<3>

TP_PCI_GNT0_L

INT_PIRQA_L INT_PIRQB_L

INT_PIRQC_L

DMI_IRCOMP_R

SB_CLK100M_DMI_P

USB_RBIAS_PN

DMI_N2S_N<0>

DMI_N2S_P<0> DMI_S2N_N<0>

DMI_S2N_P<0>

DMI_S2N_N<2>

DMI_S2N_P<2>

DMI_N2S_N<3>

DMI_S2N_P<3>

DMI_S2N_N<3>

DMI_N2S_P<3>

USB_A_N

USB_A_P USB_B_N

USB_B_P

USB_C_N USB_C_P

USB_D_N USB_D_P

USB_E_P USB_F_N

USB_F_P

USB_G_N USB_G_P

USB_H_N

USB_E_N

SB_GPIO30

SB_GPIO29

SB_CLK100M_DMI_N

DMI_N2S_P<2>

DMI_N2S_N<2>

DMI_S2N_P<1>

DMI_S2N_N<1>

DMI_N2S_N<1>

DMI_N2S_P<1>

PCIE_A_D2R_N

PCIE_A_D2R_P PCIE_A_R2D_C_N

PCIE_A_R2D_C_P

PCIE_B_D2R_N

PCIE_B_D2R_P PCIE_B_R2D_C_N

PCIE_B_R2D_C_P

PCIE_C_D2R_N PCIE_C_D2R_P

PCIE_C_R2D_C_N

PCIE_C_R2D_C_P

PCIE_D_D2R_N PCIE_D_D2R_P

PCIE_D_R2D_C_N

PCIE_D_R2D_C_P

PCIE_E_D2R_N

PCIE_E_D2R_P

PCIE_E_R2D_C_N PCIE_E_R2D_C_P

PCIE_F_D2R_N

PCIE_F_D2R_P

PCIE_F_R2D_C_N PCIE_F_R2D_C_P

PP1V5_S0_SB_VCC1_5_B

=PP3V3_S5_SB_IO

USB_C_OC_L

USB_A_OC_L USB_B_OC_L

USB_E_OC_L

USB_D_OC_L

USB_C_OC_L

SB_GPIO29

SPI_ARB

USB_H_P

INT_PIRQD_L

TP_SB_XOR_AD5 TP_SB_XOR_AG4

TP_SB_XOR_AH4

TP_SB_XOR_AD9

TP_SB_XOR_AE5 TP_SB_XOR_AE9

TP_SB_XOR_AG8 TP_SB_XOR_AH8

=PP3V3_S0_SB

=PP3V3_S5_SB_USB

60

63

44

58

63

58

47

63

38

44

34

44

14

54

25

47

44

25

22

26

97

26

44

26

5

44

5

44

22

5

58

26

5

22

58

26

14

26

44

26

45

6

26

5

44

26

44

26

34

5

14

47

53

47

5

47

22

34

14

54

5

54

24

3

22

58

47

26

3

www.Vinaﬁx.vn

Preliminary

IN

OUT

IN

IO

OUT

IN

IO

IN

IO

IN

OUT

IO

IN

OUT

IN

OUT

IN

OUT

GPIO19/SATA1GP

GPIO21/SATA0GP

GPIO36/SATA2GP

CLK48

GPIO37/SATA3GP

CLK14

SUSCLK

SLP_S3*

SLP_S4*

SLP_S5*

PWROK

TP0/BATLOW*

GPIO16/DPRSLPVR

PWRBTN*

LAN_RST*

RSMRST*

GPIO10

GPIO9

GPIO12

GPIO14

GPIO13

GPIO24

GPIO15

GPIO25 GPIO35

GPIO38 GPIO39

SMBCLK

SMBDATA LINKALERT*

SMLINK1

SMLINK0

RI*

SYS_RST*

SPKR

SUS_STAT*

GPIO0/BM_BUSY*

GPIO18/STPPCI*

GPIO11/SMBALERT*

GPIO20/STPCPU*

GPIO26

GPIO28

GPIO27

GPIO32/CLKRUN*

GPIO33/AZ_DOCK_EN*

WAKE*

GPIO34/AZ_DOCK_RST*

SERIRQ THRM*

GPIO7

GPIO6

VRMPWRGD

GPIO8

(4 OF 6)

SMB

GPIO

PWR MNGT

SYS GPIO

CLKS

SATA GPIO

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS

NOTE FOR GPIO25:

- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)

NOTE:

HI = PRESENT LO = NOT PRESENT

SV_SET_UP IS LINDACARD DETECT

NOTE: SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’F IN RESET STATE TO SAVE PWR

DEF=GPI

(INT 20K PU)

NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN

PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE

LAYOUT NOTE:

(INT WEAK PD)

NOTE: RESERVED FOR FUTURE

NOT USED

NOTE FOR R2323 (DEF=NOSTUFF)

SB WILL DISABLE TCO TIMER

STRAPPING @ PWROK RISING:

SYSTEM REBOOT FEATURE

OD

AZALIA DOCKING INT’F

RESERVED FOR MOBILE

100

R2302

12

100

R2303

12

100

R2305

12

NOSTUFF

402

5%

MF-LF

10K

1/16W

R2306

1

2

402

5%

MF-LF

1/16W

10K

R2307

1

2

402

1/16W

MF-LF 5%

10K

NOSTUFF

R2308

1

2

5%

MF-LF

1/16W 402

10K

R2309

1

2

402

5%

MF-LF

1/16W

10K

R2310

1

2

1/16W

MF-LF 5%

NOSTUFF

402

10K

R2311

1

2

10K

1/16W

MF-LF 5%

402

R2313

1

2

402

NOSTUFF

0

1/16W

MF-LF 5%

R2314

1

2

402

10K

1/16W

MF-LF 5%

R2316

1

2

402

10K

1/16W

MF-LF 5%

R2317

1

2

402

1/16W

MF-LF 5%

10K

R2318

1

2

402

5%

MF-LF

1/16W

10K

R2319

1

2

402

5%

MF-LF

1/16W

10K

R2320

1

2

1/16W

5%

10K

SM-LF

RP2300

1234

8765

5%

402

MF-LF

1/16W

100K

R2399

12

1/16W

MF-LF 5%

402

1K

R2398

1

2

5%

MF-LF

1/16W

8.2K

402

R2397

1

2

MF-LF 5%

1/16W

10K

402

R2396

1

2

8.2K

1/16W

MF-LF

402

5%

R2395

1

2

OMIT

BGA

SB

ICH7-M

U2100

AC1

B2

AB18

A20

B23

F19

E19 R4

E22

AC22

AC20

AH18

AF21

AF19

R3

D20

A21

B21

E23

AG18

AC19

U2

AD21

AH19

AE19

AD20

AE20

AC21 AC18

E21

E20

C19

A26

C23

AA4

A28

Y4

AH21

B24

D23 F22

C22 B22

B25 A25

A19

A27

C20

A22

AF20

C21

AD22

F20

402

10K

5% 1/16W MF-LF

R2390

1

2

402

1/16W MF-LF

5%

10K

R2388

1

2

402

5%

MF-LF

1/16W

10K

NOSTUFF

R2387

1

2

MF-LF 5%

1/16W

NO_REBOOT_MODE

402

1K

R2323

1

2

NOSTUFF

1/16W

402 5%

MF-LF

10K

R2326

1

2

NOSTUFF

5%

MF-LF

1/16W 402

10K

R2327

1

2

5%

402

8.2K

1/16W MF-LF

R2343

1

2

051-7039

9723

21

SYNC_MASTER=M51_DOUG SYNC_DATE=06/29/2006

SB: 3 OF 4

GPU_PRESENT_R

TP_SB_GPIO24

SMC_RUNTIME_SCI_L

PM_THRM_L

SB_GPIO26

PCIE_WAKE_L

INT_SERIRQ

SMC_EXTSMI_L

VR_PWRGD_CK410

TP_SB_GPIO25_DO_NOT_USE

SV_SET_UP

TP_AZ_DOCK_EN_L

PM_CLKRUN_L

IDE_RESET_L

SMC_WAKE_SCI_L

FWH_MFG_MODE

TP_AZ_DOCK_RST_L

TP_SB_GPIO38

SB_CLK100M_SATA_OE_L

SMS_INT_L

=PP3V3_S5_SB_PM

PM_SLP_S3_L

SUS_CLK_SB

SB_CLK48M_USBCTLR

SB_CLK14P3M_TIMER

PM_BATLOW_L

=PP3V3_S5_SB

SMB_DATA

SB_SPKR

PM_BMBUSY_L

PM_STPCPU_L

PM_STPPCI_L

PATA_PWR_EN_L

=PP3V3_S5_SB

SATA_C_PWR_EN_L

=PP3V3_S0_SB_GPIO

BIOS_REC

FWH_MFG_MODE

=PP3V3_S5_SB

PM_SUS_STAT_L PM_SYSRST_L

PM_RI_L

SMLINK<0>

SMLINK<1>

SMB_LINK_ALERT_L

PM_LAN_ENABLE

PM_PWRBTN_L

PM_DPRSLPVR

PM_SB_PWROK

PM_SLP_S5_L

PM_SLP_S4_L

SB_GPIO37

SB_GPIO21

SB_GPIO19

SATA_C_DET_L

SMB_CLK

PM_RSMRST_L

BIOS_REC

SATA_C_PWR_EN_L

SV_SET_UP

=PP3V3_S5_SB

EFI_OK_R

SMB_ALERT_L

PATA_PWR_EN_L

SMC_SB_NMI

80

67

79

26

27

26

67

26

60

77

25

23

25

60

75

77

60

25

58

53

58

26

23

58

11

58

34

23

21

23

58

14

58

23

6

58

10

41

5

58

5

38

58

23

33

26

3

5

59

5

58

3

27

14

33

23

3

23

3

23

3

5

26

58

5

26

58

5

38

27

58

23

5

3

23

58

www.Vinaﬁx.vn

Preliminary

(6 OF 6)

VSS

V5REF_SUS

VCC3_3

VCCDMIPLL

VCCSATAPLL

VCC3_3

VCCRTC

VCCUSBPLL

VCCSAUS1_5

VCC PAUX

USB CORE

VCC1_5_A

ARX

USB

PCI

IDE

VCCA3GP

CORE

ATX

VCC1_5_A

VCC3_3

VCCSUS3_3

VCC1_5_A

VCCSUS3_3

VCC1_5_A

VCCLAN1_5

V_CPU_IO

VCC3_3/VCCHDA

VCCSUS3_3/VCCSUSHDA

VCCLAN_3_3

VCC1_05

V5REF

VCC1_5_B

(5 OF 6)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CODEC IC’S CONSIDERED SO FAR ARE 3.3V

DEPENDING ON VIO OF AZALIA INTERFACE

VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V

NOTE:

VOLTAGE GENERATED INTERNALLY SO NO CONNECT HERE

CHANGE SYMBOL TO 1.05

S0 OR S3 IF NOT

S3 IF INTERNAL LAN IS USED

NOTE FOR VCCLAN_3_3:

0 0

OMIT

BGA

ICH7-M

SB

U2100

A4

A23

B1

B8

B11 B14

B17

B20 B26

B28 C2

C6

C27

D10

D13

D18

D21 D24

E1

E2 E4

E8 E15

F3

F4

F5 F12

F27

F28 G1

G2

G5 G6

G9 G14

G18

G21

G24 G25

G26

H3 H4

H5

H24 H27

H28

J1

J2

J5

J24 J25

J26

K24 K27

K28

L13 L15

L24

L25 L26

M3

M4 M5

M12

M13 M14

M15

M16

M17

M24

M27 M28

N1

N2 N5

N6

N11 N12

N13

N14

N15 N16

AE24 AE25

AF2

AF4 AF8

AF11

AF27 AF28

N17

AG1

AG3 AG7

AG11 AG14

AG17

AG20 AG25

AH1

AH3

N18

AH7

AH12

AH23 AH27

N24

N25 N26

P3

P4 P12

P13

P14 P15

P16

P17

P24

P27

P28

R1

R11

R12 R13

R14

R15 R16

R17

R18

T6 T12

T13 T14

T15

T16 T17

U4

U12 U13

U14

U15

U16 U17

U24 U25

U26

V2 V13

V15

V24

V27

V28

W6

W24 W25

W26

Y3

Y24

Y27 Y28

AA1

AA24

AA25 AA26

AB4

AB6

AB11

AB14 AB16

AB19

AB21 AB24

AB27

AB28

AC2 AC5

AC9

AC11

AD1

AD3

AD4 AD7

AD8

AD11

AD15 AD19

AD23

AE2 AE4

AE8 AE11

AE13

AE18 AE21

OMIT

BGA

SB

ICH7-M

U2100

G10

AD17

F6

AE23

AE26

AH26

L11

P18

T11

T18 U11

U18

V11 V12

V14

V16 V17

L12

V18

L14

L16 L17

L18

M11 M18

P11

AB7

AC6

AB9 AC10

AD10

AE10 AF10

AF9

AG9

AH9

AB17

AC17

AC7

T7

F17

G17

AB8 AC8

A1 H6

H7

J6 J7

AD6

AE6

AF5

AF6

AG5

AH5

AB10

AA22

AA23

AD28

D26

D27

D28

E24

E25

E26

F23

F24

G22

AB22

G23

H22

H23

J22

J23

K22

K23

L22

L23

M22

AB23

M23

N22

N23

P22

P23

R22

R23

R24

R25

R26

AC23

T22

T23

T26

T27

T28

U22

U23

V22

V23

W22

AC24

W23

Y22

Y23

AC25

AC26 AD26

AD27

U6

B27

AH11

AG19

A5 B13

B16

B7 C10

D15

F9 G11

G12

AA7

G16

AB12

AB20 AC16

AD13

AD18 AG12

AG15

AG28

AA2

Y7

V5 V1

W2

W7

W5

AD2

K7

C28

G20

R7

P7

A24

L1

L2

L3 L6

L7

M6 M7

N7

E3

C24

D19 D22

G19

K3

K4 K5

K6

C1

SB: 4 OF 4

SYNC_DATE=06/29/2006SYNC_MASTER=M50_DOUG

21

24 97

051-7039

=PP1V5_S0_SB_VCCUSBPLL

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCC1_5_A

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S5_SB_VCCSUS3_3

PP3V3_S5_SB_RTC

=PP3V3_S0_SB_VCC3_3_PCI

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S5_SB_VCCSUS3_3

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCCSATAPLL

=PP1V5_S0_SB_VCC1_5_A_ARX

PP1V5_S0_SB_VCCDMIPLL

=PP3V3_S0_SB_VCC3_3

=PP1V05_S0_SB_CPU_IO

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S0_SB_VCCLAN3_3

=PPVCORE_S0_SB

PP5V_S5_SB_V5REF_SUS

PP5V_S0_SB_V5REF

PP1V5_S0_SB_VCC1_5_B

25

26

25

24

25

24

25

24

25

24

21

25

3

21

3

25

3

25

22

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PLACE CAPS AT EDGE OF SB

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PIN AG5

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR

100-OHM,4A,0805

155S0247

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS A1 ... J7

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS AA7 ... AG19

PLACEMENT NOTE: PLACE < 2.54MM OF SB ON SECONDARY OR

3.56MM ON PRIMARY NEAR PIN U6

PLACE < 2.54MM OF SB ON SECONDARY OR

3.56MM ON PRIMARY NEAR PIN AD2

3.56MM ON PRIMARY NEAR PIN AH11

3.56MM ON PRIMARY NEAR PIN AG9

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2500 & C2505-07 < 2.54MM OF SB

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2504 < 2.54MM OF PIN F6 OF SB

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2503 < 2.54MM OF PIN AD17 OF SB

PLACEMENT NOTE:

NEAR PINS D28, T28, AD28

PLACEMENT NOTE:

PLACE C2509 NEAR PIN B27 OF SB

PLACEMENT NOTE:

PLACE CAP UNDER SB NEAR PINS V1,

V5, W2, OR W7

PLACE C2520 NEAR PIN E3 OF SB

PLACEMENT NOTE:

NEAR PINS A5 ... G16

DISTRIBUTE IN PCI SECTION OF SB

PLACEMENT NOTE:

PLACE C2520 NEAR PIN C1 OF SB

PLACEMENT NOTE:

PLACE CAPS NEAR PIN W5 OF SB

PLACEMENT NOTE:

PLACE CAPS NEAR PINS

PLACEMENT NOTE:

PLACE CAPS NEAR PINS

PLACEMENT NOTE:

K3 ... N7 OF SB

PLACE CAPS NEAR PINS

PLACEMENT NOTE:

AB8 AND AC8 OF SB

PLACE NEAR PINS AE23, AE26 & AH26 OF SB

1UH,0.5A,20%,1206

152S0315

SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACEMENT NOTE: PLACE < 2.54MM OF SB ON

A24 ... G19 AND P7 OF SB

SMB2

2.5V POLY

20%

220UF

C2500

1

2

X5R

16V

10%

0.1UF

402

C2510

1

2

0

402

0.1UF

10% 16V X5R

C2512

1

2

0

1/10W

603

1

5%

MF-LF

R2500

12

BAT54E3

SOT23

D2501

1

3

BAT54E3

SOT23

D2500

1

3

603

CERM

6.3V

20%

4.7UF

C2524

1

2

402

0.1UF

10% 16V X5R

C2540

1

2

1UF

10%

CERM

6.3V

402

C2541

1

2

X5R

16V

10%

0.1UF

402

C2542

1

2

16V

0.1UF

402

10%

X5R

C2503

1

2

0

402

0.1UF

10% 16V X5R

C2504

1

2

0

1%

10

402

1/16W MF-LF

R2501

12

SM-3

100-OHM-EMI

L2500

12

0

0.1UF

10% 16V X5R 402

C2505

1

2

X5R

16V

10%

0.1UF

402

C2506

1

2

0.1UF

10% 16V X5R 402

C2507

1

2

0.28-OHM

1206

L2507

12

0.01UF

10% 16V CERM 402

C2501

1

2

20%

6.3V CERM 805-1

10UF

C2508

1

2

0

0.1UF

10% 16V X5R 402

C2509

1

2

0

402

X5R

16V

10%

0.1UF

C2511

1

2

0

0.1UF

402

X5R

16V

10%

C2517

1

2

0

0.1UF

10% 16V X5R 402

C2513

1

2

0

402

6.3V CERM

10%

1UF

C2514

1

2

0

CERM

0.01UF

402

16V

10%

C2520

1

2

CERM

0.01UF

10% 16V

402

C2515

1

2

0

20%

330UF

ELEC

6.3V

CASE-C1

C2516

1

2

5%

1/16W

402

MF-LF

100

R2502

1

2

10%

CERM

6.3V

402

1UF

C2502

1

2

402

0.1UF

10% 16V X5R

C2518

1

2

0

X5R

16V

10%

0.1UF

402

C2519

1

2

0

402

0.1UF

10% 16V X5R

C2521

1

2

0

0.1UF

16V X5R 402

10%

C2522

1

2

X5R

16V

10%

0.1UF

402

C2523

1

2

0

X5R

16V

10%

0.1UF

402

C2525

1

2

0

0.1UF

16V X5R

10%

402

C2526

1

2

402

0.1UF

10% 16V X5R

C2527

1

2

X5R

16V

10%

0.1UF

402

C2528

1

2

402

0.1UF

10% 16V X5R

C2529

1

2

0

402

0.1UF

10% 16V X5R

C2530

1

2

402

0.1UF

10% 16V X5R

C2534

1

2

0

402

0.1UF

10% 16V X5R

C2531

1

2

402

0.1UF

10% 16V X5R

C2532

1

2

0

402

0.1UF

10% 16V X5R

C2533

1

2

SYNC_DATE=06/29/2006

SB:DECOUPLING

21

25 97

051-7039

SYNC_MASTER=M51_DOUG

=PP5V_S5_SB

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP5V_S5_SB_V5REF_SUS

=PP3V3_S0_SB_VCC3_3_PCI

PP3V3_S5_SB_RTC

=PP1V5_S0_SB_VCCUSBPLL

PP1V5_S0_SB_R

VOLTAGE=1.5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP1V5_S0_SB_VCCDMIPLL

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=1.5V

=PP1V5_S0_SB

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP5V_S0_SB_V5REF

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S5_SB_VCCSUS3_3

=PP1V5_S0_SB_VCC1_5_A

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP1V5_S0_SB_VCCSATAPLL

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB

=PP3V3_S5_SB

=PP5V_S0_SB

=PP3V3_S0_SB

=PP1V05_S0_SB_CPU_IO

VOLTAGE=1.5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP1V5_S0_SB_VCC1_5_B

=PPVCORE_S0_SB

26

25

26

24

25

24

25

23

22

21

24

3

24

3

21

3

24

3

24

3

22

3

www.Vinaﬁx.vn

Preliminary

OUT

IO

IN

IO

OUT

IN

OUT

IN

VCC

GND

IN

OUT

IN

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

USING 1% FOR BOM CONSOLIDATION

PLACE R2603 IN ACCESSIBLE LOCATION

FLASH DURING DEVELOPMENT

RESET_L IN CASE OF BAD SMC

PROVIDE PADS TO SHORT THIS

RESISTOR TO GND USED TO

RESET

NOTE: ISL6262 SPEC (P 5) SAID TO USE 1.9K

SHOULD BE STUFFED WITH ITP & NO DEVELOPMENT

NOTE: R2696 CAN’T EXIST WITH BOTH ITP & DEVELOPMENT

0

1%

20.0K

402

1/16W

MF-LF

R2600

12

BAT54E3

SOT23

D2600

13

BAT54E3

SOT23

D2601

13

SOT23-5

74LVC1G04DBVG4

U2603

2

3

5

4

402

20% 10V

CERM

0.1UF

C2611

12

10%

6.3V CERM 402

1UF

C2605

1

2

SPST

SM-LF

DEVELOPMENT

SW2600

12

34

DEVELOPMENT

10K

MF-LF

5% 1/16W

402

R2699

1

2

0

DEVELOPMENT

SOT143

MAX6816

U2699

1

23

4

402

DEVELOPMENT

20% 10V CERM

0.1UF

C2699

1

2

DEVELOPMENT

402

MF-LF

1/16W

5%

100K

R2698

1

2

0.1UF

20%

DEVELOPMENT

10V CERM 402

C2698

1

2

1%

402

1M

1/16W

MF-LF

R2606

1

2

SB_SYSRST_4_PVT

402

MF-LF

1/16W

5%

10K

R2697

1

2

MF-LF

1/16W

5%

0

402

NOT_DEVELOPMENT_PLUS_ITP

R2696

12

32.768K

SM-LF

CRITICAL

Y2600

14

SOT23-5-LF

MC74VHC1G08

U2601

3

2

1

4

5

SOT23-5-LF

DEVELOPMENT

MC74VHC1G08

U2698

3

2

1

4

5

DEVELOPMENT

MF-LF

1/16W

5%

1K

402

R2650

12

402

10K

5% 1/16W MF-LF

R2651

1

2

MF-LF

1/16W

5%

402

1K

R2607

1

2

0

5% 1/16W MF-LF 402

NOSTUFF

R2603

1

2

0

CRITICAL

BB1020

SM

J2600

2

1

402

10M

MF-LF

1/16W

5%

R2609

1

2

1%

1.82K

1/16W MF-LF

402

R2611

12

402

0.1UF

CERM

10V

20%

C2607

12

402

5%

MF-LF

1/16W

10K

R2612

12

0

15PF

CERM 402

5%

50V

C2608

12

10K

R2622

12

15PF

50V

5%

402

CERM

C2609

12

8.2K

R2623

12

8.2K

R2624

12

8.2K

R2625

12

8.2K

R2626

12

0

8.2K

R2627

12

8.2K

R2628

12

8.2K

R2629

12

8.2K

R2630

12

8.2K

R2631

12

8.2K

R2632

12

8.2K

R2633

12

8.2K

R2634

12

8.2K

R2636

12

8.2K

R2637

12

8.2K

R2638

12

8.2K

R2639

12

8.2K

R2640

12

8.2K

R2641

12

8.2K

R2642

12

8.2K

R2643

12

CERM

6.3V

10%

1UF

402

C2610

1

2

051-7039

21

26 97

SB: MISC

SYNC_DATE=06/29/2006SYNC_MASTER=M50_DOUG

ALL_SYS_PWRGD

MAKE_BASE=TRUE

SB_GPIO5ODD_PWR_EN_L

U2698_4

SMS_INT_L

PP3V3_S5

=PP3V3_S0_SB_PCI

PP3V3_S5

PCI_PERR_L

PCI_IRDY_L

PCI_FRAME_L

PCI_TRDY_L

PCI_STOP_L

PCI_REQ0_L

PCI_REQ2_L

VR_PWRGOOD_DELAY

SW_RST_DEBNC

XDP_DBRESET_L

PM_SB_PWROK

=PP3V3_S0_SB_PM

SB_GPIO2

SB_GPIO3 SB_GPIO4

INT_PIRQC_L

INT_PIRQD_L

INT_PIRQB_L

INT_PIRQA_L

PCI_REQ3_L

PCI_REQ1_L

PCI_LOCK_L

PCI_DEVSEL_L

PCI_SERR_L

PP3V3_S0

CK410_PD_VTT_PWRGD_L

PPVBATT_S5_RTC

MIN_LINE_WIDTH=0.6MM

VOLTAGE=3.3V

SB_SM_INTRUDER_L

=PP3V3_S5_SB

VR_PWRGD_CK410_L

VR_PWRGD_CK410

PM_SYSRST_L

SB_RTC_X1

SB_RTC_X2

SW_RST_BTN_L

SB_RTC_RST_L

VOLTAGE=3.3V

PPVBATT_S5_RTC_R

MIN_LINE_WIDTH=0.6MM

PP3V3_S5

PP3V3_S5_SB_RTC

MIN_LINE_WIDTH=0.6MM

83

80

79

84

79

78

83

78

77

76

77

76

41

76

66

27

66

65

26

65

84

26

10

26

77

6

75

11

6

25

6

25

58

5

44

14

7

38

44

5

33

23

58

5

24

5

22

23

3

22

5

23

3

22

3

21

3

75

5

23

21

3

21

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Clock Chip

ICH7-M

CY28445: U3301

(MASTER)

U5800

SMC

(MASTER)

Unused SMC "Battery A/B" SMBus

TAOS PN? J4750

SMC "A" SMBus Connections

(ADDRESS)

Address 0x96

SMC "B" SMBus Connections

Address 0x90

MAX6642, J1080

NB Heatsink

SMC

U5800

(MASTER)

CPU Heatsink

LM75, J1000

ADDRESS 0x94

(MASTER)

SMC

ADT7461: U1000

Address 0x94

M35 Airport - J5300

ICH7-M SMBus Connections

SMC "0" SMBus Connections

Ambient Intake

(Write: 0x98 Read: 0x99)

(Write: 0x92 Read: 0x93)

J6601

LM75, J1050

LM75, J1070

U5800

(Write: 0x98 Read: 0x98)

CPU Diode Temp

ODD Temp

J6602

HDD Temp

(Write: 0x90 Read: 0x91)

MAX6649 on nVidia card

GPU on card - J8400

(MASTER)

U2100

2x SO-DIMMS

J2800 & J2900

MXM Temp

Mini-Card

(Write: 0xD2 Read: 0xA1)

GPU Heatsink

ALSSMC

U5800

(MASTER)

SMC

U5800

SMBUS_SB_SDA

MF-LF

2.2K

402

1/16W

5%

R2700

1

2

2.2K

MF-LF

1/16W

5%

402

R2701

1

2

2.2K

1/16W

402

MF-LF

5%

R2751

1

2

402

MF-LF

1/16W

5%

2.2K

R2750

1

2

SMBUS_SMC_0_S0_SDA

5%

402

MF-LF

1/16W

2.2K

R2771

1

2

5% 1/16W MF-LF

402

2.2K

R2770

1

2

SMBUS_SMC_A_S3_SDA

1/16W

402

5%

2.2K

MF-LF

R2761

1

2

402

1/16W

2.2K

MF-LF

5%

R2760

1

2

SMBUS_SMC_B_S0_SDA

MF-LF

1/16W

5%

402

10K

R2781

1

2

402

MF-LF

1/16W

5%

10K

R2780

1

2

SMBUS_SMC_BSA_SDA

MF-LF

1/16W

5%

402

10K

R2791

1

2

402

MF-LF

1/16W

5%

10K

R2790

1

2

SMBUS_SMC_BSB_SDA

SYNC_MASTER=M51_DAVE

SYNC_DATE=(MASTER)

051-7039

21

27 97

M51 SMBus Connections

SMB_BSB_DATA

MAKE_BASE=TRUE

SMBUS_SMC_BSB_SCL

MAKE_BASE=TRUE

SMBUS_SMC_BSA_SCL

=PP3V3_S5_SMC

SMB_A_S3_DATA

SMB_A_S3_CLK

I2C_ALS_SDA

SMB_0_S0_CLK

SMB_CLK

=SMB_AIRPORT_CLK

=SMB_AIRPORT_DATA

=SMB_GPU_THRM_DATA

=PP3V3_S0_SB_GPIO

=I2C_MEM_SCL

SMB_DATA =I2C_MEM_SDA

MAKE_BASE=TRUE

SMBUS_SB_SCL

=I2C_HD_TEMP_SDA

=I2C_ODD_TEMP_SCL

=I2C_ODD_TEMP_SDA

SMB_B_S0_CLK

=SMB_THRM_CLK

=SMB_THRM_DATA

=SMB_CPU_HS_THRM_DATA

=SMB_CPU_HS_THRM_CLK

=I2C_HD_TEMP_SCL

=SMB_AMB_TEMP_DATA

=SMB_GPU_THRM_CLK

PP3V3_S0

=SMB_GPU_HS_THRM_DATA

=SMB_AMB_TEMP_CLK

SMB_CK410_DATA

SMB_CK410_CLK

PP3V3_S0

SMB_B_S0_DATA

=SMB_GPU_HS_THRM_CLK

=SMB_NB_HS_THRM_CLK

=SMB_NB_HS_THRM_DATA

MAKE_BASE=TRUE

SMBUS_SMC_0_S0_SCL

MAKE_BASE=TRUE

SMB_0_S0_DATA

SMBUS_SMC_B_S0_SCL

MAKE_BASE=TRUE

I2C_ALS_SCL

PP3V3_S3

SMB_BSA_CLK

SMB_BSA_DATA

SMB_BSB_CLK

MAKE_BASE=TRUE

SMBUS_SMC_A_S3_SCL

MAKE_BASE=TRUE

84

83

76

41

27

26

59

10

83

58

23

6

53

27

21

29

5

6

5

58

3

58

47

58 23

53

10

3

28

23 28

5

66

58

10

66

10

3

10

33

3

58

10

58

47

3

58

5

www.Vinaﬁx.vn

Preliminary

DQ58

DQ59

SA1GNDVDDSPD

SDA

SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Power aliases required by this page:

DDR2 VRef

TO NETS TO IMPROVE PLANE POUR

SOME ANCHOR PINS CONNECTED

516S0403

NC

ADDR=0xA0(WR)/0xA1(RD)

NC

(For return current)

DDR2 Bypass Caps

(NONE)

- =I2C_MEM_SCL

- =I2C_MEM_SDA

BOM options provided by this page:

Signal aliases required by this page:

Page Notes

- =PP1V8_S3_MEM

- =PPSPD_S0_MEM (2.5V - 3.3V)

One 0.1uF per connector

20%

402

CERM

0.1uF

10V

C2813

1

2

20%

402

CERM

0.1uF

10V

C2812

1

2

20%

402

CERM

0.1uF

10V

C2811

1

2

20%

402

CERM

0.1uF

10V

C2810

1

2

10V

0.1uF

CERM 402

20%

C2819

1

2

10V

0.1uF

CERM 402

20%

C2818

1

2

10V

0.1uF

CERM 402

20%

C2817

1

2

10V

0.1uF

CERM 402

20%

C2816

1

2

10V

0.1uF

CERM 402

20%

C2821

1

2

0.1uF

10V

CERM 402

20%

C2820

1

2

10V

0.1uF

CERM 402

20%

C2815

1

2

10V

0.1uF

CERM 402

20%

C2814

1

2

CERM

402

10V

20%

0.1uF

C2800

1

2

20%

10UF

6.3V

X5R 603

C2804

1

2

20%

10UF

6.3V

X5R 603

C2803

1

2

20%

10UF

6.3V

X5R 603

C2802

1

2

20%

10UF

6.3V

X5R 603

C2801

1

2

DDR2-SODIMM-STD

CRITICAL

F-RT-SM2

J2800

102101

105

9089

100

99

9897

94

92

93

91

107

106

85

113

30

32

164

166

79

10

26

52

67

130

147

170

185

5

7

35

37

20

22

36

38

43

45

55

57

17

44

46

56

58

61

63

73

75

62

64

19

74

76

123

125

135

137

124

126

134

136

4

141

143

151

153

140

142

152

154

157

159

6

173

175

158

160

174

176

179

181

189

191

14

180

182

192

194

16

23

25

13

11

31

29

51

49

70

68

131

129

148

146

169

167

188

186

201

202

203

204

205

116

86

84

80

119

115

50

69

83

120

163

114

108

110

198

200

197

195

81 82

117 118

87 88

95 96

103 104

111 112

199

1 2

3

27 28

33 34

39 40

41 42

47 48

8

53 54

59 60

65 66

71 72

77 78

121 122

127 128

132

133

138

139

144

9

145

149 150

155 156

161 162

165

168

171

12

172

177 178

183 184

187

190

193

196

15

18

21

24

109

10%

2.2UF

6.3V

CERM1

603

C2850

1

2

402

10V

CERM

20%

0.1uF

C2852

1

2

2.2UF

10%

6.3V

CERM1

603

C2851

1

2

MF-LF 402

1K

1% 1/16W

R2800

1

2

1%

402

1K

1/16W MF-LF

R2801

1

2

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

28 97

21

051-7039

DDR2 SO-DIMM Connector A

MEM_VREF

MEM_A_DQ<0> MEM_A_DQ<1>

MEM_A_DQ<2>

MEM_VREF

MIN_LINE_WIDTH=0.25 mm MIN_NECK_WIDTH=0.25 mm

VOLTAGE=0.9V

=PP1V8_S3_MEM

MEM_A_DM<1>

MEM_A_DQS_P<0>

MEM_A_DQ<57>

MEM_A_DQ<51>

MEM_A_DQS_P<6>

MEM_A_DQ<42>

MEM_A_DQ<40>

MEM_A_DQ<34>

MEM_A_DQS_N<0>

MEM_A_DQ<3>

MEM_A_DQ<8> MEM_A_DQ<9>

MEM_A_DQS_N<1>

MEM_A_DQS_P<1>

MEM_A_DQ<10>

MEM_A_DQ<11>

MEM_A_DQ<16>

MEM_A_DQ<17>

MEM_A_DQS_N<2>

MEM_A_DQS_P<2>

MEM_A_DQ<18>

MEM_A_DQ<19>

MEM_A_DQ<24>

MEM_A_DQ<25>

MEM_A_DM<3>

MEM_A_DQ<26> MEM_A_DQ<27>

MEM_CKE<0>

MEM_A_BS<2>

MEM_A_A<12> MEM_A_A<9>

MEM_A_A<8>

MEM_A_A<5>

MEM_A_A<3>

MEM_A_A<1>

MEM_A_A<10>

MEM_A_BS<0> MEM_A_WE_L

MEM_A_CAS_L

MEM_CS_L<1>

MEM_ODT<1>

MEM_A_DQ<32> MEM_A_DQ<33>

MEM_A_DQS_N<4> MEM_A_DQS_P<4>

MEM_A_DQ<35>

MEM_A_DQ<41>

MEM_A_DM<5>

MEM_A_DQ<48>

MEM_A_DQ<49>

MEM_A_DQS_N<6>

MEM_A_DQ<50>

MEM_A_DQ<56>

MEM_A_DM<7>

MEM_A_DQ<58> MEM_A_DQ<59>

=I2C_MEM_SDA =I2C_MEM_SCL

MEM_A_DQ<43>

MEM_A_DQ<7>

MEM_A_DQ<13>

MEM_CLK_N<0>

MEM_A_DQ<14>

MEM_A_DQ<15>

MEM_A_DQ<20>

MEM_A_DQ<21>

DIMM_OVERTEMP_L

MEM_A_DM<2>

MEM_A_DQ<22>

MEM_A_DQ<23>

MEM_A_DQ<28>

MEM_A_DQ<29>

MEM_A_DQS_N<3> MEM_A_DQS_P<3>

MEM_A_DQ<30>

MEM_CKE<1>

MEM_A_DQ<61>

MEM_A_DQ<55>

MEM_A_DM<6>

MEM_A_DQ<47>

MEM_A_DQ<46>

TP_MEM_A_A<15>

TP_MEM_A_A<14>

MEM_A_A<11> MEM_A_A<7>

MEM_A_A<6>

MEM_A_A<4>

MEM_A_A<2>

MEM_A_A<0>

MEM_A_BS<1>

MEM_A_RAS_L MEM_CS_L<0>

MEM_ODT<0>

MEM_A_A<13>

=PP1V8_S3_MEM

MEM_A_DQ<36> MEM_A_DQ<37>

MEM_A_DM<4>

MEM_A_DQ<38> MEM_A_DQ<39>

MEM_A_DQ<44> MEM_A_DQ<45>

MEM_A_DQS_N<5> MEM_A_DQS_P<5>

MEM_A_DQ<53>

MEM_CLK_P<1>

MEM_CLK_N<1>

MEM_A_DQ<54>

MEM_A_DQ<60>

MEM_A_DQS_N<7>

MEM_A_DQS_P<7>

MEM_A_DQ<62>

MEM_A_DQ<63>

MEM_A_DQ<31>

MEM_A_DQ<52>

MEM_CLK_P<0>

=PPSPD_S0_MEM

=PP1V8_S3_MEM

MEM_A_DQ<12>

MEM_A_DQ<6>

MEM_A_DM<0>

MEM_A_DQ<5>

MEM_A_DQ<4>

29

28

30

29

59

30

28

29

28

15

28

3

15

14

15

14

15

27

15

14

15

29

15

14

15

14

15

3

15

14

15

14

3

15

www.Vinaﬁx.vn

Preliminary

DQ58

DQ59

SA1GNDVDDSPD

SDA

SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Resistor prevents pwr-gnd short

The reference voltage must be provided

by another page.

(NONE)

- =I2C_MEM_SDA

- =I2C_MEM_SCL

DDR2 Bypass Caps

(For return current)

Signal aliases required by this page:

Page Notes

Power aliases required by this page:

BOM options provided by this page:

516S0404

NC

ADDR=0XA4(WR)/0XA5(RD)

NOTE: This page does not supply VREF.

- =PP1V8_S3_MEM

- =PPSPD_S0_MEM (2.5V - 3.3V)

SOME ANCHOR PINS CONNECTED TO NETS TO IMPROVE PLANE POUR

6.3V

402

CERM

10%

1UF

C2908

1

2

0.1uF

10V

CERM

402

20%

C2900

1

2

402

MF-LF

1/16W

5%

10K

R2900

1

2

402

6.3V

CERM

10%

1UF

C2909

1

2

1UF

10%

CERM

6.3V

402

C2910

1

2

1UF

10%

CERM

6.3V

402

C2911

1

2

1UF

10%

CERM

6.3V

402

C2915

1

2

1UF

10%

CERM

6.3V

402

C2914

1

2

6.3V

CERM

10%

1UF

402

C2913

1

2

6.3V

CERM

10%

1UF

402

C2912

1

2

1UF

10%

CERM

6.3V

402

C2919

1

2

1UF

10%

CERM

6.3V

402

C2918

1

2

6.3V

CERM

10%

1UF

402

C2917

1

2

6.3V

CERM

10%

1UF

402

C2916

1

2

1UF

10%

CERM

6.3V

402

C2923

1

2

1UF

10%

CERM

6.3V

402

C2922

1

2

6.3V

CERM

10%

1UF

402

C2921

1

2

6.3V

CERM

10%

1UF

402

C2920

1

2

CRITICAL

DDR2-SODIMM-REV

F-RT-SM2

J2900

102101

105

9089

100

99

9897

94

92

93

91

107

106

85

113

30

32

164

166

79

10

26

52

67

130

147

170

185

5

7

35

37

20

22

36

38

43

45

55

57

17

44

46

56

58

61

63

73

75

62

64

19

74

76

123

125

135

137

124

126

134

136

4

141

143

151

153

140

142

152

154

157

159

6

173

175

158

160

174

176

179

181

189

191

14

180

182

192

194

16

23

25

13

11

31

29

51

49

70

68

131

129

148

146

169

167

188

186

201

202

203

204

205

116

86

84

80

119

115

50

69

83

120

163

114

108

110

198

200

197

195

81 82

117 118

87 88

95 96

103 104

111 112

199

1 2

3

27 28

33 34

39 40

41 42

47 48

8

53 54

59 60

65 66

71 72

77 78

121 122

127 128

132

133

138

139

144

9

145

149 150

155 156

161 162

165

168

171

12

172

177 178

183 184

187

190

193

196

15

18

21

24

109

2.2UF

10%

603

CERM1

6.3V

C2950

1

2

402

10V

CERM

20%

0.1uF

C2952

1

2

2.2UF

10%

6.3V

CERM1

603

C2951

1

2

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

9729

051-7039

21

DDR2 SO-DIMM Connector B

MEM_B_DQ<5>

MEM_B_DQS_N<0>

=PP1V8_S3_MEM

MEM_B_DQ<13>

MEM_CLK_N<3>

MEM_VREF

MEM_CLK_P<3>

MEM_B_DQ<14>

MEM_B_DM<0>

MEM_B_A<3>

=PP1V8_S3_MEM

=PP0V9_S0_MEM_TERM

=PP1V8_S3_MEM

=PPSPD_S0_MEM

MEM_B_DQ<52>

MEM_B_DQ<31>

MEM_B_SPD_SA1

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQS_P<7>

MEM_B_DQS_N<7>

MEM_B_DQ<60>

MEM_B_DQ<54>

MEM_CLK_N<2>

MEM_CLK_P<2>

MEM_B_DQ<53>

MEM_B_DQS_P<5>

MEM_B_DQS_N<5>

MEM_B_DQ<45>

MEM_B_DQ<44>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DM<4>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_A<13>

MEM_ODT<2>

MEM_CS_L<2>

MEM_B_RAS_L

MEM_B_BS<1>

MEM_B_A<0>

MEM_B_A<2>

MEM_B_A<4>

MEM_B_A<6>

MEM_B_A<7>

MEM_B_A<11>

TP_MEM_B_A<14>

TP_MEM_B_A<15>

MEM_B_DQ<46>

MEM_B_DQ<47>

MEM_B_DM<6>

MEM_B_DQ<55>

MEM_B_DQ<61>

MEM_CKE<3>

MEM_B_DQ<30>

MEM_B_DQS_P<3>

MEM_B_DQS_N<3>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DM<2>

DIMM_OVERTEMP_L

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<15>

MEM_B_DQ<7>

MEM_B_DQ<6>

MEM_B_DQ<12>

MEM_B_DQ<43>

=I2C_MEM_SCL

=I2C_MEM_SDA

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DM<7>

MEM_B_DQ<56>

MEM_B_DQ<50>

MEM_B_DQS_N<6>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DM<5>

MEM_B_DQ<41>

MEM_B_DQ<35>

MEM_B_DQS_P<4>

MEM_B_DQS_N<4>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_ODT<3>

MEM_CS_L<3>

MEM_B_CAS_L

MEM_B_WE_L

MEM_B_BS<0>

MEM_B_A<10>

MEM_B_A<1>

MEM_B_A<5>

MEM_B_A<8>

MEM_B_A<9>

MEM_B_A<12>

MEM_B_BS<2>

MEM_CKE<2>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DM<3>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQS_P<2>

MEM_B_DQS_N<2>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<11>

MEM_B_DQ<10>

MEM_B_DQS_P<1>

MEM_B_DQS_N<1>

MEM_B_DQ<9>

MEM_B_DQ<8>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<1>

MEM_B_DQ<0>

MEM_B_DQ<34>

MEM_B_DQ<40>

MEM_B_DQ<42>

MEM_B_DQS_P<6>

MEM_B_DQ<51>

MEM_B_DQ<57>

MEM_B_DQS_P<0>

MEM_B_DM<1>

=PPSPD_S0_MEM

=PP1V8_S3_MEM

MEM_B_DQ<4>

29

28

30

28 30

28

30

59

28

30

28

15

3

15

14

28

14

15

3 3

3

15

14

15

14

15

5

15

14

15

28

15

27

15

14

15

14

15

3

15

www.Vinaﬁx.vn

Preliminary

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

One cap for each side of every RPAK, one cap for every two discrete resistors

BOMOPTION shown at the top of each group applies to every part below it

56

5%

1/16W MF-LF

402

R3001

12

5%

MF-LF

402

56

1/16W

R3009

12

MF-LF

402

5%561/16W

R3011

12

402

MF-LF1/16W

5%

56

R3025

12

5%

1/16W MF-LF

402

56

R3035

12

0

2

1

29 15

20% 10V CERM 402

0.1uF

C3004

1

2

10V

0.1uF

402

CERM

20%

C3006

1

2

20% 10V CERM 402

0.1uF

C3008

1

2

20% 10V CERM 402

0.1uF

C3009

1

2

20%

CERM 402

10V

0.1uF

C3013

1

2

402

CERM

10V

20%

0.1uF

C3014

1

2

402

CERM

10V

20%

0.1uF

C3015

1

2

5%

1/16W

SM-LF

56

RP3000

36

5%

1/16W

SM-LF

56

RP3000

45

5%

1/16W

SM-LF

56

RP3000

18

5%

1/16W

SM-LF

56

RP3000

27

5%

SM-LF

56

1/16W

RP3001

27

5%

1/16W

SM-LF

56

RP3001

18

5%

1/16W

SM-LF

56

RP3001

45

5%

SM-LF

56

1/16W

RP3001

36

5%

SM-LF

1/16W

56

RP3002

45

5%

1/16W

SM-LF

56

RP3002

18

5%

1/16W

SM-LF

56

RP3002

27

5%

1/16W

SM-LF

56

RP3002

36

SM-LF

1/16W

5%

56

RP3003

18

SM-LF

56

1/16W

5%

RP3003

27

SM-LF

5%

1/16W

56

RP3003

36

SM-LF

5%561/16W

RP3003

45

SM-LF

5%

1/16W

56

RP3004

18

SM-LF

56

1/16W

5%

RP3004

36

SM-LF

56

1/16W

5%

RP3004

45

SM-LF

1/16W

5%

56

RP3005

18

SM-LF

56

1/16W

5%

RP3005

27

SM-LF

5%

1/16W

56

RP3005

36

56

SM-LF

5%

1/16W

RP3005

45

SM-LF

1/16W

5%

56

RP3006

18

SM-LF

56

1/16W

5%

RP3006

27

56

SM-LF

5%

1/16W

RP3006

36

56

5%

SM-LF

1/16W

RP3007

45

5%

56

SM-LF

1/16W

RP3007

36

SM-LF

56

1/16W

5%

RP3007

27

SM-LF

56

1/16W

5%

RP3007

18

SM-LF

5%

1/16W

56

RP3008

45

SM-LF

56

1/16W

5%

RP3008

36

SM-LF

5%

1/16W

56

RP3008

27

SM-LF

56

5%

1/16W

RP3008

18

SM-LF

56

5%

1/16W

RP3009

18

SM-LF

56

1/16W

5%

RP3009

27

SM-LF

5%

1/16W

56

RP3009

36

SM-LF

5%

1/16W

56

RP3009

45

SM-LF

56

1/16W

5%

RP3010

36

SM-LF

5%

1/16W

56

RP3010

27

56

1/16W

5%

SM-LF

RP3010

18

5%

1/16W

56

SM-LF

RP3010

45

56

SM-LF

1/16W

5%

RP3011

18

SM-LF

5%

1/16W

56

RP3011

27

SM-LF

56

1/16W

5%

RP3011

45

56

SM-LF

5%

1/16W

RP3006

45

SM-LF

5%

1/16W

56

RP3011

36

29 15

402

CERM

10V

20%

0.1uF

C3031

1

2

20% 10V CERM 402

0.1uF

C3032

1

2

402

CERM

10V

20%

0.1uF

C3043

1

2

402

CERM

10V

20%

0.1uF

C3036

1

2

402

CERM

10V

20%

0.1uF

C3037

1

2

402

CERM

10V

20%

0.1uF

C3038

1

2

402

CERM

10V

20%

0.1uF

C3001

1

2

402

CERM

10V

20%

0.1uF

C3000

1

2

402

CERM

10V

20%

0.1uF

C3040

1

2

CERM 402

10V

20%

0.1uF

C3039

1

2

402

CERM

10V

20%

0.1uF

C3042

1

2

0.1uF

402

CERM

10V

20%

C3041

1

2

0

1

0

1

0

2

0

1

2

3

4

5

6

7

10

11

9

8

13

12

29 28 14

28 15

2

3

2

3

402

CERM

10V

20%

0.1uF

C3033

1

2

402

CERM

10V

20%

0.1uF

C3030

1

2

10V

20%

402

CERM

0.1uF

C3011

1

2

20% 10V CERM 402

0.1uF

C3010

1

2

402

CERM

10V

20%

0.1uF

C3007

1

2

20% 10V CERM 402

0.1uF

C3005

1

2

20% 10V CERM 402

0.1uF

C3035

1

2

0

1

2

3

29 28 14

051-7039

21

9730

Memory Active Termination

MEM_A_A<13..0>

MEM_B_BS<2..0>

MEM_CS_L<3..0>

MEM_CKE<3..0>

MEM_ODT<3..0>

MEM_A_BS<2..0>

=PP0V9_S0_MEM_TERM

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<5>

MEM_A_WE_L

MEM_B_A<0>

MEM_B_A<3>

MEM_A_CAS_L

MEM_B_RAS_L

MEM_B_WE_L

MEM_B_CAS_L

MEM_B_A<2>

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<1>

MEM_B_A<4>

MEM_B_A<10>

MEM_A_RAS_L

29

3

www.Vinaﬁx.vn

Preliminary

VREF

VTT

GND

VTT_IN

EN

VTTS

VDDQ

VCC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BOM options provided by this page:

- =PP0V9_S0_MEMVTT_LDO

USING 1% FR BOM CONSOLIDATION

disable MEMVTT in sleep.

?Can 5V be S0 if 1V8 is S3?

If power inputs are not S0,

Page Notes

MEMVTT_EN can be used to

- =PP1V8_S0_MEMVTT

- =PP5V_S0_MEMVTT

Signal aliases required by this page:

Power aliases required by this page:

(NONE)

DDR2 Vtt Regulator

6.3V

20%

10UF

CERM

805-1

C3101

1

2

CRITICAL

BD3533FVM

MSOP-8

U3100

2

1

65

4

8

7

3

MEMVTT_EN_PU

1K

402

MF-LF

1/16W

5%

R3100

1

2

CRITICAL

SMC-LF

150UF

20%

POLY

6.3V

C3105

6.3V

20%

10UF

CERM

805-1

C3102

1

2

402

MF-LF

1/16W

221

1%

R3101

12

603

CERM1

10%

2.2UF

6.3V

C3109

1

2

402

CERM

10V

0.1UF

20%

C3110

1

2

6.3V

10%

1uF

CERM 402

C3100

1

2

Memory Vtt Supply

051-7039

21

9731

SYNC_MASTER=M50_HENRY

SYNC_DATE=06/29/2006

U3100_VDDQ

MEMVTT_EN

=PP5V_S0_MEMVTT

MEMVTT_VREF

=PP0V9_S0_MEMVTT_LDO

=PP1V8_S0_MEMVTT

79

3

www.Vinaﬁx.vn

Preliminary

VTT_PWRGD*/PD

DOT96T/27MHZ_NON-SPREAD

SRCT_0/LCD100MT

CPUC2_ITP/SRCC_10

VDD48

XIN

VDD_PCI1

VDD_SRC0

VDD_REF

VDD_SRC1

VDD_SRC2

VDD_SRC3

REF1/FCTSEL0

REF0/FSC

FSA/48M

DOT96C/27MHZ_SPREAD

CLKREQ_8*

SRCT_8

SRCC_8

SRCT_7

SRCC_7

CLKREQ_6*

CPUT2_ITP/SRCT_10

IREF

SDATA

SCLK

VSS_REF

VSS_PCI1

VSS_PCI0

VSS_CPU

VSS48

VSS_SRC

PCIF1

PCI1

SRCT_5

THRML_PAD

PCI4

PCI2

FSB

CLKREQ_4*

SRCC_5

SRCC_4

SRCT_4

SRCT_3

CLKREQ_3*

SRCC_3

SRCC_2

SRCT_2

SRCC_1

CLKREQ_1*

SRCT_1

SRCC_0/LCD100MC

CPUC1

CPUT1

CPUC0

CPUT0

PCI_STP*

CPU_STP*

SRCC_6

CLKREQ_5*

SRCT_6

PCIF0/ITP_SEL

PCI5/FCTSEL1

PCI3

XOUT

VDDA

VSSA

VDD_PCI0

VDD_CPU

IN

OUT

IN

OUT

IN

IO

OUT

IN

IO

OUT

IN

OUT

IN

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(ICH7M USB 48MHZ)

(FROM CPU VCORE PWR GOOD)

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

(GIGA LAN PCI-E 100 MHZ )

(WIRELESS PCI-E 100 MHZ )

(FROM GMCH CLK_REQ*)

(FROM ICH7 GPIO35)

(ICH7M DMI 100 MHZ )

NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?

(GPU PCI-E 100 MHZ )

(INT PU)

(EACH POWER PIN PLACED ONE 0.1UF) (PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

(SMC LPC 33MHZ)

(TPM LPC 33MHZ)

(FW PCI 33MHZ)

(ICH SATA 100 MHZ)

(INT PU)

FCTSEL0

SRCC0

SRCT0

100MT_SSTDOT96C

SPREAD

27M NON

OFF LOW

11

1

10

00

FCTSEL1

100MC_SST

PIN 11PIN 10

DOT96T

SRCT0

* FOR INT. GRAPHIC SYSTEM

* FOR EXT. GRAPHIC SYSTEM

PIN 6

(INT PU)

(INT PD)

(NOT USED )

(CPU HOST 133/167MHZ)

(INT PU)

(SIGNAL NAME WILL BE CHANGED POST

PROTO TO REMOVE 100M FROM SIGNAL NAME)

(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

(ITP HOST 133/167MHZ)

(GMCH HOST 133/167MHZ)

(FROM ICH7 GPIO20 STPCPU* )

(FROM ICH7 GPIO18 STPPCI* )

(GMCH G_CLKIN 100 MHZ )

(INT PD)

(ICH7M,SIO,LPC REF. 14.318MHZ)

(FOR PCI-E CARD)

(INT PU)

0

(PORT80 LPC 33MHZ)

(ICH7M PCI 33MHZ)

(ICH SM BUS)

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)

(NO USED)

27M SPREAD

TBD

DOT96C

PIN 7

(INT PD)

(INT PU)

603

X5R

20%

6.3V

10UF

C3309

1

2

FERR-120-OHM-1.5A

0402

L3302

12

402

0.1UF

10% X5R

16V

C3305

1

2

10% 16V X5R 402

0.1UF

C3306

1

2

16V X5R

0.1UF

10%

402

C3307

1

2

10%

402

0.1UF

16V X5R

C3308

1

2

CRITICAL

OMIT

CY284455

QFN

U3301

9

59

20

60

25

34

55

44

41

36

45

42

37

7

6

4

8

40

57

58

63 64

65

56

68

1

54

53

47

48

11

14

16

19

22

24

27

30

32

10

13

15

18

21

23

26

29

33

69

34361674912172835

38

5

46

62

66

52

31

39

2

51

50

402

15PF

5% CERM

50V

C3390

1

2

402

5%

15PF

50V CERM

C3389

1

2

MF-LF

1%

475

402

1/16W

R3300

1

2

805-1

10UF

CERM

6.3V

20%

C3312

1

2

16V

0.1UF

402

X5R

10%

C3311

1

2

0.1UF

402

10% 16V X5R

C3304

1

2

X5R

16V 402

0.1UF

10%

C3303

1

2

0.1UF

10% 16V X5R 402

C3302

1

2

402

X5R

16V

0.1UF

10%

C3301

1

2

1UF

6.3V CERM

10%

402

C3310

1

2

603

X5R

6.3V

20%

10UF

C3316

1

2

10% X5R

16V 402

0.1UF

C3315

1

2

FERR-120-OHM-1.5A

0402

L3301

12

1UF

10%

CERM

6.3V

402

C3314

1

2

402

MF-LF

1/16W

5%

2.2

R3302

12

402

1/16W

5%

MF-LF

1

R3303

12

603

X5R

6.3V

20%

10UF

C3317

1

2

MF-LF

402

2.2

5%

1/16W

R3304

12

10K

5% MF-LF

402

1/16W

R3301

1

2

CRITICAL

14.31818

5X3.2-SM

Y3301

12

21

051-7039

33 97

CLOCKS

SYNC_MASTER=M50_HENRY

SYNC_DATE=06/29/2006

PP3V3_S0_CK410_VDD_PCI

MIN_LINE_WIDTH=0.5mm MIN_NECK_WIDTH=0.2mm

VOLTAGE=3.3V

CK410_SRC8_P

CK410_SRC_CLKREQ8_L

CK410_PD_VTT_PWRGD_L

CK410_CLK14P3M_TIMER CK410_REF1_FCTSEL0

CK410_PCIF0_CLK

CK410_XTAL_IN

CK410_PCI1_CLK

CK410_FSB_TEST_MODE

CK410_SRC1_N

PP3V3_S0_CK410_VDD48

MIN_LINE_WIDTH=0.5mm MIN_NECK_WIDTH=0.2mm

VOLTAGE=3.3V

=PP3V3_S0_CK410

CK410_SRC2_P

CK410_SRC3_N

CK410_PCI3_CLK

CK410_SRC6_P

CK410_SRC6_N

CK410_SRC7_N CK410_SRC7_P

CK410_SRC8_N

CK410_SRC4_N CK410_SRC4_P

CK410_SRC5_N

SB_CLK100M_SATA_OE_L

CK410_SRC1_P

CK410_SRC_CLKREQ3_L

SMB_CK410_CLK

CK410_CPU2_ITP_SRC10_N

CK410_LVDS_N CK410_LVDS_P

CK410_SRC3_P

CK410_SRC2_N

CK410_SRC_CLKREQ1_L

CK410_PCI2_CLK

=PP3V3_S0_CK410

CK410_CPU0_P

CK410_SRC_CLKREQ6_L

CLK_NB_OE_L

CK410_SRC5_P

SMB_CK410_DATA

CK410_IREF

CK410_PCIF1_CLK

CK410_PCI5_FCTSEL1

PP3V3_S0_CK410_VDD_REF

VOLTAGE=3.3V MIN_LINE_WIDTH=0.5mm MIN_NECK_WIDTH=0.2mm

CK410_CPU1_P

PM_STPPCI_L PM_STPCPU_L

CK410_CPU0_N

CK410_CPU2_ITP_SRC10_P

CK410_USB48_FSA

CK410_DOT96_27M_P

CK410_DOT96_27M_N

CK410_PCI4_CLK

PP3V3_S0_CK410_VDDA

VOLTAGE=3.3V MIN_LINE_WIDTH=0.5mm MIN_NECK_WIDTH=0.2mm

CK410_XTAL_OUT

=PP3V3_S0_CK410

CK410_CPU1_N

PP3V3_S0_CK410_VDD_CPU_SRC

VOLTAGE=3.3V MIN_LINE_WIDTH=0.5mm MIN_NECK_WIDTH=0.2mm

34

33

85

33

34

26

34

3

34

23

34

27

34

3

34

53

14

34

27

34

23

34

3

34

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TPM CLOCK IS TURNED OFF IN SW AND RESISTOR NOSTUFF

R3452

FSB FREQUENCY SELECT:

STUFF

R3459

R3454

R3461

R3457

R3463

R3457

R3463

R3459

R3454

NO STUFF

R3463

R3452 R3457 R3461

R3452

533MHZ

667MHZ

R3461

(166MHZ CPU CLK)

(133MHZ CPU CLK)

CPU DRIVEN

NOTE: CLKREQ1 SHOULD BE DRIVEN OR PULLED DOWN BY MXM GRAPHICS CARD.

NOTE: USE THESE PULL-DOWNS IF NOT CONNECTED TO GPIO’S

(SPARE CLK OE*)

(YUKON CLK OE*)

(GPU CLK OE*)

R3454 R3459

MF-LF

5%

1/16W

33

402

R3400

12

33

R3401

12

33

R3402

12

33

R3403

12

33

NOSTUFF

R3404

12

33

R3405

12

33

R3406

12

33

R3407

12

33

R3408

12

33

R3409

12

33

R3410

12

33

R3411

12

33

R3412

12

33

R3413

12

33

R3414

12

33

R3415

12

33

R3416

12

33

R3417

12

33

R3418

12

33

R3419

12

33

R3420

12

33

R3421

12

33

R3422

12

33

R3423

12

33

R3424

12

1%

49.9

402 1/16W MF-LF

R3429

12

49.9

R3430

12

49.9

R3431

12

49.9

R3432

12

49.9

R3433

12

49.9

R3434

12

49.9

R3435

12

49.9

R3436

12

49.9

R3437

12

49.9

R3438

12

49.9

R3439

12

49.9

R3440

12

49.9

R3441

12

49.9

R3442

12

49.9

R3443

12

49.9

R3444

12

49.9

R3445

12

49.9

R3446

12

5%

1K

1/16W MF-LF

402

R3462

12

402

1K

5% 1/16W MF-LF

R3460

1

2

1/16W

402

MF-LF

5%

2.2K

R3451

12

402

0

MF-LF

1/16W

5%

R3463

1

2

1/16W

NOSTUFF

402

5%

MF-LF

0

R3461

1

2

NOSTUFF

402

5% 1/16W MF-LF

0

R3457

1

2

402

1K

5% 1/16W MF-LF

R3456

1

2

402

MF-LF

1/16W

5%

0

R3459

1

2

402

5%

MF-LF

1K

1/16W

R3458

12

NOSTUFF

402

56

MF-LF

5% 1/16W

R3452

1

2

5%

0

MF-LF 402

1/16W

R3454

1

2

1/16W MF-LF

402

1K

5%

R3453

12

1/16W

402

MF-LF

5%

1K

R3455

12

MF-LF1/16W

1K

402

5%

R3499

12

2.2K

5% 1/16W MF-LF

402

R3497

12

402

5%

1/16W33MF-LF

R3498

12

33

R3496

12

1K

NOSTUFF

R3495

12

1K

R3494

12

1K

R3493

12

33

R3492

12

33

R3489

12

33

R3490

12

33

R3491

12

49.9

R3487

12

49.9

R3488

12

49.9

R3486

12

49.9

R3485

12

SYNC_MASTER=M51_HENRY

CLOCKS: TERMINATIONS

SYNC_DATE=06/29/2006

21

9734

051-7039

GPU_CLK100M_PCIE_P

CK410_CPU1_N

CK410_SRC_CLKREQ8_L

CK410_SRC_CLKREQ3_L

CK410_SRC_CLKREQ1_L

=PP3V3_S0_CK410

SB_CLK14P3M_TIMER

TP_CLK14P3M_SPARE

CK410_SRC7_P

SPARE_SRC7_N

SPARE_SRC7_P

SPARE_SRC3_N

AIRPORT_CLK100M_PCIE_P

CK410_CPU0_N

CK410_SRC6_P

CK410_CPU2_ITP_SRC10_N

CK410_CPU0_P

CPU_XDP_CLK_N FSB_CLK_XDP_N

MAKE_BASE=TRUE

FSB_CLK_XDP_PCPU_XDP_CLK_P

PCI_CLK_FW

NB_BSEL<0>

CPU_BSEL<1>

CK410_FSB_TEST_MODE

CK410_PCIF1_CLK

CPU_BSEL<0>

PP1V05_S0

NB_BSEL<2>

NB_BSEL<1>

PP1V05_S0

CK410_FSC

PCI_CLK_SMC

PCI_CLK_SB

CK410_PCI1_CLK

CK410_FSA

CK410_FSC

CK410_CLK14P3M_TIMER

SPARE_SRC3_PCK410_SRC3_P

CK410_SRC3_N

CK410_SRC7_N

CK410_PCI5_FCTSEL1

CK410_FSA

SB_CLK100M_DMI_N

AIRPORT_CLK100M_PCIE_N

NB_CLK100M_GCLKIN_P

SB_CLK100M_SATA_N

ENET_CLK100M_PCIE_P

MAKE_BASE=TRUE

TP_CK410_LVDS_P

CK410_SRC5_P

CK410_SRC6_N

SB_CLK100M_DMI_P

CK410_DOT96_27M_N

CPU_BSEL<2>

PCI_CLK_TPM

NB_CLK100M_GCLKIN_N

SB_CLK100M_SATA_P

MAKE_BASE=TRUE

TP_CK410_27M_SPREAD

MAKE_BASE=TRUE

TP_CK410_LVDS_N

GPU_CLK100M_PCIE_N

ENET_CLK100M_PCIE_N

CK410_CPU2_ITP_SRC10_P

CK410_REF1_FCTSEL0

MAKE_BASE=TRUE

TP_CK410_27M_NONSPREAD

CK410_SRC8_P

CK410_DOT96_27M_P

CK410_LVDS_N

CK410_LVDS_P

CK410_SRC1_N

CK410_SRC1_P

CK410_SRC8_N

CK410_SRC2_N

CK410_SRC2_P

CK410_SRC4_N

CK410_SRC4_P

CK410_SRC5_N

CK410_CPU1_P

CK410_PCIF0_CLK

CK410_PCI2_CLK

CK410_PCI4_CLK

CK410_USB48_FSA

FSB_CLK_CPU_N

FSB_CLK_NB_P FSB_CLK_NB_N

FSB_CLK_CPU_P

PCI_CLK_PORT80

CK410_PCI3_CLK

TP_PCI_CLK_SPARE

SB_CLK48M_USBCTLR

80

34

85

33

23

11

44

5

58

22

21

60

23

85

33

3

5

33

53

33

5

14

7

33

7

3

14

3

34

5

33

34

33

34

22

53

14

5

41

33

22

33

7

67

14

5

85

41

33

7

12

7

5

33

5

www.Vinaﬁx.vn

Preliminary

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PULL UP TO 5V ON P26

SATA CONNECTOR

(SB_GPIO14)

C8300 -- C8304 MAY BE PLACED AT ANY POINT ALONG THE TRACES

NOTE: GO TO SB AND SMC

518S0251

SATA DIFF PAIR GND VIAS

SATA PORT 0 IS NOT USED

49

50

1

2

3

46

47

48

4

5

NC

44

45

6

7

8

41

42

43

10

9

39

40

13

12

11

36

37

38

15

14

34

35

18

17

16

33

31

32 20

19

NC

21

29

30

23

22

28

26

27

25

24

NC

518S0416

ARE CONTROLLED BY PP5V_S0 1MM / 0.6MM.

Per ATA Spec

Obsolete

PER ATA7 SPEC

NOTE: ATA-2, NOW OBSOLETE

Per ATA Spec

"IDE ACTIVE"

NOTE: ???

PATA (ODD) CONNECTOR

BUT THE CAPS SHOULD BE THE SAME DISTANCE FROM THE SB WITHIN EACH PAIR

VALUE=3900PF IN REFERENCE SCHEM

PLACE < 0.5 IN FROM BALL OF U2100

STUFFED PER LARRY

MIN_NECK & MIN_LINE WIDTH

APPLY A WIDE TRACE SHAPE FROM J3801 TO C3805-06.

PLACE C3805-06 CLOSE TO J3801 FOR PP5V_S0_PATA.

CRITICAL

EP00-081-91

M-ST-SM

J3800

1

2

3

4

5

6

7

HOLE-VIA-P5RP25

GV3808

1

HOLE-VIA-P5RP25

GV3806

1

HOLE-VIA-P5RP25

GV3801

1

HOLE-VIA-P5RP25

GV3803

1

HOLE-VIA-P5RP25

GV3805

1

HOLE-VIA-P5RP25

GV3807

1

HOLE-VIA-P5RP25

GV3802

1

HOLE-VIA-P5RP25

GV3804

1

0

0.0047UF

402

C3800

12

402

0.0047UF

C3801

12

0.0047UF

402

C3802

12

402

0.0047UF

C3803

12

100

MF-LF

1/16W

5%

402

R3899

1

2

24.9

1/16W MF-LF

1%

402

R3897

12

0

5%

MF-LF 402

1/16W

1K

R3889

1

2

MF-LF

0

1/16W

5%

402

R3800

12

402

0

1/16W MF-LF

5%

NO STUFF

R3801

12

CRITICAL

87151-5005N

F-RT-SM

J3801

51

52

1

10

11

12

13

14

15

16

17

18

19

2

20

21

22

23

24

25

26

27

28

29

3

30

31

32

33

34

35

36

37

38

39

4

40

41

42

43

44

45

46

47

48

49

5

50

6

7

8

9

NO STUFF

10pF

402

CERM

50V

5%

C3804

1

2

4.7K

R3851

1

2

NO STUFF

10K

R3852

1

2

805-2

10V

10UF

20%

CERM

C3806

1

2

0.1uF

20%

CERM

10V

402

C3805

1

2

0

402

MF-LF

1/16W

5%

R3858

1

2

GREEN-3.6MCD

2.0X1.25MM-SM

DEVELOPMENT

LED3800

12

499

402

MF-LF

1/16W

DEVELOPMENT

1%

R3857

1

2

1K

R3853

1

2

10K

NOSTUFF

R3824

1

2

402

MF-LF

5%

6.2K

1/16W

R3859

1

2

Disk Connectors

SYNC_DATE=06/29/2006

051-7039

38 97

21

SYNC_MASTER=M51_DOUG

MAKE_BASE=TRUE

=PP5V_S0_PATA

=PP3V3_S0_PATA

IDE_PDIORDY

IDE_PDDACK_L

IDE_IRQ14

IDE_IOCS16_PU

IDE_PDA<2>

IDE_PDCS1_L

SB_GPIO3

IDE_RESET_L_CONN

IDE_DASP_L_DS

IDE_PDCS3_L

IDE_PDA<1>

IDE_PDA<0>

IDE_PDD<12>

IDE_PDD<3>

IDE_PDD<13> IDE_PDD<2>

IDE_PDD<9>

IDE_PDD<7>

IDE_PDD<8>

IDE_RESET_L_CONN

IDE_PDIOW_L

IDE_PDIOR_L

IDE_CSEL_PD

IDE_DASP_L

=PP5V_S0_PATA

MAKE_BASE=TRUE

SATA_RBIAS

SATA_A_R2D_C_P

SATA_A_D2R_N

SATA_A_D2R_P

SATA_RBIAS_N

SATA_C_DET_L

MAKE_BASE=TRUE

TP_SATA_A_R2D_P

MAKE_BASE=TRUE

TP_SATA_A_R2D_N

SATA_C_R2D_C_N

SATA_A_R2D_C_N

NO_TEST=TRUE

SATA_C_D2R_C_N

SATA_C_R2D_C_P

SATA_C_D2R_N SATA_C_D2R_P

NO_TEST=TRUE

SATA_C_D2R_C_P

NO_TEST=TRUE

SATA_C_R2D_N

NO_TEST=TRUE

SATA_C_R2D_P

SB_GPIO14

IDE_RESET_L

MAKE_BASE=TRUE

SATA_RBIAS_P

IDE_PDDREQ

IDE_PDD<0>

IDE_PDD<15>

IDE_PDD<1>

IDE_PDD<14>

IDE_PDD<4>

IDE_PDD<11>

IDE_PDD<5>

IDE_PDD<10>

IDE_PDD<6>

38

21

26

21

38

21

3

5

21

22

38

21

5

21

38

21

5

3

21

23

21

23

21

www.Vinaﬁx.vn

Preliminary

OUT

AVDDL0

AVDDL4

AVDD

THRML_PAD

VDDO_TTL0

AVDDL6

VDDO_TTL1

RX_N

TESTMODE

TSTPT

LINK*

LED_LINK10/100*

LED_LINK1000*

LED_ACT*

RSET

CTRL25

CTRL12

HSDACN

HSDACP

SWITCH_VAUX

SWITCH_VCC

VMAIN_AVLBL

VAUX_AVLBL

LOM_DISABLE*

XTALO

XTALI

SPI_DO

SPI_CLK

SPI_CS

SPI_DI

VPD_CLK

VPD_DATA

MDIP3

MDIN3

MDIN2

MDIP2

MDIN1

MDIP1

MDIN0

MDIP0

WAKE*

REFCLKN

TX_N

VDDO_TTL3

VDDO_TTL2

VDDO_TTL4

VDD0

VDD1

VDD3

VDD2

VDD6

VDD5

VDD4

VDD7

AVDDL1

AVDDL2

AVDDL5

VDD25

PERST*

REFCLKP

RX_P

AVDDL3

TX_P

PU_VDDO_TTL0

PU_VDDO_TTL1

TEST

TWSI

SPI

MAIN CLK

PCI EXPRESS

ANALOG

MEDIA

LED

E2

WC*

NC0

NC1

VCC

VSS

SCL

SDA

IO

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

LAYOUT NOTE: PLACE C4110-11 AT U4101

LAYOUT NOTE: PLACE C4112-13 AT U2100

OPTIONAL EXTERNAL LDO

NC

50V

5%

27PF

402

CERM

C4116

1

2

5%

MF-LF

402

1/16W

4.7K

R4122

12

MF-LF

4.7K

402

5%

1/16W

R4123

12

16V

402

X5R

10%

0.1UF

C4101

1

2

OMIT

88E8053

QFN

U4101

23

19222832515257

3

4

25

24

59

60

62

63

10

18

21

27

31

17

20

26

30

5

42

43

56

55

16

53

54

37

36

35

34

9

11

46

65

29

50

49

12

2713643339444858

18404561

47

38

41

6

15

14

M24C08

SO8

OMIT

U4102

3

1

2

6

5

8

4

7

16V

10%

402

X5R

0.1UF

C4140

1

2

0.1UF

402

10V

CERM

20%

C4110

12

402

CERM

10V

0.1UF

20%

C4111

12

CERM

0.1UF

20% 10V

402

C4112

12

0.1UF

20% 10V

CERM

402

C4113

12

MF-LF

4.75K

402

1%

1/16W

R4102

12

4.7K

R4130

12

4.7K

R4131

12

0

MF-LF

402

5%

1/16W

NOSTUFF

R4151

12

MF-LF

1/16W

0

5%

402

R4150

12

SM-3.2X2.5MM

CRITICAL

25.0000M

Y4101

24

13

402

MF-LF

1/16W

1%

49.9

R4119

12

402

MF-LF

1/16W

1%

49.9

R4118

12

402

MF-LF

1/16W

1%

49.9

R4120

12

402

MF-LF

1/16W

1%

49.9

R4117

12

MF-LF

49.9

1%

1/16W

402

R4103

12

MF-LF

1/16W

1%

402

49.9

R4104

12

49.9

1/16W

MF-LF

402

1%

R4105

12

MF-LF

1/16W

1%

402

49.9

R4106

12

4.7K

1/16W

5%

402

MF-LF

R4101

12

CERM 402

10% 50V

0.001UF

C4106

1

2

0.001UF

CERM 402

10% 50V

C4107

1

2

50V

0.001UF

CERM 402

10%

C4117

1

2

0.001UF

CERM 402

10% 50V

C4118

1

2

CERM 402

10% 50V

0.001UF

C4105

1

2

10%

0.1UF

402

16V X5R

C4104

1

2

0.1UF

X5R 402

10% 16V

C4103

1

2

0.1UF

X5R 402

10% 16V

C4102

1

2

CERM 402

10% 50V

0.001UF

C4150

1

2

10%

0.1UF

X5R 402

16V

C4128

1

2

CERM

50V

0.001UF

402

10%

C4133

1

2

10%

0.001UF

CERM 402

50V

C4134

1

2

50V CERM

0.001UF

402

10%

C4131

1

2

10%

0.001UF

CERM 402

50V

C4132

1

2

0.1UF

402

X5R

10% 16V

C4127

1

2

0.1UF

10% X5R

402

16V

C4126

1

2

10%

0.1UF

X5R 402

16V

C4129

1

2

16V

0.1UF

X5R 402

10%

C4130

1

2

CERM 402

0.001UF

10% 50V

C4139

1

2

0.001UF

CERM 402

10% 50V

C4138

1

2

0.1UF

X5R 402

10% 16V

C4137

1

2

402

X5R

10% 16V

0.1UF

C4136

1

2

0.1UF

X5R 402

10% 16V

C4135

1

2

50V

5%

27PF

CERM 402

C4115

1

2

SYNC_DATE=06/29/2006SYNC_MASTER=M50_DOUG

21

051-7039

9741

ETHERNET CONTROLLER

ENET_LED_ACT_L

PP3V3_S0

ENET_MDI_N<2>

PCIE_ENET_R2D_C_P

ENET_GATED_RST_L

PCIE_WAKE_L

ENET_CLK100M_PCIE_N

PCIE_ENET_D2R_P

PCIE_ENET_D2R_N

PCIE_ENET_D2R_C_P

PCIE_ENET_D2R_C_N

=PP3V3_S3_ENET

=PP1V2_S3_ENET

ENET_MDI_N<3>

ENET_MDI_P<3>

ENET_MDI_P<2>

ENET_MDI_P<1>

ENET_MDI_N<0>

ENET_MDI_P<0>

=PP3V3_S3_ENET

ENET_VPD_DATA

ENET_VPD_CLK

ENET_MDI3ENET_MDI2

ENET_CLK100M_PCIE_P

ENET_CTRL12

ENET_CTRL25

=PP2V5_S3_ENET

ENET_LED_LINK_L

ENET_ANALOG_RSET

PCIE_ENET_R2D_C_N

ENET_LED_LINK1000_L

ENET_LED_LINK10_100_L

ENET_LOM_DIS_L

=PP3V3_S3_ENET

VMAIN_AVLBL

ENET_PU_VDDO_TTL1

=PP3V3_S3_ENET

=PP2V5_S3_ENET

ENET_MDI1

ENET_MDI_N<1>

ENET_MDI0

=PP1V2_S3_ENET

ENET_PU_VDDO_TTL0

ENET_VPD_DATA

ENET_VPD_CLK

ENET_XTALO

ENET_XTALI

PCIE_ENET_R2D_P PCIE_ENET_R2D_N

84 83 76 27 26 10

43

6

42

5

53

41

42

41

42

41

42

43

3

43

54

42

23

34

54

3

41

43

3

41

34

42

41

43

54

43

3

41

43

41

www.Vinaﬁx.vn

Preliminary

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

20%

6.3V X5R 805

22UF

C4202

1

2

20%

CERM

6.3V

603

4.7UF

C4203

1

2

X5R 402

10% 16V

0.1UF

C4204

1

2

4.7K

MF-LF

1/16W

5%

402

R4202

1

2

CERM

20%

6.3V

603

4.7UF

C4205

1

2

16V

10%

X5R

0.1UF

402

C4206

1

2

16V

10%

402

X5R

0.1UF

C4210

1

2

603

6.3V

20%

CERM

4.7UF

C4209

1

2

FERR-330-OHM

SM

L4201

12

FERR-330-OHM

SM

L4200

12

I38

805-1

CERM

20%

6.3V

10UF

C4207

1

2

SOT223

CRITICAL

PBSS5540Z

Q4201

1

24

3

20%

6.3V X5R 805

22UF

C4200

1

2

X5R

16V

10%

402

0.1UF

C4201

1

2

SYNC_DATE=06/29/2006

42 97

051-7039

21

ETHERNET MISC

SYNC_MASTER=M51_DOUG

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

PP3V3_S3_ENET_Q

VOLTAGE=2.5V

PP2V5_S3_ENET

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

ENET_CTRL12

TP_ENET_CTRL12

MAKE_BASE=TRUE

=PP1V2_S3_LAN

=PP3V3_S3_ENET

MAKE_BASE=TRUE

ENET_RST_L

ENET_GATED_RST_L

ENET_CTRL25

=PP2V5_S3_ENET

=PP1V2_S3_ENET

VOLTAGE=1.2V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

MAKE_BASE=TRUE

PP1V2_S3_ENET

43

41

6

41

43

3

41

www.Vinaﬁx.vn

Preliminary

IO

1CT:1CT

MDI_3-

ENET_CTAP

MDI_0+

75 OHM

MDI_0-

MDI_1-

MDI_2+

MDI_2-

75 OHM

RJ45

CABLE SIDE

SECONDARY

J4

J8

J7

J6

J5

J1

J2

J3

1CT:1CT

RJ45

CHIP SIDE

ENET_CTAP

MDI_1+

MDI_3+

PRIMARY

SHIELD 1000PF, 2000V

1CT:1CT

75 OHM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(514-0331)

RESISTOR PADS USED AS PLACEHOLDER FOR INDUCTOR IF NEEDED

MARVELL DOES NOT REQUIRE/RECOMMEND ANY SERIES TERMINATIONS HERE

402

CERM

20% 10V

0.1UF

C4300

1

2

10%

CERM

50V

402

0.001UF

C4301

1

2

402

CERM

50V

0.001UF

10%

C4304

1

2

402

CERM

50V

0.001UF

10%

C4305

1

2

805

0

MF-LF

5%

1/8W

R4300

12

CRITICAL

F-ANG-TH

RJ45-M51

J4300

11

12

13

1

10

2

3

4

5

6

7

8

9

5% 1/10W MF-LF 603

330

DEVELOPMENT

R4301

1

2

GREEN-3.6MCD

2.0X1.25MM-SM

DEVELOPMENT

LED4300

1

2

DEVELOPMENT

330

MF-LF

1/10W

5%

603

R4302

1

2

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

LED4301

1

2

DEVELOPMENT

330

MF-LF

1/10W

5%

603

R4303

1

2

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

LED4302

1

2

DEVELOPMENT

330

MF-LF

1/10W

5%

603

R4304

1

2

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

LED4303

1

2

97

051-7039

21

43

ETHERNET CONNECTOR

SYNC_MASTER=M51_DOUG SYNC_DATE=06/29/2006

VOLTAGE=2.5V

PP2V5_ENET_CTAP

MIN_NECK_WIDTH=0.38mm

MIN_LINE_WIDTH=0.50mm

ENET_MDI_P<3> ENET_MDI_N<3>

ENET_MDI_N<2>

ENET_MDI_P<2>

ENET_MDI_N<1>

ENET_MDI_P<1>

ENET_MDI_N<0>

ENET_MDI_P<0>

MAKE_BASE=TRUE

ENET_LED_ACT_L

PP2V5_S3_ENET

GND_CHASSIS_RJ45

LED4300_1 LED4302_1LED4301_1

=PP3V3_S3_ENET

LED4303_1

ENET_LED_LINK10_100_L

MAKE_BASE=TRUE

ENET_LED_LINK1000_L

MAKE_BASE=TRUE

ENET_LED_LINK_L

MAKE_BASE=TRUE

42 41

41

42

6

3

41

www.Vinaﬁx.vn

Preliminary

PCI_RST*

G_RST*

REG_EN*

PCI_AD38

PCI_DEVSEL*

PCI_FRAME*

PCI_GNT*

PCI_INTA*

PCI_IRDY*

PCI_PERR*

PCI_PME*

PCI_REQ*

PCI_SERR*

PCI_STOP*

PCI_TRDY*

PCI_ACK64*

PCI_REQ64*

PCI_PAR

PCI_IDSEL

PCI_CLK

PCI_PAR64

SDA

SCL

MFUNC

PHY_PCLK

PHY_PINT

PHY_LREQ

PHY_LPS

PHY_LCLK

PHY_LINKON

PHY_CTL1

PHY_CTL0

PHY_D7

PHY_D6

PHY_D5

PHY_D4

PHY_D3

PHY_D2

PHY_D1

PHY_D0

REG18

VCC

PCI_C_BE0

PCI_C_BE1

PCI_C_BE2

PCI_C_BE3

PCI_C_BE4

PCI_C_BE5

PCI_C_BE6

PCI_C_BE7

PCI_AD2

PCI_AD0

PCI_AD1

PCI_AD3

PCI_AD4

PCI_AD5

PCI_AD6

PCI_AD7

PCI_AD8

PCI_AD9

PCI_AD10

PCI_AD11

PCI_AD12

PCI_AD13

PCI_AD14

PCI_AD15

PCI_AD16

PCI_AD17

PCI_AD18

PCI_AD19

PCI_AD20

PCI_AD21

PCI_AD22

PCI_AD23

PCI_AD24

PCI_AD25

PCI_AD26

PCI_AD27

PCI_AD28

PCI_AD29

PCI_AD30

PCI_AD31

PCI_AD32

PCI_AD33

PCI_AD34

PCI_AD35

PCI_AD36

PCI_AD37

PCI_AD39

PCI_AD40

PCI_AD41

PCI_AD42

PCI_AD43

PCI_AD44

PCI_AD45

PCI_AD46

PCI_AD47

PCI_AD48

PCI_AD49

PCI_AD50

PCI_AD51

PCI_AD52

PCI_AD53

PCI_AD54

PCI_AD55

PCI_AD56

PCI_AD57

PCI_AD58

PCI_AD59

PCI_AD60

PCI_AD61

PCI_AD62

PCI_AD63

VCCP

NC

GND

RSVD

TESTW

LKON/DS2

(SYM_VER1)

CORE

VDD

CORE

DVDDAVDD

PC0

PC2

PAD

THRML

AGND

SM

TESTM

SE

D5 D6

RESETZ

D7

DGND

PLL

3.3

DVDD

PLLGND

PLL

3.3

VDD

D3 D4

D1 D2

BMODE

PD

PC1

CPS

D0

LREQ

LPS

LCLK

3.3

TPA1+ TPA1-

PCLK

TPA0-

TPA2+ TPA2-

CTL0 CTL1

CNA

PINT

TPBIAS0 TPBIAS1

XI

TPBIAS2

R1

R0

TPB2-

TPB2+

TPB1-

TPB1+

TPB0-

TPB0+

DS0 DS1

TPA0+

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BYPASS CAPS FOR INTERNAL 1.8V

??? CHECK YELLOW EDS

PLACE CLOSE TO REG18 PINS

CHARACTERIZE - CMIN=(.0077 * VDD RAMP IN MS) + .085 + OSC STARTUP TIME

THESE POWER PLANES SHOULD BE MOSTLY ISOLATED

402

5% 1/16W MF-LF

22

R4401

12

CRITICAL

PBGA

TSB82AA2

U4400

E1

A4

A10

N3

N15

P9

R6

R12

C6

C13D9E15G4H14K4L14

C1

A2

A15

C8

E16

F1

F2

J3

J15

J16

K2

M16

N2

A16

P16

P17

R2

R7

R8

T1

T5

T8

T12

T17

B1

U2

U5

U12

B5

B6

B15

B17

C2

C7

U16

T15

U15

R10

P10

T10

T9

R9

U9

U3

T3

R1

P3

R14

P2

P1

M3

M2

L3

L2

L1

K3

J2

J4

T14

J1

H2

A11

B11

C11

D11

B12

C12

A13

B13

U14

A14

B14

C14

C16

C17

D15

D16

D17

F15

F16

R13

F17

G14

G15

G16

G17

H15

H16

J14

J17

K16

T13

K17

L17

L16

L15

U13

T11

U11

R11

P8

R4

L4

M15

N17

N16

R17

G3

U6

T4

G2

M1

E3

U4

U8

M17

T7

H1

G1

R16

E2

U7

P7

T6

B7

A7

D8

B8

A8

B9

C9

B10

C10

D10

A6

C4

B3

B4

A5

A3

H3

K15

D3

D2

D1

A9

C5R5D7

E17F3H4

K14N1P11

P15

A12

H17K1U10

0.1UF

16V

402

10%

X5R

C4400

1

2

16V X5R

10%

0.1UF

402

C4401

1

2

MF-LF

1/16W

5%

220

402

R4411

12

MF-LF

1/16W

5%

220

402

R4412

12

2.7K

5% 1/16W MF-LF 402

R4404

1

2

MF-LF

1/16W

5%

2.7K

402

R4403

1

2

2.7K

5% 1/16W MF-LF 402

R4402

1

2

402

MF-LF

1/16W

4.7K

5%

R4413

1

2

X5R

10V

10%

1UF

402

C4450

1

2

MF-LF

1/16W

5%

402

470

R4498

12

1%

MF-LF1/10W

603

6.34K

R4499

12

603

X5R

2.2UF

6.3V

10%

C4460

1

2

1/16W

5%

1

MF-LF

402

R4450

12

1/16W

402

5%

4.7

MF-LF

R4453

12

MF-LF

402

1/16W

5%

1

R4452

12

10K

R4460

12

1K

R4462

12

402

5%

MF-LF

1/16W

390K

R4463

12

1K

R4464

12

1K

R4465

12

1K

R4466

12

1K

R4467

12

OMIT

SM

XW4451

12

CRITICAL

TSB81BA3PFP

PQFP

U4450

2140435061

62

2439445157

63

74

79

34

9

10

11

12

13

15

16

17

19

20

4

1438647276

33

32

837657161869

70

7

2

80

3

66

67

68

5

77

1

25

28

293031

23

22

75

26

35

36

78

73

81

46

45

53

52

59

58

42

41

49

48

56

55

47

54

60

27

FW: 1394B-LINK/PHY

SYNC_MASTER=M51_DOUG SYNC_DATE=06/29/2006

9744

21

051-7039

FW_PHY_LINKON

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP3V3_FW_DVDD

FW_PHY_DS1

FW_PHY_DS0

FW_A_TPB_P FW_A_TPB_N

FW_B_TPB_P

FW_B_TPB_N

FW_C_TPB_P FW_C_TPB_N

FW_R0

FW_R1

FW_XTAL_XI

FW_C_TPBIAS

FW_B_TPBIAS

FW_A_TPBIAS

FW_PHY_PINT

FW_PHY_CTL0 FW_PHY_CTL1

FW_C_TPA_N

FW_C_TPA_P

FW_A_TPA_N

FW_A_TPA_P

FW_PHY_PCLK

FW_B_TPA_P

FW_B_TPA_N

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MM

PP3V3_FW_AVDD

MIN_LINE_WIDTH=0.6MM

FW_PHY_LCLK

FW_PHY_LPS

FW_PHY_LREQ

FW_PHY_PC0

FW_PHY_PC2

FW_PHY_PC1

FW_PHY_D0

FW_PHY_CPS

FW_PHY_BMODE

FW_PHY_D4

FW_PHY_D1

FW_PHY_D2 FW_PHY_D3

FW_PHY_D5 FW_PHY_D6

FW_PHY_D7

FW_PHY_RESET_L

FW_PHY_SE

FW_PHY_TESTM

FW_PHY_SM

PP3V3_FW_PLLVDD

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM VOLTAGE=3.3V

=PP1V95_S5_FWPHY

MIN_LINE_WIDTH=0.6MM VOLTAGE=1.95V

MIN_NECK_WIDTH=0.2MM

PP1V95_FW_PLLVDD

FW_PHY_VREG_PD

LINK1V8_DECAP2

PCI_AD<27>

PP3V3_FW_DVDD

FW_LINK_D5

FW_LINK_D4

=PP3V3_S3_FW

=PP3V3_S5_FW

LINK1V8_DECAP1

FW_LINK_D3

PCI_IDSEL

=PP3V3_S3_FW

FW_PORTS_VP_F

PP3V3_FW_DVDD

PCI_AD<31>

PCI_AD<30>

PCI_AD<28>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<23>

PCI_AD<22>

PCI_AD<21>

PCI_AD<20>

PCI_AD<18>

PCI_AD<17>

PCI_AD<16>

PCI_AD<15>

PCI_AD<14>

PCI_AD<13>

PCI_AD<12>

PCI_AD<11>

PCI_AD<10>

PCI_AD<9>

PCI_AD<8>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<3>

PCI_AD<1>

PCI_AD<0>

PCI_AD<2>

PCI_C_BE_L<3>

PCI_C_BE_L<2>

PCI_C_BE_L<1>

PCI_C_BE_L<0>

FW_LINK_D0 FW_LINK_D1

FW_LINK_D2

FW_LINK_D6

FW_LINK_CTL0

FW_LINK_CTL1

FW_LINK_LINKON

FW_LINK_LCLK

FW_LINK_LPS

FW_LINK_LREQ

FW_LINK_PINT

FW_LINK_PCLK

FW_LINK_MFUNC

FW_ROM_SCL

FW_ROM_SDA

PCI_PAR64

PCI_CLK_FW

PCI_IDSEL

PCI_PAR

PCI_REQ64_L

PCI_TRDY_L

PCI_STOP_L

PCI_SERR_L

PCI_REQ1_L

PCI_PME_FW_L

PCI_PERR_L

PCI_IRDY_L

INT_PIRQD_L

PCI_GNT1_L

PCI_FRAME_L

PCI_DEVSEL_L

FW_LINK_RESET_L

PCI_RST_FW_L

PCI_AD<29>

PCI_AD<7>

PCI_AD<19>

PCI_ACK64_L

FW_LINK_D7

=PP3V3_S3_FW

45

46

45

44

45

44

45

34

26

44

45

46

45

46

45

46

45

46

45

3

45

22

44

45

3

45

44

3

46

44

22

45

5

44

22

45

22

45

3

www.Vinaﬁx.vn

Preliminary

OUT

TRI-ST/NC

VCC

GND

G

SD

SHDN

BYP

ADJ*

SENSE/

NC

GND

NC

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: PLACE 1 CAP CLOSE TO EACH POWER PIN ON U4450

1394 PHY DATA/STROBE AND POWER CLASS OPTIONS

NOTE: 1% FOR BOM CONSOLIDATION(APPLIED TO M50) NOTE: R SHOULD BE CHOSEN TO PREVENT OVERSHOOT

LINK DECOUPLING

PHY DECOUPLING

197S0179

NOTE: PLACE 1 CAP CLOSE TO EACH POWER PIN ON U4400

VOUT = 1.946V

353S1403

1394 PHY CRYSTAL OSCILLATOR

FIXME!!! CHARACTERIZE TO SEE IF THIS BRINGS US CLOSE ENOUGH TO 1.8V - 4.7 CHOSEN FOR BOM CONSOLIDATION

Iadj = 30nA @ 25 deg C

1394 PHY 1.95V REGULATOR

VOUT = 1.22V * (1 + R4500 / R4501) + (Iadj * R4500)

1394 LINK POWER ON RESET AND PCI RESET

SIMULATIONS SHOW THAT THERMINATIONS WERE NOT NEEDED FOR M51

NORMALLY TERMINATIONS WOULD GO HERE...

NOTE: 1K IS PER TI SPEC TO BALANCE OUT THE 470 PULLUP ON DS2

CONSTRAIN NETS TO 200-250PS IF NO TERM-Rs...

27.4K

402

1% 1/16W MF-LF

R4501

1

2

10uF

X5R 603

20%

6.3V

C4501

1

2

1UF

6.3V CERM

10%

402

C4510

1

2

6.3V CERM

1UF

10%

402

C4530

1

2

0.22UF

6.3V

20%

X5R 402

C4502

1

2

CERM

6.3V

10%

1UF

402

C4540

1

2

CERM

6.3V

10%

1UF

402

C4520

1

2

402

CERM

6.3V

1UF

10%

C4511

1

2

1UF

6.3V CERM

10%

402

C4512

1

2

6.3V CERM

1UF

10%

402

C4513

1

2

6.3V CERM

1UF

10%

402

C4521

1

2

6.3V CERM

1UF

10%

402

C4522

1

2

6.3V

10%

1UF

CERM 402

C4523

1

2

6.3V CERM

1UF

10%

402

C4531

1

2

6.3V CERM

1UF

10%

402

C4541

1

2

6.3V CERM

1UF

10%

402

C4542

1

2

6.3V CERM

1UF

10%

402

C4543

1

2

6.3V CERM

1UF

10%

402

C4544

1

2

6.3V CERM

1UF

10%

402

C4545

1

2

5%

1K

NOSTUFF

402

MF-LF

1/16W

R4550

1

2

1K

5%

402

MF-LF

1/16W

R4560

1

2

402

MF-LF

1/16W

5%

1K

R4570

1

2

402

MF-LF

1/16W

1K

5%

NOSTUFF

R4561

1

2

1/16W

5%

402

1K

MF-LF

R4551

1

2

5%

1K

1/16W MF-LF 402

NOSTUFF

R4571

1

2

NOSTUFF

402

MF-LF

1/16W

5%

1K

R4580

1

2

402

1/16W

5%

1K

MF-LF

R4581

1

2

402

MF-LF

1/16W

1K

5%

NOSTUFF

R4572

1

2

402

MF-LF

1/16W

1K

5%

R4582

1

2

CRITICAL

SM

98P3040MHZ

G4500

2

31

4

6.3V CERM 402

10%

1UF

C4561

1

2

6.3V

1UF

10%

402

CERM

C4560

1

2

10%

402

1UF

6.3V CERM

C4559

1

2

CERM 402

10%

1UF

6.3V

C4558

1

2

10%

402

1UF

CERM

6.3V

C4557

1

2

1UF

402

10%

CERM

6.3V

C4556

1

2

10%

402

1UF

6.3V CERM

C4555

1

2

6.3V CERM

1UF

402

10%

C4554

1

2

10%

402

1UF

CERM

6.3V

C4553

1

2

6.3V CERM

1UF

402

10%

C4552

1

2

10%

1UF

402

CERM

6.3V

C4551

1

2

6.3V CERM

1UF

10%

402

C4550

1

2

402

1%

MF-LF

1/16W

150

R4591

12

SOT23

BSS138

Q4500

3

1

2

5%

402

100K

1/16W MF-LF

R4590

1

2

402

4.7

1/16W

5%

MF-LF

R4502

12

CRITICAL

MSOP

LT1762EMS8

U4501

3

4

8

6

7

1

2

5

CERM

20%

0.01uF

16V

402

C4503

1

2

402

100K

MF-LF

1/16W

5%

NOSTUFF

R4503

1

2

1K

R4520

12

2.2UF

10%

X5R

6.3V

603

C4500

1

2

MF-LF

16.2K

402

1/16W

1%

R4500

1

2

FW: 1394B MISC

SYNC_DATE=06/29/2006SYNC_MASTER=M51_DOUG

9745

21

051-7039

FW_PHY_D0

FW_PHY_PINT

MAKE_BASE=TRUE

FW_LINK_PINT

FW_LINK_RESET_L

=PP3V3_S3_FW

FW_LINK_LINKON

FW_PHY_LINKON

VOLTAGE=1.95V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP1V8X_FW_XTAL

MAKE_BASE=TRUE

FW_LINK_LREQ

MAKE_BASE=TRUE

FW_LINK_D5

FW_OSC_EN

V_ADJ

PP1v95_S5

MAKE_BASE=TRUE

FW_LINK_PCLK

FW_PHY_PCLK

FW_PHY_LREQ

FW_PHY_LPS

FW_PHY_D1

FW_PHY_D7

=PP3V3_S5_FW

V_BYP

PP3V3_FW_DVDD

FW_RST_L

SMC_RSTGATE_L

=PP3V3_S3_FW

PCI_RST_FW_L

PCI_RST_L

PP3V3_FW_AVDD

PP3V3_FW_DVDD

FW_XTAL_XI

MAKE_BASE=TRUE

FW_LINK_D3

FW_PHY_D4

MAKE_BASE=TRUE

FW_LINK_CTL1

=PP1V95_S5_FWPHY

PP1V95_FW_PLLVDD

FW_PHY_D3

FW_PHY_D2

MAKE_BASE=TRUE

FW_LINK_D2

MAKE_BASE=TRUE

FW_LINK_D4

FW_PHY_D5

MAKE_BASE=TRUE

FW_LINK_D7

FW_PHY_D6

MAKE_BASE=TRUE

FW_LINK_D6

FW_PHY_CTL0

MAKE_BASE=TRUE

FW_LINK_CTL0

FW_PHY_CTL1

MAKE_BASE=TRUE

FW_LINK_LPS

FW_PHY_LCLK

FW_LINK_LCLK

MAKE_BASE=TRUE

FW_LINK_D0

MAKE_BASE=TRUE

FW_LINK_D1

PP1V95_FW_PLLVDD

FW_PHY_PC2

FW_PHY_DS0

FW_PHY_PC1

FW_PHY_PC0

FW_PHY_DS1

45

46

45

44

45

44

45 44

45

44

44 44

44

3

44 44

44

3

44 44

44

3

44

6

58

3

44 22

44

3

44

44 44

44

44 44

44

44 44

44

www.Vinaﬁx.vn

Preliminary

NC

VP

TPB+

TPB<R>

TPB-

VG

TPA+

TPA<R>

TPA-

TPI

VGND

VP

TPI#

TPO#

TPO

SYM_VER-1

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Place close to FireWire PHY

NOTE: TI PHY REQUIRES 1uF EVEN THOUGH SPEC CALLS OUT .33uF

3rd TPA/TPB pair unused

NOTE: TI RECOMMENDS THIS FOR UNCONNECTED PORTS

ESD Rail

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP

SHOULD BE DONE AS A POWER STRIP(SUBPLANE)

[ LATE VG NOTES ]

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

PORT 0

1394B

SHOULD BE DONE AS A POWER STRIP(SUBPLANE)

24 VOLTS

15 WATTS MAX

PORT 1 1394A

"Snapback" & "Late VG" Protection

514-0342

514-0325

Termination

BAV99DW-X-F

SOT-363

DP4620

4

5

3

BAV99DW-X-F

SOT-363

DP4620

1

2

6

BAV99DW-X-F

SOT-363

DP4610

4

5

3

SOT-363

BAV99DW-X-F

DP4611

4

5

3

SOT-363

BAV99DW-X-F

DP4610

1

2

6

SOT-363

BAV99DW-X-F

DP4611

1

2

6

402

CERM

1UF

10%

6.3V

C4660

1

2

1%

56.2

1/16W

402

MF-LF

R4661

1

2

402

1/16W

1%

56.2

MF-LF

R4660

1

2

402

10%

1UF

CERM

6.3V

C4650

1

2

MF-LF 402

1/16W

56.2

1%

R4651

1

2

1%

MF-LF

56.2

402

1/16W

R4650

1

2

MF-LF

56.2

1% 1/16W

402

R4663

1

2

56.2

1% 1/16W MF-LF

402

R4662

1

2

MF-LF 402

1/16W

1%

4.99K

R4664

1

2

270PF

5%

25V

402

CERM

C4664

1

2

56.2

1% 1/16W MF-LF 402

R4653

1

2

1%

56.2

1/16W MF-LF

402

R4652

1

2

402

1% 1/16W MF-LF

4.99K

R4654

1

2

402

CERM

5%

25V

270PF

C4654

1

2

400-OHM-EMI

SM-1

L4690

12

MMBZ5227B

SOT23

CRITICAL

D4690

13

SOT-363

BAV99DW-X-F

DP4621

4

5

3

BAV99DW-X-F

SOT-363

DP4621

1

2

6

332

402

MF-LF

1%

1/16W

R4690

12

50V

603-1

X7R

10%

0.01UF

C4600

1

2

0.01UF

402

10% 50V X7R

C4623

1

2

10%

0.01UF

50V

402

X7R

C4622

1

2

10%

0.01UF

50V

402

X7R

C4612

1

2

402

50V

0.01UF

X7R

10%

C4613

1

2

0.01UF

402

50V

10%

X7R

C4621

1

2

402

50V X7R

10%

0.01UF

C4620

1

2

10%

402

50V

0.01UF

X7R

C4610

1

2

X7R

10%

402

50V

0.01UF

C4611

1

2

0.75AMP-30V

SM

CRITICAL

F4600

12

SM

FERR-250-OHM

L4600

12

SM

FERR-250-OHM

L4601

12

10%

603-1

X7R

50V

0.01UF

C4601

1

2

NOSTUFF

0.001UF

CERM

10% 50V

402

C4631

1

2

NOSTUFF

50V

10%

0.001UF

CERM

402

C4630

1

2

NOSTUFF

402

50V

10%

CERM

0.001UF

C4632

1

2

603-1

X7R

50V

10%

0.1UF

C4635

1

2

1M

1/16W

402

MF-LF

1%

R4635

1

2

NOSTUFF

402

50V

0.001UF

10%

CERM

C4642

1

2

MURS320XXG

SMC

DE4600

12

CRITICAL

10%

FF-LF

1W

2512

2.7

R4600

12

FF-LF

CRITICAL

10%

1W

2512

2.7

R4601

12

1394B-M51

F-ST-TH

CRITICAL

J4600

1

10

11

12

13

14

15

2

3

4

5

6

7

8

9

CRITICAL

1394A-M51

F-ST-TH

J4601

10

789

4

3

6

5

2

1

DLW21H-SM1

CRITICAL

120-OHM

FL4600

4

12

3

DLW21H-SM1

120-OHM

CRITICAL

FL4610

4

12

3

0402

18nH-15mA

L4653

1

2

0402

18nH-15mA

L4652

1

2

0402

18nH-15mA

L4650

1

2

18nH-15mA

0402

L4651

1

2

155S0289155S0232

ORIGINAL TOKO CHOKE

FL4600

FL4610

ORIGINAL TOKO CHOKE

155S0232 155S0289

46 97

21

051-7039

FIREWIRE CONNECTORS

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=1.7MM

VOLTAGE=33V

FW_PORTS_VP_F

VOLTAGE=33V

MIN_LINE_WIDTH=1.7MM MIN_NECK_WIDTH=0.25MM

FW_PORT1_VP

PP3V3_FW_ESD

FW_PORT0_TPA_N

MAKE_BASE=TRUE

FW_PORT0_TPB_N

FW_PORT1_TPA_N

PP3V3_FW_ESD

FW_PORT1_TPA_P

FW_PORT0_TPA_P

FW_PORT0_TPB_P

FW_PORT1_TPA_FL_N

GND_CHASSIS_FIREWIRE

MIN_NECK_WIDTH=0.25MM

FW_PORT0_VP

MIN_LINE_WIDTH=1.7MM

VOLTAGE=33V

FW_PORTS_VP

MIN_LINE_WIDTH=1.7MM

MIN_NECK_WIDTH=0.25MM

VOLTAGE=33V

FW_PORT1_TPB_FL_N

FW_PORT1_TPB_FL_P

FW_PORT0_TPA_R

PP3V3_FW_ESD

FW_PORTS_VP_R

VOLTAGE=33V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=1.7MM

=PPV_S5_FW

VOLTAGE=3.3V MIN_LINE_WIDTH=0.38 mm MIN_NECK_WIDTH=0.25 mm

PP3V3_FW_ESD_F

VOLTAGE=3.3V MIN_LINE_WIDTH=0.38 mm MIN_NECK_WIDTH=0.25 mm

PP3V3_FW_ESD

=PP3V3_S5_FW

GND_CHASSIS_FIREWIRE

FW_PORT1_TPA_FL_P

GND_CHASSIS_FIREWIRE

MAKE_BASE=TRUE

NC_FW_C_TPA_P

NO_TEST=TRUE

FW_C_TPA_P

NC_FW_C_TPBIAS

MAKE_BASE=TRUE

FW_C_TPBIAS

MAKE_BASE=TRUE

NC_FW_C_TPA_N

FW_C_TPA_N

FW_C_TPB_P

FW_C_TPB_N

FW_PORT1_TPB_N

FW_PORT1_TPB_P

FW_B_TPB_P FW_B_TPB_N

VOLTAGE=0V

FW_TPA_C1

VOLTAGE=0V

FW_TPA_C0

FW_PORT0_TPA_P

MAKE_BASE=TRUE

FW_PORT0_TPB_P

MAKE_BASE=TRUE

FW_PORT0_TPB_N

MAKE_BASE=TRUE

FW_PORT1_TPA_N

FW_PORT1_TPA_P

MAKE_BASE=TRUE

FW_PORT1_TPB_N

FW_PORT1_TPB_P

MAKE_BASE=TRUE

FW_B_TPA_P FW_B_TPA_N

FW_A_TPBIAS

VOLTAGE=1.86V

FW_A_TPB_N

FW_A_TPB_N_RL

NO_TEST=TRUE

VOLTAGE=0V

NO_TEST=TRUE

FW_A_TPA_P_RL

VOLTAGE=1.86V

FW_A_TPB_P_RL

NO_TEST=TRUE

VOLTAGE=0V

FW_A_TPA_N_RL

NO_TEST=TRUE

VOLTAGE=1.86V

FW_B_TPBIAS

FW_A_TPB_P

FW_A_TPA_N

FW_A_TPA_P

45

46

44

46

44

46

6

46

3

46

3

6

44

46

44

46

44

www.Vinaﬁx.vn

Preliminary

SYM_VER-1

SYM_VER-2

EN3*

EN1* EN2*

OC1* OC2* OC3*

IN1

IN2

OUT1

OUT2

OUT3

NC

GNDA GNDB

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SB HAS INTERNAL 15K PULL-DOWNS

PLACE C4742 CLOSED TO J4760.

IR RECEIVER & ALS

GND

SB HAS INTERNAL 15K PULL-DOWNS

514-0330

SB HAS INTERNAL 15K PULL-DOWNS

I2C ADDR -> 72(1001000)

PORT 0

LAYOUT NOTE:

NEAR J4760 PIN 8 IN THE

BOTH SIDES OF THE PIN.

ORDER LISTED, AND NOT ON

PLACE C4743, C4797 & L4740

740S0032

D+

External USB Ports

CAMERA & MIC

SB HAS INTERNAL 15K PULL-DOWNS

VDD

SB HAS INTERNAL 15K PULL-DOWNS

PORT 2

D+

BLUETOOTH

TO M13D SLOT

D-

VDD

GND

D+

D-

VDD

D-

GND

PORT 1

514-0330

SB HAS INTERNAL 15K PULL-DOWNS

NOTE: STANDOFFS FOR J4700

DLW21H-SM1

120-OHM

CRITICAL

L4712

4

12

3

CERM

402

20%

0.01uF

16V

C4713

1

2

16V

0.01uF

402

CERM

20%

C4712

1

2

ELEC SM

150UF

20%

6.3V

C4710

1

2

SM

FERR-250-OHM

L4710

12

16V

CERM

402

0.01uF

20%

C4723

1

2

0.01uF

16V

CERM

402

20%

C4722

1

2

FERR-250-OHM

SM

L4720

12

120-OHM

CRITICAL

DLW21H-SM1

L4722

4

12

3

I4701

I4702

USB-M51

F-ANG-TH

CRITICAL

J4710

5

6

7

1

2

3

4

CRITICAL

USB-M51

F-ANG-TH

J4720

5

6

7

1

2

3

4

CRITICAL

USB-M51

F-ANG-TH

J4730

5

6

7

1

2

3

4

CRITICAL

53398-0776

M-ST-SM

J4750

1

2

3

4

5

6

7

8

9

CRITICAL

120-OHM

DLW21H-SM1

L4732

4

12

3

0.01uF

16V

CERM

402

20%

C4733

1

2

402

16V

20%

0.01uF

CERM

C4732

1

2

FERR-250-OHM

SM

L4730

12

0

402

NOSTUFF

R4712

12

402

0

NOSTUFF

R4713

12

402

0

NOSTUFF

R4722

12

0

NOSTUFF

402

R4723

12

402

0

NOSTUFF

R4732

12

0

402

NOSTUFF

R4733

12

CRITICAL

120-OHM

DLW21H-SM1

L4752

4

12

3

402

NOSTUFF

0

R4755

12

NOSTUFF

0

402

R4754

12

0.01uF

20%

402

16V

CERM

C4743

1

2

20% 16V

0.01uF

402

CERM

C4742

1

2

FERR-250-OHM

SM

L4740

12

5%

1/8W

0

MF-LF

805

R4746

12

0.75AMP-13.2V

CRITICAL

MINISMD-LF

F4701

12

805-1

6.3V

20%

CERM

10UF

C4797

1

2

QT800101-1210S-8F

F-ST-SM

CRITICAL

J4700

1

10

2

3

4

5

6

7

8

9

10V

20% CERM

402

0.1UF

C4798

1

2

805-1

10UF

6.3V

20%

CERM

C4799

1

2

CRITICAL

STDOFF-4OD4.5H-1.35-TH

SDF4700

1

CRITICAL

STDOFF-4OD4.5H-1.35-TH

SDF4701

1

CRITICAL

SC-75

RCLAMP0502B

D4700

3

1

2

SC-75

RCLAMP0502B

D4701

3

1

2

RCLAMP0502B

SC-75

D4702

3

1

2

TPS2043B

CRITICAL

SOI

U4700

3

4

7

15

2

6

8

9

10

16

13

12

15

14

11

M-ST-SM

53398-0876

CRITICAL

J4760

9

10

1

2

3

4

5

6

7

8

150UF

ELEC SM

20%

6.3V

C4720

1

2

ELEC SM

150UF

20%

6.3V

C4730

1

2

L4752

155S0232 155S0289

ORIGINAL TOKO CHOKE

L4732

155S0232 155S0289

ORIGINAL TOKO CHOKE

L4722

ORIGINAL TOKO CHOKE

155S0289155S0232

L4712

155S0232 155S0289

ORIGINAL TOKO CHOKE

SYNC_MASTER=M51_DOUG

USB Device Interfaces

SYNC_DATE=06/29/2006

9747

051-7039

21

MAKE_BASE=TRUE

USB_IR_N

MAKE_BASE=TRUE

USB_IR_P

=PP3V3_S3_I2C

I2C_ALS_SDA

I2C_ALS_SCL

GND_CHASSIS_USB

USB_PORT2_N

USB_PORT2_P

=PP5V_S3_USB

PP5V_BNDI_LE340

USB_G_P

USB_G_N

USB_E_P

=PP3V3_S3_BT

USB_BT_N

MAKE_BASE=TRUE

USB_BT_P

MAKE_BASE=TRUE

=PP5V_S3_BNDI

GND_BNDI

VOLTAGE=0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP5V_S3_BNDI

GND_BNDI

AUD_MIC_IN_N_CONN

AUD_MIC_IN_P_CONN

PP5V_S3_BNDI

USB_CAMERA_P

USB_CAMERA_N

GND_AUDIO_MIC_CONN

USB_D_N

GND_CHASSIS_BNDI

USB_D_P

PP5V_USB2_PORT2_F

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V MIN_NECK_WIDTH=0.25MM

GND_CHASSIS_BNDI

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

PP5V_USB2_PORT1_F

USB_H_N

GND_CHASSIS_USB

VOLTAGE=0

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.2MM

=PP5V_S3_USB

PP5V_USB2_PORT0_F

VOLTAGE=5V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

USB_H_P

USB_C_N

GND_CHASSIS_USB

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

PP5V_USB2_PORT1

MIN_NECK_WIDTH=0.25MM

USB_C_P

USB_E_N

USB_E_OC_L

USB_C_OC_L

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

PP5V_USB2_PORT2

MIN_NECK_WIDTH=0.25MM

USB_A_OC_L

USB_PORT1_P

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

PP5V_USB2_PORT0

USB_PORT0_P

USB_A_P

USB_A_N

USB_PORT0_N

USB_PORT1_N

47

47 47

47

3

27

6

3

22

3

47

73

47

73

22

6

22

6

22

6 3

22

6

22

www.Vinaﬁx.vn

Preliminary

KEY

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SB HAS INTERNAL 15K PULL-DOWNS

PLACE CAPS < 250 MILS FROM U2100

LAYOUT NOTE:

PLACE R5302-03 SUCH THAT STUB LENGTH IS MINIMIZED IF THE RESISTORS ARE NOT STUFFED

STDOFF-5.6OD1.63H-1.35-TH

CRITICAL

SDF5300

1

STDOFF-5.6OD1.63H-1.35-TH

CRITICAL

SDF5301

1

0.1UF

C5300

12

0.1UF

C5301

12

F-RT-SM

CRITICAL

AS0B226-S40N-7F

J5300

53

54

1

10

11 12

13 14

15 16

17 18

19

2

20

21 22

23 24

25 26

27 28

29

3

30

31 32

33 34

35 36

37 38

39

4

40

41 42

43 44

45 46

47 48

49

5

50

51 52

6

78

9

10V CERM 402

0.1UF

20%

C5304

1

2

402

20%

0.1UF

CERM

10V

C5305

1

2

0.1UF

10V CERM 402

20%

C5306

1

2

402

CERM

10V

0.1UF

20%

C5307

1

2

402

20%

0.1UF

10V CERM

C5308

1

2

10V

402

CERM

0.1UF

20%

C5310

1

2

CERM 402

20%

0.1UF

10V

C5309

1

2

0

R5302

12

0

R5303

12

805-2

10UF

CERM

10V

20%

C5311

1

2

0

R5304

12

805-2

10UF

CERM

10V

20%

C5312

1

2

805-2

10UF

CERM

10V

20%

C5314

1

2

402

CERM

10V

20%

0.1UF

C5313

1

2

9753

21

AIRPORT CONN

051-7039

SYNC_DATE=06/29/2006SYNC_MASTER=M51_DOUG

AIRPORT_CONN_CLK

=PP3V3_S0_AIRPORT

USB_B_N

PP3V3_S3

USB_B_P

CK410_SRC_CLKREQ6_L

AIRPORT_CLK100M_PCIE_N

=PP1V5_S0_AIRPORT

AIRPORT_CONN_DATA

=SMB_AIRPORT_CLK

=SMB_AIRPORT_DATA

AIRPORT_RST_L

AIRPORT_CLK100M_PCIE_P

AIRPORT_WAKE_L

PCIE_AIRPORT_R2D_N

PCIE_AIRPORT_D2R_P

PCIE_WAKE_L

PCIE_AIRPORT_D2R_N

PCIE_AIRPORT_R2D_P

PCIE_AIRPORT_R2D_C_N PCIE_AIRPORT_R2D_C_P

83 27

6

41

3

22

3

22

33

34

3

27

6

34

54

23

54

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PCI-E X1 PORTS C, D, E, F = UNUSED

PCI-E X1 PORT "B" = MINI CARD (AIRPORT)

PCI-E X1 PORT "A" = ETHERNET (YUKON)

SYNC_MASTER=M51_DOUG

PCI-E CONNECTIONS

21

9754

051-7039

SYNC_DATE=06/29/2006

PCIE_ENET_R2D_C_N

PCIE_ENET_D2R_P

MAKE_BASE=TRUE

PCIE_A_D2R_P

PCIE_ENET_D2R_N

MAKE_BASE=TRUE

PCIE_A_D2R_N

PCIE_ENET_R2D_C_P

MAKE_BASE=TRUE

PCIE_B_R2D_C_P

MAKE_BASE=TRUE

PCIE_B_D2R_N

PCIE_AIRPORT_D2R_P

MAKE_BASE=TRUE

PCIE_B_D2R_P

PCIE_AIRPORT_R2D_C_P

MAKE_BASE=TRUE

PCIE_A_R2D_C_P

PCIE_AIRPORT_D2R_N

TP_PCIE_C_R2D_C_P

MAKE_BASE=TRUE

TP_PCIE_C_R2D_C_N

MAKE_BASE=TRUE

PCIE_C_D2R_P

MAKE_BASE=TRUE

TP_PCIE_C_D2R_N

TP_PCIE_D_R2D_C_P

MAKE_BASE=TRUE

PCIE_D_R2D_C_P

PCIE_D_R2D_C_N

PCIE_D_D2R_P

PCIE_D_D2R_N

TP_PCIE_E_R2D_C_P

MAKE_BASE=TRUE

PCIE_E_R2D_C_P

TP_PCIE_E_R2D_C_N

MAKE_BASE=TRUE

PCIE_E_R2D_C_N

TP_PCIE_E_D2R_N

MAKE_BASE=TRUE

PCIE_E_D2R_N

TP_PCIE_F_R2D_C_P

MAKE_BASE=TRUE

PCIE_F_R2D_C_P

TP_PCIE_F_R2D_C_N

MAKE_BASE=TRUE

PCIE_F_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_F_D2R_N

PCIE_F_D2R_N

MAKE_BASE=TRUE

TP_PCIE_F_D2R_P

PCIE_F_D2R_P

TP_PCIE_D_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_D_D2R_N

MAKE_BASE=TRUE

TP_PCIE_D_D2R_P

MAKE_BASE=TRUE

TP_PCIE_E_D2R_P

MAKE_BASE=TRUE

PCIE_E_D2R_P

PCIE_C_R2D_C_N

PCIE_C_R2D_C_P

PCIE_C_D2R_N

MAKE_BASE=TRUE

TP_PCIE_C_D2R_P

MAKE_BASE=TRUE

PCIE_A_R2D_C_N

PCIE_AIRPORT_R2D_C_N

MAKE_BASE=TRUE

PCIE_B_R2D_C_N

22

41

22

41

22

41

22

5

53

5

53

22

53

22

53

22

www.Vinaﬁx.vn

Preliminary

IN

OUT

IN

OUT

IN

OUT

IN

OUT

P16

P51

P50

P42/SDA1

P97/IRQ15*/SDA0

P95/IRQ14*

P94/IRQ13*

P93/IRQ12*

P92/IRQ0*

P91/IRQ1*

P86/IRQ5*/SCK1/SCL1

P83/LPCPD*

P82/CLKRUN*

P80/PME*

P35/LRESET*

P34/LFRAME*

P10

P12

P13

P14

P15

P17

P31/LAD1

P30/LAD0

P32/LAD2

P33/LAD3

P36/LCLK

P37/SERIRQ

P44/TMO1

P77/AN7

P76/AN6

P81/GA20

P96/EXCL

P11

P47/PWX1/PWM1

P45

P46/PWX0/PWM0

P40/TMIO

P43/TMI1/EXSCK1

P27

P26

P25

P24

P23

P22

P21

P20

P41/TMO0

P52/SCL0

P60/KIN0*

P61/KIN1*

P62/KIN2*

P63/KIN3*

P64/KIN4*

P65/KIN5*

P66/IRQ6*/KIN6*

P67/IRQ7*/KIN7*

P70/AN0

P71/AN1

P72/AN2

P73/AN3

P74/AN4

P75/AN5

P84/IRQ3*/TXD1

P85/IRQ4*/RXD1

P90/IRQ2*

(1 OF 4)

PA2/KIN10*/PS2AC

PA3/KIN11*/PS2AD

PA5/KIN13*/PS2BD

PA4/KIN12*/PS2BC

PB2

PB3

PB4

PE0

PG6/EXIRQ14*/EXSDAB

PG5/EXIRQ13*/EXSCLA

PH1/EXIRQ7*

PH0/EXIRQ6*

PG7/EXIRQ15*/EXSCLB

PG4/EXIRQ12*/EXSDAA

PH3/EXEXCL

PH2/FWE

PB5

PF4/PWM4

PF2/IRQ10*/TMOY

PG2/EXIRQ10*/SDA2

PG0/EXIRQ8*/TMIX

PF7/PWM7

PC3/TIOCD0/TCLKB/WUE11*

PH5

PB7

PB6

PH4

PF5/PWM5

PF6/PWM6

PG1/EXIRQ9*/TMIY

PA6/KIN14*/PS2CC

PA7/KIN15*/PS2CD

PD0/AN8

PD1/AN9

PD2/AN10

PD3/AN11

PD4/AN12

PD5/AN13

PD6/AN14

PD7/AN15

PF0/IRQ8*/PWM2

PF1/IRQ9*/PWM3

PB0/LSMI*

PB1/LSCI

PC0/TIOCA0/WUE8*

PC1/TIOCB0/WUE9*

PC2/TIOCC0/TCLKA/WUE10*

PC4/TIOCA1/WUE12*

PC5/TIOCB1/TCLKC/WUE13*

PC6/TIOCA2/WUE14*

PC7/TIOCB2/TCLKD/WUE15*

PG3/EXIRQ11*/SCL2

PF3/IRQ11*/TMOX

PA1/KIN9*/PA2DD

PA0/KIN8*/PA2DC

PE1*/ETCK

PE2*/ETDI

PE3*/ETDO

PE4*/ETMS

(2 OF 4)

VCL

AVREF

VCC

AVCC

XTAL

EXTAL

AVCC

VCC

MD1

MD2

NMI

RES*

ETRST*

AVREF

AVSS

VSS

(3 OF 4)

NC22

NC21

NC20

NC19

NC18

NC17

NC16

NC15

NC14

NC13

NC12

NC9

NC6

NC11

NC10

NC8

NC7

NC5

NC4

NC3

NC2

NC1

NC0

(4 OF 4)

OUT

IO

OUT

IN

OUT

IN

IO

IN

IO

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

IN

OUT

IO

IN

IO

IN

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

LAYOUT NOTE: PLACE C5807 NEAR PIN F1

SMC_XXX WHERE XXX IS THE PORT NUMBER.

CAN BE LEFT NO-CONNECTED.

UNUSED PINS HAVE THE FORMAT

LAYOUT NOTE:

SMC

PLACE R5899 AND C5820 NEAR SMC PIN N14,N15

VCL IS INTERNAL RAIL

DRIVEN OUTPUTS ALWAYS SO THEY

THEY ARE SET BY SOFTWARE TO BE

22UF

X5R

6.3V

20%

805

C5802

1

2

10%

402

0.47UF

6.3V CERM-X5R

C5807

1

2

402

CERM

20%

0.1UF

10V

C5803

1

2

402

10V CERM

20%

0.1UF

C5820

1

2

MF-LF

402

4.7

1/16W

5%

R5899

12

402

CERM

10V

20%

0.1UF

C5804

1

2

OMIT

SM

XW5800

12

CERM

0.1UF

20% 10V

402

C5805

1

2

0.1UF

402

CERM

10V

20%

C5806

1

2

SMC_H8S2116

OMIT

BGA

U5800

B12

C13

A15

B14

B15

C14

D12

C15

D13

D14

D15

E12

E14

E15

E13

F14

D9

C9

A9

B9

D8

C8

A8

D7

A5

B5

D5

C3

B1

C2

D3

C1

G1

G4

F2

L13

L14

L15

K12

K13

K14

J12

J13

N12

R13

P13

R14

P14

R15

N13

P15

C7

A7

B7

D6

C6

A6

B6

K4

J2

J1

J3

J4

H2

H1

G2

BGA

SMC_H8S2116

OMIT

U5800

R3

P3

R2

N3

R1

N2

M4

N1

B10

A10

D10

A11

B11

C11

A12

D11

G14

G15

G13

G12

H14

H15

H13

H12

M11

P11

R11

N11

P10

R10

N10

M10

M3

M2

M1

L4

L2

M7

P6

R6

N6

M6

R5

P5

N5

P9

R9

N9

P8

R8

M8

P7

R7

E1

F3

K2

C4

D4

B3

OMIT

SMC_H8S2116

BGA

U5800

N14

N15

M14

M15

P12

R12

L1

B2

E2

K1

F4

E3

P2P1J15A1F1

D1P4R4

F12

F13

B13

A13

A4B4D2

A2

OMIT

SMC_H8S2116

BGA

U5800

G3

H3

K15

J14

F15

A14

C12

C10

C5

A3

B8

E4

K3

H4

M9

N8

L3

N4

M5

N7

M12

M13

L12

10K

1/16W 402

5% MF-LF

R5809

1

2

1/16W

10K

5%

402

MF-LF

R5801

1

2

402

MF-LF

10K

5% 1/16W

R5802

1

2

0

5% 1/16W MF-LF 402

NOSTUFF

R5803

1

2

402

1/16W

5% MF-LF

10K

R5898

1

2

9758

21

051-7039

SMC_TX_L

SMC_SYS_LED SMC_SYS_KBDLED

SMB_B_S0_CLK

SMB_B_S0_DATA

SMB_A_S3_CLK

SMB_A_S3_DATA

SMB_BSA_CLK

SMB_BSA_DATA

SMB_0_S0_CLK

SMC_RSTGATE_L

PM_LAN_ENABLE

ALL_SYS_PWRGD RSMRST_PWRGD SMC_SB_NMI PM_RSMRST_L IMVP_VR_ON PM_PWRBTN_L

SMB_BSB_CLK

SMC_ONOFF_L

SC_RX_L

SC_TX_L

PM_SUS_STAT_L

SMC_TPM_GPIO

INT_SERIRQ

PCI_CLK_SMC

SMC_LRESET_L

LPC_FRAME_L

LPC_AD<3>

LPC_AD<2>

LPC_AD<1>

LPC_AD<0>

SMC_P27

SMC_RCIN_L BOOT_LPC_SPI_L

SMC_TPM_RESET_L PM_EXTTS_L PM_THRM_L SYS_ONEWIRE PM_BATLOW_L

SMC_FAN_0_TACH SMC_FAN_1_TACH SMC_FAN_2_TACH

SMC_FAN_3_CTL

SMC_TPM_PP

SMB_BSB_DATA

SMC_XDP_TMS

SMC_XDP_TCK

SMC_RX_L

SMC_EXTSMI_L

ISENSE_CAL_EN

SMC_EXCARD_PWR_EN

SMC_FWIRE_ISENSE

SMC_BATT_ISENSE

SMC_PBUS_VSENSE

SMC_GPU_VSENSE

SMC_PROCHOT_3_3_L

SPI_SO

SPI_SCLK

SMC_SUS_CLK

PM_SYSRST_L

SMC_XDP_TRST_L

SMC_THRMTRIP

ALS_GAIN

SMC_RST_L

PM_SLP_S3_L PM_SLP_S4_L PM_SLP_S5_L

SMC_EXCARD_CP

SMC_DCIN_ISENSE

SMC_GPU_ISENSE

SMC_CPU_RESET_3_3_L

SMC_XDP_TCK_3_3

SPI_CE_L

SMC_PF0

SMC_ADAPTER_EN

SMC_CPU_VSENSE

SMB_0_S0_DATA

SMC_RUNTIME_SCI_L SMC_ODD_DETECT

SMC_BATT_VSET SMC_SYS_ISET

SMC_TMS

SMC_TDO

SMC_TDI

SMC_TCK

SMC_CASE_OPEN

SMC_P26

SMC_BATT_CHG_EN

SMC_P20

SMC_BATT_TRICKLE_EN_L

SMC_P21

SMC_FAN_0_CTL SMC_FAN_1_CTL

SMC_FAN_3_TACH

SMS_Y_AXIS

ALS_RIGHT

SMC_FWE

SMC_BC_ACOK

SMC_P23

SMC_CPU_INIT_3_3_L

=PP3V3_S5_SMC

GND_SMC_AVSS

SMC_SYS_LED_16B

SMC_XDP_TDO_3_3

SPI_ARB

GND_SMC_AVSS

SMC_NMI

SMC_TRST_L

SMC_PROCHOT

ALS_LEFT

=PP3V3_S5_SMC

SMC_EXTAL

SMC_XTAL

SMC_P22

SMC_PM_G2_EN

SMC_EXCARD_OC_L

SMC_FAN_2_CTL

SPI_SI

SMC_CPU_ISENSE

SMS_INT_L

SMC_BS_ALRT_L

SMC_MEM_ISENSE

SMC_NB_ISENSE

SMC_ANALOG_ID

SMS_Z_AXIS

SMS_X_AXIS

SMS_ONOFF_L

SMC_PF1 SMC_LID

SMC_BATT_ISET

SMC_SYS_VSET

SMC_WAKE_SCI_L

PM_CLKRUN_L

KBC_MDE

SMC_MD1

PP3V3_AVREF_SMC

SMC_VCL

PP3V3_AVCC_SMC

MIN_NECK_WIDTH=0.20 MM

MIN_LINE_WIDTH=0.25 MM

=PP3V3_S5_SMC

80

84

67

79

59

84

59

67

59

60

77

60

63

60 77

77

60

58

76

58

63

60

58

59

26

23

34

21

22

67

59

23

59

76

22

63

26

59 23

23

63

59

27

59

27

22

26

23

60

27

5

59

27

45

23

5

76

23

75

23

27

59

5

59

5

6

5

59

21

5

59

14

10

59

23

65

66

59

27

59

5

23

5

59

76

84

59

5

22

59

23

59

5 5

5

23

59

76

84

59

22

59

76

27

23

59 59

59

5

59

65

59

3

58

59

22

58

59

3

59

66

5

76

23

59

23

5

59

3

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

NC

CD

GND

OUT

VDD

G

D

S

D

G

S

LM393A

V+

GND

LM393A

V+

GND

IN

OUT

GND

G

D

S

G

D

S

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CURRENT SET TO DRIVE LED AT 24MA NOMINAL

PULLDOWN UNUSED ANALOG SENSE

WIRE SMC TO SB PINS

GENERATE 0.48V MID-VREF

PRECISION 3.3V AVREF FOR SMC

TURN ON 3.3V VREF ONLY AFTER SMC

CPU 1.05V -> SMC 3.3V SHIFTER

PCB: ENSURE FSB_CPURST_L FANS OUT FROM U1200

PLACE C5951 NEXT TO Q5952

AND MINIMIZE ROUTE LENGTH TO U5999.

LAYOUT: PLACE C5904 ON OPPOSITE LAYER OF SW5901 C5904 FOR TWEEZERS TO TURN ON SYSTEM

SYS POWER BUTTON

* NEVER STUFF C5904

POWER BUTTON HEADER

M51: FOLLOWED M50, NOT CONNECTING TO SMC, AND TERMINATING

SELECT TPM GPIO

HDD ACTIVITY MONITOR

POWER SUPPLY TEMP SENSE

NO-CONNECT UNUSED PINS

SMC ALIASES, PULLUPS, AND TESTPOINTS

SPARE COMPARATER

518S0327

PCB: RUN A TRACE FROM EACH

NEXT TO THIS GND TRACE AND

DEBUG TESTPOINTS ON SELECTED INPUTS/OUTPUTS

SMC RESET BUTTON

NC OR PULLDOWN UNUSED ANALOG SENSE PINS

TIE INTO DIGITAL GND VERY CLOSE TO

M51 SPECIFIC: GPU MONITORING SIGNALS

SMC’S XW5800. PLACE XW5900 NEAR XW5800.

ANALOG OPAMP PSEUDO-DIFFERENTIALLY

SMC CRYSTAL

3.3V RAIL AND AVCC RAIL IS UP.

TPM RESET PULLUP

PINS ON PORT 7.

WHITE SYSLED

ACROSS LARGE VOLUME MANUFACTURING

WIRE-OR DIMM OVERTEMP TO SMC

SMC 3.3V -> CPU 1.05V SHIFTER

TPM CRYSTAL

LAYOUT NOTE: PLACE CAPACITORS BETWEEN CRYSTAL AND SMC/TPM

TIE ANALOG SENSOR OPAMP GROUNDS TO SMC GROUND

SMC PULL-UPS & PULL-DOWNS

353S1278

SMC_SYS_LED_16B - PWM, NORMAL LED ACTIVITY, SLEEP PULSE, RUN, ETC

SMC_SYS_LED - PWM, S/W VARIED TO CONTROL BRIGHTNESS

* BRIGHTER FOR LARGER IMACS

0

SMC_TPM_GPIO1

R5920

12

0

5%

1/16W

SMC_TPM_GPIO2

MF-LF

402

R5921

12

SOT-363

2N7002DW-X-F

Q5901

6

2

1

2N7002DW-X-F

SOT-363

Q5901

3

5

4

CERM

402

10V

0.1uF

20%

C5903

1

2

6.2K

MF-LF 402

5% 1/16W

R5930

1

2

CRITICAL

53398-0276

M-ST-SM

J5903

3

4

1

2

1/16W MF-LF

1K

5%

402

R5931

1

2

10K

R5830

12

10K

R5829

12

1/16W

402

5%

MF-LF

10K

R5808

12

10K

R5832

12

10K

R5817

12

10K

R5815

12

NOSTUFF

402

MF-LF

1/16W

4.7K

5%

R5950

1

2

10K

R5833

12

10K

R5819

12

10K

R5821

12

100K

R5818

12

10K

R5822

12

10K

R5823

12

10K

R5824

12

10K

R5825

12

10K

R5826

12

10K

R5828

12

10K

R5827

12

1/16W MF-LF

402

5%

0

SMC_TPM_PP

R5995

12

16V

402

CERM

20%

0.01uF

C5941

1

2

805-1

CERM

6.3V

20%

10UF

C5942

1

2

402

6.3V CERM-X5R

10%

0.47UF

C5940

1

2

402

10V

0.1uF

CERM

20%

C5901

1

2

5%

402

1K

1/16W MF-LF

R5932

1

2

1/16W MF-LF

5%

10K

R5924

12

SM

OMIT

XW5900

12

402

MF-LF

1/16W

5%

0

NOSTUFF

R5940

12

SOT23-5

RN5VD30A-F

CRITICAL

U5900

5

3

4

1

2

1/16W

5%

402

MF-LF

10K

R5941

12

6.3V

1UF

10%

402

CERM

C5943

1

2

2N7002

SOT23-LF

Q5911

3

1

2

SOT-23

NTR4101P

Q5910

3

1

2

5% 1/16W

10K

MF-LF 402

R5942

1

2

SOI-1-LF

U5999

4

6

5

7

8

SPST

SM-LF

DEVELOPMENT

SW5901

12

34

SOI-1-LF

U5999

4

2

3

1

8

5%

CERM

402

100PF

50V

C5930

1

2

0

R5922

12

0

R5923

12

10K

R5916

12

10K

R5917

12

1K

R5934

12

1K

R5933

12

32.768K

4.1X1.5X.9-SM

CRITICAL

TPM

Y5981

1

2

SOT23-3

CRITICAL

REF3133

U5940

3

12

I327

I328

CRITICAL

20.000M

8X4.5-SM

Y5980

1

2

10%

1UF

6.3V CERM

402

C5951

1

2

2.2K

5%

MF-LF

1/16W

402

R5951

1

2

4.7K

402

MF-LF

1/16W

5%

R5957

1

2

2N7002

SOT23-LF

Q5950

3

1

2

SOT23-LF

2N3906

Q5952

1

3

2

10K

R5831

12

10K

R5960

12

NOSTUFF

2N7002

SOT23-LF

Q5951

3

1

2

NOSTUFF

402

5% 1/16W MF-LF

4.7K

R5955

1

2

20% 50V CERM 603

NOSTUFF

0.01uF

C5904

1

2

OMIT

SM

WHITE

NASW031T

LED5950

2

3

1

4

26.7

1% 1/16W MF-LF 402

R5952

1

2

1K

1/16W MF-LF

5%

402

R5900

1

2

1/16W

5%

1K

402

MF-LF

R5907

12

CERM

22PF

50V 402

5%

C5980

12

22PF

40250V

5%CERM

C5981

12

CERM

5%

15PF

402

50V

TPM

C5982

12

50V

5%

15PF

402

CERM

TPM

C5983

12

0.01UF

10%

402

CERM

16V

C5900

1

2

0.1uF

CERM

10V

20%

402

C5902

1

2

SPST

SM-LF

DEVELOPMENT

SW5900

12

34

U5940

INTERSIL ISL60002-33

353S1381 353S1278

051-7039

SMC & TPM SUPPORT

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

21

59 97

SMC_SYS_LED

MIN_LINE_WIDTH=0.6MM

SYS_LED_C

MIN_NECK_WIDTH=0.25MM

SYS_LED_BRT_D

SMC_CPU_RESET_3_3_L

SC_RX_L SC_TX_L SMS_ONOFF_L

SMC_RX_L

SMC_BS_ALRT_L

SMC_BC_ACOK SMC_FWE

SMC_TDO

SMC_TMS

NC_SMC_MEM_ISENSE

MAKE_BASE=TRUE

=PP3V3_S0_FAN

P0V48_SMC_LSREF

=PP3V3_S5_SMC

TPM_XTALI

VOLTAGE=0V

MIN_LINE_WIDTH=0.4 MM

GND_SMC_AVSS

MIN_NECK_WIDTH=0.2 MM

PP5V_S5

SMC_REF_IN

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDT=0.2 MM

SMC_EXCARD_CP

TP_SMC_FAN_3_TACH

FUNC_TEST=TRUE

MAKE_BASE=TRUE

SMC_PF0 SMC_PM_G2_EN

FUNC_TEST=TRUE

TP_SMC_PB7

MAKE_BASE=TRUE

SMC_EXCARD_PWR_EN

TP_SMC_ADAPTER_EN

FUNC_TEST=TRUE

MAKE_BASE=TRUE

SMC_EXTAL

SMC_XTAL

MAKE_BASE=TRUE

MXM_AC_BATT_L

SMC_XDP_TDO_3_3

SMC_XDP_TMS

GPU_OVERTEMP_L

MAKE_BASE=TRUE

NC_SMS_Y_AXIS

MAKE_BASE=TRUE

NC_SMS_X_AXIS

TP_SMC_XDP_TRST_L

MAKE_BASE=TRUE

SUS_CLK_SB

GND_NEXT_TO_SMC

TPM_PP

SMC_TX_L

NC_ALS_GAIN

MAKE_BASE=TRUE

SMC_MANUAL_RST_L

=PP3V3_S5_SMC

SMC_RST_L

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_SMC_SYS_KBDLED

MAKE_BASE=TRUE

TP_PM_G2_EN

FUNC_TEST=TRUE

ALS_RIGHT

TP_SMC_XDP_TCK

MAKE_BASE=TRUE

SMC_REF_GATE1

NC_SMC_BATT_VSET

MAKE_BASE=TRUE

SMC_P26

SMC_SYS_VSET

SMS_X_AXIS

SC_RX_L

SC_TX_L

SMS_Y_AXIS

ALS_GAIN

NC_SMC_SYS_VSET

MAKE_BASE=TRUE

NC_SMC_SYS_ISET

MAKE_BASE=TRUE

SMC_P27

NC_SMC_P27

MAKE_BASE=TRUE

SMC_BATT_ISET

NC_SMC_BATT_ISET

MAKE_BASE=TRUE

SMC_BATT_VSET

SMC_P23

SMC_P22

SMC_P21

SMC_P20

NC_SMC_P20

MAKE_BASE=TRUE

SMC_CPU_INIT_3_3_L

FWH_INIT_L

MAKE_BASE=TRUE

SYS_ONEWIRE

SMC_XDP_TRST_L

SMC_PF1

SMC_SYS_KBDLED

MAKE_BASE=TRUE

TP_SMC_PF0

MAKE_BASE=TRUE

NC_SMC_P21

NC_SMC_BATT_TRICKLE_EN_L

MAKE_BASE=TRUE

UNUSED_SMC_SENSE

SMC_FWIRE_ISENSE

FUNC_TEST=TRUE

TP_ALS_LEFT

MAKE_BASE=TRUE

TP_ALS_RIGHT

MAKE_BASE=TRUE

TP_SMC_PF1

MAKE_BASE=TRUE

FUNC_TEST=TRUE

TP_SMC_EXCARD_PWR_EN

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_SMC_PB7

TP_SMC_FAN_3_CTL

MAKE_BASE=TRUE

FUNC_TEST=TRUE

SMC_BATT_CHG_EN

TPM_GPIO2

SMC_SUS_CLK

MAKE_BASE=TRUE

UNUSED_SMC_SENSE

SMC_TPM_PP

SMC_TPM_GPIO

PM_EXTTS_L

TPM_XTALO

SMC_ONOFF_L

SMC_ANALOG_ID

SMC_PROCHOT_3_3_L

CPU_PROCHOT_L

SMC_PROCHOT

MAKE_BASE=TRUE

NC_SMC_NB_ISENSE

NC_SMS_Z_AXIS

MAKE_BASE=TRUE

NC_SMC_P22

NC_SMC_P26

MAKE_BASE=TRUE

NC_SMC_P23

TPM_GPIO1

SMC_TPM_RESET_L

SMC_TDI

MAKE_BASE=TRUE

DIMM_OVERTEMP_L

PM_THRMTRIP_L

UNUSED_SMC_SENSE

TP_SB_SATALED_L

=PP3V3_S5_SMC

SMC_EXCARD_OC_L

ACDC_TEMP

MAKE_BASE=TRUE

PU_HDD_ACTIVITY_LED

MAKE_BASE=TRUE

PP5V_S0

SMC_FAN_3_CTL

NC_SMC_BATT_CHG_EN

MAKE_BASE=TRUE

SMC_BATT_TRICKLE_EN_L

SMC_ODD_DETECT

SMC_PB7

SMC_XDP_TCK

SMC_ADAPTER_EN ALS_LEFT

SMC_FAN_3_TACH

SMC_XDP_TCK_3_3

SMC_CASE_OPEN

SMC_LID

SMC_TCK

SMC_TX_L

SMC_ONOFF_L

SMC_SYS_ISET

POWER_BUTTON_L

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

SMC_REF_GATE2

SMC_RX_L

SMC_THRMTRIP

CPU_PROCHOT_L

=PP3V3_S5_SMC

MIN_NECK_WIDTH=0.2 MM

PP3V3_AVREF_SMC

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=3.3V

SYS_LED_CTL_D

SYS_LED_CTL_B

=PP3V3_S0_FAN

SMC_SYS_LED_16B

PP3V3_TPM_3VSB

SMC_BATT_ISENSE

SMC_MEM_ISENSE

SMS_Z_AXIS SMC_NB_ISENSE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

SYS_LED_CTL_C

PP5V_S3

83 82 80

79 78

97

60

66

59

77

60

59

83

60

59

66

59

60

65

58

84

75

59

58

60

21

58

75

60

59

58

65

59

58

59

27

76

5

58

27

58

59

21

58

59

67

58

29

14

27

5

58

59

58

59

27

59

83

58

5

58

5

3

67

58

3

58

85

58

85

5

23

76

67

5

3

5

58

5

58

5

58

5

58

5

58

5

58

5

58

5

59

58

67

58

59

58

14

67

58

7

58

5

67

58

5

28

7

59

21

3

58

6

3

58

5

58

59

58

5

58

5

58

7

3

58

3

58

67

58

3

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

F-ST-5047

SM1

DEVELOPMENT

J6000

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

402

6.3V CERM

1UF

10%

DEVELOPMENT

C6000

1

2

402

CERM

10V

20%

0.1UF

DEVELOPMENT

C6001

1

2

0.1UF

20% 10V

402

CERM

DEVELOPMENT

C6003

1

2

10%

402

6.3V CERM

1UF

DEVELOPMENT

C6002

1

2

LPC+ CONN

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

051-7039

21

60 97

SV_SET_UP

FWH_INIT_L

PCI_CLK_PORT80

SMC_TCK

PM_SUS_STAT_L

LPC_AD<2>

LPC_FRAME_L

SMC_TRST_L SMC_TDO

PM_CLKRUN_L

DEBUG_RST_L

SMC_TMS

BOOT_LPC_SPI_L

SMC_NMI

SMC_RST_L

SMC_TDI

INT_SERIRQ

LPC_AD<3>

SMC_RX_L

SMC_MD1

LPC_AD<1>

LPC_AD<0>

SMC_TX_L

=PP5V_S0_DEBUG

=PP3V3_S5_DEBUG

67

67 67

67

59

58

59

58

59

58

59

58

59

58

59

23

21

34

58

23

21

58

23

6

58

22

58

23

21

58 58

21

58

5

5 5

5

3

www.Vinaﬁx.vn

Preliminary

SCK

SO

WP*

SI

VDD

CE*

HOLD*

VSS

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

R6309 NOT NEEDED SINCE SPI ROM

IS SHARED WITH SB AND SMC

R6306-07 SHOULD BE PLACED LESS THAN 2.54MM FROM U2100

R6303 SHOULD BE PLACED LESS THAN 2.54MM FROM U6301

402

CERM

10V

0.1UF

20%

C6312

1

2

1/16W

402

5%

3.3K

MF-LF

R6301

1

2

1/16W

5%

3.3K

MF-LF

402

R6302

1

2

50V

5%

402

CERM

33PF

C6301

1

2

1/16W MF-LF

402

47

5%

R6307

12

33PF

402

50V

5% CERM

C6308

1

2

402

5% CERM

33PF

50V

C6309

1

2

5%

402

47

MF-LF

1/16W

R6303

12

5% 1/16W MF-LF

402

47

R6306

12

CERM

5%

33PF

50V 402

C6311

1

2

OMIT

SOI

16MBIT

SST25VF016B

U6301

1

7

6

5

2

8

4

3

402

10K

1/16W

5%

MF-LF

R6399

1

2

10K

1/16W

5%

MF-LF

402

NOSTUFF

R6309

1

2

SYNC_DATE=06/29/2006SYNC_MASTER=M50_DOUG

97

21

051-7039

SPI BOOTROM

63

SPI_SI

SPI_HOLD_L

SPI_SCLK_R

SPI_SCLK

SPI_SO

=PP3V3_S5_ROM

SPI_SI_R

SPI_SO_R

SPI_CE_L

SPI_WP_L

58

22 58

22

58

5

22

5

3

22

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

FAN 0

MOTOR CONTROL

518S0406

MOTOR CONTROL

GND

12V DC

GND

518S0406

TACH

ODD FAN

HD FAN

TACH

FAN 1

NOTE: ADDED TO PROTECT SMC

12V DC

5%

10K

1/16W MF-LF 402

R6500

1

2

MF-LF

5%

10K

1/16W

402

R6501

1

2

603

0.1UF

20% 25V CERM

NOSTUFF

C6500

1

2

1206

MF-LF

1/4W

5%

1.5K

R6502

1

2

1206A-03-LF

NTHS5443T1

Q6500

12367

8

4

5

1.5K

805

MF-LF

5%

1/8W

R6503

1

2

SOT23

MMBD914XXG

D6500

1

3805

0

5%

MF-LF

1/8W

R6504

12

X7R 805

10% 16V

0.47UF

C6501

1

2

805

MF-LF

1/8W

5%

3.9K

R6505

1/16W MF-LF

5%

402

10K

R6506

1

2

1206A-03-LF

NTHS5443T1

Q6503

12367

8

4

5

25V

0.1UF

CERM

20%

603

NOSTUFF

C6502

1

2

805

MF-LF

5%

1.5K

1/8W

R6507

1

2

5%

0

1/8W

MF-LF

805

R6508

12

16V X7R

0.47UF

805

10%

C6503

1

2

MF-LF

805

1/8W

5%

3.9K

R6509

SOT23

MMBD914XXG

D6501

1

3

1/4W

1.5K

1206

5%

MF-LF

R6510

1

2

1/16W MF-LF

5%

10K

402

R6511

1

2

805

1.0K

1/8W MF-LF

NOSTUFF

5%

R6512

1

2

805

MF-LF

1/8W

5%

1.0K

NOSTUFF

R6513

1

2

805

0

MF-LF

5%

1/8W

R6514

12

MF-LF

1/8W

0

805

5%

R6515

12

SMB

B130LBT01XF

NOSTUFF

D6502

12

B130LBT01XF

SMB

NOSTUFF

D6503

12

MF-LF

5%

47K

402

1/16W

R6599

12

47K

5% 1/16W MF-LF

402

R6598

12

2N7002

SOT23-LF

Q6502

3

1

2

2N7002

SOT23-LF

Q6505

3

1

2

HS8804F-B

M-RT-SM

CRITICAL

J6500

5

6

1

2

3

4

HS8804F-B

CRITICAL

M-RT-SM

J6501

5

6

1

2

3

4

CRITICAL

16V

120UF

20%

ELEC

6.3X11-TH-LF1

C6504

1

2

CRITICAL

6.3X11-TH-LF1

ELEC

20%

120UF

16V

C6505

1

2

HD AND OD FAN

051-7039

21

9765

SYNC_MASTER=M51_HENRY

SYNC_DATE=06/29/2006

=PP12V_S0_FAN

MIN_NECK_WIDTH=0.25MM

FAN_1_PWR

MIN_LINE_WIDTH=0.5MM

F1_VOLTAGE8R5

SMC_FAN_0_TACH

SMC_FAN_1_TACH

PP3V3_S5

F1_GATESLOWDN

PP3V3_S5

=PP3V3_S0_FAN

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

FAN_1_OUT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

F0_RCFEEDBK

F1_RCFEEDBK

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.25MM

=PP3V3_S0_FAN

F0_VOLTAGE8R5 F0_GATESLOWDN

SMC_FAN_0_CTL

FAN_TACH1

SMC_FAN_1_CTL

FAN_TACH0

=PP12V_S0_FAN

FAN_0_PWR

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.25MM

FAN_0_OUT

83

80

79

78

77

76

66

65

26

66

6

65

66

65

5

59

65

3

58

3

58

3

www.Vinaﬁx.vn

Preliminary

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

GND 12V DC

ODD TEMP SENSOR

518S0413518S0413

HD TEMP SENSOR

I2C ADDR:0X90(1001000)

I2C ADDR:0X92(1001001)

518S0406

MOTOR CONTROL TACH

FAN 2

CPU FAN

CERM

402

10V

20%

0.1UF

C6654

1

2

402

CERM

20% 10V

0.1UF

C6655

1

2

2N7002

SOT23-LF

Q6602

3

1

2

HS8804F-B

CRITICAL

M-RT-SM

J6600

5

6

1

2

3

4

M-RT-SM

CRITICAL

HS8805F-B

J6601

6

7

1

2

3

4

5

CRITICAL

HS8805F-B

M-RT-SM

J6602

6

7

1

2

3

4

5

CRITICAL

6.3X11-TH-LF1

ELEC

20%

120UF

16V

C6602

1

2

10K

MF-LF 402

1/16W

5%

R6600

1

2

NTHS5443T1

1206A-03-LF

Q6600

12367

8

4

5

MMBD914XXG

SOT23

D6600

1

3

NOSTUFF

CERM

20%

0.1UF

603

25V

C6600

1

2

1.5K

5%

1/8W

MF-LF

805

R6601

1

2

0

1/8W

805

MF-LF

5%

R6602

12

10%

805

X7R

16V

0.47UF

C6601

1

2

3.9K

5%

1/8W

MF-LF

805

R6603

1206

1.5K

5% 1/4W MF-LF

R6604

1

2

MF-LF

10K

402

5% 1/16W

R6605

1

2

5%

1.0K

1/8W MF-LF 805

NOSTUFF

R6606

1

2

MF-LF

0

1/8W

805

5%

R6607

12

B130LBT01XF

NOSTUFF

SMB

D6601

12

47K

5% 1/16W MF-LF

402

R6697

12

20%

NOSTUFF

16V

CERM

402

0.01UF

C6650

12

NOSTUFF

0.01UF

CERM

20% 16V 402

C6651

12

40216V

20%

CERM

0.01UF

NOSTUFF

C6653

12

NOSTUFF

402

0.01UF

CERM

20% 16V

C6652

12

9766

21

051-7039

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

CPU FAN, HD & OD TEMP

SMC_FAN_2_TACH

F2_GATESLOWDNF2_VOLTAGE8R5

=PP12V_S0_FAN

GND_CHASSIS_HDD_TEMP

=PP3V3_S0_FAN

PP3V3_S5

=I2C_HD_TEMP_SDA =I2C_HD_TEMP_SCL

GND_CHASSIS_ODD_TEMP

=PP3V3_S0_ODD_TSENS

=PP3V3_S0_HD_TSENS

GND_CHASSIS_HDD_TEMP

SMC_FAN_2_CTL

GND_CHASSIS_ODD_TEMP

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

F2_RCFEEDBK

FAN_TACH2

=I2C_ODD_TEMP_SCL

=I2C_ODD_TEMP_SDA

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM

FAN_2_OUT

MIN_LINE_WIDTH=0.5MM

FAN_2_PWR

MIN_NECK_WIDTH=0.25MM

83 80 79 78 77 76 65 26

65

6

65

66

59

5

66

58

3

6

3

27

6

3

6

58

6

27

www.Vinaﬁx.vn

Preliminary

IN

IO

LAD1

LAD2

LCLK

LFRAME*

LRESET*

LPCPD*

SERRIRQ

LAD0

CLKRUN/GPIO*

PP/GPIO

GPIO_EXPRESS_00

GPIO/SM_DAT

GPIO/SM_CLK

XTALI/32K_IN

TESTBI/BADD/GPIO

TESTI

3V0

3V1

3V2

3VSB

VNC

VBAT

XTALO

GND2

GND3

GND0

GND1

LAD3

IO

IN

IO

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(INT PD)

GND

NC

VSB

VDD

NC

PP

GPIO

CLKRUN*

NC

BASE ADDR = 0X2E/2F

LAYOUT NOTE: PLACE WHERE ACCESSIBLE

LAYOUT NOTE: PLACE R6702-03 WHERE ACCESSIBLE

NOTE: SINCE CURRENT OF VSB IS NOT YET ON SPEC,

1/8W (R6704/R6705) IS USED FOR NOW

TESTBI/BADD

GPIO2

BASE ADDR = 0X4E/4F

TPM

402

X5R

16V

10%

0.1UF

C6700

1

2

TPM

0.1UF

402

X5R

16V

10%

C6701

1

2

TPM

0.1UF

10% 16V X5R 402

C6702

1

2

402

X5R

16V

10%

0.1UF

TPM

C6703

1

2

NOSTUFF

0

5% 1/16W MF-LF 402

R6700

1

2

OMIT

TSSOP

TPM

U6700

10

19

24

5

15

4

111825

2

1

6

26

23

20

17

21

22

28

16

7

27

9

8

12

3

13

14

MF-LF

1/16W

5%

10K

402

TPM

R6702

1

2

NOSTUFF

5% 1/16W MF-LF

10K

402

R6703

1

2

805

MF-LF

1/8W

5%

0

TPM

R6704

12

NOSTUFF

805

MF-LF

1/8W

5%

0

R6705

1

2

0

5%

MF-LF

1/16W

402

TPM

R6798

12

MF-LF

5%

0

NOSTUFF

1/16W

402

R6799

12

TPM

SYNC_DATE=06/29/2006

SYNC_MASTER=M51_HENRY

051-7039

21

67 97

TPM_BADD

PP3V3_TPM_3VSB

MIN_LINE_WIDTH=0.6MM

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.15MM

=PP3V3_S0_TPM

TPM_PP

TPM_GPIO1

TPM_GPIO2

LPC_AD<3>

=PP3V3_S3_TPM

PM_CLKRUN_L

TPM_XTALI

TPM_XTALO

=PP3V3_S0_TPM

INT_SERIRQ

PM_SUS_STAT_L

LPC_FRAME_L

PCI_CLK_TPM

LPC_AD<2>

LPC_AD<1>

LPC_AD<0>

TPM_RST_L

TPM_LRESET_L

SMC_TPM_RESET_L

60

58

67

21

23

67

23

21

59

3

59

5

3

5

59

3

5

34

5

6

58

www.Vinaﬁx.vn

Preliminary

IN

OUT

GPIO0/DMIC-CLK

RESET*

PORT-A-R

PORT-A-L

SPDIFI/EAPD/MIDI-I/DMIC-R

DVDD_IO

NC

DVDD

BCLK

GPIO1/DMIC-L

AVSS1

SENSE_B

SENSE_A

CD-L

SDATA_IN

SDATA_OUT

AVDD1

AVDD2

AVSS2

BEEP

CD-GND

DVSS

PORT-A-VREFO/DCVOL

PORT-F-L

PORT-F-R

SPDIFO

PORT-C-L

PORT-C-R

PORT-D-L

PORT-D-R

VREF

JDREF

PORT-G-L

PORT-G-R

PORT-H-L

PORT-H-R

PORT-E-L

PORT-E-R

PORT-B-L

PORT-B-R

PORT-C-VREFO

PORT-D-VREFO

PORT-B-VREFO

PORT-E-VREFO

PORT-F-VREFO

CD-R

SYNC

REV B3

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC NC

NC

4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP

AUDIO CODEC

APPLE P/N 353S1343

NC

MIC INPUT TO BOTH L&R

0.1UF

16V

402

X5R

10%

C6821

1

2

10UF

20%

6.3V TANT

SMA-LF

C6810

1

2

39

402

5%

MF-LF

1/16W

R6807

12

39

402

5% 1/16W MF-LF

R6808

12

1000PF

10%

X7R 402

25V

C6812

1

2

25V

402

10%

X7R

1000PF

C6830

1

2

1000PF

10%

X7R

25V

402

C6835

1

2

X7R

25V

10%

402

1000PF

C6836

1

2

FERR-120-OHM-1.5A

0402

L6801

12

603

0.5%

20K

MF-LF

1/16W

R6816

1

2

SMA-LF

TANT

6.3V

10UF

20%

C6805

1

2

0402

FERR-120-OHM-1.5A

L6800

12

FERR-120-OHM-1.5A

0402

L6802

12

1UF

10V

10%

805

CERM

C6800

1

2

1UF

CERM

10V

10%

805

C6880

1

2

ELEC

16V

20%

220UF

SM-CASE-C1

C6803

1

2

220UF

ELEC

16V

20%

SM-CASE-C1

C6802

1

2

16V

220UF

20%

ELEC SM-CASE-C1

C6811

1

2

402

MF-LF

1/16W

1%

165

R6809

12

402

MF-LF

1/16W

5%

0

NO STUFF

R6801

1

2

0

5% 1/16W MF-LF 402

NO STUFF

R6810

1

2

ALC885-VB3-GR

CRITICAL

LQFP

U6800

25

38

26

42

6

12

19

18

20

1

9

4

7

2

3

40

37

39

41

33

21

22

28

23

24

29

35

36

32

14

15

31

16

17

30

43

44

45

46

11

8

5

13

34

47

48

10

27

402

25V

10%

X7R

1000PF

C6801

1

2

MF-LF

100K

402

5% 1/16W

R6800

1

2

21

SYNC_MASTER=AUDIO

97

051-7039

68

AUDIO: CODEC

SYNC_DATE=06/29/2006

PPV_3V3_DVDD

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.20MM

ACZ_SYNC

AUD_GPIO_0

ACZ_RST_L

AUD_BI_PORT_A_R

AUD_BI_PORT_A_L

AUD_SPDIF_IN

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.30MM

PPV_3V3_DVDD_IO

NC_VRP

ACZ_BITCLK

AUD_GPIO_1

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM VOLTAGE=0V

GND_AUDIO_CODEC

AUD_SENSE_B

AUD_SENSE_A

BAL_IN_L

ACZ_SDATAIN_CHIP

ACZ_SDATAOUT

MIN_NECK_WIDTH=0.25MM

PP4V5_AUDIO_ANALOG

VOLTAGE=4.5V

MIN_LINE_WIDTH=0.6MM

BEEP

BAL_IN_COM

AUD_PSEUDO_VREF

AUD_BI_PORT_F_L AUD_BI_PORT_F_R

AUD_SPDIF_OUT_CHIP

AUD_BI_PORT_C_L AUD_BI_PORT_C_R

AUD_BI_PORT_D_L AUD_BI_PORT_D_R

VREF

JDREF

NC_AUD_BI_PORT_G_L NC_AUD_BI_PORT_G_R

NC_AUD_BI_PORT_H_L NC_AUD_BI_PORT_H_R

NC_AUD_BI_PORT_E_L NC_AUD_BI_PORT_E_R

AUD_BI_PORT_B_L AUD_BI_PORT_B_R

NC_AUD_VREF_PORT_C NC_AUD_VREF_PORT_D

NC_AUD_VREF_PORT_B

NC_AUD_VREF_PORT_E

AUD_VREF_PORT_F

BAL_IN_R

GND_AUDIO_CODEC

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.30MM

VOLTAGE=3.3V

=PP3V3_S0_AUDIO

AUD_PSEUDO_VREF

AUD_PSEUDO_VREF_F

AUD_BI_PORT_F_L AUD_BI_PORT_F_R

AUD_SPDIF_OUT

=PP4V5_S5_AUDIO_ANALOG

ACZ_SDATAIN<0>

PP4V5_AUDIO_ANALOG

74

72

74

71

73

70

72

69

74

69

71

74

69

MIN_LINE_WIDTH=0.30MM

21

71

21

69

73

21

70

68

74

69

21

68

69

68

72

71

70

5

72

71

5

74

69

68

3

68 69

68 68

73

3

21

68

www.Vinaﬁx.vn

Preliminary

V-

V+

V-

V+

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

AV= 0.59

LINE IN PSEUDO-DIFFERENTIAL AMP

APPLE P/N 353S1494

402

X5R

1UF

10% 10V

C6902

1

2

UMAX

CRITICAL

MAX4477AUA+

U6900

3

2

1

4

8

MAX4477AUA+

CRITICAL

UMAX

U6900

5

6

7

4

8

805-1

CRITICAL

3.3UF

CERM-X5R

10V

10%

C6905

12

805-1

CRITICAL

10% 10V

CERM-X5R

3.3UF

C6904

12

805-1

CRITICAL

3.3UF

CERM-X5R

10V

10%

C6901

12

805-1

CRITICAL

10% 10V

CERM-X5R

3.3UF

C6900

12

100K

1/16W

1%

402

MF-LF

R6903

1

2

23.7K

402

1/16W

1%

MF-LF

R6904

12

402

1%

14.0K

1/16W MF-LF

R6907

12

165

1%

402

1/16W MF-LF

R6900

1

2

1/16W

100K

402

1% MF-LF

R6908

1

2

23.7K

MF-LF

402

1%

1/16W

R6905

12

23.7K

402

1% 1/16W MF-LF

R6910

12

23.7K

1/16W

1%

MF-LF

402

R6909

12

23.7K

402

MF-LF

1/16W

1%

NO STUFF

R6913

12

23.7K

1%

NO STUFF

1/16W MF-LF

402

R6914

12

23.7K

402

1%

NO STUFF

MF-LF

1/16W

R6915

12

402

MF-LF

14.0K

1%

1/16W

R6906

12

1/16W MF-LF

1%

14.0K

402

R6912

12

1%

14.0K

1/16W

402

MF-LF

R6911

12

10% 10V

CERM-X5R

805-1

3.3UF

CRITICAL

C6906

12

10% 10V

CERM-X5R

805-1

3.3UF

CRITICAL

C6907

12

AUDIO: LINE INPUT AMP

97

21

69

051-7039

AUD_LI_GND

AUD_LI_GNDR1

AUD_LI_R

AUD_LI_GND

AUD_LI_GNDL1

AUD_LI_L

AUD_LI_L1

GND_AUDIO_CODEC

AUD_LI_VREFR

PP4V5_AUDIO_ANALOG

AUD_BI_PORTA_L

BAL_IN_R

AUD_PSEUDO_VREF_F

BAL_IN_COM

AUD_BI_PORT_A_R

AUD_BI_PORT_A_L

AUD_PSEUDO_VREF_F

BAL_IN_L

AUD_LI_VREFL

PP4V5_AUDIO_ANALOG

AUD_BI_PORTA_R

AUD_LI_R1 AUD_LI_R2

AUD_LI_L2

74

72

71

70

73

69

73

69

73

68

www.Vinaﬁx.vn

Preliminary

RIN+

SHDN*

VDDR

PVDD

VDDL

C1P

ROUT

PGND

SGND

PVSS

VSS

RIN-

LOUTLIN-

LIN+

C1N

NC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

APPLE P/N 353S0687

LINE OUT AMP

V

= 37 KHZ, A

C

F

LINE OUT LOW-PASS FILTER

= -1.18

10V

1UF

CERM 805

10%

C7008

1

2

10V

1UF

CERM

10%

805

C7010

1

2

CRITICAL

QFN

MAX9722AETE

U7000

4

2

15

14

12

17

315

7

8 10

6

16

13

9

11

20%

16V

ELEC

4X5.5-SM

10UF

C7000

12

CRITICAL

25V

CERM 0603

5%

1.5NF

C7002

1

2

25V

CRITICAL

CERM 0603

5%

1.5NF

C7004

1

2

20%

16V

ELEC

4X5.5-SM

10UF

C7003

12

4.7K

MF-LF

402

5%

1/16W

R7015

1

2

4.7

5% 1/10W MF-LF

603

R7010

12

50V

100PF

CERM

402

5%

C7012

1

2

402

50V

100PF

CERM

5%

C7013

1

2

1/16W

5%

402

MF-LF

1K

R7016

12

1K

MF-LF 402

1% 1/16W

R7017

1

2

1% 1/16W

1K

MF-LF 402

R7018

1

2

20%

CERM

10UF

805-1

6.3V

C7007

1

2

805

MF-LF

1%

14

1/8W

R7011

12

14

MF-LF

805

1%

1/8W

R7012

12

11.8K

1%

402

MF-LF

1/16W

R7000

12

14.0K

MF-LF

1%

1/16W

402

R7001

12

2.37K

1/16W

1%

402

MF-LF

R7002

12

50V

CERM

402

180PF

5%

C7001

12

402

50V

180PF

CERM

5%

C7005

12

14.0K

1/16W

1%

402

MF-LF

R7003

12

14.0K

MF-LF

402

1%

1/16W

R7006

12

14.0K

1/16W

402

MF-LF

1%

R7009

12

11.8K

1/16W MF-LF

402

1%

R7007

12

11.8K

1% 1/16W MF-LF 402

R7004

1

2

11.8K

1% 1/16W MF-LF 402

R7005

1

2

2.37K

MF-LF

402

1%

1/16W

R7008

12

20%

100UF

16V

ELEC

6.3X5.5-SM

C7006

1

2

6.3X5.5-SM

ELEC

16V

20%

100UF

C7011

1

2

0402

FERR-120-OHM-1.5A

L7000

12

1/8W

14

MF-LF

805

1%

R7019

12

1/8W

14

MF-LF

805

1%

R7020

12

10V

1UF

CERM 805

10%

C7009

1

2

AUDIO: COMBO OUT AMP

70 97

21

051-7039

AUD_LO_GND

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_GND

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.30MM

AUD_LOAMP_OUT_L

AUD_LO_GND_PRB_IN

AUD_LOAMP_OUT_R

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUDCODECOUTL1

AUD_LOAMP_OUT_L

GND_AUDIO_CODEC

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.50mm

VOLTAGE=5V

PP5V_AUDIO_LOAMP

VOLTAGE=5V

PP5V_AUDIO_FILT

MIN_LINE_WIDTH=0.50mm MIN_NECK_WIDTH=0.20MM

AUD_BI_PORT_D_R

AUD_LOAMP_IN_R_M

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_R

AUD_GPIO_1

AUDCODECOUTR1

AUD_LOAMP_IN_R_M

AUD_LOAMP_IN_R_P

AUD_LOAMP_IN_L_P

AUDCODECOUTR

AUD_LOAMP_OUT_R

AUDCODECOUTL

AUD_LOAMP_IN_L_P

AUD_LOAMP_IN_L_M

AUDIO_LO_MUTE_L_F

AUD_BI_PORT_D_L

AUD_LO_L MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_MAX9722_C1P

MIN_LINE_WIDTH=0.30mm MIN_NECK_WIDTH=0.20mm

AUD_MAX9722_PVSS

GND_AUD_LOAMP_CHGPMP

GND_AUDIO_CODEC

=PP5V_S0_AUDIO

GND_AUD_LOAMP_CHGPMP

AUD_LOAMP_IN_R_P

GND_AUD_LOAMP_CHGPMP

AUD_LOAMP_IN_L_M

AUD_MAX9722_C1N

AUD_LO_GND_PRB

74

72

71

74

70

73

69

74

69

74

70

68

70 73

68

70

68

73

70

68

3

70

73

www.Vinaﬁx.vn

Preliminary

PGND

VDD

G1

G2

CHOLD

AGND

PAD

THM

NC

SHDN*

FS2

FS1

INL-

INL+

INR-

REG

INR+

OUTL+

OUTL-

C1+

C1-

OUTR+

OUTR-

SS

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

GAIN SETTINGS: +16DB

APPLE P/N 353S1156

SPEAKER AMP

MODULATION SETTING: LOW EMI

GAIN AND SWITCHING FREQUENCY STUFF OPTIONS

NC

DRAWS NO POWER DURING S5 ONLY ON S5 RAIL TO AID ROUTING

SM

OMIT

XW7101

12

402

5%

CERM

50V

100PF

C7120

1

2

100PF

CERM

5%

402

50V

C7121

1

2

47K

1/16W MF-LF

402

5%

R7113

12

402

MF-LF

1/16W

5%

0

NOSTUFF

R7118

1

2

0

5%

402

MF-LF

1/16W

NOSTUFF

R7119

12

FERR-250-OHM

SM-1

L7122

12

SM

OMIT

XW7102

12

1206

MF-LF

1/4W

0.005

1%

R7170

12

MAX9714

QFN-LF

CRITICAL

U7100

13

6

5

7

19

20

17

18

10

9

16

15

8

31

29

32

30

27

25

28

26

1

2

23

24

14

11

12

33

3

4

21

22

SOT-363

2N7002DW-X-F

Q7100

6

2

1

2N7002DW-X-F

SOT-363

Q7100

3

5

4

5%

402

MF-LF

1/16W

47K

R7115

12

47K

1/16W MF-LF

402

5%

R7114

12

100PF

CERM

5%

402

50V

C7190

1

2

0603-LF

180-OHM-1.5A

L7103

12

603-1

X7R

10% 50V

0.1UF

C7108

1

2

0603-LF

180-OHM-1.5A

L7104

12

0.47UF

X7R 805

16V

10%

C7109

1

2

SM-1

FERR-250-OHM

L7100

12

10%

0.47UF

805

16V X7R

C7104

12

16V

0.47UF

10%

X7R 805

C7105

12

180-OHM-1.5A

0603-LF

L7102

12

1UF

X5R 603

25V

10%

C7114

1

2

16V

805

0.47UF

10%

X7R

C7107

12

10%

0.47UF

805

X7R

16V

C7106

12

470UF

ELEC

20% 25V

10X10-SM

C7100

1

2

0603-LF

180-OHM-1.5A

L7101

12

402

MF-LF

1/16W

5%

0

NOSTUFF

R7108

1

2

ELEC

25V

20%

470UF

10X10-SM

C7117

1

2

1UF

X7R

10%

805

35V

C7102

1

2

5%

47K

1/16W SM-LF

RP7100

1234

8765

402

4.7K

MF-LF

5%

1/16W

R7112

1

2

1000-OHM-200MA

0603

L7105

12

100PF

50V

402

5%

CERM

C7115

1

2

50V

5%

100PF

CERM 402

C7116

1

2

1000-OHM-200MA

0603

L7106

12

0603

1000-OHM-200MA

L7107

12

1000-OHM-200MA

0603

L7108

12

16V

20%

0.1UF

CERM 603

C7119

1

2

0.1UF

16V

CERM

20%

603

C7118

1

2

1210

CERM

16V

10%

10UF

C7103

1

2

1210

10UF

16V

CERM

10%

C7101

1

2

25V

1000PF

10%

X7R 402

C7110

1

2

25V

1000PF

10%

X7R 402

C7111

1

2

1000PF

25V

10%

X7R 402

C7112

1

2

1000PF

25V

10%

X7R 402

C7113

1

2

SYNC_MASTER=AUDIO

SYNC_DATE=06/29/2006

97

21

71

051-7039

AUDIO: SPEAKER AMP_1

AUD_SAMP_INR_N

AUD_SAMP_INR_P

AUD_SAMP_INL_P

AUD_SAMP_INL_N

AUDSAMPINRP

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

AUDSAMPOUTLN

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

AUDSAMPOURTP

MIN_LINE_WIDTH=0.5MM

AUD_SAMP_FS2

AUDSAMPCPN

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUDSAMPINLN

GND_AUDIO_CODEC

GND_AUDIO_SPKRAMP_PLANE

GND_AUDIO_CODEC

AUD_SPKRAMP_MUTE_L

AUD_SPKRAMP_MUTE

AUD_SAMP_SHDN_L

AUD_GPIO_0

AUD_MAX9714_VREG

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

GND_AUDIO_SPKRAMP_PLANE

MIN_LINE_WIDTH=0.6MM

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

SPKRAMP_SS

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUDSAMPOUTLP

MIN_LINE_WIDTH=0.5MM

AUDSAMPOUTRN

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.2MM

AUDSAMPCPP

MIN_NECK_WIDTH=0.15MM

AUD_MAX9714_CHOLD

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_SAMP_G2

AUD_SAMP_G1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=3.0MM

GND_AUDIO_SPKRAMP

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBR_P

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBR_N

=PP3V3_S0_AUDIO

AUD_SAMP_G2

GND_AUDIO_SPKRAMP_PLANE

AUD_SAMP_FS1

AUD_SAMP_FS2

GND_AUDIO_SPKRAMP_PLANE

AUD_SAMP_G1

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTCR_N

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTCR_P

AUD_SAMP_FS1

NET_SPACING_TYPE=AUDIO

=PP12V_S5_AUDIO_SPKRAMP

VOLTAGE=12V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=3.0MM

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=3.0MM

12V_S5_SPKRAMP

VOLTAGE=12V

MIN_LINE_WIDTH=0.6MM

VOLTAGE=12V

PP12V_AUD_SPKRAMP_PLANE

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

AUD_BI_PORT_C_R

AUDSAMPINLP

GND_AUDIO_CODEC

AUDSAMPINRN

AUD_BI_PORT_B_R

=PP3V3_S0_AUDIO

GND_AUDIO_SPKRAMP_PLANE

74

72

73

72

73

71

72

71

72

70

71

70

71

69

72

68

72

69

68

71

68

71

68

72

68

71

6

73

3

71

73

71

3

68

3

71

www.Vinaﬁx.vn

Preliminary

PGND

VDD

G1

G2

CHOLD

AGND

PAD

THM

NC

SHDN*

FS2

FS1

INL-

INL+

INR-

REG

INR+

OUTL+

OUTL-

C1+

C1-

OUTR+

OUTR-

SS

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

APPLE P/N 353S1156

SPEAKER AMP

NC

GAIN AND SWITCHING FREQUENCY STUFF OPTIONS

MODULATION SETTING: LOW EMI

GAIN SETTINGS: +16DB

ONLY ON S5 RAIL TO AID ROUTING

DRAWS NO POWER DURING S5

OMIT

SM

XW7201

12

402

MF-LF

1/16W

5%

0

NOSTUFF

R7218

1

2

NOSTUFF

5%

402

MF-LF

1/16W

0

R7219

12

SM-1

FERR-250-OHM

L7222

12

OMIT

SM

XW7202

12

1%

MF-LF

1/4W

1206

0.005

R7270

12

QFN-LF

MAX9714

CRITICAL

U7200

13

6

5

7

19

20

17

18

10

9

16

15

8

31

29

32

30

27

25

28

26

1

2

23

24

14

11

12

33

3

4

21

22

2N7002

SOT23-LF

Q7200

3

1

2

1/16W MF-LF

5%

402

47K

R7214

12

50V

5%

402

100PF

CERM

C7290

1

2

180-OHM-1.5A

0603-LF

L7203

12

X7R

10% 50V

0.1UF

603-1

C7208

1

2

180-OHM-1.5A

0603-LF

L7204

12

10%

805

X7R

0.47UF

16V

C7209

1

2

SM-1

FERR-250-OHM

L7200

12

10% 16V

0.47UF

805

X7R

C7204

12

805

X7R

16V

10%

0.47UF

C7205

12

180-OHM-1.5A

0603-LF

L7202

12

10%

603

25V X5R

1UF

C7214

1

2

0.47UF

16V

10%

805

X7R

C7207

12

10%

0.47UF

16V X7R 805

C7206

12

20%

ELEC

470UF

25V

10X10-SM

C7200

1

2

180-OHM-1.5A

0603-LF

L7201

12

402

MF-LF

1/16W

5%

0

NOSTUFF

R7208

1

2

ELEC

20%

470UF

25V

10X10-SM

C7217

1

2

X7R

10%

805

35V

1UF

C7202

1

2

5%

47K

1/16W SM-LF

RP7200

1234

8765

1000-OHM-200MA

0603

L7205

12

100PF

CERM

50V

402

5%

C7215

1

2

50V

5%

402

100PF

CERM

C7216

1

2

0603

1000-OHM-200MA

L7206

12

1000-OHM-200MA

0603

L7207

12

1000-OHM-200MA

0603

L7208

12

16V

20%

603

CERM

0.1UF

C7219

1

2

20%

CERM

16V

603

0.1UF

C7218

1

2

1210

CERM

16V

10%

10UF

C7203

1

2

10% 16V

1210

CERM

10UF

C7201

1

2

25V

1000PF

10%

X7R 402

C7210

1

2

25V

10%

X7R 402

1000PF

C7211

1

2

1000PF

25V

10%

X7R 402

C7212

1

2

1000PF

25V

10%

X7R 402

C7213

1

2

SYNC_DATE=06/29/2006

AUDIO: SPEAKER AMP

051-7039

97

21

SYNC_MASTER=AUDIO

72

NET_SPACING_TYPE=AUDIO

VOLTAGE=12V

12V_S5_SPKRAMP1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=3.0MM

NET_SPACING_TYPE=AUDIO

=PP12V_S5_AUDIO_SPKRAMP

MIN_NECK_WIDTH=0.2MM VOLTAGE=12V

GND_AUDIO_CODEC

AUD_BI_PORT_C_L

GND_AUDIO_SPKRAMP1_PLANE

AUD_SAMP1_INL_P

VOLTAGE=12V

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP12V_AUD_SPKRAMP1_PLANE

NET_SPACING_TYPE=AUDIO

=PP3V3_S0_AUDIO

AUDSAMPINLN1

AUD_SAMP1_G1

AUD_SAMP1_FS1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_MAX9714_CHOLD1

AUD_BI_PORT_B_L

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUDSAMPCPP1

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

AUDSAMPOUTLN1

NET_SPACING_TYPE=AUDIO

AUD_SAMP1_FS1 AUD_SAMP1_G2 AUD_SAMP1_G1

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

AUD_SPKR_OUTCL_P

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBL_P

NET_SPACING_TYPE=AUDIO

AUDSAMPINRN1

AUD_SAMP1_FS2

GND_AUDIO_CODEC

GND_AUDIO_SPKRAMP1_PLANE

NET_SPACING_TYPE=AUDIO

GND_AUDIO_SPKRAMP

MIN_LINE_WIDTH=3.0MM MIN_NECK_WIDTH=0.2MM

AUDSAMPINRP1

AUDSAMPINLP1

AUD_SAMP1_G2

AUDSAMPOUTLP1

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.2MM

AUDSAMPCPN1

MIN_NECK_WIDTH=0.2MM

AUDSAMPOURTP1

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUDSAMPOUTRN1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTCL_N

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBL_N

AUD_SPKRAMP_MUTE

AUD_SAMP1_FS2

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_MAX9714_VREG1

AUD_SAMP1_INR_N

AUD_SAMP1_INR_P

AUD_SAMP1_INL_N

=PP3V3_S0_AUDIO

GND_AUDIO_SPKRAMP1_PLANE

AUD_SAMP1_SHDN_L

GND_AUDIO_SPKRAMP1_PLANE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

NET_SPACING_TYPE=AUDIO

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

SPKRAMP1_SS

74

72

73

72

73

71

72

71

72

70

71

70

71

69

68

69

71

68

3

68

72

3

72

68

72

73

72

68

72

6

72

73

71

72

3

72

www.Vinaﬁx.vn

Preliminary

IN

TIP_DET

RING

GND_1

GND_2

LED

VCC

VIN

GND

TIP

TYPE_DET

OPTICAL

RECEIVER

VOUT

GND

VCC

GND_2

TIP_DET

RING

GND_1

TIP

TYPE_DET

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

APPLE P/N 514-0373

LINE OUT JACK

APPLE P/N 514-0329

NC

APPLE P/N 518-0255

TO POWER SUPPLY PAGE 6

PROPERTIES FOR ALL SPKR NETS

APPLE P/N 518-0193

NC

PROPERTIES FOR ALL SPKR NETS

SPEAKER CABLE CONNECTORS

TO FHB CONNECTOR PAGE 47

COMBO IN JACK

100PF

5% 50V

402

CERM

C7303

1

2

CERM

402

50V

5%

100PF

C7302

1

2

1/16W

5%

MF-LF

402

0

R7302

1

2

100PF

5% 50V CERM 402

C7301

1

2

50V

CERM

5%

402

100PF

C7300

1

2

5% 50V CERM

100PF

402

C7323

1

2

180-OHM-1.5A

0603-LF

L7300

12

180-OHM-1.5A

0603-LF

L7301

12

180-OHM-1.5A

0603-LF

L7302

12

180-OHM-1.5A

0603-LF

L7303

12

180-OHM-1.5A

0603-LF

L7304

12

180-OHM-1.5A

0603-LF

L7305

12

180-OHM-1.5A

0603-LF

L7306

12

180-OHM-1.5A

0603-LF

L7307

12

180-OHM-1.5A

0603-LF

L7309

12

180-OHM-1.5A

0603-LF

L7310

12

180-OHM-1.5A

0603-LF

L7312

12

180-OHM-1.5A

0603-LF

L7313

12

180-OHM-1.5A

0603-LF

L7314

12

180-OHM-1.5A

0603-LF

L7315

12

180-OHM-1.5A

0603

L7316

12

180-OHM-1.5A

0603-LF

L7320

12

180-OHM-1.5A

0603-LF

L7323

12

0603-LF

180-OHM-1.5A

L7324

12

180-OHM-1.5A

0603-LF

L7328

12

180-OHM-1.5A

0603-LF

L7325

12

100PF

50V

402

CERM

5%

C7314

1

2

180-OHM-1.5A

0603-LF

L7317

12

100PF

402

CERM

50V

5%

C7312

1

2

180-OHM-1.5A

0603-LF

L7327

12

180-OHM-1.5A

0603-LF

L7319

12

180-OHM-1.5A

0603-LF

L7318

12

100PF

5% 50V CERM 402

C7313

1

2

180-OHM-1.5A

0603-LF

L7326

12

SM

XW7300

12

14V-15A

0405

DZ7301

13

24

0405

14V-15A

DZ7302

13

24

NOSTUFF

0405

14V-15A

DZ7304

13

24

14V-15A

0405

DZ7300

13

24

14V-15A

0405

DZ7303

13

24

402

CERM

50V

5%

100PF

C7321

1

2

5%

CERM 402

50V

100PF

C7322

1

2

805

10V CERM

10%

1UF

C7318

1

2

CERM

402

0.1UF

20% 10V

C7326

12

402

39

5%

MF-LF

1/16W

R7306

12

0603-LF

180-OHM-1.5A

L7381

12

CERM

0.1UF

10V

402

20%

C7317

1

2

180-OHM-1.5A

0603-LF

L7380

12

100PF

5% 50V CERM 402

C7380

1

2

402

5%

MF-LF

1/16W

0

R7305

12

CRITICAL

F-ANG-TH

OPTI-AUD-OUT-JCK-M51

J7303

9

1

10

11

12

13

2

3

4

5

6

8

7

F-ANG-TH1

OPTI-AUD-IN-JCK-M51

CRITICAL

J7300

8

1

10

11

12

13

2

3

4

5

6

7

9

CRITICAL

87833-0431

M-RT-TH

J7301

12

34

M-RT-TH

CRITICAL

87833-0631

J7302

12

34

56

100PF

402

50V CERM

5%

C7315

1

2

5% 50V CERM

100PF

402

C7311

1

2

AUDIO: CONNECTORS

SYNC_DATE=06/29/2006

SYNC_MASTER=AUDIO

21

97

051-7039

73

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LI_L_JACK

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LI_R_JACK

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.3MM

AUD_LI_GND_JACK

AUD_SPDIFIN_JACK

AUD_SPKR_OUTCR_P

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

NC_J7302_6

AUD_SPKR_OUTBR_N

NC_J7302_3

AUD_SPKR_OUTBR_P

AUD_SPDIF_IN

MIN_LINE_WIDTH=0.3MM

AUD_LO_L_EMI

MIN_NECK_WIDTH=0.2MM

NC_AUD_LI_TYPE_JACK

PP3V3_AUDIO_SPDIF_JACK

AUD_SPDIF_GND

AUD_MIC_IN_N_CONN

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_P

AUD_MIC_IN_N

NET_SPACING_TYPE=AUDIO

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LI_DET_H

MIN_NECK_WIDTH=0.3MM

AUD_LI_GND

MIN_LINE_WIDTH=0.5MM

AUD_LO_L

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_DET2

AUD_LO_GND_PRB

NET_SPACING_TYPE=AUDIO

GND_AUDIO_MIC_CONN

MIN_NECK_WIDTH=0.3MM

AUD_LO_GND_EMI

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.2MM

AUD_SPDIF_GND

MIN_LINE_WIDTH=0.25MM

AUD_LO_R_EMI

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_DET1_EMI

AUD_LI_R

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_DET1

AUD_SPKR_OUTCR_N

AUD_SPKR_OUTBL_N AUD_SPKR_OUTCL_P

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTBL_P

AUD_SPDIF_OUT

=PP3V3_S0_AUDIO

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_R

AUD_LI_DET_JACK

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LI_L_EMI

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LI_L

AUD_SPKR_OUTCL_N

AUD_MIC_IN_P_EMI

NET_SPACING_TYPE=AUDIO

AUD_LI_DET_EMI

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_P_CONN

MIN_LINE_WIDTH=0.3MM

AUD_LI_R_EMI

MIN_NECK_WIDTH=0.2MM

AUD_LI_GND_EMI

MIN_NECK_WIDTH=0.3MM

MIN_LINE_WIDTH=0.5MM

AUD_LO_DET1_JACK

MIN_NECK_WIDTH=0.3MM MIN_LINE_WIDTH=0.5MM

AUD_LO_DET2_JACK

AUD_MIC_IN_N_EMI

NET_SPACING_TYPE=AUDIO

AUD_SPDIF_OUT_JACK

GND_CHASSIS_AUDIO_INTERNAL

AUD_LO_GND_JACK

AUD_LO_R_JACK

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.2MM

PP3V3_AUDIO_SPDIF_EMI

MIN_LINE_WIDTH=0.3MM

AUD_LO_DET2_EMI

GND_AUDIO_CODEC_EMI1

GND_CHASSIS_AUDIO_EXTERNAL

AUD_LO_GND

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_L_JACK

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

PP3V3_AUDIO_SPDIF_JACK

GND_CHASSIS_AUDIO_EXTERNAL

74 72 71

74

68

73

74

73

71

5

71

5

71

68

73

47

74

69

70

74

70 73

69

74

71

72

68

3

70

69

72

47

6

70

73

6

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MICROPHONE IMPEDANCE MATCHING CIRCUIT

MIC INPUT

SPKR AMP1

CODEC OUTPUT SIGNAL PATHS

CODEC INPUT SIGNAL PATHS

PLACE NEXT TO L6800

CONVERTER=0X0A

0X02

SPKR AMP

0X18(B) 0X1A(C)

SPDIFIN

PIN=0X1F

0X15(A)

0X19(F)

LINE INPUT

MIXER

0X24 0X23

0X07 0X08

ADC

FUNCTION

SPDIFOUT

NCNC

NC

FUNCTION LINE OUT

0X03 0X05

DAC 0X0C 0X0D 0X0F

VOLUME

AUDIO GROUND RETURNS

PLACE AT J7303

PLACE ACROSS GROUND SPLIT

PIN COMPLEX

CONVERTER=0X06

PIN=0X1E

PORT

GPIO 0 GPIO 0

DETECT DELEGATE

PIN 0X16H

VREF

50%

80%

PORT D/G (LO/DIG_OUT) PLUG DETECT (G TELLS H TO COME ON)

PORT A (LI) PLUG DETECT

0X14(D)

GPIO 1

PLACE NEAR HEADPHONE PORT

MUTE CONTROL

NOSTUFF

5%

MF-LF

0

1/16W

402

R7412

12

1/16W

39.2K

402

1%

MF-LF

R7405

1

2

SOT23-LF

2N7002

Q7401

3

1

2

0.1UF

20%

CERM

10V

402

C7401

1

2

47K

1/16W MF-LF

5%

402

R7404

12

1/16W

402

MF-LF

5%

270K

R7409

1

2

10V

20%

0.1UF

CERM 402

C7400

1

2

MF-LF

1/16W

5%

402

47K

R7400

12

402

10V

20%

CERM

0.1UF

C7402

1

2

47K

5%

MF-LF

402

1/16W

R7408

12

MF-LF

100K

5%

402

1/16W

R7420

1

2

470K

5%

MF-LF

1/16W

402

R7413

1

2

0.1UF

10% 16V X5R 402

C7419

12

SM

XW6800

12

5%

402

2.2K

MF-LF

1/16W

R7427

1

2

5%

1/16W

402

100K

MF-LF

R7426

1

2

402

330

1/16W MF-LF

5%

R7425

12

10% 25V X7R 402

1000PF

C7418

1

2

SOT-363

2N7002DW-X-F

Q7400

6

2

1

2N7002DW-X-F

SOT-363

Q7400

3

5

4

5%

MF-LF

1/8W

805

0

NOSTUFF

R7429

12

402

5%

MF-LF

1/16W

100K

R7407

12

2N7002DW-X-F

SOT-363

Q7402

3

5

4

2N7002DW-X-F

SOT-363

Q7402

6

2

1

5.11K

402

1/16W

1%

MF-LF

R7431

1

2

10K

MF-LF

1/16W

402

1%

R7430

1

2

SM-CASE-C1

ELEC

20%

220UF

16V

C7435

1

2

SM

OMIT

XW7400

12

SM

OMIT

XW7401

12

OMIT

SM

XW7402

12

402

5%

MF-LF

1/16W

2.2K

R7435

12

AUDIO: POWER SUPPLIES

74

21

97

051-7039

SYNC_MASTER=AUDIO

SYNC_DATE=06/29/2006

GND_CHASSIS_AUDIO_EXTERNAL

GND_AUD_LOAMP_CHGPMP

GND_AUDIO_CODEC

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.25MM VOLTAGE=0V

MIN_LINE_WIDTH=0.6MM

GND_AUDIO

AUD_SENSE_B

AUD_LO_DET1_INV

AUD_SENSE_A

AUD_PORT_A_DET_L

AUD_MIC_IN_P

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N

NET_SPACING_TYPE=AUDIO

GND_AUDIO_CODEC

GND_CHASSIS_AUDIO_EXTERNAL

AUD_TYPE_DET_EN

AUD_LO_DET1_1

AUD_PORT_D_DET_L AUD_PORT_G_DET_L

AUD_LO_DET2

=PP3V3_S0_AUDIO

AUD_LO_DET1

AUD_LO_DET2_1

AUD_LO_DET1_1

GND_AUDIO_CODEC

AUD_SENSE_A

AUD_MIC_P1

AUD_BI_PORT_F_L

=PP3V3_S0_AUDIO

AUDLINDETH

AUD_LI_DET_H

GND_AUDIO_CODEC

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_LO_GND

AUD_VREF_PORT_F

AUD_VREF_PORT_F_RC

GND_AUDIO_CODEC

74

72

73

72

73

72

73

72

71

72

71

72

71

72

71

74

70

74

71

70

71

70

71

70

73

69

74

69

73

68

69

74

68

69

68

69

73

69

6

70

68

6

68

73

68

6

74

73

3

73

74

68

3

73

68

3

68

70

68

www.Vinaﬁx.vn

Preliminary

TPAD

VSS

BOOT2

BOOT1

PHASE1

UGATE1

LGATE1

PGND1

ISEN1

UGATE2

PHASE2

LGATE2

PVCC

VDDVIN

PGND2

VID6

VID5

VID4

VID2

VID3

VID1

VID0

ISEN2

VSUM

OCSET

VO

DROOP

DFB

VSEN

RTN

DPRSTP*

DPRSLPVR

PSI*

PGD_IN

3V3

CLK_EN*

PGOOD

VR_ON

NTC

VR_TT*

SOFT

RBIAS

VDIFF

FB2

FB

COMP

VW

NC

IN

OUT

IN

OUT

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

44A MAX CURRENT

YONAH

CAP IF USING

NO STUFF THIS

1-Phase CCM

11

(IMVP6_PHASE1)

2-Phase CCM

FROM SMC

1

DPRSTP*

PSI*

MIN_NECK_WIDTH

MIN_LINE_WIDTH

(IMVP6_VO)

(IMVP6_VSUM)

(IMVP6_ISEN2)

MIN_LINE_WIDTH MIN_NECK_WIDTH MIN_LINE_WIDTH MIN_NECK_WIDTH

(IMVP6_COMP)

(IMVP6_FB)

(IMVP6_VW)

(GND)

FROM 1.5V AND 1.05V VREGS

ERT-J1VR103J

*NEED TO CHANGE R7531 TO NTC ERT-J1VR103J PANASONIC

NTC

DPRSLPVR

(IMVP6_VO)

Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only.

1

Operation Mode

1

LAYOUT NOTE:

PLACE R7526 CLOSE TO CPU

(GND)

(IMVP6_ISEN1)

IMVP6 CPU VCORE REGULATOR

(IMVP6_PHASE2)

1-Phase DCM

CPU_VCCSENSE_P & N ARE DIFF PAIRS ROUTE AS 18MIL WIDE, 7MIL SPACE

0

50V

10%

CERM

0.0022UF

NO STUFF

402

C7500

1

2

1206

1.0

5% 1/4W MF-LF

R7503

1

2

10%

603

4700PF

50V CERM

C7512

1

2

402

10%

CERM

50V

0.0022UF

NO STUFF

C7590

1

2

MF-LF 402

10K

1% 1/16W

R7500

12

6.3V

402

CERM-X5R

10%

0.22uF

C7503

12

SM

XW7503

1

2

SM

XW7504

1

2

ISL6262

QFN

OMIT

U7500

48

36 26

47

10

17

45

46

16

11

12

24

23

32

30

25

6

8

3

33

29

1

34

28

2

31

4

15

7

49

35

27

22

13

37

38

39

40

41

42

43

20

18

44

5

14

21

19

9

20%

0.22UF

25V X5R

603

C7515

1

2

SM

XW7501

1

2

SM

XW7502

1

2

MF-LF

1%

402

10K

1/16W

R7505

12

0.22uF

40210%

6.3V

CERM-X5R

C7504

12

CERM

10% 50V

4700PF

603

C7511

1

2

1/4W MF-LF 1206

1.0

5%

R7502

1

2

NO STUFF

10%

402

CERM

0.0022UF

50V

C7502

1

2

50V

NO STUFF

0.0022UF

CERM 402

10%

C7592

1

2

603

X5R

25V

20%

0.22UF

C7527

1

2

10

1% 1/16W

402

MF-LF

R7520

12

10

1% 1/16W

402

MF-LF

R7512

12

1uF

25V

10%

603

X5R

C7526

1

2

402

0.1uF

X5R

10% 16V

C7596

1

2

402

1/16W MF-LF

1%

10

R7521

12

402

X5R

16V

10%

0.1uF

C7530

1

2

499

402

MF-LF

1/16W

1%

R7519

12

402

CERM

47PF

5% 50V

C7507

1

2

1/16W

1%

402

MF-LF

4.42K

R7510

1

2

4.7uF

6.3V

20% CERM

603

C7535

1

2

B340LBXF

SMB

D7500

1

2

B340LBXF

SMB

D7501

1

2

0

R7595

12

0

R7593

12

0

R7591

12

0

R7596

12

0

R7594

12

0

R7592

12

0

R7590

12

16V

1210

X7R

20%

22UF

C7508

1

2

499

402

1%

1/16W MF-LF

R75A0

12

4.02K

1%

1/16W

MF-LF

402

R7527

12

CERM

0.01uF

10%16V

402

C7510

12

147K

402 1%

MF-LF 1/16W

R7508

12

402

1%

NO STUFF

2.0K

1/16W MF-LF

R7513

12

CERM

470pF

50V

10%

402

C7506

1

2

1/16W

1%

402

MF-LF

1.40K

R7511

1

2

1.82K

MF-LF 402

1% 1/16W

R7509

1

2

50V

10%

402

CERM

390pF

C7513

1

2

CERM

50V

470PF

10%

402

C7514

1

2

5%

180K

MF-LF

1/16W 402

R7514

1

2

1

402

5% MF-LF

1/16W

R7504

1

2

1

402

5%

1/16W

MF-LF

R7507

1

2

402

CERM

50V

10%

NO STUFF

0.001uF

C7516

1

2

402

1% 1/16W MF-LF

11.5K

R7516

1

2

5.76K

1/16W

1% MF-LF

402

R7517

12

402

180pF

5% 50V CERM

C7529

1

2

402

1%

1K

MF-LF

1/16W

R7518

1

2

2.61K

1% 1/16W

402

MF-LF

R7530

1

2

MF-LF

1/16W

1%

402

11K

R7515

1

2

CERM-X5R

6.3V

402

10%

0.33uF

C7528

1

2

X5R

16V

10%

402

0.033UF

C7534

1

2

5% 1/16W MF-LF 402

0

R7522

1

2

402

CERM

16V

10%

0.01uF

C7531

12

0.01uF

NO STUFF

16V

402

CERM

10%

C7532

12

402

5% MF-LF

1/16W

0

R7523

1

2

0.01uF

CERM

10%

402

16V

C7533

12

0.22UF

X5R

20%

6.3V

402

C7521

12

SM

XW7500

1

2

3.65K

603

1/10W

1%

MF-LF

R7501

1

2

MF-LF

3.65K

1% 1/10W

603

R7506

1

2

402

CERM

16V 10%

0.01uF

C7505

12

10KOHM-5%

0603-LF

CRITICAL

R7531

12

0.36UH-30A-0.80MOHM

SM

CRITICAL

L7500

12

0.36UH-30A-0.80MOHM

SM

CRITICAL

L7501

12

22UF

20%

X7R 1210

16V

C7501

1

2

TH-KZJ-LF

16V ELEC

1000UF

20%

CRITICAL

C7517

1

2

20%

TH-KZJ-LF

16V ELEC

1000UF

CRITICAL

C7509

1

2

ELEC

16V

20%

TH-KZJ-LF

CRITICAL

1000UF

C7550

1

2

22UF

X7R

20% 16V

1210

C7551

1

2

CRITICAL

680UF

2.5V POLY

20%

TH

C7579

1

2

20%

680UF

2.5V POLY TH

CRITICAL

C7578

1

2

20%

2.5V POLY

680UF

CRITICAL

TH

C7577

1

2

IRLR7821PBF

TO-252AA

CRITICAL

Q7500

4

1

3

IRLR7843PBF

CRITICAL

TO-252AA

Q7501

4

1

3

IRLR7843PBF

TO-252AA

CRITICAL

Q7504

4

1

3

CRITICAL

IRLR7821PBF

TO-252AA

Q7502

4

1

3

IRLR7843PBF

TO-252AA

CRITICAL

Q7503

4

1

3

IRLR7843PBF

TO-252AA

CRITICAL

Q7505

4

1

3

22UF

16V

20%

X7R 1210

C7552

1

2

22UF

16V

20%

X7R 1210

C7554

1

2

22UF

1210

X7R

20% 16V

C7553

1

2

10K

1% 1/10W MF-LF

603

R7540

12

10K

1% 1/10W MF-LF 603

R7541

1

2

MEROM

CRITICAL

TH

20%

POLY

2.5V

680UF

C7580

1

2

402

MF-LF

1/16W

1%

470K

R7526

12

MF-LF

1/16W

402

0

5%

R7534

12

0

5%

402

1/16W MF-LF

R7535

12

MF-LF

1/16W

402

5%

0

R7532

12

NOSTUFF

0

5%

402

1/16W MF-LF

R7533

12

SYNC_DATE=06/29/2006SYNC_MASTER=M51_PAUL

IMVP6 CPU VCore Regulator

9775

21

051-7039

VOLTAGE=5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.25 MM

PP5V_S0_IMVP6_PVCC

PP5V_S5

PP5V_S0

PP12V_S5_CPU_REG

IMVP6_BOOT1_R

IMVP6_BOOT1

IMVP6_BOOT2_R

IMVP6_BOOT2

IMVP6_PHASE2

IMVP6_PHASE1

PPVIN_S5_IMVP6_VIN

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.25 MM

VOLTAGE=5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.25 MM

PP5V_S0_IMVP6_VDD

IMVP6_UGATE1

IMVP6_LGATE1

IMVP_VID<6>

IMVP6_VO

IMVP6_VSUM

IMVP6_ISEN2

IMVP6_VO_R

IMVP6_RTN

IMVP6_VSEN

CPU_VCCSENSE_P CPU_VCCSENSE_N

GND_IMVP6_SGND

IMVP6_VW

IMVP6_FB

IMVP6_ISEN1

PP12V_S5_CPU_REG

IMVP6_PHASE2

0.25 MM 0.25 MM

IMVP6_BOOT2

0.25 MM 0.25 MM

IMVP6_ISEN2

0.25 MM 0.25 MM

IMVP6_FET_RC2

0.25 MM 0.25 MM

IMVP6_VSUM_R2

0.60 MM 0.25 MM

R7507_1

0.25 MM 0.25 MM

=PP3V3_S0_IMVP

IMVP6_VDIFF

IMVP6_VDIFF_RC

IMVP6_VSUM_R2

GND_IMVP6_SGND

IMVP_VID<2>

IMVP6_LGATE2

0.25 MM 0.25 MM

IMVP6_FB2

IMVP_VID<5>

IMVP6_LGATE2

IMVP6_OCSET

IMVP6_UGATE2

GND_IMVP6_SGND

0.50 MM 0.20 MM

IMVP6_FB2

0.25 MM 0.20 MM

IMVP6_COMP

IMVP6_SOFT

IMVP_VID<4> IMVP_VID<3>

IMVP_VID<0>

IMVP6_DFB

0.25 MM 0.20 MM

GND_IMVP6_SGND

IMVP6_DROOP

IMVP_DPRSLPVR

IMVP6_FET_RC2

PM_DPRSLPVR

IMVP6_FB

0.25 MM 0.20 MM

IMVP6_COMP

0.25 MM 0.20 MM

IMVP6_VW

0.25 MM 0.25 MM

IMVP6_VSEN

0.25 MM 0.25 MM

CPU_DPRSTP_L

CPU_PSI_L IMVP_PGD_IN

VR_PWRGD_CK410_L IMVP_VR_ON

VR_PWRGOOD_DELAY

CPU_VID<6>

CPU_VID<4>

CPU_VID<2>

CPU_VID<0>

CPU_VID<5>

CPU_VID<3>

CPU_VID<1>

IMVP6_RBIAS

IMVP6_UGATE2

0.25 MM 0.25 MM

IMVP6_PHASE1

1.5 MM

0.25 MM

IMVP6_BOOT1

0.25 MM 0.25 MM

IMVP6_UGATE1

1.5 MM

0.25 MM

IMVP6_ISEN1

0.25 MM 0.25 MM

IMVP6_LGATE1

1.5 MM

0.25 MM

R7504_1

0.25 MM 0.25 MM

IMVP6_VSUM_R1

0.25 MM 0.25 MM

IMVP6_FET_RC1

0.25 MM 0.25 MM

IMVP6_DFB

IMVP6_OCSET

0.25 MM 0.20 MM

IMVP6_VSUM

0.25 MM 0.20 MM

IMVP6_VO

0.25 MM 0.20 MM

IMVP6_DROOP

0.25 MM 0.20 MM

IMVP6_SOFT

0.25 MM 0.20 MM

IMVP6_RBIAS

0.25 MM 0.20 MM

IMVP6_VDIFF

0.25 MM 0.20 MM

IMVP6_RTN

0.25 MM0.25 MM

IMVP_VID<1>

IMVP6_VR_TT

IMVP6_COMP_RC

IMVP6_FET_RC1

PP12V_S5_CPU_REG

MIN_NECK_WIDTH=0.2 MM

PP3V3_S0_IMVP6_3V3

MIN_LINE_WIDTH=0.25 MM

IMVP6_VSUM_R1

R7507_1

R7504_1

IMVP6_NTC_R

IMVP6_NTC

PPVCORE_CPU

83 82 80 79 78

97

77

83

59

23

21

26

76

5

75

76

75

76

14

7

14

8

76

75

5

3

75

75 75

8

75

3

75

3

75

5

75

5

7

77

26

58

5

75

3

75

3

www.Vinaﬁx.vn

Preliminary

G

D

S

D

G

S

VIN

IOUT

LOADNC

GND

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ADC IS 10BIT 0 TO 1023

.0129 V/COUNT

Switches in fixed load on power supplies to calibrate current sense circuits

PCB: PLACE R7655, C7651 WITHIN 1" OF SMC (U5800)

SCALE

4 V/V

WORKS WELL.

3.33333 A/V

COUNT

SCALE

TO SMC

PROCESSOR VCORE CURRENT SENSE

(MEASURING DC/DC INDUCTOR DCR TO DERIVE CPU CURRENT)

PCB: PLACE R7612, C7612 WITHIN 1" OF SMC (U5800)

0 TO 3.3V

SMC PWRGD PULLUP

SYSTEM CURRENT SENSE

SO SMC ADC SAMPLING

1 MS TIME CONSTANT

PROCESSOR VCORE SENSE

PCB:PLACE D7650,R7652,C7650 BY SMC

ADC IS 10BIT 0 TO 1023

PCB: PLACE R7602, C7602 WITHIN 1" OF SMC (U5800)

PCB:KEEP SHORTS NEXT TO U7602

CPU CURRENT SENSE CALIBRATION CIRCUIT

COUNT

0 TO 3.3V

PCB: PLACE D7599, C7599, R7597 WITHIN 1" OF SMC (U5800)

.010753 A/COUNT

(SCALING 12V INPUT VOLTAGE TO SMC)

SYSTEM VOLTAGE SENSE

5% 1/16W MF-LF

100K

402

CPU_PWR_SENSE

R7640

1

2

5%

402

MF-LF

1/16W

0

CPU_PWR_SENSE

R7607

12

5% 1/16W MF-LF

402

NOSTUFF

0

R7604

12

2N7002

SOT23-LF

CPU_PWR_SENSE

Q7639

3

1

2

NTR4101P

SOT-23

CPU_PWR_SENSE

Q7640

3

1

2

1/16W MF-LF 402

5%

10K

CPU_PWR_SENSE

R7639

1

2

5%

10K

CPU_PWR_SENSE

1/16W MF-LF 402

R7641

1

2

402

1/16W

5%

0

CPU_PWR_SENSE

MF-LF

R7659

12

402

1%

MF-LF

1/16W

40.2K

CPU_PWR_SENSE

R7605

12

402

1%

1/16W

40.2K

CPU_PWR_SENSE

MF-LF

R7606

12

LMV2011MF

SOT23-5

CPU_PWR_SENSE

CRITICAL

U7600

3

4

1

5

2

5%

0

1/16W MF-LF

402

CPU_PWR_SENSE

R7669

12

1%

4.53K

1/16W MF-LF

402

SYS_PWR_SENSE

R7652

12

SM

OMIT

XW7650

12

1W

1%

2010

CRITICAL

MF

0.005

SYS_PWR_SENSE

R7650

12

402

20%

X5R

6.3V

0.22UF

SYS_PWR_SENSE

C7650

1

2

402

1%

SYS_PWR_SENSE

5.90K

1/16W MF-LF

R7651

1

2

1/16W MF-LF

402

1%

SYS_PWR_SENSE

4.53K

R7655

12

0.22UF

20%

6.3V

402

SYS_PWR_SENSE

X5R

C7651

1

2

402

SYS_PWR_SENSE

1% 1/16W MF-LF

6.04K

R7653

1

2

SYS_PWR_SENSE

2.0K

1% 1/16W

402

MF-LF

R7654

1

2

402

MF-LF

1/16W

1M

1%

CPU_PWR_SENSE

R7600

12

CRITICAL

SOT23-5

ZXCT1010

SYS_PWR_SENSE

U7602

2

3

51

4

100

1%

1/16W

402

MF-LF

SYS_PWR_SENSE

R7656

12

NOSTUFF

SOT23-LF

BAS16-75V-0.25A

D7650

1

3

10%

470PF

402

CERM

50V

CPU_PWR_SENSE

C7600

12

10% 50V CERM 402

470PF

CPU_PWR_SENSE

C7603

1

2

1M

MF-LF

1/16W

402

1%

CPU_PWR_SENSE

R7603

1

2

402 10V

CERM

20%

CPU_PWR_SENSE

0.1UF

C7601

12

MF-LF

CPU_PWR_SENSE

1/16W

4.53K

402

1%

R7602

12

402

X5R

6.3V

20%

CPU_PWR_SENSE

0.22UF

C7602

1

2

402

1%

MF-LF

1/16W

4.53K

CPU_PWR_SENSE

R7612

12

6.3V

20%

0.22UF

CPU_PWR_SENSE

X5R 402

C7612

1

2

1/16W

10K

402

MF-LF

1%

R7623

1

2

402

MF-LF

5%

0

1/16W

NOSTUFF

R7620

12

1%

1206

MF-LF

1/4W

1.00

CPU_PWR_SENSE

R7643

1

2

CPU_PWR_SENSE

SUPERSOT-6

FDC796N

CRITICAL

Q7641

7

4

12356

CPU_PWR_SENSE

402

MF-LF

1/16W

5%

470K

R7642

1

2

CPU & SYSTEM SENSE

SYNC_MASTER=M51_DAVE

SYNC_DATE=(MASTER)

9776

21

051-7039

SYSTEM_DCIN_SENSE

PP12V_S5

SYSTEM_SENSE_I_R

MIN_NECK_WIDTH=0.25MM VOLTAGE=12V

PP12V_S5_AC_DC

MIN_LINE_WIDTH=0.60MM

GND_CPU_ISENSE_OPAMP

MIN_LINE_WIDTH=0.20 MM

CPU_ISENSE_R_POS

CPU_ISENSE_OUT_R

SMC_SYSTEM_VSENSE_R

GND_NEXT_TO_SMC

MIN_LINE_WIDTH=0.20 MM

ISENSE_CAL_EN_L

MIN_NECK_WIDTH=0.20 MM

SYSTEM_SENSE_SET

GND_SMC_AVSS

ISENSE_CAL_EN_L_R

IMVP6_DROOP_R

IMVP6_DROOP

SYS_POWERFAIL_L

PP3V3_S5

IMVP6_VO_R_OA

ISENSE_CAL_EN

PP3V3_S0

RSMRST_PWRGD

PPVCORE_CPU

SMC_CPU_VSENSE

SMC_CPU_ISENSE

IMVP6_VO

SMC_DCIN_ISENSE

SMC_PBUS_VSENSE

GND_SMC_AVSS

ISENSE_CAL_EN_LS12V

GND_SMC_AVSS

PP3V3_S0

CPU_ISENSE_R_NEG

=PPVCORE_S0_CPU

MIN_LINE_WIDTH=0.50 mm MIN_NECK_WIDTH=0.20 mm

CPUVCORE_ISENSE_CAL

PP12V_S5

PP12V_S0_B

83 80

84

79

83

78

76

83

82

77

41

82

80

66

27

80

79

65

26

79

78

84

26

10

84

10

78

77

76

82

6

75

76

6

9

77

76

59

78

5

58

5

59

5

8

76

83

3

6

59

58

58 75

6

3

5

3

58

3

58

75

58

3

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

two additional caps to increase ripple margin put here to stay in sync with M50 on page 82

SILKSCREEN:SYS_PWRGD

REGARDLESS OF INPUT POWER

ALL AND GATE INPUTS ARE 7V TOLERANT

SOT-363

2N7002DW-X-F

Q7703

6

2

1

402

MF-LF

1/16W

5%

10K

R7793

1

2

10K

402

MF-LF

1/16W

5%

NOSTUFF

R7794

1

2

SOT-363

2N7002DW-X-F

Q7703

3

5

4

10V

0.1UF

C7710

12

10V

0.1UF

C7711

12

10V

0.1UF

C7712

12

MC74VHC1G08

SOT23-5-LF

U7710

3

2

1

4

5

SOT23-5-LF

MC74VHC1G08

U7712

3

2

1

4

5

MC74VHC1G08

SOT23-5-LF

U7711

3

2

1

4

5

DEVELOPMENT

5% 1/10W MF-LF 603

330

R7700

1

2

DEVELOPMENT

SYS_PWRGD_LED_R

2.0X1.25MM-SM

GREEN-3.6MCD

LED7700

1

2

DEVELOPMENT

10K

402

MF-LF

1/16W

5%

R7701

1

2

DEVELOPMENT

SOT23-LF

2N7002

Q7700

3

1

2

5% 1/16W MF-LF 402

10K

R7795

1

2

0.1UF

10V

C7713

12

SOT23-5-LF

MC74VHC1G08

U7713

3

2

1

4

5

402

5%

MF-LF

1/16W

33

R7705

12

805-1

CERM

6.3V

20%

10uF

C7700

1

2

805-1

CERM

6.3V

20%

10uF

C7701

1

2

9777

051-7039

SYNC_DATE=06/29/2006SYNC_MASTER=M51_PAUL

21

PWR GOOD

PGOOD_PP1V8_S3

MOST_SYS_PWRGD

IMVP_PGD_IN

imvp_pgd_in_r

PP3V3_S5

PM_PWROK

PGOOD_PP1V5_S0

PGOOD_PP1V05_S0

PP3V3_S5

PGOOD_PP0V9_S0

PP3V3_S5

PM_SLP_S4_L

PP3V3_S5

PP12V_S5

PP3V3_S5

ALL_SYS_PWRGD

SYS_PWRGD_LED

PGOOD_PP2V5_S0

PM_SLP_S3_L

PP12V_S5

PP3V3_S5

ALL_SYS_PWRGD

MAKE_BASE=TRUE

SYS_PWRUP_L

pp5v_s5

PM_SLP_S4

83

80

79

78

83

77

83

77

83

77

82

76

82

76

82

76

80

66

80

66

80

66

79

65

79

65

84

80

79

65

84

78

26

78

26

77

79

78

26

77

75

6

58

6

77

6

58

77

6

58

59

5

23

5

76

5

26

23

76

5

26

5

83

79

75

3

80

3

79

3

5

3

5

78

5

3

5

83

3

79

www.Vinaﬁx.vn

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

GND

V+

LM339A

GND

V+

LM339A

D

G

S

D

G

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

3.3V AND 2.5V S5 REGULATOR

2.50V NOMINAL

3.35V NOMINAL

SB=0.500A

2.5V S5

VREF = 0.800V TYP

0.784V MIN

0.816V MAX

(R1)

(R2)

POWER BUDGET

MISC=1.500A

TOTAL=4.000A

3.3V S5

SPARE COMPARATOR

2.219V

TOTAL=0.426A

YUKON=0.426A

POWER BUDGET

VOUT=VREF*(1+R2/R1)

5% OK ON R7801?

PANEL=1.000A

AIRPORT=1.000A

3.0UH

CRITICAL

TH1

L7803

12

680UF

TH-MCZ

CRITICAL

16V

20%

ELEC

C7853

1

2

603

20% 25V

0.1UF

CERM

C7801

12

CERM

20%

6.3V

10UF

805-1

C7813

1

2

CERM

20%

6.3V

10UF

805-1

C7814

1

2

1800UF

20%

ELEC TH-KZJ-LF

CRITICAL

6.3V

C7815

1

2

22

MF-LF

5% 1/16W

402

R7899

1

2

0.01UF

16V CERM

10%

402

C7807

1

2

1.24K

402

1% 1/16W MF-LF

R7803

1

2

1%

MF-LF

1/16W

402

392

R7801

1

2

1206

MF-LF

1% 1/4W

5.11

R7802

1

2

1000PF

5% 50V

1206

CERM

C7809

1

2

1000PF

402

X7R

25V

10%

C7802

1

2

0.047UF

10%

402

16V

CERM

C7808

12

2.2

402

MF-LF

5%

1/16W

R7840

12

1UF

10% 25V X5R 603

C7892

12

6.3V

402

CERM

1UF

10%

C7800

1

2

1/16W

402

MF-LF

10

1%

R7805

1

2

25V X7R 402

1000PF

10%

C7823

1

2

805

22UF

20%

6.3V X5R

C7820

1

2

10% 50V

CERM

402

560PF

C7806

12

402

8.06K

1% 1/16W MF-LF

R7804

12

QFN

CRITICAL

ISL6549

U7800

5

15

1

6

2

16

3

4

11

12

13

10

17

14

78

9

SM

XW7800

1

2

603

CERM

6.3V

20%

4.7UF

C7803

1

2

1000PF

10% 25V X7R 402

nostuff

C7824

1

2

MF-LF

1/16W

5%

2.7K

402

R7821

1

2

1% 1/16W MF-LF 402

1K

R7820

1

2

MF-LF

1% 1/16W

402

470

R7822

1

2

CERM

6.3V

20%

10UF

805-1

C7826

1

2

100K

5% 1/16W MF-LF 402

R7892

1

2

NOSTUFF

SOT23-LF

2N7002

Q7802

3

1

2

6.3V CERM

10UF

20%

805-1

C7821

1

2

CERM

6.3V

20%

10UF

805-1

C7825

1

2

CERM

6.3V

20%

10UF

805-1

C7822

1

2

nostuff

TLM833

CTLSH3-30M833

D7800

1

2

3

4

5

402

MF-LF

1/16W

1%

10K

R7810

1

2

20% 10V

CERM

402

0.1UF

C7880

12

402

MF-LF

1/16W

1%

2.49K

R7811

1

2

1%

402

MF-LF

1/16W

5.11K

R7812

1

2

SOI-LF

U7810

12

8

9

14

3

SOI-LF

U7810

12

10

11

13

3

IRF1902PBF

SO-8

CRITICAL

Q7803

5678

4

123

IRLR7807Z

CRITICAL

TO-252AA

Q7800

4

1

3

CRITICAL

TO-252AA

IRLR7807Z

Q7801

4

1

3

10%

10UF

16V CERM 1210

C7811

1

2

PAGE_BORDER=TRUE

SYNC_DATE=06/29/2006

TRUE

051-7039

21

78 97

3V DC/DC 2.5V

SYNC_MASTER=M51_PAUL

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_FB

VOLTAGE=0 V MIN_LINE_WIDTH=0.6MM

3V3REG_GND

MIN_NECK_WIDTH=0.25MM

PP2V5_S5

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

2V5_LDODR_C

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_PVCC5

MIN_LINE_WIDTH=0.6MM

3V3REG_LGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_SWITCHNODE

MIN_NECK_WIDTH=0.25MM

3V3REG_LDO_FB

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_COMP

MIN_LINE_WIDTH=0.6MM

3V3REG_FB_R

MIN_NECK_WIDTH=0.25MM

PP12V_S5

2V2_REF

PP3V3_S5

MIN_NECK_WIDTH=0.25MM

3V3REG_BOOT_R

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_COMP_R

SYS_POWERFAIL_L

3V3REG_VCC5

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_SNUB

PGOOD_PP2V5_S0

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_FS_DIS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_LDO_DR

=PP3V3_S5_2V5_LDO

PP5V_S5

PP2V5_S0

MIN_NECK_WIDTH=0.25MM

3V3REG_UGATE

MIN_LINE_WIDTH=0.6MM

PP3V3_S5

83

80

79

78

83

78

77

82

77

83

76

80

76

82

66

79

66

80

65

77

65

79

26

75

26

83

77

6

82

59

83

6

5

76

5

76

5

78

5

3

6

77

3

www.Vinaﬁx.vn

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

GND

V+

LM339A

GND

V+

LM339A

D

G

S

D

G

S

GND

V+

LM339A

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

1.8V AND 1.2V S3 REGULATOR

1.21V

PEAK=14.5A

1.2V S3

VOUT=VREF*(1+R2/R1)

1.81V NOMINAL

1.21V NOMINAL

0.784V MIN

0.816V MAX

1.8V S3

(R1)

(R2)

VREF = 0.800V TYP

PP1V8_S3

PLACE LED NEAR VREG

0.723V

POWER BUDGET

PP1V8_S3

TOTAL=6.3A

POWER BUDGET

M51

PEAK=0.4A

AVE=0.3A

402

MF-LF

1/16W

5%

2.7K

R7912

1

2

5.49K

402

MF-LF

1/16W

1%

R7911

1

2

1/16W

402

MF-LF

1%

10K

R7910

1

2

10K

1% 1/16W MF-LF 402

R7913

1

2

402

MF-LF

1/16W

1%

8.45K

R7914

1

2

2.37K

1% 1/16W MF-LF 402

R7915

1

2

22

MF-LF

5% 1/16W

402

R7999

1

2

MF-LF

1/16W

1%

402

1.24K

R7903

1

2

10%

CERM 402

16V

0.01UF

C7907

1

2

402

1% 1/16W MF-LF

953

R7901

1

2

1206

MF-LF

1% 1/4W

5.11

R7902

1

2

1206

CERM

50V

1000PF

5%

C7909

1

2

CERM

0.047UF

10% 16V

402

C7908

12

5%

MF-LF

402

1/16W

2.2

R7940

12

402

10%

560PF

CERM

50V

C7906

12

6.3V

10%

1UF

CERM 402

C7900

1

2

10

1/16W MF-LF 402

1%

R7905

1

2

402

1% 1/16W MF-LF

8.06K

R7904

12

CRITICAL

ISL6549

QFN

U7900

5

15

1

6

2

16

3

4

11

12

13

10

17

14

78

9

4.7UF

20%

6.3V CERM

603

C7903

1

2

402

MF-LF

1/16W

5%

100K

R7992

1

2

SOT23-LF

2N7002

Q7902

3

1

2

603

X5R

25V

10%

1UF

C7992

12

402

X7R

25V

10%

1000PF

C7902

1

2

20%

CRITICAL

TH-MCZ

ELEC

6.3V

1500UF

C7956

1

2

CRITICAL

20%

TH-MCZ

ELEC

6.3V

1500UF

C7957

1

2

680UF

TH-MCZ

20% 16V ELEC

CRITICAL

C7954

1

2

680UF

TH-MCZ

ELEC

16V

20%

CRITICAL

C7953

1

2

1000PF

402

X7R

10% 25V

C7923

1

2

nostuff

402

X7R

25V

10%

1000PF

C7924

1

2

5% 1/16W MF-LF 402

2.7K

R7921

1

2

6.3V CERM

10UF

20%

805-1

C7921

1

2

MF-LF

1%

1K

402

1/16W

R7920

1

2

1.96K

MF-LF 402

1% 1/16W

R7922

1

2

22UF

20%

6.3V X5R 805

C7920

1

2

16V

10UF

10%

1210

CERM

C7912

1

2

CRITICAL

1.53UH

TH-LF

L7903

12

402

CERM

6.3V

10%

1UF

C7960

1

2

1UF

10%

CERM 402

6.3V

C7958

1

2

10%

6.3V CERM 402

1UF

C7959

1

2

6.3V CERM

10UF

20%

805-1

C7926

1

2

CRITICAL

IRF1902PBF

SO-8

Q7903

5678

4

123

CERM

6.3V

20%

10UF

805-1

C7922

1

2

CERM

6.3V

20%

10UF

805-1

C7925

1

2

nostuff

TLM833

CTLSH3-30M833

D7900

1

2

3

4

5

SOI-LF

U7810

12

4

5

2

3

SOI-LF

U7810

12

6

7

1

3

TO-252AA

IRLR7807Z

Q7901

4

1

3

IRLR7807Z

TO-252AA

Q7900

4

1

3

603

0.1UF

CERM

25V

20%

C7901

12

10UF

16V

10%

CERM 1210

C7911

1

2

LED_PP1V8_S3_P

330

5% 1/16W MF-LF 402

DEVELOPMENT

R7906

1

2

LED_PP1V8_S3_N

2.0X1.25MM-SM

GREEN-3.6MCD

DEVELOPMENT

LED7900

1

2

SOI-LF

DEVELOPMENT

U7901

12

8

9

14

3

CERM

10UF

6.3V

20%

805-1

C7913

1

2

SM

XW7900

1

2

SYNC_DATE=06/29/2006SYNC_MASTER=M51_PAUL

1.8V & 1.2V VREG

97

21

051-7039

79

1V8REG_DDR_SWITCHNODE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_LDO_DR

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_LDO_FB

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_FS_DIS

PP1V8_S3

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_LGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_BOOT_R

1V8REG_DDR_PVCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_VCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

PP5V_S5

1V2_REF

PGOOD_PP0V9_S0

0V7_REF

PP0V9_S0

PP3V3_S5

1V0_REF

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_COMP_R

MIN_NECK_WIDTH=0.25MM

MEMVTT_EN

PM_SLP_S3_L

PM_SLP_S4

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_FB_R

MIN_NECK_WIDTH=0.25MM

1V2_LDODR_C

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_COMP

MIN_NECK_WIDTH=0.25MM

PP3V3_S5

PP1V2_S3

=PP1V8_S3_1V2_LDO

1V8REG_DDR_GND

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0 V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_SNUB

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_FB

MIN_NECK_WIDTH=0.25MM

PGOOD_PP1V8_S3

PP5V_S5

PP12V_S5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_UGATE

83

80

83

79

83

82

78

82

80

77

80

79

76

79

83

78

66

78

82

77

65

80

65

77

80

75

26

77

26

75

78

83

59

6

58

6

59

77

5

23

83

5

76

3

77

3

80

31

5

77

3

77

3

www.Vinaﬁx.vn

Preliminary

D

G

S D

G

S

D

G

S

D

G

S

GND

V+

LM339A

VIN

PHASE2

SOFT2

DDR

OCSET2

PG2/REF

EN2

VSEN2

PGND2

LGATE2

ISEN2

UGATE2

BOOT2

EN1

PG1

OCSET1

PGND1

VSEN1

PHASE1

ISEN1

UGATE1

BOOT1

SOFT1

LGATE1

GND

VCC

GND

V+

LM339A

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

AVE=2.4A

POWER BUDGET

M51

PEAK=5.8A

POWER BUDGET

AVE=4.5A

PEAK=8.4A

M51

NEAR VREG

PLACE LED

NEAR VREG

PLACE LED

PP1V5_S0

1.05V S0

1.5V S0

1.50V NOMINAL 1.05V NOMINAL

1.5V S0 AND 1.05V S0 RAILS

0.867V

CRITICAL

IRLR7807Z

TO-252AA

Q8000

4

1

3

IRLR7807Z

TO-252AA

Q8050

4

1

3

IRLR7807Z

TO-252AA

Q8051

4

1

3

IRLR7807Z

TO-252AA

Q8001

4

1

3

805-1

20%

6.3V CERM

10UF

C8073

1

2

805-1

CERM

10UF

6.3V

20%

C8072

1

2

TH-MCZ

1500UF

20%

6.3V ELEC

CRITICAL

C8071

1

2

402

1/16W

5%

0

MF-LF

R8050

1

2

1500UF

TH-MCZ

20%

6.3V ELEC

CRITICAL

C8070

1

2

MF-LF

1/10W

1%

603

3.65K

R8051

1

2

603

1%

20.0K

1/10W MF-LF

R8052

1

2

X7R

50V

5%

0.018UF

603

C8062

1

2

BAT54E3

SOT23

D8050

1

3

402

MF-LF

1/16W

1%

10K

R8055

1

2

2.43K

1%

MF-LF

1/16W

402

R8053

12

603-1

0.01UF

10%

X7R

50V

C8063

1

2

110K

603

MF-LF

1% 1/10W

R8054

1

2

402

MF-LF

1/16W

5%

330

DEVELOPMENT

R8091

1

2

LED_PP1V05_S0_P

2.0X1.25MM-SM

DEVELOPMENT

GREEN-3.6MCD

LED8091

1

2

20% 10V

CERM

402

0.1UF

DEVELOPMENT

C8090

12

DEVELOPMENT

SOI-LF

U7901

12

4

5

2

3

402

MF-LF

1/16W

1%

8.45K

R8092

1

2

3.01K

1% 1/16W MF-LF 402

R8093

1

2

BAT54E3

SOT23

D8000

1

3

TH-MCZ

680UF

ELEC

16V

20%

CRITICAL

C8005

1

2

TH-MCZ

680UF

ELEC

16V

20%

CRITICAL

C8004

1

2

MF-LF

5% 1/16W

0

402

R8000

1

2

10%

10UF

16V CERM 1210

C8003

1

2

1210

CERM

16V

10%

10UF

C8002

1

2

603

4.7UF

20%

6.3V CERM

C8010

1

2

1210

CERM

16V

10%

10UF

C8001

1

2

TH-LF

CRITICAL

1.53UH

L8050

12

1210

10% 16V CERM

10UF

C8000

1

2

CRITICAL

1V05REG_SOFT

SSOP

ISL6539

1V05REG_ISEN

U8000

6

23

13

8

21

1209

7

22

2

27

11 18

15 16

3

26

4

25

12 17

5

24

28

14

10 19

603

110K

1% 1/10W MF-LF

R8004

1

2

50V X7R

10%

0.01UF

603-1

C8013

1

2

MF-LF

402

2.43K

1/16W

1%

R8003

12

603

0.1UF

25V CERM

20%

C8011

1

2

0.1UF

25V CERM

20%

603

C8061

1

2

1.53UH

TH-LF

CRITICAL

L8000

12

0.018UF

X7R

50V

5%

603

C8012

1

2

603

1/10W MF-LF

3.32K

1%

R8001

1

2

CRITICAL

6.3V ELEC

20%

1500UF

TH-MCZ

C8023

1

2

603

1%

4.99K

1/10W MF-LF

R8002

1

2

1%

10K

1/16W MF-LF 402

R8005

1

2

TH-MCZ

6.3V ELEC

20%

1500UF

CRITICAL

C8022

1

2

10UF

CERM

6.3V

20%

805-1

C8021

1

2

10UF

6.3V

20%

CERM 805-1

C8020

1

2

DEVELOPMENT

330

5% 1/16W MF-LF 402

R8090

1

2

LED_PP1V5_S0_P

DEVELOPMENT

2.0X1.25MM-SM

GREEN-3.6MCD

LED8090

1

2

DEVELOPMENT

SOI-LF

U7901

12

6

7

1

3

nostuff

CTLSH3-30M833

TLM833

D8001

1

2

3

4

5

1/4W MF-LF

1%

5.11

1206

R8006

1

2

402

X7R

25V

10%

1000pF

C8024

1

2

nostuff

CTLSH3-30M833

TLM833

D8051

1

2

3

4

5

1206

1% 1/4W MF-LF

5.11

R8056

1

2

402

X7R

25V

10%

1000pF

C8064

1

2

1.5V_S0 & 1.05V_S0 VREG

SYNC_DATE=06/29/2006SYNC_MASTER=M51_PAUL

97

21

051-7039

80

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V05REG_BOOT

1V5REG_LGATE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

PGOOD_PP1V5_S0

1V5REG_VSEN

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

PP5V_S5

PP1V05_S0

1V5REG_BOOT_R

1V5REG_SNUBBER_R

1V5REG_ISEN

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

1V05REG_SNUBBER_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V05REG_BOOT_R

PGOOD_PP1V05_S0

PP5V_S5

1V0_REF

PP1V5_S0

LED_PP1V5_S0_N

PP3V3_S5

LED_PP1V05_S0_N

1V0_REF

PP3V3_S5

1V5REG_UGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

PGOOD_PP1V05_S0

1V05_OCSET

PP12V_S5

MIN_LINE_WIDTH=0.6MM

1V5REG_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V5REG_SWITCHNODE

PP1V5_S0

MIN_LINE_WIDTH=0.6MM

1V05_VSEN

MIN_NECK_WIDTH=0.25MM

PM_SLP_S3_L

PP1V05_S0

1V5REG_OCSET

1V5REG_SOFT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V05_LGATE

MIN_LINE_WIDTH=0.6MM

1V05REG_UGATE

MIN_NECK_WIDTH=0.25MM

1V05_SWITCHNODE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PGOOD_PP1V5_S0

PM_SLP_S3_L

83

80

83

83 83

79

82

82 82

78

80

80 80

77

79

79 79

76

83

78

78 78

66

82

80 80

77

77 77

65

79

75

80

75 75

26

78

77

80

77

59

34

59 59

80

6

77

80

58

34

58

80

5

80

5 5

80

5

80

5

80

76

5

23

5

80

23

77

3

77

3 3

79

3

79

3

77

3

5

3

77

5

www.Vinaﬁx.vn

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

M50 POWER BUDGET

5V S5 AND 5V AUDIO S5 REGULATOR

POWER SUPPLY 3.3V/5V MAIN SWITCH

0.784V MIN

0.816V MAX

VREF = 0.800V TYP

VOUT=VREF*(1+R2/R1)

(R2)

(R1)

MISC=1.500A

USB=1.500A ODD=1.000A

5V S5

AUDIO O=1.000A

TOTAL=5.000A

5.10V NOMINAL

AUDIO=?A TOTAL=?A

5V AUDIO S5

4.50V NOMINAL

10%

10UF

16V CERM 1210

C8211

1

2

CRITICAL

TH-KZJ-LF

ELEC

6.3V

20%

1800UF

C8215

1

2

22

5% 1/16W

402

MF-LF

R8299

1

2

16V

10%

0.01UF

CERM 402

C8207

1

2

1/16W

1.24K

402

1%

MF-LF

R8203

1

2

232

402

1% 1/16W MF-LF

R8201

1

2

5.11

1/4W

1%

MF-LF 1206

R8202

1

2

1206

CERM

50V

5%

1000PF

C8209

1

2

1000PF

10% 25V X7R 402

C8202

1

2

402

16V

10%

CERM

0.047UF

C8208

12

2.2

402

MF-LF

5%

1/16W

R8240

12

1UF

10% 25V X5R 603

C8292

12

402

CERM

1UF

10%

6.3V

C8200

1

2

1%

402

MF-LF

1/16W

10

R8205

1

2

X5R 805

6.3V

20%

22UF

C8220

1

2

TH1

3.0UH

CRITICAL

L8203

12

10%

402

CERM

50V

470PF

C8206

12

MF-LF

1/16W

1%

402

8.06K

R8204

12

CRITICAL

QFN

ISL6549

U8200

5

15

1

6

2

16

3

4

11

12

13

10

17

14

78

9

SM

XW8200

1

2

603

CERM

6.3V

20%

4.7UF

C8203

1

2

1000PF

NOSTUFF

402

X7R

25V

10%

C8224

1

2

16V

1000UF

20%

ELEC TH-KZJ-LF

CRITICAL

C8253

1

2

1000PF

X7R

25V

10%

402

C8223

1

2

1/16W

402

2.7K

5%

MF-LF

R8221

1

2

1% 1/16W MF-LF 402

1K

R8220

1

2

402

221

MF-LF

1% 1/16W

R8222

1

2

805-1

6.3V

20%

10UF

CERM

C8226

1

2

100K

5% 1/16W MF-LF 402

R8292

1

2

NOSTUFF

2N7002

SOT23-LF

Q8202

3

1

2

CERM 805-1

20%

6.3V

10UF

C8221

1

2

20%

6.3V

805-1

10UF

CERM

C8222

1

2

10UF

805-1

6.3V

20%

CERM

C8225

1

2

CTLSH3-30M833

TLM833

NOSTUFF

D8200

1

2

3

4

5

SO-8

IRF1902PBF

CRITICAL

Q8203

5678

4

123

TO-252AA

CRITICAL

IRLR7807Z

Q8200

4

1

3

TO-252AA

IRLR7807Z

CRITICAL

Q8201

4

1

3

20% 25V

CERM

0.1UF

603

C8201

12

805-1

10UF

20%

6.3V CERM

C8213

1

2

805-1

10UF

20%

6.3V CERM

C8214

1

2

051-7039

21

82 97

SYNC_DATE=06/29/2006SYNC_MASTER=M50_PAUL

5V DC/DC

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_LDO_FB

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_FS_DIS

5VREG_SWITCHNODE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_UGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_LGATE

PP12V_S5

=PP5V_S5_AUDIO_LDO

5VREG_SNUB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

VOLTAGE=0 V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_GND

MIN_LINE_WIDTH=0.6MM

5VREG_FB_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_FB

5VREG_VCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_BOOT_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_COMP

SYS_POWERFAIL_L

MIN_NECK_WIDTH=0.25MM

5VREG_PVCC5

MIN_LINE_WIDTH=0.6MM

PP5V_S5

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_COMP_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_LDO_DR

5V_AUDIO_LDODR_C

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

PP4V5_S5_AUDIO_ANALOG

83 80

83

79

80

78

79

77

78

75

77

78

59

76

5

3

6

3

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

D

G

S

G

D

S

G

D

S

G

D

S

G

D

S

D

G

S

G

D

S

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

12V S0 - B

12V S0

1.8V S0

Rds on = 13.5mOhm

3.3V S0

2.5V S0

24V S0

3.3V AND 5V S3

5V S0

Split 12V S0 is for better power plane structure 12VS0 - B will connect to MXM, Audio, Fans

to blead energy off 1.8V S0 during sleep

TSOP-LF

CRITICAL

SI3446DV

Q8319

125

63

4

1/10W

100K

603

1%

MF-LF

R8318

12

NOSTUFF

603-1

X7R

50V

10%

0.01UF

C8318

1

2

0.01UF

603-1

50V X7R

10%

C8317

1

2

SOT23-LF

2N7002

Q8320

3

1

2

CRITICAL

SO-8

IRF7807ZPBF

Q8323

5678

4

123

10%

X7R

50V

0.01uF

402

C8323

1

2

MF-LF

100K

5%

1/16W

402

R8319

12

NOSTUFF

50V X7R

10%

0.01uF

402

C8324

1

2

2N7002

SOT23-LF

Q8324

3

1

2

SOT563

CMLDM7002A

Q8318

3

4

5

CMLDM7002A

SOT563

Q8318

6

1

2

603

100K

1% 1/10W MF-LF

R8313

1

2

603

10K

1% 1/10W MF-LF

R8312

1

2

IRF7413PBF

SO-8

CRITICAL

Q8300

5678

4

123

47K

5%

MF-LF

1/10W

603

R8315

12

SOD-123

B0530WXF

D8310

12

SO-8

IRF7410PBF

Q8313

5

6

7

8

4

1

2

3

25V

20%

603

CERM

0.1UF

NOSTUFF

C8316

1

2

SOT23-LF

2N7002

Q8303

3

1

2

SOT23-LF

2N7002

Q8302

3

1

2

25V CERM

0.1UF

20%

603

C8319

1

2

CERM

16V

402

10%

0.01UF

C8320

1

2

5% 1/16W MF-LF 402

47K

R8300

1

2

CERM 603

0.1UF

20% 25V

NOSTUFF

C8326

1

2

IRF7406PBF

SOI

Q8326

5

6

7

8

4

1

2

3

603

1/10W MF-LF

5%

47K

R8326

12

SOD-123

B0530WXF

D8311

12

20% 50V

603

CERM

0.01UF

C8322

1

2

603

10K

1% 1/10W MF-LF

R8316

1

2

SOT563

CMLDM7002A

Q8325

3

4

5

805

50V

0.1UF

20%

CERM

C8327

1

2

1%

603

1/10W MF-LF

100K

R8317

1

2

CMLDM7002A

SOT563

Q8325

6

1

2

1/10W

1%

603

100K

MF-LF

R8320

1

2

603

10K

1% 1/10W MF-LF

R8325

1

2

IRF7410PBF

SO-8

Q8340

5

6

7

8

4

1

2

3

NOSTUFF

CERM

25V

20%

0.1UF

603

C8346

1

2

CERM

16V

402

10%

0.01UF

C8340

1

2

603

1% 1/10W MF-LF

10K

R8342

1

2

603

100K

1% 1/10W MF-LF

R8343

1

2

47K

5%

MF-LF

1/10W

603

R8345

12

SOD-123

B0530WXF

D8340

12

CMLDM7002A

SOT563

Q8348

6

1

2

CMLDM7002A

SOT563

Q8348

3

4

5

CERM

0.1UF

20%

603

25V

C8349

1

2

MF-LF

10K

5% 1/16W

402

R8340

1

2

1/16W

5%

402

MF-LF

3.6K

R8301

1

2

CRITICAL

SO-8

IRF7413PBF

Q8301

5678

4

123

402

1/16W MF-LF

5%

3.6K

R8302

1

2

1/16W

47K

5%

402

MF-LF

R8303

1

2

1UF

10V

603

20%

CERM

C8399

1

2

CERM

20%

603

10V

1UF

C8398

1

2

CRITICAL

TSOP-LF

SI3446DV

Q8310

125

63

4

603-1

X7R

10% 50V

0.01UF

C8310

1

2

NOSTUFF

10% 50V X7R 603-1

0.01UF

C8311

1

2

603

1%

MF-LF

100K

1/10W

R8310

12

SOT23-LF

2N7002

Q8311

3

1

2

CRITICAL

TSOP-LF

SI3446DV

Q8312

125

63

4

SOT23-LF

2N7002

Q8315

3

1

2

NOSTUFF

X7R

10%

50V

0.01UF

603-1

C8315

1

2

10% 50V X7R 603-1

0.01UF

C8321

1

2

603

MF-LF

1/10W

1%

100K

R8311

12

051-7039

SYNC_DATE=06/29/2006

21

83 97

S0 AND S3 FETS

SYNC_MASTER=M51_PAUL

PP12V_S5

SYS_PWRUP_L

PP12V_S0

TO_GATE_12V_S0_B_R

PP5V_S5

SYS_PWRUP_L

START_G_12V_S0

TO_GATE_12V_S0_R

SYS_PWRUP_L

TO_GATE_24V_S0

START_G_24V_S0

GATE_24V_S0

PP24V_S5

TO_GATE_24V_S0_R

GATE_12V_S0_B

PP12V_S0_B

PP12V_S5

START_G_5V_S0

PP5V_S0

PP5V_S5

PP5V_S3

GATE_5V_S3

PP3V3_S5

PP3V3_S3

GATE_3V3_S3

PP12V_S5

START_G_2V5_S0

PP12V_S5

PP2V5_S0

SYS_PWRUP_L

PP12V_S5

SYS_PWRUP_L

PP2V5_S5

START_G_3V3_S0

PP3V3_S5

PP3V3_S0

PP12V_S5

SYS_PWRUP_L

GATE_12V_S0

SYS_PWRUP_L

START_G_1V8_S0

PP1V8_S3

PM_SLP_S4

PP24V_S0

PP12V_S5

START_G_12V_S0_B

PP1V8_S0

83

80

83

79

82

78

84

83

80

83

80

77

83

77

76

83

82

79

82

79

76

82

76

41

82

80

78

80

78

66

80

66

27

80

79

77

79

97

77

65

79

65

26

79

78

75

78

75

26

53

78

26

10

78

77

59

77

59

6

27

77

78

6

77

79

77

76

83

5

83

6

76

5

59

5

6

76

78

83

76

83

5

76

83

5

79

5

76

3

77

3

77

3

77

3

77

3

77

3

77

3

www.Vinaﬁx.vn

Preliminary

PEX_TX0

PEX_TX0_L

GND37

PEX_TX1

PEX_TX1_L

GND36

PEX_TX2

PEX_TX2_L

GND35

PEX_TX3

PEX_TX3_L

GND34

PEX_TX4

PEX_TX4_L

GND33

PEX_TX5

PEX_TX5_L

GND32

PEX_TX6

PEX_TX6_L

GND31

PEX_TX7

PEX_TX7_L

GND30

PEX_TX8

PEX_TX8_L

GND29

PEX_TX9

PEX_TX9_L

GND28

PEX_TX10

PEX_TX10_L

GND27

PEX_TX11

PEX_TX11_L

GND26

PEX_TX12

PEX_TX12_L

GND25

PEX_TX13

PEX_TX13_L

GND24

PEX_TX14

PEX_TX14_L

GND23

PEX_TX15

PEX_TX15_L

PRSNT2_L

GND22

GND21

GND20

5VRUN

RUNPWROK

1V8RUN6

1V8RUN5

1V8RUN4

1V8RUN3

1V8RUN2

1V8RUN1

1V8RUN0

GND19

PEX_RX0

PEX_RX0_L

GND18

PEX_RX1

PEX_RX1_L

GND17

PEX_RX2

PEX_RX2_L

GND16

PEX_RX3

PEX_RX3_L

GND15

PEX_RX4

PEX_RX4_L

GND14

PEX_RX5

PEX_RX5_L

GND13

PEX_RX6

PEX_RX6_L

GND12

PEX_RX7

PEX_RX7_L

GND11

PEX_RX8

PEX_RX8_L

GND10

PEX_RX9

PEX_RX9_L

GND9

PEX_RX10

PEX_RX10_L

GND8

PEX_RX11

PEX_RX11_L

GND7

PEX_RX12

PEX_RX12_L

GND6

PEX_RX13

PEX_RX13_L

GND5

PEX_RX14

PEX_RX14_L

GND4

PEX_RX15

PEX_RX15_L

GND3

GND2

GND1

PWR_SRC7

PWR_SRC6

PWR_SRC5

PWR_SRC4

PWR_SRC3

PWR_SRC2

PWR_SRC1

PWR_SRC0

GND0

KEY

VIN

IOUT

LOADNC

GND

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MXM PWRSRC (GPU CORE) CURRENT SENSE

ADC IS 10BIT 0 TO 1023

PLACE CAPS NEAR NB

.0129 V/COUNT

COUNT

1.33333 A/V

PCB:PLACE D8450,R8452,C8458 BY SMC

PCB:KEEP SHORTS NEXT TO U8450

0 TO 3.3V

CURRENT

4.95 W

BOM options provided by this page: (NONE)

POWER

2.5 W

4 V/V

WORKS WELL.

TO SMC

SO SMC ADC SAMPLING

1 MS TIME CONSTANT

VOLTAGE

(NONE)

1.25 W

1.5 A

3V3

1V8

- =PP5V_S0_MXM

2V5

- =PP12V_S0_MXM

SCALE

PWR (12V)

PRSNT2_L: RESERVED FOR FUTURE USE

Signal aliases required by this page:

- =PP1V8_S0_MXM

MXM SPEC POWER REQUIREMENTS

Polarity is also inverted (Tx+ goes to Rx-) to untangle routes

Power aliases required by this page:

Page Notes

0.5 A

3.5 A

5V

Note: PCI-E Lanes are reversed to untangle routes

Need to stuff config strap using BOM option NBCFG_PEG_REVERSE

6.3 W PLATFORM DEPENDENT

UP TO 4 A

M51: FIX ON CARD ALLOWS US TO NOT STUFF MOST OF THE 1.8V

DECOUPLING, WITH NO DROOP OR NOISE

(NOT NECESSARILY THE SAME FOR EVERY MODULE)

PCB: PLACE R8455, C8459 WITHIN 1" OF SMC (U5800)

COUNT

ADC IS 10BIT 0 TO 1023

0 TO 3.3V

SCALE

(SCALING 12V INPUT VOLTAGE TO SMC)

.004296875 A/COUNT

MXM PWRSRC VOLTAGE SENSE

0.1uF

C8421

12

0.1uF

10% 402

16V X5R

C8420

12

(1 OF 2)

CRITICAL

AS0B326-S55N-7F

F-RT-SM

J8400

2

4

6

8

10

12

14

18 17

19

77

83

89

95

101

107

113

119

125

131

21

20

22

24

44

50

56

62

68

74

80

23

86

92

98

104

110

116

122

128

41

47

53

59

65

71

129

127

123

69

67

63

61

57

55

51

49

45

43

39

37

121

117

115

111

109

105

103

99

97

93

91

87

85

81

79

75

73

132

130

126

72

70

66

64

60

58

54

52

48

46

42

40

124

120

118

114

112

108

106

102

100

96

94

90

88

84

82

78

76

38

1

3

5

7

9

11

13

1516

0.1uF

C8422

12

0.1uF

C8423

12

0.1uF

C8424

12

0.1uF

C8425

12

0.1uF

C8426

12

0.1uF

C8427

12

0.1uF

C8428

12

0.1uF

C8429

12

0.1uF

C8430

12

0.1uF

C8431

12

0.1uF

C8432

12

0.1uF

C8433

12

0.1uF

C8434

12

0.1uF

C8435

12

0.1uF

C8436

12

0.1uF

C8437

12

0.1uF

C8438

12

0.1uF

C8439

12

0.1uF

C8440

12

0.1uF

C8441

12

0.1uF

C8442

12

0.1uF

C8443

12

0.1uF

C8444

12

0.1uF

C8445

12

0.1uF

C8446

12

0.1uF

C8447

12

0.1uF

C8448

12

0.1uF

C8449

12

0.1uF

C8450

12

0.1uF

C8451

12

22UF

35V ELEC SM-LF

20%

C8400

1

2

NOSTUFF

BAS16-75V-0.25A

SOT23-LF

D8450

1

3

20%

X5R

6.3V

402

0.22UF

MXM_PWR_SENSE

C8458

1

2

402

1% 1/16W MF-LF

MXM_PWR_SENSE

4.53K

R8452

12

1%

0.025

MF

CRITICAL

2512-1

1W

MXM_PWR_SENSE

R8450

12

OMIT

SM

XW8450

12

X5R

20%

0.22UF

6.3V

402

MXM_PWR_SENSE

C8459

1

2

MF-LF

402

1/16W

4.53K

1%

MXM_PWR_SENSE

R8455

12

6.04K

MF-LF

1%

402

1/16W

MXM_PWR_SENSE

R8453

1

2

1/16W

402

MXM_PWR_SENSE

1%

2.0K

MF-LF

R8454

1

2

SOT23-5

ZXCT1010

MXM_PWR_SENSE

CRITICAL

U8450

2

3

51

4

402

1/16W

1%

3.01K

MXM_PWR_SENSE

MF-LF

R8451

1

2

NOSTUFF

6.3V X5R

22UF

20%

805

C8403

1

2

6.3V

20%

22UF

NOSTUFF

X5R 805

C8402

1

2

22UF

X5R

20%

6.3V

805

C8401

1

2

SYNC_MASTER=M51_DAVE

MXM PCI-E & PWR

SYNC_DATE=(MASTER)

051-7039

84

21

97

SMC_GPU_VSENSE

=PP1V8_S0_MXM

PEG_D2R_P<0>

PEG_R2D_N<0>

PEG_R2D_P<0>

PEG_R2D_N<1>

PEG_R2D_P<1>

PEG_R2D_N<2>

PEG_R2D_P<2>

PEG_R2D_N<3>

PEG_R2D_P<3>

PEG_R2D_N<4>

PEG_R2D_P<4>

PEG_R2D_N<5>

PEG_R2D_P<5>

PEG_R2D_N<6>

PEG_R2D_P<6>

PEG_R2D_N<7>

PEG_R2D_P<7>

PEG_R2D_N<8>

PEG_R2D_P<8>

PEG_R2D_N<9>

PEG_R2D_P<9>

PEG_R2D_N<10>

PEG_R2D_P<10>

PEG_R2D_N<11>

PEG_R2D_P<11>

PEG_R2D_N<12>

PEG_R2D_P<12>

PEG_R2D_N<13>

PEG_R2D_P<13>

PEG_R2D_N<14>

PEG_R2D_P<14>

PEG_R2D_N<15>

PEG_R2D_P<15>

=PP5V_S0_MXM

ALL_SYS_PWRGD

PEG_D2R_N<15>

PEG_D2R_P<15>

PEG_D2R_N<14>

PEG_D2R_P<14>

PEG_D2R_N<13>

PEG_D2R_P<13>

PEG_D2R_N<12>

PEG_D2R_P<12>

PEG_D2R_N<11>

PEG_D2R_P<11>

PEG_D2R_N<10>

PEG_D2R_P<10>

PEG_D2R_N<9>

PEG_D2R_P<9>

PEG_D2R_N<8>

PEG_D2R_P<8>

PEG_D2R_N<7>

PEG_D2R_P<7>

PEG_D2R_N<6>

PEG_D2R_P<6>

PEG_D2R_N<5>

PEG_D2R_P<5>

PEG_D2R_N<4>

PEG_D2R_P<4>

PEG_D2R_N<3>

PEG_D2R_P<3>

PEG_D2R_N<2>

PEG_D2R_P<2>

PEG_D2R_N<1>

PEG_D2R_P<1>

PEG_D2R_N<0>

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.60MM

VOLTAGE=12V

PPV_S0_MXM_PWRSRC

PEG_R2D_C_N<5>

PEG_R2D_C_P<6>

PEG_R2D_C_P<1>

PPV_S0_MXM_PWRSRC

PEG_R2D_C_N<0>

PEG_R2D_C_N<10>

PEG_R2D_C_P<2>

PEG_R2D_C_N<3>

PEG_R2D_C_N<6>

PEG_R2D_C_P<5>

PEG_R2D_C_P<3>

PEG_R2D_C_N<2>

PEG_R2D_C_N<9>

PEG_R2D_C_P<10>

PEG_R2D_C_N<12>

PEG_R2D_C_P<13>

PEG_R2D_C_N<13>

PEG_R2D_C_N<15>

PEG_R2D_C_P<4>

PEG_R2D_C_P<7>

PEG_R2D_C_N<8>

PEG_R2D_C_N<7>

PEG_R2D_C_P<9>

PEG_R2D_C_N<11>

PEG_R2D_C_P<12>

PEG_R2D_C_N<14>

PP3V3_S0

MXM_SENSE_I_R

GND_SMC_AVSS

PEG_R2D_C_P<8>

PEG_R2D_C_P<11>

MXM_PWRSRC_SENSE

GND_SMC_AVSS

SMC_GPU_ISENSE

SMC_MXM_VSENSE_R

PEG_R2D_C_P<15>

PEG_R2D_C_N<1>

PEG_R2D_C_P<0>

PEG_R2D_C_P<14>

PEG_R2D_C_N<4>

=PPV_S0_MXM_PWRSRC

83 76 41 27 26

77

10

84

58

6

76

13

26

13

5

59

13

59

13

58

3

5

3

5

84

5

84

5

3

58

5

58

5

3

www.Vinaﬁx.vn

Preliminary

DVI_B_HPD/GND

AC/BATT_L

IGP/DVI_B_CLK

IGP10

GND38

IGP/DVI_B_CLK_L

IGP9

IGP8

IGP6

IGP7

IGP5

IGP4

IGP3

RSVD2

RSVD3

IGP2

IGP1

IGP0

DDCA_DAT

DDCA_CLK

THERM_L

VGA_VSYNC

VGA_HSYNC

SMB_CLK

SMB_DAT

RSVD1

RSVD0

PEX_RST_L

PEX_REFCLK

PEX_REFCLK_L

LVDS_UTX0_L

LVDS_LTX1

PRSNT1_L

TV_C_HDTV_PR

GND46

TV_Y_HDTV_Y_TV_CVBS

GND49

LVDS_UCLK

GND52

LVDS_UTX3_L

LVDS_UTX3

LVDS_UTX2_L

LVDS_UTX2

GND54

LVDS_UTX1_L

LVDS_UTX1

GND55

LVDS_UTX0

GND56

LVDS_LCLK_L

LVDS_LCLK

GND57

LVDS_LTX3_L

LVDS_LTX2_L

LVDS_LTX2

GND59

LVDS_LTX1_L

GND60

LVDS_LTX0_L

LVDS_LTX0

GND61

DDCC_DAT

DDCC_CLK

LVDS_PPEN

LVDS_BL_BRGHT

LVDS_BLEN

DDCB_DAT

DDCB_CLK

2V5RUN

GND62

3V3RUN0

3V3RUN1

3V3RUN2

RSVD4

IGP/DVI_B_TX2_L

GND39

RSVD5

GND40

IGP/DVI_B_TX2

IGP/DVI_B_TX1

GND41

IGP/DVI_B_TX1_L

IGP/DVI_B_TX0

IGP/DVI_B_TX0_L

DVI_A_HPD

DVI_A_CLK

DVI_A_CLK_L

DVI_A_TX2

DVI_A_TX2_L

GND42

DVI_A_TX1_L

GND43

DVI_A_TX0_L

GND44

DVI_A_TX1

DVI_A_TX0

GND45

LVDS_LTX3

GND58

GND53

GND51

GND50

GND47

VGA_RED

GND48

TV_CVBS_HDTV_PB

VGA_GRN

VGA_BLU

LVDS_UCLK_L

CLK_REQ_L

SCL

SDA

VSS

VCC

WP

A2 A1 A0

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PULLED TO GROUND ON MXM...NEED GPIO?

I2C ADDRESS: AC

UP TO 4 A

PLATFORM DEPENDENT

POWER

(NOT NECESSARILY THE SAME FOR EVERY MODULE)

STUFF FOR WRITE PROTECT

PLACE CLOSE TO J8400

Signal aliases required by this page:

Power aliases required by this page:

MXM SPEC POWER REQUIREMENTS

- =PP2V5_S0_MXM

- =SMB_GPU_THRM_DATA

TO INTERNAL PANEL

UNCONNECTED. USE DDC_A FOR EXT. TMDS

VOLTAGE

1.25 W

2.5 W

4.95 W

CURRENT

2V5

1V8

3.5 A

(NONE)

3V3

1.5 A

PWR (12V)

0.5 A

PWM

EXT. DVI/VGA

CARD DETECT

6.3 W

- =SMB_GPU_THRM_CLK

5V

0.5 A

10K PD ON MXM

- =PP3V3_S0_MXM

BOM options provided by this page:

Page Notes

MXM SYSTEM INFORMATION ROM

(2 OF 2)

F-RT-SM

AS0B326-S55N-7F

J8400

234

238

240

242

169

137

155

157

232

230

222

220

221

219

217

239

237

233

231

227

225

193

187

199

205

211

223

229

235

241

138

142

146

150

154

158

164

170

176

182

188

194

200

206

212

218

236

159

161

185

163

171

173

175

177

179

181

183

191

189

215

213

209

207

203

201

226

228

192

190

216

214

210

208

204

202

198

196

224

162

160

186

184

180

178

174

172

168

166

135

133

139

134

141

143

165

167

195

197

147

145

149

136

144

140

156

152151

148

153

100K

402

1/16W MF-LF

5%

R8500

1

2

NOSTUFF

402

5%

0

1/16W MF-LF

R8570

1

2

SO8

M24C02-WMN6

OMIT

U8570

1

2

3

6

5

8

4

7

CERM 402

20% 10V

MXM_ROM

0.1UF

C8570

1

2

NOSTUFF

0

5%

1/16W

R8506

12

1/16W

5%

0

R8507

12

402

MF-LF

5% 1/16W

100K

R8501

1

2

22uF

X5R

6.3V

20%

805

C8500

1

2

100K

5%

1/16W

R8502

12

CK410_SRC_CLKREQ1_L

0

5%

1/16W

R8503

12

5%

1/16W

0

R8504

12

051-7039

97

SYNC_DATE=(MASTER)

21

85

MXM I/O

SYNC_MASTER=M51_DAVE

=PP3V3_S0_MXM

GPU_OVERTEMP_L

GPU_DDC_C_DATA

LVDS_L_DATA_P<0>

LVDS_L_DATA_N<1>

=PP3V3_S0_MXM

MXM_AC_BATT_L

GPU_DDC_A_CLK

GPU_CLK_REQ_L

GPU_DDC_A_DATA

LVDS_U_CLK_P

GPU_CLK100M_PCIE_P

GPU_TV_Y

GPU_H2SYNC

TMDS_DATA_N<1>

TMDS_DATA_P<0>

TMDS_DATA_N<0>

LVDS_U_CLK_N

TMDS_DATA_P<1>

TMDS_DATA_N<2> TMDS_DATA_P<2>

GPU_HPD

GPU_DDC_C_CLK

GPU_VARY_BL

GPU_DIGON

LVDS_U_DATA_N<3> LVDS_U_DATA_P<3>

GPU_RED

INV_ENABLE_BL

=PP3V3_S0_MXM

GPU_TV_COMP

GPU_TV_C

GPU_BLU

LVDS_U_DATA_N<0>

LVDS_L_DATA_P<3>

LVDS_L_CLK_P

GPU_V2SYNC

LVDS_U_DATA_P<1>

LVDS_U_DATA_N<1>

LVDS_U_DATA_P<2>

LVDS_U_DATA_N<2>

MXM_DETECT_L

=PP2V5_S0_MXM

=PP3V3_S0_MXM

GPU_DDC_C_DATA

MXM_ROM_WP

GPU_DDC_C_CLK

LVDS_L_CLK_N

TP_GPU_DDC_B_CLK

TP_GPU_DDC_B_DATA

GPU_ENABLE_BL

LVDS_L_DATA_N<0>

LVDS_L_DATA_P<2>

LVDS_L_DATA_N<2>

=PP3V3_S0_MXM

SMB_GPU_THRM_CLK

SMB_GPU_THRM_DATA

PEG_RESET_L

GPU_CLK100M_PCIE_N

MXM_CONN_AC_BATT_L

GPU_GRN

LVDS_U_DATA_P<0>

LVDS_L_DATA_N<3>

LVDS_L_DATA_P<1>

TMDS_CLK_P

TMDS_CLK_N

=PP3V3_S0_MXM

34

85

94

85

94

85

94

85

33

3

59

85

94

3

59

97

94

34

97

94

97

85

94

97

5

3

97

94

97

94

3

85

94

3

10

6

34

97

94

97

3

www.Vinaﬁx.vn

Preliminary

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PLACE NEAR J9402

PANEL POWER SEQUENCING

LCD (LVDS) INTERFACE

PINS 6-9 (GND) ARE CONNECTED TO LCD CHASSIS

BOM options provided by this page: (NONE)

Panel has 4.7K DDC pull-ups MXM also has 2.2K pull-ups

- =PP24V_INVERTER

Power aliases required by this page:

(NONE)

- =PP12V_LCD

- =PP3V3_S0_VIDEO

Signal aliases required by this page:

Page Notes

INVERTER INTERFACE

50V

CERM

20%

402

0.001uF

C9410

1

2

20% 50V

CERM

0.001uF

402

C9401

1

2

SM

FERR-250-OHM

L9400

12

0.1UF

10%

X7R

50V

603-1

C9400

12

MF-LF

402

1%

29.4K

1/16W

R9401

12

5%

MF-LF

402

1/16W

100K

R9400

1

2

SI3443DV

TSOP-LF

Q9400

1

2

5

63

4

2N7002

SOT23-LF

Q9401

3

1

2

100K

402

5%

MF-LF

1/16W

R9470

1

2

53307-3072

F-ST-SM

CRITICAL

J9402

1

10

11

12

13

14

15

16

17

18

19

2

20

21

22

23

24

25

26

27

28

29

3

30

4

5

6

7

8

9

CRITICAL

STDOFF-3MMOD4.6MMH-1.35-TH

SDF9400

1

STDOFF-3MMOD4.6MMH-1.35-TH

CRITICAL

SDF9401

1

0

5%

NOSTUFF

1/8W

805

MF-LF

R9490

12

10UF

10%

CERM

16V

1210

C9420

1

2

402

1/16W

5%

47

MF-LF

R9475

12

402

MF-LF

5%

10K

1/16W

NOSTUFF

R9474

1

2

X7R

2.2UF

10% 50V

1206

C9440

1

2

MF-LF

5%

402

1/16W

10K

NOSTUFF

R9440

1

2

CRITICAL

88290-14XG

M-ST-SM

J9400

15

16

1

10

11

12

13

14

2

3

4

5

6

7

8

9

402

MF-LF

5%

100K

1/16W

R9499

1

2

Internal Display Conns

SYNC_MASTER=M51_DAVE

051-7039

21

9794

SYNC_DATE=(MASTER)

LCD_PWREN_L_RC PP12V_LCD_CONN

MIN_LINE_WIDTH=0.5 mm

VOLTAGE=12V

MIN_NECK_WIDTH=0.25 mm

LVDS_L_DATA_P<1>

LVDS_U_CLK_N

LVDS_L_CLK_N

LVDS_L_DATA_N<3>

GPU_DDC_C_DATA

LVDS_L_DATA_N<0>

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.5 mm

VOLTAGE=12V

PP12V_LCD_SW

LCD_PWM

=PP3V3_DDC_LCD

=PP3V3_S0_VIDEO

PP12V_LCD_CONN

GPU_DDC_C_CLK

LVDS_L_DATA_P<3>

LVDS_U_DATA_P<2>

LVDS_U_DATA_P<1>

LVDS_U_DATA_P<0>

=PP3V3_DDC_LCD

LVDS_L_CLK_P

LVDS_L_DATA_P<2>

LVDS_L_DATA_N<1>

LVDS_U_DATA_P<3>

=PP3V3_S0_VIDEO

GPU_VARY_BL

INV_ENABLE_BL

=PPV_S0_INVERTER

LVDS_U_DATA_N<3>

=PPV_S0_LCD

LCD_PWM

LVDS_L_DATA_N<2>

LVDS_L_DATA_P<0>

LVDS_U_CLK_P

LVDS_U_DATA_N<2>

LVDS_U_DATA_N<0>

LVDS_U_DATA_N<1>

GPU_DIGON

LCD_PWREN_DIV

LCD_PWREN_L

97

94

85

94

6

85

5

94

3

6

85

94

85

3

85

5

3

85

3

5

85

www.Vinaﬁx.vn

Preliminary

G

SD

G

SD

LCFILTER

SYM_VER-1

125

GND

VCC

DA

S1A

S2A

S1B

S2B

S1C

S2C

S1D

S2D

IN

EN_L

DD

DC

DB

125

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DISABLE UNUSED BUFFERS

PLACE FILTER CLOSE

TMDS TERMINATION, IF ANY,

CHECK MXM VENDOR RECOMMENDATIONS FOR FILTER

NC

TO MINI-DVI CONNECTOR

IS ON MXM CARD

ANALOG FILTERING

on the MXM card

PLACE CLOSE TO CONNECTOR

PLACE R9760 & R9761 CLOSE TO DVI CONNECTOR

PLACE CLOSE TO MINI-DVI CONNECTOR

3V LEVEL SHIFTERS

(55mA requirement per DVI spec)

DVI INTERFACE

DVI DDC CURRENT LIMIT

Note: this clamp is supposed to be

10K

402

5% 1/16W MF-LF

R9721

1

2

10K

1/16W MF-LF 402

5%

R9720

1

2

2N7002DW-X-F

SOT-363

Q9711

6

2

1

2N7002DW-X-F

SOT-363

Q9711

3

5

4

1/16W

NOSTUFF

MF-LF

100K

5%

402

R9722

1

2

50V

100pF

CERM 402

5%

C9713

1

2

4.7K

402

MF-LF

5% 1/16W

R9712

1

2

402

MF-LF

1/16W

5%

4.7K

R9710

1

2

100pF

5% 50V

402

CERM

C9711

1

2

50V

603

CERM

20%

0.01uF

C9710

1

2

400-OHM-EMI

SM-1

L9710

12

402

CERM

5% 50V

100pF

C9714

1

2

100

1/16W MF-LF

402

5%

R9711

12

1/16W

100

5%

402

MF-LF

R9713

12

402

MF-LF

1/16W

5%

0

R9714

12

0.25% 50V CERM 402

3.3pF

NOSTUFF

C9741

1

2

1/16W

1%

MF-LF

150

402

R9742

1

2

MF-LF

1/16W

402

150

1%

R9740

1

2

150

1/16W

1%

MF-LF 402

R9741

1

2

0.25%

402

3.3pF

NOSTUFF

CERM

50V

C9742

1

2

402

50V

0.25%

CERM

3.3pF

NOSTUFF

C9740

1

2

CRITICAL

SM-220MHZ-LF

FL9740

1 2

34

CRITICAL

SM-220MHZ-LF

FL9741

1 2

34

SM-220MHZ-LF

CRITICAL

FL9742

1 2

34

0

NOSTUFF

R9700

12

SM

CRITICAL

90-OHM

L9700

1

23

4

0

NOSTUFF

R9702

12

0

NOSTUFF

R9703

12

NOSTUFF

0

R9704

12

SM

90-OHM

CRITICAL

L9701

1

23

4

NOSTUFF

0

R9705

12

SM

90-OHM

CRITICAL

L9702

1

23

4

NOSTUFF

0

R9708

12

0

NOSTUFF

R9709

12

90-OHM

SM

CRITICAL

L9703

1

23

4

0

NOSTUFF

R9715

12

F-ST-SM

CRITICAL

MINI-DVI-M51

J9710

20

8

7

6

5

4

3

2

1

26

18

25

9

10

32

11

12

13

14

15

16

28

30

22

29

17

24

33

34

19

27

31

NOSTUFF

CASE425

MMSZ4681XXG

D9700

21

TSSOP

74LC125

U9760

2

71

14

3

0.1UF

20%

402

10V CERM

C9760

1

2

33

1/16W

402

MF-LF

5%

R9760

12

402

5%

MF-LF

1/16W

33

R9761

12

74LC125

TSSOP

U9760

5

74

14

6

402

5%

50V

CERM

22PF

NOSTUFF

C9762

1

2

50V

5%

22PF

CERM 402

NOSTUFF

C9763

1

2

TSSOP

74LC125

U9760

12

7

13

14

11

TS3V330

SOP

CRITICAL

U9730

4

7

9

12

15

8

1

2

5

11

14

3

6

10

13

16

402

CERM

10V

0.1UF

20%

C9730

1

2

TSSOP

74LC125

U9760

9

7

10

14

8

402

X5R

16V

10%

0.1UF

C9720

1

2

0.1UF

402

X5R

16V

10%

C9721

1

2

CERM

6.3V

20%

10uF

805-1

C9731

1

2

SOD-123

B0530WXF

D9710

12

SM-LF

0.5AMP-13.2V

CRITICAL

F9710

12

051-7039

21

9797

External Display Conns

SYNC_DATE=(MASTER)

SYNC_MASTER=M51_DAVE

DVI_HPD_UF

TMDS_CLK_P

VGA_RED

TMDS_CONN_DP<2>

TMDS_DATA_N<2>

VGA_BLU

TMDS_CONN_DN<1>

TMDS_CONN_DP<1>

DVI_CHASSIS_33

GND_CHASSIS_DVI

VGA_HSYNC

TMDS_CONN_DN<2>

TMDS_CONN_DP<0>

TMDS_CONN_CLKN

TMDS_CONN_CLKP

TMDS_CONN_DN<0>

VGA_VSYNC

VGA_GRN

DVI_HPD_UF

DVI_DDC_CLK_UF

DVI_DDC_DATA_UF

TMDS_DATA_P<0>

TMDS_CONN_DP<0>

TMDS_CONN_DP<2>

VIDEO_MUX_RED

DVI_DDC_DATA_UF

=PP3V3_S0_VIDEO

DVI_DDC_CLK_UF

TMDS_CONN_CLKP

GPU_VSYNC_BUF

VGA_VSYNC

VIDEO_MUX_BLU

GPU_TV_Y

GPU_GRN

GPU_TV_COMP

GPU_HSYNC_BUF

GPU_V2SYNC

PP5V_S0_DDC

VGA_HSYNC

GPU_DDC_A_DATA

=PP3V3_S0_VIDEO

GPU_DDC_A_CLK

DVI_DDC_DATA

DVI_DDC_CLK

GPU_HPD

GPU_TV_C

GPU_RED

VIDEO_MUX_GRN

SB_CRT_TVOUT_MUX

TMDS_CONN_CLKN

TMDS_DATA_P<1>

TMDS_CONN_DP<1>

TMDS_CONN_DN<2>

TMDS_CONN_DN<1>

GPU_H2SYNC

VGA_BLU

VGA_GRN

VGA_RED

VIDEO_MUX_BLU

VIDEO_MUX_GRN

VIDEO_MUX_RED

=PP3V3_S0_VIDEO

TMDS_DATA_P<2>

TMDS_CLK_N

TMDS_CONN_DN<0>

TMDS_DATA_N<1>

GPU_BLU

TMDS_DATA_N<0>

PP5V_S0_DDC

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

VOLTAGE=5V

PP5V_S0

PP5V_S0_DDC_DIODE

MIN_NECK_WIDTH=0.25 mm

VOLTAGE=5V MIN_LINE_WIDTH=0.38 mm

PP5V_S0_DDC_FUSE

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

VOLTAGE=5V

83 75

97

59

94

5

97

85

97

85

97

6

97

85

97

3

97

97 97

85

97

85

3

85

97

22

97

85

97

85

97

3

85

97

85

85 97

3

www.Vinaﬁx.vn

Preliminary

Apple IMAC M51 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual