Apple IMAC M51 Schematics

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

TABLE_TABLEOFCONTENTS_ITEM

CURRENT: REV D 10/17 SCH: REV G

SANTANA - M51 MLB

Schematic / PCB #’s

NEW 630 BOMS AS OF 9/7

PRODUCTION RELEASED

08/04/2006

Power Block Diagram

3

M51_PAUL

3

NB CPU Interface

12 12

08/04/2006

M50_HENRY

55

FUNC TEST 1 OF 2

08/04/2006

M51_HENRY

7

CPU 1 OF 2-FSB

08/04/2006

7

M50_HENRY

CPU 2 OF 2-PWR/GND

08/04/2006

88

M50_HENRY

08/04/2006

M51_DOUG

FW: 1394B-LINK/PHY

4438

68

08/04/2006

AUDIO: CODEC

51

AUDIO

11

M50_HENRY

11

CPU ITP700FLEX DEBUG

08/04/2006

69

AUDIO: LINE INPUT AMP

52

AUDIO

CSA MASTER DATEPDF

CONTENTS

AUDIO: SPEAKER AMP_1

71

08/04/2006

54

AUDIO

FIREWIRE CONNECTORS

46

08/04/2006

40

M51_DOUG

08/04/2006

26

M50_DOUG

26

SB: MISC

M51_PAUL7808/04/2006

3V DC/DC 2.5V

61

1

PCB,SCHEM,MLB,M51

051-7039 SCH1

1

PCB,FAB,MLB,M51

820-1984 MLB1

39 45

08/04/2006

FW: 1394B MISC

M51_DOUG

47

08/04/2006

USB Device Interfaces

41

M51_DOUG

08/04/2006

5443

M51_DOUG

PCI-E CONNECTIONS

SMC & TPM SUPPORT

59

07/31/2006

45

M51_HENRY

60

08/04/2006

LPC+ CONN

46

M51_HENRY

08/04/2006

70

AUDIO: COMBO OUT AMP

53

AUDIO

72

08/04/2006

AUDIO: SPEAKER AMP

55

AUDIO

73

08/04/2006

AUDIO: CONNECTORS

56

AUDIO

74

08/04/2006

AUDIO: POWER SUPPLIES

57

AUDIO

75

08/04/2006

IMVP6 CPU VCore Regulator

58

M51_PAUL

76

(MASTER)

CPU & SYSTEM SENSE

59

M51_DAVE

77

08/04/2006

PWR GOOD

60

M51_PAUL

79

08/04/2006

1.8V & 1.2V VREG

62

M51_PAUL

S0 AND S3 FETS

83

08/04/2006

65

M51_PAUL

84

(MASTER)

MXM PCI-E & PWR

66

M51_DAVE

85

(MASTER)

MXM I/O

67

M51_DAVE

94

(MASTER)

Internal Display Conns

68

M51_DAVE

97

(MASTER)

External Display Conns

69

M51_DAVE

M51_HENRY

08/04/2006

99

CPU DECAPS & VID<>

ASIC TEMP SENSORS

(MASTER)

10

M51_DAVE

10

08/04/2006

13

M50_HENRY

13

NB PEG / Video Interfaces

14

M50_HENRY

14

NB Misc Interfaces

08/04/2006

15

M50_HENRY

15

NB DDR2 Interfaces

08/04/2006

16

M51_HENRY

16

NB Power 1

NB Power 2

08/04/2006

17

M51_HENRY

17

08/04/2006

18

M50_HENRY

18

NB Grounds

(MASTER)

19

M51_DAVE

19

NB (GM) Decoupling

08/04/2006

21

M50_DOUG

21

SB: 1 OF 4

SB: 2 OF 4

08/04/2006

22

M51_DOUG

22

08/04/2006

23

M51_DOUG

23

SB: 3 OF 4

08/04/2006

24

M50_DOUG

24

SB: 4 OF 4

08/04/2006

25

M51_DOUG

25

SB:DECOUPLING

(MASTER)

27

M51_DAVE

27

M51 SMBus Connections

08/04/2006

28

M51_HENRY

28

DDR2 SO-DIMM Connector A

08/04/2006

29

M51_HENRY

29

DDR2 SO-DIMM Connector B

08/04/2006

30

M50_HENRY

30

Memory Active Termination

31

08/04/2006

M50_HENRY

31

Memory Vtt Supply

08/04/2006

32

M50_HENRY

33 CLOCKS

08/04/2006

33

M51_HENRY

34

CLOCKS: TERMINATIONS

08/04/2006

34

M51_DOUG

38

Disk Connectors

08/04/2006

36

M51_DOUG

42

ETHERNET MISC

08/04/2006

37

M51_DOUG

43

ETHERNET CONNECTOR

M51_HENRY

08/04/2006

65

HD AND OD FAN

48

42

AIRPORT CONN

53

08/04/2006

M51_DOUG

58

08/04/2006

SMC44

M51_HENRY

82

08/04/2006

5V DC/DC

64

M51_PAUL

1.5V_S0 & 1.05V_S0 VREG

80

08/04/2006

63

M51_PAUL

08/04/2006

35

M50_DOUG

41

ETHERNET CONTROLLER

NB Config Straps

08/04/2006

20

M50_HENRY

20

M51_HENRY

TPM67

08/04/2006

50

POWER CONN / MISC

M51_PAUL

08/04/2006

66

CSAPDF MASTER

CONTENTS

DATE

2

M51_PAUL

08/04/2006

System Block Diagram

2

M51_HENRY

08/04/2006

CPU FAN, HD & OD TEMP

49 66

63

08/04/2006

SPI BOOTROM

47

M50_DOUG

BOM Config

M51_DAVE (MASTER)

44

051-7039

SCHEM SANTANA

H

1

97

10/17/06 06/22/04

H

468168 PRODUCTION RELEASED

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SEE I2C PG 27

TEMP SENSE

PG 3

POWER SENSE

SEE POWER BLOCK DIAGRAM

ADC

PAGE 28-29

B,0

A

SMB

U5800

FAN

PAGE 27

CORE (1.05V)

CK410M

PAGE 22

PAGE 63

CONTROL = 2.5V

64-BIT

1.8V/667MHZ

DDR2 - DUAL CHAN

J2800

AZALIA

U6800

STA9221

PAGE 68

PORT A

J2901 ALS+AMBIENT TSENS P. 59

U6300/01

FSB

USB

CONNECTORS

CAMERA

JE310/JE320/JE330

PAGE 47

4-BIT (3.3V/33MHZ)

PAGE 67

CAMERA

PAGE 47

JE351

IR RCV

PAGE 58

IR

7

PAGE 47

J5300 (AIRPORT CONN)

TPM

LPC+

JE350

NB- GM

(TMDS - VGA)

2 Diff pairs

JE000, JE001

FIREWIRE B CONNECTORS

PAGE 21

PAGE 14

DMI

PAGE 16-17

CORE (1.05V)

J5300

0

1.2V/1.5GHZ

PAGE 15

PCI-E

PAGE 12

U1200

MAIN MEMORY

PAGE

6DUAL CHANNEL LVDS - 6BIT

MXM CONNECTOR

LVDS

PAGE 97 PAGE 94

8-BIT

TSB82AA2

33MHZ

PAGE 46

3.3V/133MHZ

PAGE 38

OPTICAL

CONNECTOR

PCI-E

UATA

PAGES 84-85

J8400

U2100

667MHZ

J0700

CORE

CONNECTOR

SATA

JC900

(1.83/2.17GHZ)

PAGE 7

PAGE 8

CORE (~1.2V)

CPU

MINI-DVI

(INTERNAL)

J9402J9700

SB

SATA2

PAGE 38

HARD DRIVE

SATA0

PAGE 21

SATA

UATA/133

UATA

JC901

PORT

#0

#2-5

PAGE 22

#1

MINI-PCIE

PAGE 53

AIRPORT

X1 - 1.5GHZ

YUKON

GIG ETHERNET

ETHERNET CONNECTOR

JD600

PAGE 43

U4101

PAGE 41

PAGES 30

PARALLEL

TERM

J2900

DIMM

PAGE 21

PORT PORT

PAGE 22

PCI

DMI

PAGE 22 PAGE 22

SPI

PAGE 21

04

J5300

3,7

2 3

156

PAGE 48

J4700

CONN

BT

USB

AIRPORT

U3301

DIMM’S

J2900

J2800

PAGE 24

GPIOS

PAGE 23

ITP CONN

J1101

PAGE 11

PAGE 60

J6000

PAGE 34

TERMS

CLOCKS

PAGE 33

CK410

U3301

64-BIT

4 Diff pairs

MISC

SPI

CONN

DMI

SMC

U6700

4-BIT

LPC

0,2,4

BOOTROM

SMB

100MHZ

FIREWIRE B

2

PAGE 45

1

TSB81BA3

32-BIT

PAGE 73

COMBO OUT CONNECTOR

J7303

OPTICAL OUT

S/PDIF

R/L SPEAKER

CONNECTORS

PAGE 73

J7301,J7302

LINE OUT

PAGE 72

SPEAKER

AMP

AUDIO CODEC

PORT B

PORT C

MIC IN

JE350

BNDI

INTERFACE

PORT F

CONNECTOR

J7303

OPTICAL IN

COMBO IN

LINE IN

PAGE 73

PAGE 44

FIREWIRE B

13

PAGE 14

1.2V/800MHZ

J6500,J6501,J6600 FAN CONNS

SYNC_DATE=08/04/2006SYNC_MASTER=M51_PAUL

2

H

051-7039

97

System Block Diagram

www.Vinaﬁx.vn

Preliminary

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

?A PEAK

1.7A AVG

PAGE 75

SWITCHER

34A AVG

36A PEAK

CPU VCORE (1.25V)

3.5A PEAK

230W AC/DC POWER SUPPLY

5V, 3.4A PK [2.2A AVG]

U7600

ISENSE AND VSENSE

PAGE 80

SWITCHER

2.4A AVG

1.2A AVG FET PG 83

PAGE 31

1.0A PEAK

0.4A AVG LINEAR

PAGE 79

SWITCHER

6.3A AVG

14.5A PEAK

7.4A PEAK

5.5A AVG

0.4A PEAK

0.3A AVG

PAGE 79

4.5A AVG SWITCHER

8.4A PEAK

PAGE 81

12V, 14.5A PK [9.4A AVG]

MXM_PWRSRC (12V) U8450

ISENSE + VSENSE

FET PG 83

?A AVG FET PG 83

?A AVG

?A PEAK

AC/DC BOARD

1.7A PEAK

SWITCHER PAGE 82

?A PEAK ?A AVG

1.5A AVG

12V, ?A

LINEAR

0.1A PEAK

0.1A AVG

LINEAR

0.2A AVG

HDD

ODD

SWITCHER PAGE 78

3.4A AVG

6.0A PEAK

FET PG 83

AC/DC

0.3A AVG

0.4A PEAK

FET PG ?

3.0A AVG

3.3A PEAK

S5 S5

SYSTEM (12V) ISENSE AND VSENSE U7650

ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)

ONLY ON IN RUN

"S0" RAILS

"S5" RAILS

"S3" RAILS

ON IN RUN AND SLEEP

0.6A PEAK

0.2A AVG LINEAR

GRAPHICS

0.6A PEAK

0.2A AVG

PAGE 83

LINEAR

PAGE 45

24V, ?A

FET PG 83

3.4A PEAK

2.2A AVG

FET PG 83

24V, 3.7A PK [3.3A AVG]

0.9A AVG

1.1A PEAK

FET PG 83

1.5A PEAK

LINEAR PG 82

3.3V, 7.1A PK [4.1A AVG]

0.2A PEAK

5.8A PEAK

PAGE 78

5 78

83

21

XW302

SM

OMIT

21

L300

TH-VERT-LF

1UH-20A-4.5MOHM

21

XW301

OMIT

SM

SYNC_MASTER=M51_PAUL

3 97

H

051-7039

Power Block Diagram

SYNC_DATE=08/04/2006

VOLTAGE=1.5V

PP1V5_S0

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.15MM

PP2V5_S0

MAKE_BASE=TRUE

PP1V95_S5

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

VOLTAGE=1.95V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

PP3V3_S5

MIN_NECK_WIDTH=0.2MM

VOLTAGE=3.3V

MAKE_BASE=TRUE

VOLTAGE=2.5V

PP2V5_S5

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.3MM

=PP1V5_S0_SB_VCCSATAPLL

=PP1V5_S0_NB_3GPLL

=PP1V5_S0_SB_VCC1_5_A

=PP1V5_S0_NB_PLL

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25MM

PP12V_S5

MIN_LINE_WIDTH=0.60MM

VOLTAGE=12V

=PP1V5_S0_CPU

=PPV_S0_MXM_PWRSRC

VOLTAGE=3.3V

PP3V3_S3

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

=PP3V3_S3_BT =PP3V3_S3_I2C

=PP3V3_S3_FW

MIN_NECK_WIDTH=0.2MM

PP5V_S5

VOLTAGE=5V

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

=PP1V8_S3_1V2_LDO

PP1V8_S3

MIN_LINE_WIDTH=0.6MM

VOLTAGE=1.8V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

PP1V8_S0

VOLTAGE=1.8V

MAKE_BASE=TRUE

=PP5V_S0_MEMVTT

=PP5V_S0_AUDIO

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

VOLTAGE=5V

PP5V_S3

=PP3V3_S5_SB

=PP3V3_S5_SB_USB

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S5_SB_IO

=PP5V_S0_PATA

=PP3V3_S5_DEBUG

=PP1V95_S5_FWPHY

=PP3V3_S3_TPM

=PP5V_S0_DEBUG

PP24V_S0

MIN_NECK_WIDTH=0.25MM

VOLTAGE=24V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

PP24V_S5

VOLTAGE=24V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

=PPV_S0_INVERTER

=PPV_S5_FW

=PP3V3_S5_SB_PM

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA

=PP3V3_S5_FW

=PP3V3_S5_SMC

=PP3V3_S5_2V5_LDO

=PP3V3_S5_ROM

=PP5V_S0_MXM

=PP1V2_S3_LAN

=PP5V_S3_BNDI

=PP4V5_S5_AUDIO_ANALOG

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

PP4V5_S5_AUDIO_ANALOG

MIN_NECK_WIDTH=0.25MM

VOLTAGE=4.5V

=PPSPD_S0_MEM

=PP3V3_S0_VIDEO

=PP3V3_S0_TPM

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_SB_VCC3_3_PCI

=PP3V3_S0_SB_VCC3_3

=PP3V3_S0_SB_PCI

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S0_SB

=PP3V3_S0_SATA

=PP3V3_S0_PATA

=PP3V3_S0_ODD_TSENS

=PP3V3_S0_NB_VCC_HV

=PP3V3_S0_NB

=PP3V3_S0_HD_TSENS

=PP3V3_S0_FAN

=PP3V3_S0_CK410

=PP3V3_S0_AIRPORT

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

PP5V_S0

MIN_NECK_WIDTH=0.25MM

=PP3V3_S0_IMVP

=PP3V3_S0_AUDIO

=PP3V3_S3_ENET

=PP5V_S5_SB

=PP5V_S3_USB

=PP5V_S0_SB

=PP5V_S0_SATA

=PP5V_S5_AUDIO_LDO

=PPV_S0_LCD

=PP12V_S0_FAN

=PP3V3_S0_MXM

=PP3V3_S0_SB_GPIO

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S0_SB_PM

MAKE_BASE=TRUE

PP3V3_S0

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.30MM

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

VOLTAGE=1.8V

PP1V2_S3

=PP12V_S5_AUDIO_SPKRAMP

MAKE_BASE=TRUE

PP12V_S5_AUDIO_SPKRAMP

MIN_NECK_WIDTH=0.15MM

VOLTAGE=12V

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

PP12V_S0

=PP12V_S0_SATA

VOLTAGE=0.9V

MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE

PP0V9_S0

MIN_LINE_WIDTH=0.3MM

=PP1V8_S0_MXM

=PP1V8_S3_MEM_NB

=PP1V8_S0_MEMVTT

=PP1V8_S3_MEM

=PP0V9_S0_MEM_TERM

=PP0V9_S0_MEMVTT_LDO

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

VOLTAGE=1.25V

PPVCORE_CPU

=PPVCORE_S0_CPU

PP12V_S5_CPU_REG

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.15MM

VOLTAGE=12V

PP12V_S0_B

MIN_NECK_WIDTH=0.15MM

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

VOLTAGE=12V

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.3MM

MAKE_BASE=TRUE

PP1V05_S0

=PPVCORE_S0_SB

=PPVCORE_S0_NB

=PP1V05_S0_SB_CPU_IO

=PP1V05_S0_NB_VTT

=PP1V05_S0_FSB_NB

=PP1V05_S0_CPU

=PP2V5_S0_NB_VCCA_3GBG

=PP2V5_S0_MXM

=PP1V5_S0_SB_VCCUSBPLL

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB

=PP1V5_S0_NB_VCCD_HMPLL

=PP1V5_S0_NB_VCCAUX

=PP1V5_S0_NB_TVDAC

=PP1V5_S0_NB_PCIE

=PP1V5_S0_NB

=PP1V5_S0_AIRPORT

83 80

84

79

83

78

82

76

77

83 80

45 76

82 79

41 66

80 78 97

74

27 65

79

83

77 83

73

26

11

26

78

53

75

83

26

46

59

66

75

72

43

27

10

19

76

80

25

9

19

80

83

6

25

77

27

45

59

79

83

25

45

83 83

23

45

58

29

97

25

19

20

65

34

59

71

42

66

23

25

6

79

72

16

29

30

75

9

83

34

25

19

24

19

8

19

25

17

5

78

45

5

24

19

24

19

76

8

84

6

47

44

5

79

5

83

31

70

59

23

22

24

22

38

60

44

67

60

5 6

94

46

11

24

44

27

78

63

84

42

47

68

82

28

94

67

24

26

24

22

6

38

66

17

14

66

59

33

53

5

75

68

41

25

47

25

6

82

94

65

85

21

24

26

5

71

83

6

79

84

14

31

28

29

31

5

8

75

76

5

24

16

21

17

12

7

17

85

24

25

17

16

19

13

19

53

www.Vinaﬁx.vn

Preliminary

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_5_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_ALT_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

BOMOPTION Groups

Production BOM

BarCode Label / EEE #’s

MEROM BOM OPTION DUE TO PAGE 76 SHARING W/ M50

MUST STUFF WHEN MXM_PWR_SENSE IS NOT STUFFED (IF THIS MOVES TO DEV BOM)

BATTERY IS INSTALLED AT FATP

CHIPSET, ROMS, ETC.

Misc. Parts

(338S0274)

(335S0384)

PROCESSORS

Alternate Parts

WHEN DEVELOPMENT SENSORS ARE GONE

PULL-DOWNS FOR UNUSED PINS

WHEN DEVELOPMENT SENSORS ARE GONE

PULL-DOWNS FOR UNUSED PINS

WHEN DEVELOPMENT SENSORS ARE GONE

PULL-DOWNS FOR UNUSED PINS

MUST STUFF WHEN SYS_PWR_SENSE IS NOT STUFFED (I.E. WHEN DEVELOPMENT BOM IS NOT STUFFED)

(335S0382)

SENSOR STUFFING OPTIONS

MUST STUFF WHEN CPU_PWR_SENSE IS NOT STUFFED (IF THIS MOVES TO DEV BOM)

Development BOM

BOM Config

SYNC_DATE=(MASTER)

974

H

051-7039

SYNC_MASTER=M51_DAVE

MEROM 2.16GHZ, M51

CPU337S3390 1

M51_BETTER

CRITICAL

116S0090

RES,10K-OHM,5%,0402

NOSTUFF

C7612

1

C7602

1

NOSTUFF

116S0090

RES,10K-OHM,5%,0402

C8459

1

116S0090 PRODUCTION

RES,10K-OHM,5%,0402

IO ALIGNMENT BOARD, M51

1 PCB2820-2038 CRITICAL

IO ALIGNMENT BOARD ADHESIVE

946-0743 1 ADH1 CRITICAL

116S0090

C7650

1

RES,10K-OHM,5%,0402

PRODUCTION

1

RES,10K-OHM,5%,0402

C7650

116S0090 PRODUCTION

IC,88E8053,GIGABIT ENET XCVR,64P QFN,NO

U4101 CRITICAL338S0270 1

CRITICAL

MEROM 2.33GHZ, M51

M51_BEST337S3392 CPU1

1

PRODUCTION

RES,0-OHM,2010

R7650

102S0699

Sanyo alt for Nich.

ALL

126S0078126S0086

BAT,COIN,3V,220MAH,CR2032

BT2600 CRITICAL1 NOSTUFF742-0048

C8458

1

116S0090 PRODUCTION

RES,10K-OHM,5%,0402

RES,0-OHM,2512

R8450

107S0070

1

PRODUCTION

CPU_TSENS_INT,SYS_PWR_SENSE,MXM_PWR_SENSE

M51_DEV1

COMMON,M51_COMMON1,M51_COMMON2,ALTERNATE

M51_COMMON

CPU_TSENS_EXT,GPU_TSENS_INT,GPU_TSENS_EXT,MXM_ROM,NBCFG_PEG_REVERSE

M51_COMMON1

SB_SYSRST_4_PVT,ITP,MEROM,AMB_TSENS,CPU_PWR_SENSE

M51_COMMON2

DEVELOPMENT,M51_DEV1

M51_DEVELOPMENT

BAR CODE LABLE, MLB, M51

[EEE:WZD]

EEE_WZDCRITICAL825-6447 1

BAR CODE LABLE, MLB, M51

[EEE:WZC]

EEE_WZCCRITICAL825-6447 1

U1200 CRITICAL

IC,945PM,NORTHBRIDGE

338S0328 1

CRITICALU33011

IC,SLG84435,CLK GEN,68PIN QFN

359S0117

IC,SMC,M51

CRITICAL1 U5800341T0020

IC,EFI BOOT ROM,M51

U6301341T0019 CRITICAL1

IC,TPM,TSSOP,28P

U6700341S1789 CRITICAL TPM1

IC,ENET LAN ROM

341S1797 U41021 CRITICAL

630-7899

PCBA,MLB,2.33GHz,M51

M51_COMMON,M51_BEST,EEE_WZD,PRODUCTION

PCBA,MLB,2.16GHz,M51 M51_COMMON,M51_BETTER,EEE_WZC,PRODUCTION

630-7898

PCBA,DEVBOM,M51

603-8960

M51_DEVELOPMENT

IC,2K I2C EEPROM,MXM,M51

341S1892 CRITICALU85701 MXM_ROM

IC,CPU VREG,IMVP,TWO PHASE,SCREENED

CRITICAL353S1465 U75001

CRITICAL

IC,SB,652BGA

1 U2100343S0385

J0700 CRITICAL

IC,CPU-SKT,479BGA

1511S0025

126S0068 126S0088

Sanyo alt for Nich.

ALL

Sanyo alt for Nich.

126S0099 126S0073

ALL

124-0339124-0361

SANYO ALT

ALL

378S0141

GREEN LED ALT.

378S0140

ALL

U7500

353S1461

CPU VREG NEW REV

353S1465

ALL

CAP CONSOLIDATION

138S0567 138S0516

ALL

376S0388 376S0444

ON SEMI 2ND SRC FOR IR

DVI DDC (LITTLEFUSE)

F9710

740S0028740S0044

www.Vinaﬁx.vn

Preliminary

PP

IN

PP

IN

PP

IN

PP

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

LAYOUT: PLACE CLOSE TO DESTINATION

* OPPOSITE END FROM CLOCK BUFFER

FSB SIGNALS

MISC GROUND VIAS

LAYOUT NOTE: PLACE NEAR SOUTHBRIDGE

SPARE USB PORT

ALL I2C BUSSES (PLACE IN ACCESSIBLE LOCATION TOP SIDE)

LAYOUT NOTE: PLACE NEAR NORTHBRIDGE

INVERTER DOES NOT USE THIS SIGNAL

1

PP6C5

OMIT

SM

P4MM

1

PP6C4

P4MM

SM

OMIT

1

PP6C6

SM

OMIT

P4MM

1

PP6C8

SM

P4MM

OMIT

1

PP6C7

OMIT

P4MM

SM

1

PP6D0

SM

P4MM

OMIT

1

PP6D3

SM

P4MM

OMIT

1

PP6D4

SM

P4MM

OMIT

1

PP6D8

P4MM

SM

OMIT

1

PP6D9

SM

OMIT

P4MM

1

PP6E0

P4MM

OMIT

SM

1

PP6E1

P4MM

OMIT

SM

58 59 60

58 60

7

11

7

11

7

11

7

11

7

11

58 59 60

59

5

59

5

26

1

ZH500

HOLE-VIA

1

ZH501

HOLE-VIA

1

ZH502

HOLE-VIA

1

ZH503

HOLE-VIA

1

ZH504

HOLE-VIA

1

ZH505

HOLE-VIA

1

ZH506

HOLE-VIA

1

ZH507

HOLE-VIA

1

ZH508

HOLE-VIA

1

ZH509

HOLE-VIA

1

ZH510

HOLE-VIA

1

ZH511

HOLE-VIA

1

ZH512

HOLE-VIA

1

ZH513

HOLE-VIA

1

ZH514

HOLE-VIA

1

ZH515

HOLE-VIA

1

ZH516

HOLE-VIA

1

ZH517

HOLE-VIA

1

ZH518

HOLE-VIA

1

ZH519

HOLE-VIA

1

ZH520

HOLE-VIA

1

ZH521

HOLE-VIA

1

ZH522

HOLE-VIA

1

ZH523

HOLE-VIA

1

ZH524

HOLE-VIA

1

ZH525

HOLE-VIA

1

ZH526

HOLE-VIA

1

ZH527

HOLE-VIA

1

ZH528

HOLE-VIA

1

ZH529

HOLE-VIA

1

PP600

SM

OMIT

P4MM

1

PP601

SM

P4MM

OMIT

1

PP604

SM

OMIT

P4MM

1

PP605

OMIT

P4MM

SM

1

PP611

SM

OMIT

P4MM

1

PP610

P4MM

OMIT

SM

1

PP612

SM

OMIT

P4MM

1

PP613

P4MM

OMIT

SM

13 84

84

13 84

I473

I474

I475

I476

I477

I478

I479

I480

I481

I482

I483

68

59

68

59

68

NC_AUD_BI_PORT_E_L

68

59

68

84

1

PP626

OMIT

P4MM

SM

1

PP627

SM

OMIT

P4MM

I513

10

NB_TSENS_HS_DXP

10

NB_TSENS_HS_DXN

11 34

CPU_XDP_CLK_N

11 34

CPU_XDP_CLK_P

11

7

11

7

11

7

11

7

11

7

11

7

11 26

5

26

5

59

21 58 60 67

5

21 58 60 67

22 58 60

23 58 60 67

21 59 60

6

60

23 58 60 67

34 60

58 60

23 58 60 67

58 59 60

23 60

58 60

58 76

94

85 94

8

75

8

75

8

75

8

75

8

75

8

75

8

75

14 23 75

5

14 26 75

7

21 75

23 26

26 58 77 84

23 58 77

3

75 76

23 58 77 79 80

3 5 6

26 65 66 76 77 78 79 80

83

3

78 83

3

79 83

3

80

3

79

3

34 80

3 5

59 75 77 78 79 80 82 83

7

11

3

59 75 83 97

3 5 6

26 65 66 76 77 78 79 80

83

3 5

59 75 77 78 79 80 82 83

3 6

10 26 27 41 45 76 83 84

3

83

73

NC_J7302_3

73

29

1

PP621

OMIT

SM

P4MM

1

PP666

P4MM

OMIT

SM

1

PP665

OMIT

SM

P4MM

1

PP673

OMIT

SM

P4MM

1

PP674

OMIT

SM

P4MM

1

PP675

P4MM

OMIT

SM

H

5 97

051-7039

FUNC TEST 1 OF 2

SYNC_MASTER=M51_HENRY

SYNC_DATE=08/04/2006

NO_TEST=TRUE

PEG_R2D_P<2>

NO_TEST=TRUE

PEG_R2D_N<4>

NO_TEST=TRUE

PEG_R2D_P<5>

NO_TEST=TRUE

PEG_R2D_C_N<0>

NO_TEST=TRUE

NC_SMS_Z_AXIS

NC_SMS_Y_AXIS

NO_TEST=TRUE

NC_AUD_VREF_PORT_C

NC_ALS_GAIN

NO_TEST=TRUE

NC_AUD_BI_PORT_G_L

NO_TEST=TRUE

NC_SMC_P22

NO_TEST=TRUE

NC_SMC_BATT_CHG_EN

NO_TEST=TRUE

PEG_D2R_P<2>

NC_SMC_P21

NO_TEST=TRUE

NC_SMC_P26 NC_SMC_P27

NO_TEST=TRUE

NC_SMC_SYS_ISET

NO_TEST=TRUE

NC_SMC_P20

NO_TEST=TRUE

NC_SMC_BATT_VSET

NO_TEST=TRUE

NC_SMC_BATT_TRICKLE_EN_L

NO_TEST=TRUE

LVDS_BKLTEN

TP_USB_F_P

MAKE_BASE=TRUE

USB_F_N

TP_USB_F_N

MAKE_BASE=TRUE

PEG_D2R_N<0>

NO_TEST=TRUE

PEG_D2R_P<0>

PEG_D2R_P<1>

NO_TEST=TRUE

PEG_D2R_N<2>

NO_TEST=TRUE

PEG_D2R_N<4>

PM_DPRSLPVR

FUNC_TEST=TRUE

PEG_R2D_N<1>

NO_TEST=TRUE

PCI_CLK_SMC

PCI_CLK_FW

SPI_SI

PCIE_B_D2R_N

IDE_PDIORDY IDE_PDD<9>

IDE_PDIOR_L

DMI_N2S_P<0>

USB_F_P

MAKE_BASE=TRUE

TP_LVDS_BKLTEN

SMBUS_SB_SDA

VR_PWRGOOD_DELAY

SMBUS_SMC_A_S3_SCL

SMBUS_SB_SCL

DMI_S2N_P<0>

NB_RST_IN_L_R

FUNC_TEST=TRUE

XDP_TRST_L

FUNC_TEST=TRUE

SMC_TCK

MAKE_BASE=TRUE

NC_NB_CFG<17>

MAKE_BASE=TRUE

NC_NB_CFG<15>

MAKE_BASE=TRUE

NC_NB_CFG<14>

NC_NB_CFG<11>

MAKE_BASE=TRUE

NC_NB_CFG<8>

MAKE_BASE=TRUE

NC_NB_CFG<10>

MAKE_BASE=TRUE

NB_CFG<10>

NB_CFG<13>

NB_CFG<17>

NB_CFG<15>

NB_CFG<14>

MAKE_BASE=TRUE

NC_NB_CFG<13>

NB_CFG<6>

NC_NB_CFG<4>

MAKE_BASE=TRUE

NC_NB_CFG<3>

MAKE_BASE=TRUE

NB_CFG<3>

NC_NB_CFG<6>

MAKE_BASE=TRUE

NB_CFG<4>

NB_CFG<8>

NB_CFG<11>

NB_CFG<12>

NC_NB_CFG<12>

MAKE_BASE=TRUE

PEG_D2R_N<1>

NO_TEST=TRUE

PEG_D2R_N<3>

NO_TEST=TRUE

PEG_D2R_P<4>

NO_TEST=TRUE

PEG_D2R_N<6>

NO_TEST=TRUE

PEG_D2R_P<5>

NO_TEST=TRUE

PEG_D2R_N<5>

NO_TEST=TRUE

PEG_D2R_P<6>

NO_TEST=TRUE

PEG_D2R_P<7>

NO_TEST=TRUE

PEG_D2R_N<7>

NO_TEST=TRUE

PEG_D2R_N<8>

NO_TEST=TRUE

PEG_R2D_N<3>

NO_TEST=TRUE

PEG_R2D_P<3>

NO_TEST=TRUE

PEG_R2D_P<4>

NO_TEST=TRUE

PEG_R2D_N<5>

NO_TEST=TRUE

PEG_R2D_N<6>

NO_TEST=TRUE

PEG_R2D_P<6>

NO_TEST=TRUE

PEG_R2D_N<8>

NO_TEST=TRUE

PEG_R2D_N<7>

NO_TEST=TRUE

PEG_R2D_P<7>

NO_TEST=TRUE

PEG_D2R_P<8>

NO_TEST=TRUE

PEG_D2R_N<10>

NO_TEST=TRUE

PEG_D2R_N<9>

NO_TEST=TRUE

PEG_D2R_P<9>

NO_TEST=TRUE

PEG_D2R_P<10>

NO_TEST=TRUE

PEG_D2R_N<11>

NO_TEST=TRUE

PEG_D2R_P<11>

NO_TEST=TRUE

PEG_D2R_N<12>

NO_TEST=TRUE

PEG_D2R_P<12>

NO_TEST=TRUE

PEG_D2R_N<13>

NO_TEST=TRUE

PEG_D2R_P<13>

NO_TEST=TRUE

PEG_D2R_P<14>

NO_TEST=TRUE

PEG_D2R_N<14>

NO_TEST=TRUE

PEG_D2R_N<15>

NO_TEST=TRUE

PEG_D2R_P<15>

NO_TEST=TRUE

PEG_R2D_P<8>

NO_TEST=TRUE

PEG_R2D_P<9>

NO_TEST=TRUE

PEG_R2D_N<9>

NO_TEST=TRUE

PEG_R2D_N<10>

NO_TEST=TRUE

PEG_R2D_P<10>

NO_TEST=TRUE

PEG_R2D_N<11>

NO_TEST=TRUE

PEG_R2D_P<11>

NO_TEST=TRUE

PEG_R2D_N<12>

NO_TEST=TRUE

PEG_R2D_P<12>

NO_TEST=TRUE

PEG_R2D_P<13>

NO_TEST=TRUE

PEG_R2D_N<13>

NO_TEST=TRUE

PEG_R2D_N<14>

NO_TEST=TRUE

PEG_R2D_P<14>

NO_TEST=TRUE

PEG_R2D_N<15>

NO_TEST=TRUE

PEG_R2D_P<15>

NO_TEST=TRUE

PEG_R2D_C_N<1>

NO_TEST=TRUE

PEG_R2D_C_P<1>

PEG_R2D_C_N<2>

NO_TEST=TRUE

PEG_R2D_C_P<2>

NO_TEST=TRUE

PEG_R2D_C_N<3>

NO_TEST=TRUE

PEG_R2D_C_P<3>

NO_TEST=TRUE

PEG_R2D_C_N<4>

NO_TEST=TRUE

PEG_R2D_C_P<4>

NO_TEST=TRUE

PEG_R2D_C_N<5>

NO_TEST=TRUE

PEG_R2D_C_P<5>

NO_TEST=TRUE

PEG_R2D_C_N<6>

NO_TEST=TRUE

PEG_R2D_C_P<6>

NO_TEST=TRUE

PEG_R2D_C_N<7>

NO_TEST=TRUE

PEG_R2D_C_P<7>

NO_TEST=TRUE

PEG_R2D_C_N<8>

NO_TEST=TRUE

PEG_R2D_C_P<8>

NO_TEST=TRUE

PEG_R2D_C_N<9>

NO_TEST=TRUE

PEG_R2D_C_P<9>

NO_TEST=TRUE

PEG_R2D_C_N<10>

NO_TEST=TRUE

PEG_R2D_C_P<10>

NO_TEST=TRUE

PEG_R2D_C_N<11>

NO_TEST=TRUE

PEG_R2D_C_P<11>

NO_TEST=TRUE

PEG_R2D_C_N<12>

NO_TEST=TRUE

PEG_R2D_C_P<12>

NO_TEST=TRUE

PEG_R2D_C_P<13>

NO_TEST=TRUE

PEG_R2D_C_N<13>

NO_TEST=TRUE

PEG_R2D_C_N<14>

NO_TEST=TRUE

PEG_R2D_C_P<14>

NO_TEST=TRUE

PEG_R2D_C_N<15>

NO_TEST=TRUE

PEG_R2D_C_P<15>

NO_TEST=TRUE

NC_SMC_P23

NO_TEST=TRUE

NC_SMS_X_AXIS

NO_TEST=TRUE

NC_AUD_VREF_PORT_D

NO_TEST=TRUE

PCI_CLK_SB

PCIE_B_D2R_P

DMI_N2S_N<0>

SPI_SO

LPC_FRAME_L

MEM_VREF_NB_0

MEM_VREF_NB_1

DMI_S2N_N<0>

PCI_GNT3_L

TP_PCI_GNT3_L

MAKE_BASE=TRUE

NO_TEST=TRUE

PEG_R2D_C_P<0>

PEG_D2R_P<3>

NO_TEST=TRUE

FUNC_TEST=TRUE

SW_RST_BTN_L

FUNC_TEST=TRUE

XDP_TCK

FUNC_TEST=TRUE

SMC_RX_L

FUNC_TEST=TRUE

XDP_TDI

FUNC_TEST=TRUE

XDP_TDO

FUNC_TEST=TRUE

POWER_BUTTON_L

FUNC_TEST=TRUE

XDP_TMS

FUNC_TEST=TRUE

SMC_MANUAL_RST_L

FUNC_TEST=TRUE

SMC_TDO

FUNC_TEST=TRUE

SMC_TDI

FUNC_TEST=TRUE

SMC_TMS

FUNC_TEST=TRUE

SMC_TRST_L

FUNC_TEST=TRUE

SMC_TX_L

FUNC_TEST=TRUE

ITPRESET_L

FUNC_TEST=TRUE

XDP_BPM_L<4>

FUNC_TEST=TRUE

XDP_BPM_L<5>

FUNC_TEST=TRUE

NC_SMC_BATT_ISET

NO_TEST=TRUE

PEG_R2D_P<1>

PEG_R2D_N<2>

NO_TEST=TRUE

FUNC_TEST=TRUE

XDP_BPM_L<2>

FUNC_TEST=TRUE

XDP_BPM_L<3>

FUNC_TEST=TRUE

XDP_BPM_L<0>

FUNC_TEST=TRUE

XDP_BPM_L<1>

FUNC_TEST=TRUE

XDP_DBRESET_L

FUNC_TEST=TRUE

POWER_BUTTON_L

FUNC_TEST=TRUE

SW_RST_BTN_L

FUNC_TEST=TRUE

LPC_AD<0>

FUNC_TEST=TRUE

LPC_AD<2>

FUNC_TEST=TRUE

LPC_AD<1>

FUNC_TEST=TRUE

LPC_AD<3>

PM_CLKRUN_L

FUNC_TEST=TRUE

DEBUG_RST_L

FUNC_TEST=TRUE

PCI_CLK_PORT80

FUNC_TEST=TRUE

FWH_INIT_L

FUNC_TEST=TRUE

INT_SERIRQ

FUNC_TEST=TRUE

PM_SUS_STAT_L

FUNC_TEST=TRUE

SMC_MD1

FUNC_TEST=TRUE

SMC_NMI

FUNC_TEST=TRUE

SMC_RST_L

FUNC_TEST=TRUE

SV_SET_UP

FUNC_TEST=TRUE

ISENSE_CAL_EN

CPU_VID<0>

FUNC_TEST=TRUE

INV_ENABLE_BL

FUNC_TEST=TRUE

LCD_PWM

FUNC_TEST=TRUE

CPU_VID<1>

FUNC_TEST=TRUE

CPU_VID<2>

FUNC_TEST=TRUE

CPU_VID<3>

FUNC_TEST=TRUE

CPU_VID<4>

FUNC_TEST=TRUE

CPU_VID<5>

FUNC_TEST=TRUE

CPU_VID<6>

FUNC_TEST=TRUE

CPU_DPRSTP_L

FUNC_TEST=TRUE

VR_PWRGOOD_DELAY

FUNC_TEST=TRUE

ALL_SYS_PWRGD

FUNC_TEST=TRUE

VR_PWRGD_CK410

FUNC_TEST=TRUE

PM_SLP_S3_L

FUNC_TEST=TRUE

PM_SLP_S4_L

FUNC_TEST=TRUE

PP2V5_S5

FUNC_TEST=TRUE

PP3V3_S5

FUNC_TEST=TRUE

PPVCORE_CPU

FUNC_TEST=TRUE

PP1V8_S3

FUNC_TEST=TRUE

PP1V2_S3

FUNC_TEST=TRUE

PP5V_S5

FUNC_TEST=TRUE

PP5V_S0

PP3V3_S5

FUNC_TEST=TRUE

PP5V_S5

PP3V3_S0

FUNC_TEST=TRUE

PP24V_S0

FUNC_TEST=TRUE

BOOT_LPC_SPI_L

FUNC_TEST=TRUE

LPC_FRAME_L

SMBUS_SMC_A_S3_SDA

FUNC_TEST=TRUE

PP1V5_S0

FUNC_TEST=TRUE

PP1V05_S0

SB_CLK100M_SATA_N

SB_CLK100M_SATA_P

SB_CLK14P3M_TIMER

FSB_CPURST_L

NC_SMC_SYS_VSET

NO_TEST=TRUE

PEG_R2D_P<0>

NO_TEST=TRUE

PEG_R2D_N<0>

SB_CLK48M_USBCTLR

NC_AUD_VREF_PORT_B

NO_TEST=TRUE

NC_AUD_BI_PORT_H_R

NO_TEST=TRUE

NC_J7302_6

NO_TEST=TRUE

NC_SMC_MEM_ISENSE

NO_TEST=TRUE

NC_AUD_BI_PORT_H_L

NO_TEST=TRUE NO_TEST=TRUE

TP_MEM_B_A<15>

NO_TEST=TRUE

TP_MEM_B_A<14>

NC_AUD_BI_PORT_E_R

NO_TEST=TRUE

67

75

60

63

26

63

58

12

19

58

44

58

54

38

22

14

22

34

54

22

58

21

19

22

34

11

34

13

22

34

22

21

14

22

19

27

5

27

14

22

14

22

5

14

22

27

21

23

7

23

www.Vinaﬁx.vn

Preliminary

125

OUT

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

FROM AC/DC

NEEDED AND THERE IS NO FREE PIN ON THE CONNECTOR

NOT SENDING 3.3V TO THE DRIVE BECAUSE IT IS NOT

TO HDD

SILKSCREEN:RUN

CHASSIS HOLE UPPER RIGHT CORNER OF BOARD

CHASSIS HOLE NEAR POWER SWITCH CONNECTOR (BOT RIGHT)

TO NONPLATED HOLE TO LEFT OF EXTERNAL AUDIO CONNECTORS

SILKSCREEN:1

SYSTEM STATUS

GND RAILS

TO SYS ISENSE

CHASSIS GND

TO NONPLATED SLOT TO RIGHT OF EXTERNAL IO

CHASSIS NEXT TO AUDIO CONNECTORS

CHASSIS HOLE NEAR MXM

LOCATED NORTH OF CPU

HEATSINK BACKER PLATE STANDOFFS

CHASSIS HOLE NEAR ODD CONNECTOR (TOP MID)

AC/DC CONN

SILKSCREEN:2

SILKSCREEN:4

SILKSCREEN:3

21

XW601

OMIT

SM

21

XW602

OMIT

SM

3

14

17

2

U600

CRITICAL

TSSOP

74LC125

2

1

C600

0.1UF

CERM 402

20% 10V

2

1

LED601

2.0X1.25MM-SM

GREEN-3.6MCD

1

ZH631

4P25R3P5

OMIT

2

1

C631

NOSTUFF

0.01UF

402

16V CERM

20%

2

1

R602

402

MF-LF

5% 1/16W

1K

1

ZH630

OMIT

4P25R3P5

2

1

C630

16V CERM

NOSTUFF

402

20%

0.01UF

6

14

47

5

U600

TSSOP

CRITICAL

74LC125

8

14

10

7

9

U600

CRITICAL

TSSOP

74LC125

11

14

13

7

12

U600

CRITICAL

74LC125

TSSOP

21

R612

MF-LF

68

1/16W

5%

402

21

R611

68

1/16W MF-LF

5%

402

21

R614

68

1/16W MF-LF

402

5%

21

R615

TPM

68

MF-LF

1/16W

5%

402

21

R616

68

MF-LF

1/16W

402

5%

21

R617

1/16W MF-LF

68

5%

402

21

R618

1/16W MF-LF

402

68

5%

21

R619

402

5%

68

MF-LF

1/16W

2

1

R600

MF-LF

5%

1K

402

1/16W

2

1

LED602

2.0X1.25MM-SM

GREEN-3.6MCD

2

1

R605

5%

402

DEVELOPMENT

MF-LF

1/16W

1K

2

1

LED600

GREEN-3.6MCD

2.0X1.25MM-SM

DEVELOPMENT

9

8

7

6

5

4

3

2

12

11

10

1

J601

M-RT-TH

HM9606E-M2

CRITICAL

2

1

LED603

GREEN-3.6MCD

2.0X1.25MM-SM

2

1

R601

5%

MF-LF

1/16W

402

3.3K

2

1

R604

402

5%

MF-LF

1/16W

1K

2

1

LED604

GREEN-3.6MCD

2.0X1.25MM-SM

2

1

C620

5% 50V CERM 402

NOSTUFF

100PF

2

1

C621

402

CERM

50V

5%

NOSTUFF

100PF

2

1

R606

402

1.5K

MF-LF

1% 1/16W

3

2

1

C622

5% 50V CERM 402

100PF

NOSTUFF

21

XW603

OMIT

SM

1

ZH611

OMIT

4P25R3P5

2

1

C624

100UF

20% 16V ELEC

6.3X5.5-SM

NOSTUFF

2

1

C623

ELEC SM

6.3V

20%

150UF

NOSTUFF

1

SDF600

TH

HSK-NUT-6.5MM

1

SDF601

HSK-NUT-6.5MM

TH

1

ZH632

4P25R3P5

OMIT

1

ZH633

4P25R3P5

OMIT

2

1

C633

NOSTUFF

402

16V CERM

0.01UF

20%

1

ZH634

4P25R3P5

OMIT

2

1

C634

NOSTUFF

402

16V CERM

20%

0.01UF

2

1

R607

10K

5% 1/16W MF-LF 402

2

1

C625

NOSTUFF

20%

ELEC

100UF

35V

SM1-LF

2

1

3

Q600

SOT23-LF

2N7002

2

1

R609

402

10K

1/16W MF-LF

5%

SYNC_MASTER=M51_PAUL

POWER CONN / MISC

SYNC_DATE=08/04/2006

H

976

051-7039

GPU_PRESENT

PP3V3_S0

PP24V_S5

=PP5V_S0_SATA

GND_CHASSIS_POWER_CONN

pp3v3_s5

SYS_POWERFAIL_L

GND_AUDIO

PP12V_S5_AC_DC

GND_CHASSIS_USB

PLT_RST_L

LCD_SHOULD_ON

GND_CHASSIS_NEAR_PWR_SW

VOLTAGE=0

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.2MM

GND_CHASSIS_CPU_TEMP

GND_CHASSIS_NEAR_ODD_CON MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM VOLTAGE=0

GND_CHASSIS_RJ45

GND_CHASSIS_GPU_TEMP

GND_CHASSIS_AUDIO_INTERNAL

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0

MAKE_BASE=TRUE

GND_CHASSIS_IO_RIGHT

GND_CHASSIS_DVI

GND_CHASSIS_ODD_TEMP

GND_CHASSIS_BNDI MIN_NECK_WIDTH=0.2MM

MAKE_BASE=TRUE

VOLTAGE=0

MIN_LINE_WIDTH=0.6MM

GND_CHASSIS_TOP_RIGHT MAKE_BASE=TRUE VOLTAGE=0

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM

GND_CHASSIS_HDD_TEMP

=PP3V3_S0_SATA

GND_AUDIO_SPKRAMP

FW_RST_L

GND_CHASSIS_AUDIO_EXTERNAL

GND_CHASSIS_FIREWIRE

ITS_ALIVE

ITS_PLUGGED_IN

U600_11

ENET_RST_L

U600_3

SMC_LRESET_L

NB_RST_IN_L

PEG_RESET_L

TPM_LRESET_L

AIRPORT_RST_L

PP12V_LCD_CONN

PP3V3_S3PP3V3_S5

DEBUG_RST_L

ITS_RUNNING

MIN_NECK_WIDTH=0.2MM

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0

GND_CHASSIS_IO_LEFT

PP3V3_S0

GND_CHASSIS_NEAR_MXM

VOLTAGE=0 MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

GPU_PRESENT_R

PP3V3_S0

=PP12V_S0_SATA

ACDC_TEMP

PP3V3_S5

U600_8

U600_6

83

84

80

84

80

83

79

83

79

76

78

76

78

45

77

45

77

41

76

41

76

27

66

27

66

26

65

26

65

10

26

83 26

10

26

6

82

53

6

5

83

5

78

72

74

27

5

60

5

3

76

74

76

47

22

10

43

10

73

97

66

47

66

71

45

73

46

42

58

14

85

67

53

94

3 3

5

3

23

3

59

3

www.Vinaﬁx.vn

Preliminary

IO

IN

IO

OUT

IO

OUT

IN

OUT

IN

OUT

IN

A3*

A4*

A5*

A6*

A8*

A10*

A11*

A12*

A13*

A16*

A15*

A14*

ADSTB0*

REQ2*

REQ0*

REQ1*

REQ3*

REQ4*

A17*

A18*

A19*

A20*

A21*

A23*

A22*

A24*

A25*

A26*

A29*

A28*

A27*

A31*

A30*

ADSTB1*

A20M*

FERR*

IGNNE*

STPCLK*

LINT1

LINT0

SMI*

RSVD10

RSVD9

RSVD5

RSVD4

RSVD3

RSVD2

RSVD1

RSVD8

RSVD7

RSVD6

RSVD11

ADS*

BNR*

BPRI*

DEFER*

DRDY*

DBSY*

BR0*

IERR*

INIT*

LOCK*

RESET*

RS0*

RS1*

RS2*

TRDY*

HIT*

HITM*

BPM0*

BPM2*

BPM1*

BPM3*

PRDY*

PREQ*

TCK

TDI

TDO

TMS

TRST*

DBR*

PROCHOT*

THERMDA

THERMDC

THERMTRIP*

RSVD12

RSVD13

RSVD16

RSVD19

RSVD18

RSVD17

RSVD20

BCLK0

BCLK1

RSVD15

RSVD14

A7*

A9*

ADDR GROUP0

XDP/ITP SIGNALS

CONTROL

ADDR GROUP1

RESERVED

HCLK

THERM

(1 OF 4)

PSI*

SLP*

PWRGOOD

DPRSTP*

DPSLP*

DPWR*

COMP2

COMP3

COMP1

COMP0

DSTBP3*

DSTBN3*

DINV3*

D63*

D62*

D61*

D60*

D59*

D58*

D57*

D56*

D55*

D54*

D52*

D53*

D51*

D50*

D49*

D48*

DINV2*

DSTBN2*

D47*

DSTBP2*

D45*

D46*

D44*

D43*

D42*

D41*

D40*

D39*

D38*

D37*

D36*

D35*

D34*

D33*

D32*

BSEL2

DSTBN1*

BSEL0

BSEL1

TEST2

GTLREF

DINV1*

DSTBP1*

D31*

D30*

D29*

D26*

D27*

D28*

D24*

D25*

D23*

D21*

D22*

D20*

D19*

D18*

D16*

D17*

DINV0*

DSTBP0*

DSTBN0*

D15*

D14*

D13*

D12*

D11*

D10*

D9*

D8*

D7*

D6*

D5*

D4*

D3*

D2*

D1*

D0*

TEST1

NC

(2 OF 4)

MISC

DATA GRP0

DATA GRP2

DATA GRP1

DATA GRP3

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NO STUFF R0701 IF USING ITP

TP_CPU_M_TEST3

SPARE[7-0],HFPLL:

ROUTE TO TP VIA AND

PLACE GND VIA W/IN 1000 MILS

TP_CPU_M_TEST4

CPU SCH AND PCB

LAYOUT NOTE: 0.5" MAX LENGTH

PIN ACTUALLY DRIVEN BY ITP

DUMMY PIN

NOTE:

STUB)

WITHOUT T-ING (NO

ICH6-M AND GMCH

PM_THRMTRIP#

SHOULD CONNECT TO

PLACE TESTPOINT ON

0.1" AWAY

SYMBOL NEED TO CHECK

FSB_IERR# WITH A GND

ON ITP SIGNALS?

NO SPACE FOR ITP

CONNECTOR, NEED TERM

CPU_PROCHOT_L TO SMC

AND CPU VR TO INFORM

CPU IS HOT

TRACE LENGTH SHORTER THAN 0.5".

COMP0,2 CONNECT WITH ZO=27.4OHM, MAKE

COMP1,3 CONNECT WITH ZO=55OHM, MAKE

LAYOUT NOTE:

2

1

R0703

1%

54.9

MF-LF 402

1/16W

2

1

R0704

MF-LF 402

5% 1/16W

68

2

1

R0705

1/16W

1%

402

MF-LF

1K

2

1

R0706

1/16W

1%

402

MF-LF

2.0K

21

R0720

54.9

MF-LF

402

1%

1/16W

21

R0721

1%

54.9

MF-LF

402

1/16W

21

R0722

54.9

MF-LF

402

1%

1/16W

21

R0719

1%

402

54.9

21

R0718

27.4

21

R0717

1%

402

54.9

21

R0716

27.4

402

21

R0730

0

402

NOSTUFF

2

1

R0712

1K

MF-LF 402

5% 1/16W

NOSTUFF

2

1

R0707

MF-LF 402

5% 1/16W

51

AB6

G2

AB5

C7

A25

A24

AB3

AA6

AC5

D5

A3

B2

V3

T2

N5

M4

AA3

AB2

C24

AA4

C23

D22

AF1

C1

D3

F6

D2

T22

B25

C3

AA1

G3

F4

F3

B1

L5

J3

K2

H2

K3

D21

AC1

AC2

H4

B4

C6

B3

C4

D20

E4

G6

A5

F21

H5

E1

C20

F1

G5

AC4

AD1

AD3

AD4

E2

A21

A22

V4

L2

H1

J1

N2

M1

K5

M3

L4

Y1

W2

J4

Y4

W5

W3

T3

T5

R4

U2

Y5

U4

A6

W6

R3

U5

Y2

R1

P1

P4

L1

P2

P5

N3

J0700

BGA

YONAH-SKT

CPU

OMIT

D25

C26

D7

D6

AE6

A2

AD26

AE24

Y25

N25

G22

AD23

W24

M24

H23

D24

B5

E5

AC20

V23

M26

J26

G24

K24

E23

AF26

AF22

AF25

AE25

E25

AD21

AE21

AD24

AF23

AE22

AD20

AC25

AB21

AA21

AB22

G25

AC23

AC22

AA24

AC26

Y22

Y26

AA26

Y23

W22

AB25

F23

U22

U25

U23

W25

V26

V24

AB24

AA23

N24

T25

H22

L26

R24

T24

P23

P22

P25

M23

L23

L22

L25

E26

R23

P26

K25

N22

H25

K22

F26

H26

J23

J24

F24

E22

V1

U1

U26

R26

C21

B23

B22

J0700

BGA

CPU

YONAH-SKT

OMIT

2

1

R0702

1%

54.9

1/16W MF-LF 402

2

1

R0701

1/16W

1%

402

MF-LF

54.9

97

051-7039

H

7

CPU 1 OF 2-FSB

SYNC_MASTER=M50_HENRY

SYNC_DATE=08/04/2006

TP_CPU_SPARE7

TP_CPU_SPARE4

TP_CPU_SPARE3

TP_CPU_SPARE2

CPU_GTLREF

FSB_IERR_L

FSB_DSTBP_L<0>

CPU_PSI_L

FSB_SLPCPU_L

CPU_DPRSTP_L

CPU_DPSLP_L

FSB_DPWR_L

CPU_COMP<2> CPU_COMP<3>

CPU_COMP<1>

CPU_COMP<0>

FSB_DSTBP_L<3>

FSB_DSTBN_L<3>

FSB_DINV_L<3>

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<57>

FSB_D_L<56>

FSB_D_L<55>

FSB_D_L<54>

FSB_D_L<52> FSB_D_L<53>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_DINV_L<2>

FSB_DSTBN_L<2>

FSB_D_L<47>

FSB_DSTBP_L<2>

FSB_D_L<45>

FSB_D_L<46>

FSB_D_L<44>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

FSB_D_L<32>

CPU_BSEL<2>

FSB_DSTBN_L<1>

CPU_BSEL<0>

CPU_BSEL<1>

CPU_TEST2

FSB_DINV_L<1>

FSB_DSTBP_L<1>

FSB_D_L<31>

FSB_D_L<30>

FSB_D_L<29>

FSB_D_L<26>

FSB_D_L<27>

FSB_D_L<28>

FSB_D_L<24>

FSB_D_L<25>

FSB_D_L<23>

FSB_D_L<21>

FSB_D_L<22>

FSB_D_L<20>

FSB_D_L<19>

FSB_D_L<18>

FSB_D_L<16>

FSB_D_L<17>

FSB_DSTBN_L<0>

FSB_D_L<15>

FSB_D_L<14>

FSB_D_L<13>

FSB_D_L<12>

FSB_D_L<11>

FSB_D_L<10>

FSB_D_L<9>

FSB_D_L<8>

FSB_D_L<7>

FSB_D_L<6>

FSB_D_L<5>

FSB_D_L<4>

FSB_D_L<3>

FSB_D_L<2>

FSB_D_L<1>

FSB_D_L<0>

CPU_TEST1

FSB_A_L<7>

TP_CPU_SPARE1

FSB_CLK_CPU_N

FSB_CLK_CPU_P

TP_CPU_SPARE5

TP_CPU_SPARE6

PM_THRMTRIP_L

CPU_THERMD_N

CPU_THERMD_P

XDP_DBRESET_L

XDP_TMS

XDP_TDO

XDP_TCK

XDP_BPM_L<1>

XDP_BPM_L<0>

FSB_HITM_L

FSB_HIT_L

FSB_TRDY_L

FSB_RS_L<1>

FSB_RS_L<0>

FSB_CPURST_L

FSB_LOCK_L

FSB_DBSY_L

FSB_DRDY_L

FSB_DEFER_L

FSB_BPRI_L

FSB_BNR_L

FSB_ADS_L

TP_CPU_HFPLL

TP_CPU_A37_L

TP_CPU_A38_L

TP_CPU_A33_L TP_CPU_A34_L

TP_CPU_A35_L

TP_CPU_A36_L

TP_CPU_APM0_L

TP_CPU_APM1_L

CPU_SMI_L

CPU_INTR CPU_NMI

CPU_STPCLK_L

CPU_IGNNE_L

CPU_FERR_L

CPU_A20M_L

FSB_ADSTB_L<1>

FSB_A_L<30> FSB_A_L<31>

FSB_A_L<27> FSB_A_L<28>

FSB_A_L<29>

FSB_A_L<26>

FSB_A_L<25>

FSB_A_L<24>

FSB_A_L<22> FSB_A_L<23>

FSB_A_L<21>

FSB_A_L<20>

FSB_A_L<19>

FSB_A_L<18>

FSB_A_L<17>

FSB_REQ_L<4>

FSB_REQ_L<3>

FSB_REQ_L<1>

FSB_REQ_L<0>

FSB_REQ_L<2>

FSB_ADSTB_L<0>

FSB_A_L<14> FSB_A_L<15>

FSB_A_L<16>

FSB_A_L<13>

FSB_A_L<12>

FSB_A_L<11>

FSB_A_L<10>

FSB_A_L<9>

FSB_A_L<8>

FSB_A_L<5>

FSB_A_L<4>

FSB_A_L<3>

=PP1V05_S0_CPU

XDP_TMS

XDP_TCK

XDP_TDI

CPU_PWRGD

XDP_BPM_L<3>

FSB_DINV_L<0>

CPU_PROCHOT_L

=PP1V05_S0_CPU

XDP_BPM_L<4> XDP_BPM_L<5>

FSB_RS_L<2>

XDP_TRST_L

XDP_TDI

XDP_BPM_L<2>

TP_CPU_SPARE0

TP_CPU_A32_L

TP_CPU_EXTBREF

TP_CPU_A39_L

FSB_A_L<6>

=PP1V05_S0_CPU

FSB_BREQ0_L

CPU_INIT_L

11

9

75

59

26

11

12

8

11

8

11

8

21

11

7

11

7

11

7

11

7

11

7

11

7

12

75

12

5

21

12

34

12

34

12

34

14

10

5

12

5

12

21

12

3

5

21

5

12

59

3

5

12

5

12

3

12

21

www.Vinaﬁx.vn

Preliminary

OUT

VCC_67

VCC_64

VCC_66

VCC_65

VCC_63

VCC_62

VCC_61

VCC_59

VCC_60

VCC_58

VCC_57

VCC_56

VCC_54

VCC_55

VCC_53

VCC_51

VCC_52

VCC_49

VCC_50

VCC_48

VCC_47

VCC_46

VCC_44

VCC_45

VCC_43

VCC_41

VCC_42

VCC_40

VCC_39

VCC_38

VCC_36

VCC_37

VCC_33

VCC_35

VCC_34

VCC_31

VCC_32

VCC_29

VCC_30

VCC_28

VCC_26

VCC_27

VCC_23

VCC_25

VCC_24

VCC_22

VCC_21

VCC_20

VCC_18

VCC_19

VCC_17

VCC_16

VCC_15

VCC_13

VCC_14

VCC_12

VCC_10

VCC_11

VCC_8

VCC_9

VCC_7

VCC_6

VCC_5

VCC_3

VCC_4

VCC_2

VCC_1 VCC_68

VCC_69

VCC_71

VCC_70

VCC_72

VCC_74

VCC_76

VCC_75

VCC_78

VCC_77

VCC_79

VCC_81

VCC_80

VCC_84

VCC_82

VCC_83

VCC_86

VCC_85

VCC_87

VCC_89

VCC_88

VCC_90

VCC_91

VCC_92

VCC_94

VCC_93

VCC_95

VCC_96

VCC_97

VCC_99

VCC_98

VCC_100

VCCP_1

VCCP_2

VCCP_3

VCCP_4

VCCP_5

VCCP_6

VCCP_7

VCCP_9

VCCP_8

VCCP_11

VCCP_10

VCCP_12

VCCP_13

VCCP_14

VCCP_16

VCCP_15

VCCA

VID0

VID1

VID2

VID3

VID4

VID5

VID6

VSSSENSE

VCCSENSE

VCC_73

(3 OF 4)

VSS_82

VSS_83

VSS_84

VSS_85

VSS_87

VSS_86

VSS_88

VSS_89

VSS_90

VSS_92

VSS_91

VSS_93

VSS_94

VSS_95

VSS_97

VSS_96

VSS_100

VSS_98

VSS_99

VSS_102

VSS_101

VSS_105

VSS_103

VSS_104

VSS_106

VSS_107

VSS_110

VSS_109

VSS_108

VSS_111

VSS_112

VSS_115

VSS_114

VSS_113

VSS_116

VSS_117

VSS_118

VSS_120

VSS_119

VSS_123

VSS_121

VSS_122

VSS_124

VSS_125

VSS_128

VSS_126

VSS_127

VSS_129

VSS_130

VSS_133

VSS_131

VSS_132

VSS_134

VSS_135

VSS_138

VSS_136

VSS_137

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_146

VSS_144

VSS_145

VSS_147

VSS_148

VSS_151

VSS_150

VSS_149

VSS_152

VSS_153

VSS_156

VSS_155

VSS_154

VSS_157

VSS_158

VSS_159

VSS_161

VSS_160

VSS_162

VSS_1

VSS_2

VSS_3

VSS_5

VSS_4

VSS_6

VSS_7

VSS_8

VSS_10

VSS_9

VSS_11

VSS_12

VSS_15

VSS_13

VSS_14

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_23

VSS_22

VSS_21

VSS_24

VSS_25

VSS_28

VSS_27

VSS_26

VSS_29

VSS_30

VSS_33

VSS_32

VSS_31

VSS_34

VSS_35

VSS_38

VSS_37

VSS_36

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_46

VSS_44

VSS_45

VSS_47

VSS_48

VSS_51

VSS_49

VSS_50

VSS_52

VSS_53

VSS_56

VSS_54

VSS_55

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_63

VSS_62

VSS_64

VSS_65

VSS_66

VSS_69

VSS_68

VSS_67

VSS_70

VSS_71

VSS_74

VSS_73

VSS_72

VSS_75

VSS_76

VSS_79

VSS_78

VSS_77

VSS_80

VSS_81

(4 OF 4)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

VCCA=1.5 ONLY

LAYOUT NOTE: CONNECT R0802-03

TO VCCSENSE_P/N WITH NO STUB

PROVIDE A TEST POINT (WITH NO STUB)

BETWEEN VCCSENSE AND VSSSENSE AT THE

LOCATION WHERE THE TWO 54.9 OHM

RESISTORS TERMINATE THE 55 OHM

TRANSMISSION LINE

TO CONNECT A DIFFERENCTIAL PROBE

LAYOUT NOTE:

2

1

C0800

16V

20%

402

CERM

0.01UF

2

1

C0801

805-1

CERM

10UF

20%

6.3V

2

1

R0803

100

MF-LF 402

1% 1/16W

2

1

R0802

100

MF-LF 402

1% 1/16W

AE7

AE2

AF2

AE3

AF4

AE5

AF5

AD6

AF7

N21

M21

K21

J21

M6

K6

J6

G21

W21

V21

T6

T21

R6

R21

N6

V6

B26

AF18

AF17

AF15

AF14

AF12

AF10

AF9

AE20

AE18

AE17

A20

AE15

AE13

AE12

AE10

AE9

AD18

AD17

AD15

AD14

AD12

A18

AD10

AD9

AD7

AC18

AC17

AC15

AC13

AC12

AC9

AC7

A17

AB7

AB20

AB18

AB17

AB15

AB14

AB12

AB10

AC10

AB9

A15

AA20

AA18

AA17

AA15

AA13

AA12

AA10

AA9

AA7

F20

A13

F18

F17

F15

F14

F12

F10

F9

F7

E20

E18

A12

E17

E15

E13

E12

E10

E9

E7

D18

D17

D15

A10

D14

D12

D10

D9

C18

C17

C15

C13

C12

C10

A9

C9

B20

B18

B17

B15

B14

B12

B10

B9

AF20

B7

A7

J0700

OMIT

CPU

BGA

YONAH-SKT

V22

V5

V2

U24

U21

U6

U3

T26

T23

T4B6

T1

R25

R22

R5

R2

P24

P21

P6

P3

N26

A26

N23

N4

N1

M25

M22

M5

M2

L24

L21

L6

A23

L3

K26

K23

K4

K1

J25

J22

J5

J2

H24

A19

H21

H6

H3

G26

G23

G1

G4

F25

F22

F2

A16

F19

F16

F13

F11

F8

F5

E24

E21

E19

E16

A14

E14

E11

E8

E6

E3

D26

D23

D19

D16

D13

A11

D11

D8

D4

D1

C25

C22

C2

C19

C16

C14

A8

C11

C8

C5

AF24

AF21

AF19

B24

AF16

AF13

AF11

AF8

AF6

AF3

AE26

AE23

AE19

AE16

B21

AE14

AE11

AE8

AE4

AE1

AD25

AD22

AD19

AD16

AD13

B19

AD11

AD8

AD5

AD2

AC24

AC21

AC19

AC16

AC14

AC11

B16

AC8

AC6

AC3

AB26

AB23

AB19

AB16

AB13

AB11

AB8

B13

AB4

AB1

AA25

AA22

AA19

AA16

AA14

AA11

AA8

AA5

B11

AA2

Y24

Y21

Y6

Y3

W26

W23

W4

W1

V25

B8

A4

J0700

OMIT

CPU

YONAH-SKT

BGA

SYNC_MASTER=M50_HENRY

SYNC_DATE=08/04/2006

978

H

051-7039

CPU 2 OF 2-PWR/GND

CPU_VID<5>

CPU_VID<2>

CPU_VID<0>

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

CPU_VCCSENSE_N

=PP1V5_S0_CPU

=PPVCORE_S0_CPU

=PP1V5_S0_CPU

CPU_VCCSENSE_P

CPU_VID<6>

CPU_VID<4>

CPU_VID<3>

CPU_VID<1>

11

76

9

75

7

8

75

5

3

75

3

75

5

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CAVITY ON L1 (NORTH SIDE

PLACE 6 INSIDE SOCKET

CAVITY ON L1 (SOUTH SIDE

WE HAD A 330UF ELEC CAP HERE FOR 1.05V RAIL - CHECK WE CAN REMOVE

CPU HEATSINK MOUNTING HOLES

VCCP CORE DECOUPLING

ON L8 (NORTH SIDE SECONDARY)

PLACE INSIDE SOCKET CAVITY

NEED LARGE BULK FOR 1.05V

VCC CORE DECOUPLING

DESIGN FOR 44 CERAMIC AND 3 ELECT BULK 1800UF

PRIMARY)

SOUTH SIDE SECONDARY

CAVITY ON L8 (SOUTH SIDE

PLACE 8 INSIDE SOCKET

CAVITY ON L8 (NORTH SIDE

PLACE 8 INSIDE SOCKET

PLACE 6 INSIDE SOCKET

SECONDARY)

PRIMARY)

SECONDARY)

2

1

C900

22UF

6.3V

20%

X5R 805

2

1

C996

22UF

X5R 805

20%

6.3V

2

1

C993

22UF

X5R 805

20%

6.3V 2

1

C994

22UF

6.3V

20%

805

X5R

2

1

C995

22UF

X5R 805

20%

6.3V 2

1

C988

22UF

X5R 805

20%

6.3V

2

1

C992

22UF

6.3V

20%

805

X5R

2

1

C991

22UF

6.3V

20%

805

X5R

2

1

C990

22UF

X5R 805

20%

6.3V

2

1

C989

22UF

6.3V

20%

805

X5R

2

1

C941

6.3V

805

22UF

20%

X5R

2

1

C942

22UF

6.3V X5R

20%

805

2

1

C943

22UF

6.3V X5R

20%

805

2

1

C944

6.3V

22UF

X5R

20%

805

2

1

C945

X5R

22UF

6.3V

20%

805

2

1

C946

22UF

6.3V X5R

20%

805

32

1

C947

NOSTUFF

470UF

D2T

TANT

2.5V

20%

2

1

C901

22UF

20%

6.3V X5R 805

2

1

C902

805

22UF

6.3V

20%

X5R

2

1

C904

22UF

6.3V

20%

X5R 805

2

1

C905

X5R

NOSTUFF

22UF

805

20%

6.3V

2

1

C906

22UF

805

20%

6.3V X5R

2

1

C907

20%

22UF

6.3V X5R 805

2

1

C908

22UF

20%

6.3V X5R 805

2

1

C909

22UF

20%

6.3V X5R 805

2

1

C910

22UF

20%

6.3V X5R 805

2

1

C911

22UF

20%

6.3V X5R 805

2

1

C912

22UF

6.3V

20%

X5R 805

2

1

C913

22UF

20%

X5R

6.3V

805

2

1

C914

NOSTUFF

22UF

805

20%

6.3V X5R

2

1

C915

NOSTUFF

6.3V

805

22UF

20%

X5R

2

1

C916

805

X5R

6.3V

20%

22UF

2

1

C917

NOSTUFF

22UF

6.3V

805

20%

X5R

2

1

C918

22UF

X5R

20%

6.3V

805

2

1

C919

22UF

6.3V

805

20%

X5R

2

1

C920

22UF

6.3V

20%

X5R 805

2

1

C921

6.3V

22UF

X5R 805

20%

2

1

C922

22UF

6.3V X5R

20%

805

2

1

C923

22UF

6.3V X5R 805

20%

2

1

C924

22UF

6.3V

20%

X5R 805

2

1

C925

6.3V

22UF

X5R 805

20%

2

1

C926

CERM

10V 402

0.1UF

20%

2

1

C928

22UF

20%

6.3V X5R 805

2

1

C929

22UF

20%

6.3V X5R 805

2

1

C930

22UF

805

6.3V

20%

X5R

2

1

C931

20%

22UF

X5R

6.3V

805

2

1

C932

805

NOSTUFF

22UF

20%

X5R

6.3V

2

1

C934

20%

402

10V CERM

0.1UF

2

1

C935

0.1UF

CERM

10V 402

20%

2

1

C936

20%

0.1UF

402

10V CERM

2

1

C937

CERM

10V 402

0.1UF

20%

2

1

C938

20%

0.1UF

402

10V CERM

2

1

C939

22UF

6.3V

20%

X5R 805

2

1

C903

NOSTUFF

22UF

805

20%

X5R

6.3V

1

ZH607

OMIT

4P75R4

2

1

C950

402

0.01UF

CERM

20% 16V

1

ZH608

OMIT

4P75R4

2

1

C951

402

0.01UF

CERM

20% 16V

1

ZH609

OMIT

4P75R4

2

1

C952

402

0.01UF

CERM

20% 16V

1

ZH610

OMIT

4P75R4

2

1

C953

402

0.01UF

CERM

20% 16V

2

1

C999

22UF

6.3V

20%

805

X5R

2

1

C998

22UF

X5R 805

20%

6.3V 2

1

C997

22UF

6.3V

20%

805

X5R

CPU DECAPS & VID<>

979

051-7039

H

SYNC_DATE=08/04/2006

SYNC_MASTER=M51_HENRY

=PP1V05_S0_CPU

CPU_HS_ZH608 CPU_HS_ZH609CPU_HS_ZH607 CPU_HS_ZH610

=PPVCORE_S0_CPU

11

8

76 7 8 3 3

www.Vinaﬁx.vn

Preliminary

D+

D-

ALERT*/

THM*

SCLK

SDATA

VDD

GND

THM2*

DXP

SCLK

ALERT*

SDA THM PADGND

VCC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

AMBIENT TEMPERATURE (CPU FAN INTAKE) SENSOR

MAY NOT BE CONSISTENT WITH OTHER CARDS

(GPU INTERNAL DIODE)

MXM CARD TEMPERATURE SENSOR

THEN THIS SHOULD BE S5

ROUTE ON SAME LAYER WITH 0.254MM TRACE WIDTH & SPACING.

NOTE: IF CPU T DIODE TO BE READ IN OFF STATE,

CPU INTERNAL DIODE THERMAL SENSOR

NOTE: SYMBOL SHOULD BE SHOWN ADT7461A

I2C ADDR:0x94

LAYOUT NOTE:

I2C ADDR:0x94

I2C ADDR:0x96

ADD GND GUARD TRACES FOR CPU_THERMD_P/N

CPU AND GPU REMOTE HEATSINK THERMAL SENSORS

NB HEATSINK TEMPERATURE SENSE

I2C ADDRESS: 90 (1001 000)

NOTE: I2C ADDR:98(1001 100) ON NVIDIA CARD

1

4

7

8

5

3

2

6

U1000

CPU_TSENS_INT

ADT7461

MSOP

CRITICAL

21

R1002

MF-LF

499

1%

1/16W

402

CPU_TSENS_INT

2

1

C1000

NOSTUFF

0.001UF

50V

402

CERM

10%

2

1

C1001

CPU_TSENS_INT

16V

10%

X5R

0.1UF

402

21

R1017

499

CPU_TSENS_INT

1/16W

1%

MF-LF

402

2

1

R1001

1/16W

CPU_TSENS_INT

5%

MF-LF 402

10K

2

1

R1000

402

5%

MF-LF

10K

1/16W

CPU_TSENS_INT

21

R1060

GPU_TSENS_INT

5%

1/16W

0

21

R1061

GPU_TSENS_INT

0

1/16W

5%

7

6

5

4

3

1

J1050

M-ST-SM

GPU_TSENS_EXT

53398-05

CRITICAL

2

1

C1012

402

20%

0.1UF

10V CERM

CPU_TSENS_EXT

21

C1010

20%

CERM

16V

NOSTUFF

0.01UF

402

21

C1011

0.01UF

40216V

20%

CERM

NOSTUFF

2

1

C1052

GPU_TSENS_EXT

0.1UF

20% 10V

402

CERM

21

C1050

0.01UF

402

CERM

16V

NOSTUFF

20%

21

C1051

20%

NOSTUFF

16V

CERM

402

0.01UF

1

7

5

4

2

3

6

U1080

NB_TSENS_EXT

MAX6642ATT90

CRITICAL

TDFN

21

R1005

NOSTUFF

MF-LF

402

0

5%

1/16W

2

1

C1080

402

0.1UF

X5R

10% 16V

NB_TSENS_EXT

21

R1080

NB_TSENS_EXT

MF-LF

5%

1/16W

47

402

2

1

C1082

CERM

50V

402

0.0022uF

10%

NB_TSENS_EXT

21

XW1080

SM

OMIT

2

1

4

3

J1080

CRITICAL

SM-2MT-BLK-LF

NB_TSENS_EXT

21

R1085

5%

1/16W

0

NB_TSENS_EXT

21

R1086

NB_TSENS_EXT

0

1/16W

5%

4

3

2

1

6

5

J1000

M-RT-SM

CPU_TSENS_EXT

CRITICAL

HS8804F-B

7

6

5

4

3

2

J1070

53398-05

M-ST-SM

AMB_TSENS

CRITICAL

2

1

C1072

AMB_TSENS

CERM 402

10V

20%

0.1UF

21

C1070

NOSTUFF

20% 16V

CERM

402

0.01UF

21

C1071

0.01UF

402

CERM

16V

NOSTUFF

20%

2

1

R1087

1/16W

10K

MF-LF

5%

402

NB_TSENS_EXT

ASIC TEMP SENSORS

SYNC_DATE=(MASTER)

051-7039

H

10 97

SYNC_MASTER=M51_DAVE

NB_TSENS_HS_DXP

SMB_U1080_SCL

U1080_ALERT

SMB_U1080_SDA

U1080_VCC

NB_TSENS_HS_DXN

=SMB_NB_HS_THRM_CLK

=SMB_NB_HS_THRM_DATA

PP3V3_S0

=SMB_CPU_HS_THRM_DATA

PM_THRM_L

THERM_DX_P

CPU_THERMD_N

GND_CHASSIS_CPU_TEMP

CPU_THERMD_P

=SMB_CPU_HS_THRM_CLK

=SMB_GPU_HS_THRM_DATA

=SMB_GPU_HS_THRM_CLK

GND_CHASSIS_GPU_TEMP

=SMB_AMB_TEMP_DATA

=SMB_AMB_TEMP_CLK

GND_CHASSIS_AMB_TEMP

=SMB_GPU_THRM_DATA

=SMB_GPU_THRM_CLK

SMB_GPU_THRM_CLK

PP3V3_S0

GND_CHASSIS_AMB_TEMP

SMB_GPU_THRM_DATA

GND_CHASSIS_CPU_TEMP

PP3V3_S0

=SMB_THRM_DATA

=SMB_THRM_CLK

THRM_THM

THRM_ALERT_L

THERM_DX_N

84

83

76

45

41

27

26

10

6

5

58

10

5

10

5

27

3

27

23

7

6

7

27

6

27

10

27

27 85

3

10

85

6

3

27

www.Vinaﬁx.vn

Preliminary

OUT

IN

IO

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CONNECTOR’S FBO PIN.

ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S

518S0320

(TCK)

(FBO)

CPU ITP700FLEX DEBUG SUPPORT

(DEBUG PORT ACTIVE)

(DBR#)

(DBA#)

NC

INDICATE THAT ITP IS USING TAP I/F, NC IN 945GM CHIPSET SYSTEM.

TO ICH7M SYS_RST*, AND WITH SYSTEM RESET LOGIC

(AND WITH RESET BUTTON)

(DEBUG PORT RESET)

(FROM CK410M HOST 133/167MHZ)

P7 HAS OTHER PULL UP RESISTORS THAT MAY IMPACT ITP FUNCTIONALITY

ITP TCK SIGNAL LAYOUT NOTE:

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEX

21

R1100

MF-LF

22.6

1%

1/16W

402

ITP

21

R1102

ITP

402

1% 1/16W MF-LF

22.6

2

1

R1103

54.9

1/16W

1%

402

ITP

MF-LF

2

1

C1100

16V

402

X5R

10%

0.1UF

ITP

2

1

R1104

240

402

MF-LF

5% 1/16W

ITP

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J1101

F-RT-SM

52435-2872

DEVELOPMENT

2

1

R1101

402

54.9

1%

MF-LF

1/16W

2

1

R1106

680

402

5% 1/16W MF-LF

CPU ITP700FLEX DEBUG

SYNC_DATE=08/04/2006

051-7039

H

11 97

SYNC_MASTER=M50_HENRY

=PP1V05_S0_CPU

FSB_CPURST_L

XDP_TDO

ITPRESET_L

ITP_TDO

=PP3V3_S5_SB_PM

=PP1V05_S0_CPU

XDP_BPM_L<5>

XDP_BPM_L<4>

XDP_BPM_L<2>

XDP_TDI XDP_TMS

XDP_TCK

CPU_XDP_CLK_P

CPU_XDP_CLK_N

XDP_TCK

XDP_BPM_L<3>

XDP_BPM_L<1>

XDP_BPM_L<0>

XDP_TRST_L

XDP_DBRESET_L

11

11 9 9

8

12

8

11

26

7

23

7

3

5

3

5

www.Vinaﬁx.vn

Preliminary

IO

OUT

IO

OUT

IO

OUT

IO

IN

IO

IN

IO

HD4*

HD6*

HD16*

HTRDY*

HSLPCPU*

HRS1*

HRS0*

HHITM*

HLOCK*

HHIT*

HDSTBP2*

HDTSBP3*

HDSTBP1*

HDSTBP0*

HDSTBN3*

HDSTBN1*

HDSTBN2*

HDSTBN0*

HDINV2*

HDINV3*

HDINV1*

HDINV0*

HDVREF

HDRDY*

HDPWR*

HDEFER*

HDBSY*

HCPURST*

HBREQ0*

HBPRI*

HBNR*

HAVREF

HCLKIN*

HCLKIN

HYSWING

HYRCOMP HYSCOMP

HXSWING

HXSCOMP

HXRCOMP

HA13*

HADS*

HADSTB0*

HD3*

HD2*

HD1*

HD0*

HD63*

HD62*

HD61*

HD60*

HD59*

HD58*

HD57*

HD56*

HD55*

HD54*

HD53*

HD52*

HD51*

HD50*

HD49*

HD48*

HD47*

HD46*

HD45*

HD44*

HD43*

HD42*

HD41*

HD40*

HD39*

HD38*

HD37*

HD36*

HD35*

HD34*

HD33*

HD32*

HD31*

HD29*

HD28*

HD27*

HD26*

HD25*

HD24*

HD23*

HD22*

HD21*

HD20*

HD19*

HD18*

HD17*

HD15*

HD10*

HD11* HD12*

HD13*

HD14*

HD5*

HD7*

HD8* HD9*

HA30*

HA29*

HA28*

HA27*

HA26*

HA25*

HA24*

HA23*

HA31*

HA20*

HA19*

HA18*

HA16*

HA15*

HA14*

HA21*

HA22*

HA17*

HA9*

HA8*

HA7*

HA6*

HA5*

HA4*

HA3*

HA10*

HA11* HA12*

HADSTB1*

HREQ0*

HREQ1*

HREQ2* HREQ3*

HD30*

HREQ4*

HRS2*

(1 OF 10)

HOST

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

2

1

C1211

402

X5R

16V

10%

0.1uF

2

1

R1211

200

1% 1/16W MF-LF 402

2

1

R1210

100

1% 1/16W MF-LF 402

2

1

R1220

54.9

1% 1/16W MF-LF

402

2

1

R1221

402

MF-LF

1/16W

1%

24.9

2

1

R1225

221

1% 1/16W MF-LF 402

2

1

R1226

1% 1/16W MF-LF 402

100

2

1

C1226

0.1uF

402

X5R

16V

10%

2

1

C1236

402

X5R

16V

10%

0.1uF

2

1

R1235

221

1% 1/16W MF-LF 402

2

1

R1230

54.9

1% 1/16W MF-LF

402

2

1

R1236

1% 1/16W MF-LF 402

100

2

1

R1231

402

MF-LF

1/16W

1%

24.9

W1

U1

Y1

E4

E2

E1

E7

E3

D6

E6

B4

A8

F8

B8

G8

D8

B3

D4

D3

K13

AC5

AA5

T6

K3

AC4

Y5

T7

K4

H8

J9

AB10

U3

W8

J7

C3

A7

K1

K9

G2

AC8

AD4

AD10

AB5

G1

AC6

AD7

AC1

AD9

AD1

AC2

AB3

AC11

AB11

AC9

K2

AB4

AA1

Y8

AA10

AA6

AA2

AA7

AA4

W2

AB8

H3

Y10

W5

Y7

Y3

W3

W4

AA9

AB7

T5

W6

J6

T9

U5

W7

T4

T8

T1

W9

T11

U11

U9

H1

U7

T3

W11

T10

G4

K11

J3

H4

J8

K7

J1

F1

B7

AG1

AG2

C7

F6

C6

J13

C13

B9

E8

F9

G12

F11

G11

E11

C9

D14

C14

H9

A14

C12

B14

B12

F12

G13

E13

A13

A12

C11

A11

D12

F14

J15

H13

J14

D9

G14

J12

H11

U1200

BGA

NB

945GM

OMIT

SYNC_MASTER=M50_HENRY

SYNC_DATE=08/04/2006

NB CPU Interface

H

12 97

051-7039

FSB_CPURST_L

FSB_A_L<29>

FSB_A_L<30>

NB_FSB_VREF

FSB_D_L<17>

FSB_DSTBN_L<2>

FSB_DSTBN_L<3>

FSB_DSTBP_L<1> FSB_DSTBP_L<2>

FSB_DSTBP_L<3>

FSB_DINV_L<0>

FSB_DSTBN_L<0>

FSB_DINV_L<1> FSB_DINV_L<2>

FSB_D_L<1> FSB_D_L<2>

FSB_D_L<4>

FSB_D_L<5>

FSB_D_L<6>

FSB_D_L<10>

FSB_D_L<9>

FSB_D_L<8>

FSB_D_L<7>

FSB_D_L<3>

FSB_D_L<0>

FSB_D_L<16>

FSB_TRDY_L

FSB_SLPCPU_L

FSB_RS_L<1>

FSB_RS_L<0>

FSB_HITM_L FSB_LOCK_L

FSB_HIT_L

FSB_DSTBP_L<0>

FSB_DSTBN_L<1>

FSB_DINV_L<3>

FSB_DRDY_L

FSB_DPWR_L

FSB_DEFER_L

FSB_DBSY_L

FSB_BREQ0_L

FSB_BPRI_L

FSB_BNR_L

FSB_CLK_NB_N

FSB_CLK_NB_P

NB_FSB_YSWING

NB_FSB_YRCOMP NB_FSB_YSCOMP

NB_FSB_XSWING

NB_FSB_XSCOMP

FSB_A_L<13>

FSB_ADS_L

FSB_ADSTB_L<0>

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<57>

FSB_D_L<56>

FSB_D_L<55>

FSB_D_L<54>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_D_L<47>

FSB_D_L<46>

FSB_D_L<45>

FSB_D_L<44>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

FSB_D_L<32>

FSB_D_L<31>

FSB_D_L<29>

FSB_D_L<28>

FSB_D_L<27>

FSB_D_L<26>

FSB_D_L<25>

FSB_D_L<24>

FSB_D_L<23>

FSB_D_L<22>

FSB_D_L<21>

FSB_D_L<20>

FSB_D_L<19>

FSB_D_L<18>

FSB_D_L<15>

FSB_D_L<11>

FSB_D_L<12> FSB_D_L<13>

FSB_D_L<14>

FSB_A_L<28>

FSB_A_L<27>

FSB_A_L<26>

FSB_A_L<25>

FSB_A_L<24>

FSB_A_L<23>

FSB_A_L<31>

FSB_A_L<20>

FSB_A_L<19>

FSB_A_L<18>

FSB_A_L<16>

FSB_A_L<15>

FSB_A_L<14>

FSB_A_L<21>

FSB_A_L<22>

FSB_A_L<17>

FSB_A_L<9>

FSB_A_L<8>

FSB_A_L<7>

FSB_A_L<6>

FSB_A_L<5>

FSB_A_L<4>

FSB_A_L<3>

FSB_A_L<10>

FSB_A_L<11>

FSB_A_L<12>

FSB_ADSTB_L<1>

FSB_REQ_L<0> FSB_REQ_L<1>

FSB_REQ_L<2>

FSB_REQ_L<3>

FSB_D_L<30>

FSB_REQ_L<4>

FSB_RS_L<2>

=PP1V05_S0_FSB_NB

NB_FSB_XRCOMP

12

7

34

7

3

www.Vinaﬁx.vn

Preliminary

CRT_BLUE*

CRT_BLUE

CRT_GREEN*

CRT_GREEN

CRT_RED

CRT_DDC_CLK

CRT_RED*

HSYNC

CRT_DDC_DATA

CRT_VSYNC

CRT_IREF

TV_IRTNC

TV_IRTNB

TV_IREF

TV_IRTNA

TV_DACB_OUT

TV_DACC_OUT

TV_DACA_OUT

LB_DATA2

LB_DATA1

LB_DATA0

LB_DATA2*

LB_DATA1*

LB_DATA0*

LA_DATA2

LA_DATA1

LA_DATA0

LA_DATA2*

LA_DATA1*

LA_DATA0*

LB_CLK

LB_CLK*

LA_CLK

LA_CLK*

L_VDDEN

L_VREFL

L_VREFH

L_VBG

L_IBG

L_DDC_CLK

L_DDC_DATA

EXP_A_COMPI

EXP_A_COMPO

EXP_A_RXN0

EXP_A_RXN1

EXP_A_RXN2

EXP_A_RXN3

EXP_A_RXN4

EXP_A_RXN5

EXP_A_RXN6

EXP_A_RXN7

EXP_A_RXN8

EXP_A_RXN9

EXP_A_RXN10

EXP_A_RXN11

EXP_A_RXN12

EXP_A_RXN13

EXP_A_RXN15

EXP_A_RXN14

EXP_A_RXP0

EXP_A_RXP1

EXP_A_RXP2

EXP_A_RXP4

EXP_A_RXP3

EXP_A_RXP5

EXP_A_RXP6

EXP_A_RXP7

EXP_A_RXP10

EXP_A_RXP9

EXP_A_RXP8

EXP_A_RXP11

EXP_A_RXP12

EXP_A_RXP14

EXP_A_RXP13

EXP_A_RXP15

EXP_A_TXN1

EXP_A_TXN0

EXP_A_TXN3

EXP_A_TXN2

EXP_A_TXN6

EXP_A_TXN5

EXP_A_TXN4

EXP_A_TXN7

EXP_A_TXN8

EXP_A_TXN9

EXP_A_TXN10

EXP_A_TXN11

EXP_A_TXN12

EXP_A_TXN14

EXP_A_TXN13

EXP_A_TXN15

EXP_A_TXP0

EXP_A_TXP2

EXP_A_TXP1

EXP_A_TXP3

EXP_A_TXP4

EXP_A_TXP5

EXP_A_TXP7

EXP_A_TXP6

EXP_A_TXP8

EXP_A_TXP9

EXP_A_TXP10

EXP_A_TXP12

EXP_A_TXP11

EXP_A_TXP13

EXP_A_TXP14

EXP_A_TXP15

L_CLKCTLB

L_BKLTEN

L_CLKCTLA

L_BKLTCTL

(3 OF 10)

LVDS

TV

VGA

PCI-EXPRESS GRAPHICS

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

IO

OUT

IN

OUT

IN

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Tie VCC_TXLVDS and VCCA_LVDS to GND. If SDVO is used

Can leave all signals NC if LVDS is not implemented

CRT Disable

TV-Out Disable

Composite: DACA only

TV-Out Signal Usage:

HSYNC and VSYNC to GND. Tie VCCA_CRTDAC to VCC Core

Unused DAC outputs must remain powered, but can omit

S-Video: DACB & DACC only

connect to GND through 75-ohm resistors.

Tie VCCD_TVDAC, VCCD_QTVDAC, VCCA_TVDACx, and

Component: DACA, DACB & DACC

rail, and tie VSSA_CRTDAC and VCC_SYNC to GND.

VCCA_TVBG to 1.5V power rail. Tie VSSA_TVBG to GND.

Tie DACx_OUT, IRTNx, and IREF to 1.5V power rail.

filtering components. Unused DAC outputs should

Tie R/R#/G/G#/B/B# and IREF to VCC Core rail, tie

VCCD_LVDS must remain powered with proper decoupling.

LVDS Disable

Otherwise, tie VCCD_LVDS to GND also.

SDVOC_CLKP

SDVOC_BLUE

SDVOC_GREEN

SDVOC_RED

SDVOB_BLUE

SDVOB_CLKP

SDVOB_RED# SDVOB_GREEN#

SDVOB_BLUE#

SDVOB_CLKN SDVOC_RED#

SDVOC_GREEN# SDVOC_BLUE#

SDVOC_CLKN

SDVOB_RED

SDVOB_GREEN

SDVO_FLDSTALL

SDVO_INT

SDVO_TVCLKIN

SDVO_INT#

SDVO_TVCLKIN#

SDVO Alternate Function

SDVO_FLDSTALL#

B19

B18

B16

J20

A19

C18

A16

F29

F28

D30

D29

G30

F30

E27

E26

A37

A36

B35

B34

C37

B37

A33

A32

C32

C33

F32

C35

B38

G25

G26

H29

H30

J30

D32

G23

R40

P36

N40

M36

L40

J36

H40

G36

AB40

AA36

Y40

W36

V40

T36

F40

D36

T40

R36

P40

N36

M40

L36

J40

H36

AC40

AB36

AA40

Y36

W40

V36

G40

F36

R38

P34

N38

M34

L38

J34

H38

G34

AB38

AA34

Y38

W34

V38

T34

F38

D34

T38

R34

P38

N34

M38

L34

J38

H34

AC38

AB34

AA38

Y34

W38

V34

G38

F34

D38

D40

H23

B21

A21

J22

B22

C22

C25

C26

D23

E23

U1200

OMIT

945GM

NB

BGA

2

1

R1310

24.9

1% 1/16W MF-LF 402

NB PEG / Video Interfaces

SYNC_DATE=08/04/2006

SYNC_MASTER=M50_HENRY

13 97

H

051-7039

PEG_R2D_C_N<15>

PEG_R2D_C_N<13>

PEG_R2D_C_N<14>

PEG_R2D_C_N<12>

PEG_R2D_C_N<11>

PEG_R2D_C_N<10>

PEG_R2D_C_N<9>

PEG_R2D_C_N<8>

PEG_R2D_C_N<7>

PEG_R2D_C_N<4>

PEG_R2D_C_N<5>

PEG_R2D_C_N<6>

PEG_D2R_N<10>

PEG_D2R_N<8>

PEG_D2R_N<6>

PEG_D2R_N<5>

PEG_D2R_N<4>

PEG_D2R_N<3>

PEG_D2R_N<9>

PEG_D2R_N<7>

PEG_D2R_N<14>

PEG_D2R_N<13>

PEG_D2R_N<12>

PEG_D2R_N<11>

PEG_D2R_N<15>

LVDS_BKLTCTL

LVDS_CLKCTLA

PEG_D2R_P<1>

CRT_HSYNC_R

CRT_VSYNC_R

LVDS_CLKCTLB

=PP1V5_S0_NB_PCIE

LVDS_BKLTEN

PEG_R2D_C_P<15>

PEG_R2D_C_P<14>

PEG_R2D_C_P<13>

PEG_R2D_C_P<11>

PEG_R2D_C_P<12>

PEG_R2D_C_P<10>

PEG_R2D_C_P<9>

PEG_R2D_C_P<8>

PEG_R2D_C_P<6>

PEG_R2D_C_P<7>

PEG_R2D_C_P<5>

PEG_R2D_C_P<4>

PEG_R2D_C_P<3>

PEG_R2D_C_P<1>

PEG_R2D_C_P<2>

PEG_R2D_C_P<0>

PEG_R2D_C_N<2>

PEG_R2D_C_N<3>

PEG_R2D_C_N<0> PEG_R2D_C_N<1>

PEG_D2R_P<15>

PEG_D2R_P<13> PEG_D2R_P<14>

PEG_D2R_P<12>

PEG_D2R_P<11>

PEG_D2R_P<8>

PEG_D2R_P<9>

PEG_D2R_P<10>

PEG_D2R_P<7>

PEG_D2R_P<6>

PEG_D2R_P<5>

PEG_D2R_P<3>

PEG_D2R_P<4>

PEG_D2R_P<2>

PEG_D2R_P<0>

PEG_D2R_N<2>

PEG_D2R_N<1>

PEG_D2R_N<0>

PEG_COMP

LVDS_DDC_DATA

LVDS_DDC_CLK

LVDS_IBG

TP_LVDS_VBG

LVDS_VREFH

LVDS_VREFL

LVDS_VDDEN

LVDS_A_CLK_N LVDS_A_CLK_P

LVDS_B_CLK_N LVDS_B_CLK_P

LVDS_A_DATA_N<0>

LVDS_A_DATA_N<1>

LVDS_A_DATA_N<2>

LVDS_A_DATA_P<0> LVDS_A_DATA_P<1>

LVDS_A_DATA_P<2>

LVDS_B_DATA_N<0> LVDS_B_DATA_N<1>

LVDS_B_DATA_N<2>

LVDS_B_DATA_P<0>

LVDS_B_DATA_P<1> LVDS_B_DATA_P<2>

CRT_IREF

CRT_DDC_DATA

CRT_RED_L

CRT_DDC_CLK

CRT_RED

CRT_GREEN

CRT_GREEN_L

CRT_BLUE CRT_BLUE_L

TV_IRTNC

TV_IRTNB

TV_IRTNA

TV_IREF

TV_DACC_OUT

TV_DACB_OUT

TV_DACA_OUT

84

5

19

5

19

3

5

19

www.Vinaﬁx.vn

Preliminary

SM_CS0*

RSVD15

RSVD14

SM_CKE2

RSVD2

RSVD3

RSVD6

RSVD4

RSVD5

RSVD8

RSVD7

RSVD9

RSVD1

RSVD10

RSVD11

RSVD12

RSVD13

CFG1

CFG0

CFG2

CFG3

CFG4

CFG6

CFG5

CFG7

CFG8

CFG9

CFG10

CFG11

CFG12

CFG13

CFG14

CFG17

CFG16

CFG15

CFG18

CFG19

CFG20

PM_BM_BUSY*

PM_EXTTS0*

PM_EXTTS1*

PW_THRMTRIP*

PWROK

RSTIN*

SDVO_CTRLCLK

SDVO_CTRLDATA

ICH_SYNC*

CLK_REQ*

NC2

NC3

NC4

NC5

NC6

NC7

NC8

NC9

NC0

NC1

NC13

NC12

NC11

NC10

NC18

NC17

NC16

NC15

NC14

SM_CK0

SM_CK1

SM_CK2

SM_CK0*

SM_CK3

SM_CK1*

SM_CK2*

SM_CK3*

SM_CKE0

SM_CKE1

SM_CKE3

SM_CS1*

SM_CS2*

SM_CS3*

SMOCDCOMP0

SMOCDCOMP1

SM_ODT1

SM_ODT0

SM_ODT2

SMRCOMP*

SM_ODT3

SMRCOMP

SMVREF0

SMVREF1

G_CLKIN*

G_CLKIN

D_REFCLKIN*

D_REFCLKIN

D_REFSSCLKIN*

D_REFSSCLKIN

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP2

DMI_TXP1

DMI_TXP3

DDR MUXING

CFG

NC PM

CLKDMI

MISC

(2 OF 10)

RSVD

IN

OUT

IN

IO

OUT

IN

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC NC

IPD

(LA_DATAN3)

(LA_DATAP3) (LB_DATAN3)

(LB_DATAP3)

(H_EDRDY#)

(D_PLLMON1)

(H_PROCHOT#)

(TESTIN#)

(TV_DCONSEL0)

(TV_DCONSEL1)

(H_PLLMON1)

(H_PLLMON1#)

(H_PCREQ#)

(VSS_MCHDETECT)

(D_PLLMON1#)

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

IPU

IPD

IPU

NC

IPU

NC

AK41

AK1

AV9

AT9

AF10

AL20

AU21

AY20

BA12

BA13

AW21

AY21

AW12

AW13

AY29

BA29

AT20

AU20

AY40

AW40

AY7

AW7

AT1

AR1

AW35

AY35

H27

H28

K30

J19

H7

AF11

AG11

F7

F3

R32

D27

D28

A34

A35

A41

J29

T32

AH34

AH33

G6

H26

F25

G28

B41

BA1

BA2

BA3

BA39

BA40

BA41

C1

A3

A39

A4

A40

AW1

AW41

AY1

AY41

B2

C41

D1

K28

AF33

AG33

AG41

AF37

AE41

AC37

AH41

AG37

AF41

AE37

AG39

AF35

AE39

AC35

AH39

AG35

AF39

AE35

C40

D41

A27

A26

H32

G16

D16

D19

E18

F15

E15

F18

J26

J18

K27

J25

H15

G18

H16

C15

K15

G15

D15

E16

K18

K16

U1200

BGA

NB

945GM

OMIT

21

R1430

402

MF-LF

1/16W

5%

100

2

1

R1441

10K

402

5%

MF-LF

1/16W

2

1

R1440

10K

402

5% 1/16W MF-LF

2

1

C1416

0.1uF

402

CERM

10V

20%

2

1

C1415

0.1uF

402

CERM

10V

20%

2

1

R1410

1/16W

1%

402

MF-LF

80.6

2

1

R1411

1/16W

1%

402

MF-LF

80.6

2

1

R1420

1/16W

5%

402

MF-LF

10K

SYNC_MASTER=M50_HENRY

SYNC_DATE=08/04/2006

NB Misc Interfaces

051-7039

H

9714

NB_BSEL<1>

TP_NB_XOR_FSB2_H7

TP_NB_XOR_LVDS_D27

TP_NB_XOR_LVDS_D28

TP_NB_XOR_LVDS_A34

MEM_VREF_NB_1

MEM_VREF_NB_0

MEM_RCOMP

MEM_RCOMP_L

=PP1V8_S3_MEM_NB

MEM_CKE<2>

MEM_CS_L<1>

MEM_CS_L<2>

MEM_CS_L<3>

MEM_ODT<1> MEM_ODT<2>

NB_CFG<12>

MEM_CS_L<0>

NB_BSEL<0>

NB_BSEL<2>

NB_CFG<3>

NB_CFG<4>

NB_CFG<6>

NB_CFG<5>

NB_CFG<7>

NB_CFG<9> NB_CFG<10>

NB_CFG<14>

NB_CFG<17>

NB_CFG<16>

NB_CFG<15>

NB_CFG<19>

NB_CFG<20>

PM_BMBUSY_L

PM_THRMTRIP_L VR_PWRGOOD_DELAY

SDVO_CTRLCLK SDVO_CTRLDATA

NB_SB_SYNC_L

MEM_CLK_P<0>

MEM_CLK_P<1> MEM_CLK_P<2>

MEM_CLK_N<0>

MEM_CLK_P<3>

MEM_CLK_N<1> MEM_CLK_N<2>

MEM_CLK_N<3>

MEM_CKE<0> MEM_CKE<1>

MEM_CKE<3>

MEM_ODT<0>

MEM_ODT<3>

NB_CLK100M_GCLKIN_N

NB_CLK100M_GCLKIN_P

DMI_S2N_N<0>

DMI_S2N_N<1>

DMI_S2N_N<2> DMI_S2N_N<3>

DMI_S2N_P<0>

DMI_S2N_P<1> DMI_S2N_P<2>

DMI_S2N_P<3>

DMI_N2S_N<0>

DMI_N2S_N<1> DMI_N2S_N<2>

DMI_N2S_N<3>

DMI_N2S_P<0>

DMI_N2S_P<2>

DMI_N2S_P<1>

DMI_N2S_P<3>

NB_RST_IN_L

NB_CFG<8>

NB_CFG<11>

NB_CFG<13>

NB_CFG<18>

=PP3V3_S0_NB

PM_DPRSLPVR

TP_NB_TESTIN_L

TP_NB_XOR_LVDS_A35

NB_TV_DCONSEL0

NB_TV_DCONSEL1

=PP3V3_S0_NB

NB_CLK_DREFSSCLKIN_P

NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFCLKIN_P

NB_CLK_DREFCLKIN_N

CLK_NB_OE_L

NB_RST_IN_L_R

PM_EXTTS_L

TP_NB_RSVD3_F3

TP_NB_RSVD4_F7

19

75

20

75

20

16

30

26

30

22

14

23

14

59

34

3

29

28

29

28

29

5

28

34

5

20

5

20

5

20

23

5

19

22

28

29

28

29

28

29

28

29

28

29

34

5

22

5

22

5

22

5

22

6

5

20

3

5

3

19

33

5

58

www.Vinaﬁx.vn

Preliminary

SA_DQ1

SA_DQ0

SA_DQ2

SA_DQ3

SA_DQ4

SA_DQ5

SA_DQ6

SA_DQ7

SA_DQ8

SA_DQ9

SA_DQ10

SA_DQ12

SA_DQ11

SA_DQ13

SA_DQ14

SA_DQ15

SA_DQ16

SA_DQ17

SA_DQ18

SA_DQ19

SA_DQ20

SA_DQ21

SA_DQ22

SA_DQ23

SA_DQ24

SA_DQ25

SA_DQ26

SA_DQ27

SA_DQ29

SA_DQ28

SA_DQ30

SA_DQ31

SA_DQ32

SA_DQ33

SA_DQ35

SA_DQ34

SA_DQ36

SA_DQ37

SA_DQ38

SA_DQ39

SA_DQ40

SA_DQ41

SA_DQ42

SA_DQ43

SA_DQ44

SA_DQ46

SA_DQ45

SA_DQ47

SA_DQ48

SA_DQ49

SA_DQ50

SA_DQ51

SA_DQ52

SA_DQ53

SA_DQ54

SA_DQ55

SA_DQ56

SA_DQ57

SA_DQ58

SA_DQ59

SA_DQ60

SA_DQ61

SA_DQ62

SA_DQ63

SA_BS1

SA_BS0

SA_BS2

SA_CAS*

SA_DM0

SA_DM1

SA_DM2

SA_DM3

SA_DM5

SA_DM4

SA_DM7

SA_DM6

SA_DQS0

SA_DQS2

SA_DQS1

SA_DQS3

SA_DQS5

SA_DQS4

SA_DQS6

SA_DQS7

SA_DQS3*

SA_DQS2*

SA_DQS4*

SA_DQS5*

SA_DQS6*

SA_DQS7*

SA_MA1

SA_MA0

SA_MA2

SA_MA3

SA_MA5

SA_MA4

SA_MA6

SA_MA7

SA_MA9

SA_MA8

SA_MA10

SA_MA11

SA_MA12

SA_MA13

SA_RAS*

SA_RCVENIN*

SA_RCVENOUT*

SA_WE*

SA_DQS1*

SA_DQS0*

(4 OF 10)

DDR SYSTEM MEMORY A

IO

OUT

IO

OUT

IO

IO IO

IO

SB_DQ1

SB_DQ0

SB_DQ2

SB_DQ3

SB_DQ4

SB_DQ5

SB_DQ6

SB_DQ7

SB_DQ8

SB_DQ9

SB_DQ10

SB_DQ12

SB_DQ11

SB_DQ13

SB_DQ14

SB_DQ15

SB_DQ16

SB_DQ17

SB_DQ18

SB_DQ19

SB_DQ20

SB_DQ21

SB_DQ22

SB_DQ23

SB_DQ24

SB_DQ25

SB_DQ26

SB_DQ27

SB_DQ29

SB_DQ28

SB_DQ30

SB_DQ31

SB_DQ32

SB_DQ33

SB_DQ35

SB_DQ34

SB_DQ36

SB_DQ37

SB_DQ38

SB_DQ39

SB_DQ40

SB_DQ41

SB_DQ42

SB_DQ43

SB_DQ44

SB_DQ46

SB_DQ45

SB_DQ47

SB_DQ48

SB_DQ49

SB_DQ50

SB_DQ51

SB_DQ52

SB_DQ53

SB_DQ54

SB_DQ55

SB_DQ56

SB_DQ57

SB_DQ58

SB_DQ59

SB_DQ60

SB_DQ61

SB_DQ62

SB_DQ63

SB_BS1

SB_BS0

SB_BS2

SB_CAS*

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM5

SB_DM4

SB_DM7

SB_DM6

SB_DQS0

SB_DQS2

SB_DQS1

SB_DQS3

SB_DQS5

SB_DQS4

SB_DQS6

SB_DQS7

SB_DQS3*

SB_DQS2*

SB_DQS4*

SB_DQS5*

SB_DQS6*

SB_DQS7*

SB_MA1

SB_MA0

SB_MA2

SB_MA3

SB_MA5

SB_MA4

SB_MA6

SB_MA7

SB_MA9

SB_MA8

SB_MA10

SB_MA11

SB_MA12

SB_MA13

SB_RAS*

SB_RCVENIN*

SB_RCVENOUT*

SB_WE*

SB_DQS1*

SB_DQS0*

(5 OF 10)

DDR SYSTEM MEMORY B

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC NC

AY14

AK24

AK23

AW14

AT16

AW17

AU17

AV17

AU16

BA17

BA16

AW16

AV12

AV20

AT17

AU13

AU14

AY16

AH5

AG5

AN3

AP3

AL8

AN8

AM12

AN12

AM21

AM22

AN27

AN28

AU33

AT33

AK32

AK33

AP33

AN35

AH31

AF8

AF4

AH6

AG9

AJ32

AF6

AG4

AF9

AG7

AL2

AN1

AT3

AV2

AN2

AP1

AK35

AW2

AY2

AL5

AT5

AN9

AP9

AK7

AK8

AN7

AK9

AJ36

AL12

AL14

AT12

AT13

AP12

AP13

AR14

AR12

AT21

AP20

AM33

AP24

AL23

AN20

AP21

AL22

AP23

AP26

AM24

AL28

AK28

AM31

AN24

AM26

AL27

AK26

AN33

AM34

AM36

AN38

AP31

AR31

AJ34

AJ35

AH4

AR3

AL9

AM14

AN22

AL26

AM35

AJ33

AY13

BA20

AV14

AU12

U1200

OMIT

NB

945GM

BGA

AR27

AK18

AK16

AU23

AW27

AV27

AV28

AU27

AT28

AT27

AR28

AY24

AR23

AY27

BA27

AV24

AW24

AY23

AP5

AN5

AT7

AR7

AT10

AR10

AP16

AR16

AP29

AR29

AT35

AU35

AU39

AT39

AM40

AM39

AV41

AT40

AP41

AJ3

AJ5

AK5

AT4

AN41

AK3

AK4

AR5

AV4

AY5

AW5

AY9

AY10

AW4

BA4

AK38

AW10

BA10

AJ8

AK10

AH11

AK13

AN10

AJ9

AH10

AJ11

AJ38

AL15

AP15

AM16

AN17

AN14

AP14

AL19

AM19

AW29

AV29

AR41

AW31

AU31

AU29

AT31

BA33

AY33

AP34

AP35

AU36

BA36

AP39

AP36

AR36

AV36

BA38

AY38

AW38

AR40

AP38

AV38

AU38

AJ37

AK39

AN4

BA5

AH8

AL17

BA31

AT36

AR38

AK36

AR24

AY28

AV23

AT24

U1200

OMIT

NB

945GM

BGA

15 97

H

051-7039

NB DDR2 Interfaces

SYNC_MASTER=M50_HENRY

SYNC_DATE=08/04/2006

MEM_A_DQ<5>

MEM_A_DQS_N<0> MEM_A_DQS_N<1>

MEM_A_WE_L

MEM_A_RAS_L

MEM_A_A<13>

MEM_A_A<12>

MEM_A_A<11>

MEM_A_A<10>

MEM_A_A<8> MEM_A_A<9>

MEM_A_A<7>

MEM_A_A<6>

MEM_A_A<4>

MEM_A_A<5>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<0>

MEM_A_A<1>

MEM_A_DQS_N<7>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<4>

MEM_A_DQS_N<2>

MEM_A_DQS_N<3>

MEM_A_DQS_P<7>

MEM_A_DQS_P<6>

MEM_A_DQS_P<4>

MEM_A_DQS_P<5>

MEM_A_DQS_P<3>

MEM_A_DQS_P<1>

MEM_A_DQS_P<2>

MEM_A_DQS_P<0>

MEM_A_DM<6> MEM_A_DM<7>

MEM_A_DM<4>

MEM_A_DM<5>

MEM_A_DM<3>

MEM_A_DM<2>

MEM_A_DM<1>

MEM_A_DM<0>

MEM_A_CAS_L

MEM_A_BS<2>

MEM_A_BS<0>

MEM_A_BS<1>

MEM_A_DQ<63>

MEM_A_DQ<62>

MEM_A_DQ<61>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DQ<57>

MEM_A_DQ<56>

MEM_A_DQ<55>

MEM_A_DQ<54>

MEM_A_DQ<53>

MEM_A_DQ<52>

MEM_A_DQ<51>

MEM_A_DQ<50>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DQ<47>

MEM_A_DQ<45> MEM_A_DQ<46>

MEM_A_DQ<44>

MEM_A_DQ<43>

MEM_A_DQ<42>

MEM_A_DQ<41>

MEM_A_DQ<40>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DQ<37>

MEM_A_DQ<36>

MEM_A_DQ<34> MEM_A_DQ<35>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_A_DQ<31>

MEM_A_DQ<30>

MEM_A_DQ<28>

MEM_A_DQ<29>

MEM_A_DQ<27>

MEM_A_DQ<26>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_A_DQ<13>

MEM_A_DQ<11>

MEM_A_DQ<12>

MEM_A_DQ<10>

MEM_A_DQ<9>

MEM_A_DQ<8>

MEM_A_DQ<7>

MEM_A_DQ<6>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<0>

MEM_A_DQ<1>

MEM_B_DQS_N<0> MEM_B_DQS_N<1>

MEM_B_WE_L

MEM_B_RAS_L

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<10>

MEM_B_A<8> MEM_B_A<9>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<4>

MEM_B_A<5>

MEM_B_A<3>

MEM_B_A<2>

MEM_B_A<0>

MEM_B_A<1>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<5>

MEM_B_DQS_N<4>

MEM_B_DQS_N<2>

MEM_B_DQS_N<3>

MEM_B_DQS_P<7>

MEM_B_DQS_P<6>

MEM_B_DQS_P<4>

MEM_B_DQS_P<5>

MEM_B_DQS_P<3>

MEM_B_DQS_P<1>

MEM_B_DQS_P<2>

MEM_B_DQS_P<0>

MEM_B_DM<6> MEM_B_DM<7>

MEM_B_DM<4>

MEM_B_DM<5>

MEM_B_DM<3>

MEM_B_DM<2>

MEM_B_DM<1>

MEM_B_DM<0>

MEM_B_CAS_L

MEM_B_BS<2>

MEM_B_BS<0>

MEM_B_BS<1>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DQ<47>

MEM_B_DQ<45> MEM_B_DQ<46>

MEM_B_DQ<44>

MEM_B_DQ<43>

MEM_B_DQ<42>

MEM_B_DQ<41>

MEM_B_DQ<40>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_DQ<34> MEM_B_DQ<35>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_B_DQ<31>

MEM_B_DQ<30>

MEM_B_DQ<28>

MEM_B_DQ<29>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_B_DQ<13>

MEM_B_DQ<11>

MEM_B_DQ<12>

MEM_B_DQ<10>

MEM_B_DQ<9>

MEM_B_DQ<8>

MEM_B_DQ<7>

MEM_B_DQ<6>

MEM_B_DQ<5>

MEM_B_DQ<4>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<0>

MEM_B_DQ<1>

30

28

29

www.Vinaﬁx.vn

Preliminary

VCC_SM19

VCC_SM107

VCC_SM105

VCC_SM106

VCC_SM102

VCC_SM104

VCC_SM103

VCC_SM100

VCC_SM101

VCC_SM98

VCC_SM99

VCC_SM97

VCC_SM95

VCC_SM96

VCC_SM93

VCC_SM94

VCC_SM92

VCC_SM91

VCC_SM90

VCC_SM89

VCC_SM88

VCC_SM86

VCC_SM87

VCC_SM85

VCC_SM84

VCC_SM83

VCC_SM81

VCC_SM80

VCC_SM82

VCC_SM79

VCC_SM78

VCC_SM77

VCC_SM74

VCC_SM75

VCC_SM76

VCC_SM73

VCC_SM72

VCC_SM70

VCC_SM71

VCC_SM68

VCC_SM67

VCC_SM69

VCC_SM65

VCC_SM66

VCC_SM64

VCC_SM63

VCC_SM62

VCC_SM61

VCC_SM60

VCC_SM59

VCC_SM58

VCC_SM56

VCC_SM57

VCC_SM55

VCC_SM53

VCC_SM54

VCC_SM52

VCC_SM50

VCC_SM51

VCC_SM49

VCC_SM48

VCC_SM46

VCC_SM47

VCC_SM44

VCC_SM45

VCC_SM43

VCC_SM41

VCC_SM42

VCC_SM40

VCC_SM39

VCC_SM37

VCC_SM38

VCC_SM36

VCC_SM34

VCC_SM35

VCC_SM32

VCC_SM33

VCC_SM30

VCC_SM31

VCC_SM28

VCC_SM29

VCC_SM27

VCC_SM26

VCC_SM25

VCC_SM23

VCC_SM24

VCC_SM22

VCC_SM21

VCC_SM20

VCC_SM18

VCC_SM16

VCC_SM17

VCC_SM15

VCC_SM13

VCC_SM14

VCC_SM11

VCC_SM12

VCC_SM10

VCC_SM9

VCC_SM8

VCC_SM7

VCC_SM6

VCC_SM5

VCC_SM4

VCC_SM3

VCC_SM0

VCC_SM1

VCC_SM2

VCC_110

VCC_109

VCC_108

VCC_105

VCC_106

VCC_107

VCC_104

VCC_103

VCC_101

VCC_100

VCC_102

VCC_98

VCC_99

VCC_96

VCC_97

VCC_95

VCC_94

VCC_93

VCC_92

VCC_91

VCC_90

VCC_88

VCC_89

VCC_87

VCC_86

VCC_85

VCC_83

VCC_84

VCC_82

VCC_80

VCC_81

VCC_79

VCC_78

VCC_76

VCC_77

VCC_74

VCC_73

VCC_75

VCC_72

VCC_71

VCC_70

VCC_69

VCC_68

VCC_67

VCC_66

VCC_65

VCC_64

VCC_62

VCC_63

VCC_61

VCC_60

VCC_59

VCC_57

VCC_58

VCC_55

VCC_56

VCC_53

VCC_54

VCC_52

VCC_50

VCC_51

VCC_49

VCC_46

VCC_47

VCC_48

VCC_44

VCC_45

VCC_43

VCC_42

VCC_41

VCC_40

VCC_39

VCC_38

VCC_37

VCC_36

VCC_34

VCC_35

VCC_33

VCC_32

VCC_31

VCC_30

VCC_28

VCC_29

VCC_25

VCC_26

VCC_27

VCC_24

VCC_23

VCC_21

VCC_20

VCC_22

VCC_13

VCC_14

VCC_12

VCC_16

VCC_15

VCC_17

VCC_18

VCC_19

VCC_11

VCC_10

VCC_9

VCC_8

VCC_7

VCC_4

VCC_5

VCC_6

VCC_2

VCC_3

VCC_0

VCC_1

(6 OF 10)

VCC

VCCAUX_NCTF57

VCCAUX_NCTF56

VCCAUX_NCTF55

VCCAUX_NCTF54

VCCAUX_NCTF53

VCCAUX_NCTF52

VCCAUX_NCTF51

VCCAUX_NCTF50

VCCAUX_NCTF49

VCCAUX_NCTF47

VCCAUX_NCTF48

VCCAUX_NCTF45

VCCAUX_NCTF44

VCCAUX_NCTF46

VCCAUX_NCTF40

VCCAUX_NCTF39

VCCAUX_NCTF37

VCCAUX_NCTF38

VCCAUX_NCTF36

VCCAUX_NCTF34

VCCAUX_NCTF35

VCCAUX_NCTF32

VCCAUX_NCTF33

VCCAUX_NCTF31

VCCAUX_NCTF30

VCCAUX_NCTF29

VCCAUX_NCTF27

VCCAUX_NCTF28

VCCAUX_NCTF26

VCCAUX_NCTF24

VCCAUX_NCTF25

VCCAUX_NCTF22

VCCAUX_NCTF21

VCCAUX_NCTF23

VCCAUX_NCTF42

VCCAUX_NCTF43

VCCAUX_NCTF41

VCCAUX_NCTF19

VCCAUX_NCTF20

VCCAUX_NCTF18

VCCAUX_NCTF17

VCCAUX_NCTF16

VCCAUX_NCTF14

VCCAUX_NCTF15

VCCAUX_NCTF13

VCCAUX_NCTF12

VCCAUX_NCTF11

VCCAUX_NCTF9

VCCAUX_NCTF10

VCCAUX_NCTF8

VCCAUX_NCTF7

VCCAUX_NCTF6

VCCAUX_NCTF5

VCCAUX_NCTF4

VCCAUX_NCTF3

VCCAUX_NCTF1

VCCAUX_NCTF0

VCCAUX_NCTF2

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF7

VSS_NCTF8

VSS_NCTF5

VSS_NCTF6

VSS_NCTF4

VSS_NCTF2

VSS_NCTF3

VSS_NCTF0

VSS_NCTF1

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF61

VCC_NCTF62

VCC_NCTF63

VCC_NCTF60

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF56

VCC_NCTF55

VCC_NCTF53

VCC_NCTF54

VCC_NCTF52

VCC_NCTF50

VCC_NCTF51

VCC_NCTF49

VCC_NCTF48

VCC_NCTF46

VCC_NCTF47

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF41

VCC_NCTF40

VCC_NCTF42

VCC_NCTF38

VCC_NCTF39

VCC_NCTF36

VCC_NCTF37

VCC_NCTF34

VCC_NCTF35

VCC_NCTF33

VCC_NCTF31

VCC_NCTF32

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCC_NCTF18

VCC_NCTF19

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF13

VCC_NCTF14

VCC_NCTF11

VCC_NCTF12

VCC_NCTF10

VCC_NCTF8

VCC_NCTF9

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF3

VCC_NCTF2

VCC_NCTF0

VCC_NCTF1

(7 OF 10)

NCTF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Place in cavity

1.05V or 1.5V

Layout Note:

These connections can break without

NCTF balls are Not Critical To Function

impacting part performance.

Layout Note:

(Need to better define cavity)

Place near pin BA23

Place near pin BA15

AT6

AV6

AW6

AY6

BA6

AP8

AR8

AT8

AV8

AW8

AT34

AY8

BA8

AK11

AG12

AH12

AJ12

AK12

AH13

AJ13

AJ14

AU34

AJ15

AR15

AT15

AU15

AV15

AW15

AY15

BA15

AH16

AJ16

AV34

AH17

AJ17

AJ18

AJ19

AK19

AP19

AR19

AT19

AU19

AV19

AW34

AW19

AY19

BA19

AK20

AK21

AJ22

AK22

AP22

AR22

AT22

AY34

AU22

AV22

AW22

AY22

BA22

AJ23

BA23

AH24

AJ24

AH25

BA34

AJ25

AH26

AJ26

AR26

AT26

AU26

AV26

AW26

AY26

BA26

AU40

AH27

AJ27

AH28

AJ28

AH29

AJ29

AK29

AL29

AM29

AM30

AM41

AN30

AP30

AR30

AT30

AU30

AV30

AW30

AY30

BA30

AJ1

AV1

AJ6

AK6

AL6

AN6

AP6

AR6

AR34

AT41

AU41

N19

Y19

AA19

AB19

L20

M20

N20

P20

W20

Y20

V32

AB20

AC20

L21

M21

N21

W21

AA21

AC21

L22

M22

W32

N22

P22

W22

Y22

AB22

AC22

L23

M23

N23

P23

Y32

Y23

AA23

AB23

M24

N24

P24

L25

M25

N25

L26

AA32

N26

P26

L27

M27

N27

P27

L28

M28

N28

P28

J33

R28

T28

U28

V28

Y28

AA28

AB28

L29

M29

P29

L33

R29

U29

V29

W29

Y29

AA29

L30

M30

N30

P30

N33

R30

T30

U30

V30

W30

Y30

AA30

M31

N31

P31

P33

R31

T31

V31

W31

AA31

J32

L32

M32

L16

N32

M16

N16

M17

N17

P17

L18

M18

N18

L19

M19

P32

W33

AA33

U1200

OMIT

BGA

NB

945GM

2

1

C1610

402

6.3V CERM-X5R

0.47UF

10%

2

1

C1621

10UF

CERM

20%

6.3V

805-1

2

1

C1620

6.3V

20%

10UF

CERM

805-1

AE18

AE19

AE20

AE21

AE22

AE23

AE24

AE25

U17

Y17

AC17

AE26

AE27

AF23

AG23

AF24

AG24

R15

T15

U15

V15

W15

Y15

AA15

AB15

AF25

AC15

AD15

AE15

AF15

AG15

R16

T16

U16

V16

W16

AG25

Y16

AA16

AB16

AC16

AD16

AE16

AF16

AG16

R17

T17

AF26

V17

W17

AA17

AB17

AD17

AE17

AF17

AG17

R18

AF18

AG26

AG18

R19

AF19

AG19

AF20

AG20

AF21

AG21

AF22

AG22

AF27

AG27

R27

T27

T18

U18

V18

U27

W18

Y18

AA18

AB18

AC18

AD18

T19

U19

V19

AD19

V27

R20

T20

U20

V20

AD20

R21

T21

U21

V21

AD21

W27

R22

T22

U22

V22

AD22

R23

T23

U23

V23

AD23

Y27

R24

T24

U24

V24

W24

Y24

AA24

AB24

AC24

AD24

AA27

R25

T25

U25

V25

W25

Y25

AA25

AB25

AC25

AD25

AB27

R26

T26

U26

V26

W26

Y26

AA26

AB26

AC26

AD26

AC27

AD27

U1200

OMIT

BGA

NB

945GM

2

1

C1611

402

6.3V CERM-X5R

0.47UF

10%

2

1

C1612

402

6.3V

CERM-X5R

0.47UF

10%

2

1

C1613

402

6.3V CERM-X5R

0.47UF

10%

2

1

C1614

402

6.3V

CERM-X5R

0.47UF

10%

2

1

C1615

402

6.3V CERM-X5R

0.47UF

10%

16 97

H

051-7039

SYNC_MASTER=M51_HENRY

SYNC_DATE=08/04/2006

NB Power 1

=PP1V8_S3_MEM_NB

NB_VCCSM_LF4

NB_VCCSM_LF5

=PPVCORE_S0_NB

=PP1V5_S0_NB_VCCAUX

=PPVCORE_S0_NB

NB_VCCSM_LF1

NB_VCCSM_LF2

19

14

16

17

16

3

www.Vinaﬁx.vn

Preliminary

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT15

VTT14

VTT16

VTT18

VTT17

VTT19

VTT20

VTT21

VTT22

VTT23

VTT24

VTT25

VTT27

VTT26

VTT28

VTT29

VTT31

VTT30

VTT32

VTT34

VTT33

VTT35

VTT36

VTT37

VTT39

VTT38

VTT40

VTT41

VTT42

VTT43

VTT44

VTT45

VTT48

VTT46

VTT47

VTT49

VTT50

VTT52

VTT51

VTT53

VTT55

VTT54

VTT57

VTT56

VTT58

VTT59

VTT60

VTT61

VTT62

VTT64

VTT63

VTT65

VTT66

VTT67

VTT69

VTT68

VTT70

VTT71

VTT73

VTT72

VTT74

VTT76

VTT75

VCCSYNC

VCC_TXLVDS0

VCC_TXLVDS1

VCC_TXLVDS2

VCC3G0

VCC3G1

VCC3G3

VCC3G2

VCC3G4

VCC3G6

VCC3G5

VCCA_3GPLL

VCCA_3GBG

VSSA_3GBG

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCCA_DPLLB

VCCA_DPLLA

VCCA_HPLL

VSSA_LVDS

VCCA_LVDS

VCCA_MPLL

VCCA_TVBG

VSSA_TVBG

VCCA_TVDACC0

VCCA_TVDACC1

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACA0

VCCA_TVDACA1

VCCD_HMPLL0

VCCD_HMPLL1

VCCD_LVDS2

VCCD_LVDS0

VCCD_LVDS1

VCCD_TVDAC

VCC_HV1

VCC_HV2

VCC_HV0

VCCD_QTVDAC

VCCAUX19

VCCAUX18

VCCAUX17

VCCAUX16

VCCAUX14

VCCAUX15

VCCAUX13

VCCAUX12

VCCAUX11

VCCAUX10

VCCAUX0

VCCAUX1

VCCAUX2

VCCAUX3

VCCAUX4

VCCAUX6

VCCAUX5

VCCAUX9

VCCAUX8

VCCAUX7

VCCAUX21

VCCAUX20

VCCAUX23

VCCAUX24

VCCAUX22

VCCAUX25

VCCAUX26

VCCAUX29

VCCAUX28

VCCAUX27

VCCAUX30

VCCAUX31

VCCAUX33

VCCAUX32

VCCAUX34

VCCAUX35

VCCAUX36

VCCAUX38

VCCAUX37

VCCAUX39

VCCAUX40

POWER

(8 OF 10)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

L14

M14

M1

N1

P1

R1

AB1

D2

M2

N14

P2

R2

M3

N3

P3

R3

M4

N4

P4

M5

P14

N5

P5

R5

A6

M6

P6

R6

M7

N7

P7

R14

M8

N8

P8

R8

M9

N9

P9

M10

N10

P10

T14

R10

M11

N11

P11

R11

L12

M12

N12

P12

R12

V14

T12

U12

V12

W12

Y12

AA12

AB12

L13

M13

N13

W14

R13

T13

U13

V13

W13

Y13

AA13

AB13

AC13

AD13

AB14

AC14

G20

B39

G21

H41

H22

D21

H19

C28

B28

A28

AH2

AH1

AF30

AG30

AH30

AJ30

AK30

AD12

AL30

AE12

AF12

AE13

AF13

Y14

AE14

AF14

AG14

AH14

P15

AC31

AH15

P16

P19

AH19

AH20

AJ20

AH21

AJ21

AH22

AE28

AE31

AF28

AG28

AC29

AD29

AE29

AF29

AG29

AC30

AD30

AE30

AF31

AK31

F20

E20

D20

C20

F19

E19

H20

AF2

A38

AF1

C39

B26

E21

F21

AC33

G41

A30

B30

C30

B25

B23

A23

L41

N41

R41

V41

Y41

AB41

AJ41

U1200

OMIT

BGA

NB

945GM

2

1

C1711

10%

0.47UF

6.3V

CERM-X5R

402

2

1

C1712

402

6.3V

20%

X5R

0.22UF

2

1

C1713

10%

0.47UF

CERM-X5R

6.3V

402

SYNC_MASTER=M51_HENRY

NB Power 2

SYNC_DATE=08/04/2006

051-7039

H

9717

NB_VTTLF_CAP2

NB_VTTLF_CAP1

PP1V5_S0_NB_VCCA_DPLLB

=PP2V5_S0_NB_VCCSYNC

=PP2V5_S0_NB_VCC_TXLVDS

PP1V5_S0_NB_VCC3G

PP1V5_S0_NB_VCCA_3GPLL =PP2V5_S0_NB_VCCA_3GBG

GND_NB_VSSA_3GBG

GND_NB_VSSA_CRTDAC

PP1V5_S0_NB_VCCA_DPLLA

PP1V5_S0_NB_VCCA_HPLL

GND_NB_VSSA_LVDS

=PP2V5_S0_NB_VCCA_LVDS

PP1V5_S0_NB_VCCA_MPLL

PP3V3_S0_NB_VCCA_TVBG

GND_NB_VSSA_TVBG

PP3V3_S0_NB_VCCA_TVDACC

PP3V3_S0_NB_VCCA_TVDACB

PP3V3_S0_NB_VCCA_TVDACA

=PP1V5_S0_NB_VCCD_HMPLL

=PP1V5_S0_NB_VCCD_LVDS

PP1V5_S0_NB_VCCD_TVDAC

=PP3V3_S0_NB_VCC_HV

PP1V5_S0_NB_VCCD_QTVDAC

=PP1V5_S0_NB_VCCAUX

PP2V5_S0_NB_VCCA_CRTDAC

NB_VTTLF_CAP3

=PP1V05_S0_NB_VTT

19

16

19

3

19

3

19

3

19

3

19

3

www.Vinaﬁx.vn

Preliminary

VSS_1

VSS_0

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_9

VSS_8

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_19

VSS_18

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_28

VSS_27

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_37

VSS_36

VSS_39

VSS_38

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_49

VSS_48

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_57

VSS_56

VSS_59

VSS_58

VSS_61

VSS_60

VSS_64

VSS_63

VSS_62

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_73

VSS_72

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_82

VSS_80

VSS_81

VSS_84

VSS_83

VSS_85

VSS_87

VSS_86

VSS_89

VSS_88

VSS_91

VSS_90

VSS_92

VSS_93

VSS_94

VSS_96

VSS_95

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_114

VSS_113

VSS_115

VSS_117

VSS_116

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_127

VSS_126

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_137

VSS_136

VSS_138

VSS_139

VSS_140

VSS_141

VSS_143

VSS_142

VSS_144

VSS_145

VSS_146

VSS_147

VSS_148

VSS_149

VSS_150

VSS_151

VSS_152

VSS_153

VSS_154

VSS_155

VSS_156

VSS_158

VSS_157

VSS_159

VSS_160

VSS_161

VSS_162

VSS_164

VSS_163

VSS_165

VSS_166

VSS_167

VSS_168

VSS_169

VSS_170

VSS_172

VSS_171

VSS_173

VSS_174

VSS_175

VSS_176

VSS_177

VSS_178

VSS_179

VSS

(9 OF 10)

VSS_272

VSS_271

VSS_269

VSS_270

VSS_268

VSS_266

VSS_267

VSS_265

VSS_264

VSS_263

VSS_261

VSS_262

VSS_260

VSS_259

VSS_258

VSS_256

VSS_257

VSS_255

VSS_254

VSS_253

VSS_251

VSS_252

VSS_250

VSS_248

VSS_249

VSS_247

VSS_246

VSS_245

VSS_243

VSS_244

VSS_242

VSS_241

VSS_240

VSS_238

VSS_239

VSS_237

VSS_236

VSS_235

VSS_233

VSS_234

VSS_232

VSS_231

VSS_230

VSS_228

VSS_229

VSS_227

VSS_225

VSS_226

VSS_224

VSS_223

VSS_222

VSS_220

VSS_221

VSS_219

VSS_218

VSS_217

VSS_215

VSS_216

VSS_214

VSS_213

VSS_212

VSS_210

VSS_211

VSS_209

VSS_207

VSS_208

VSS_205

VSS_206

VSS_204

VSS_202

VSS_203

VSS_201

VSS_200

VSS_199

VSS_197

VSS_198

VSS_196

VSS_195

VSS_194

VSS_192

VSS_193

VSS_191

VSS_190

VSS_189

VSS_187

VSS_188

VSS_186

VSS_184

VSS_185

VSS_183

VSS_182

VSS_180

VSS_181

VSS_273

VSS_274

VSS_276

VSS_275

VSS_277

VSS_279

VSS_278

VSS_281

VSS_280

VSS_282

VSS_283

VSS_284

VSS_286

VSS_285

VSS_287

VSS_288

VSS_289

VSS_291

VSS_290

VSS_293

VSS_292

VSS_294

VSS_296

VSS_295

VSS_297

VSS_299

VSS_298

VSS_301

VSS_302

VSS_300

VSS_304

VSS_303

VSS_305

VSS_306

VSS_307

VSS_309

VSS_308

VSS_311

VSS_310

VSS_312

VSS_313

VSS_314

VSS_315

VSS_317

VSS_316

VSS_318

VSS_319

VSS_320

VSS_322

VSS_321

VSS_323

VSS_324

VSS_325

VSS_327

VSS_326

VSS_328

VSS_329

VSS_330

VSS_332

VSS_331

VSS_334

VSS_333

VSS_335

VSS_337

VSS_336

VSS_338

VSS_339

VSS_340

VSS_342

VSS_343

VSS_341

VSS_345

VSS_344

VSS_346

VSS_347

VSS_348

VSS_350

VSS_349

VSS_352

VSS_351

VSS_353

VSS_354

VSS_355

VSS_356

VSS_357

VSS_358

VSS_359

VSS_360

VSS

(10 OF 10)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

AF34

AG34

AK34

AN34

D35

F35

G35

H35

J35

L35

AP40

M35

N35

P35

R35

T35

V35

W35

Y35

AA35

AB35

AV40

AH35

AR35

AV35

BA35

B36

C36

AC36

AE36

AF36

AG36

F41

AH36

AN36

AW36

AY36

D37

F37

G37

H37

J37

L37

J41

M37

N37

P37

R37

T37

V37

W37

Y37

AA37

AB37

M41

AH37

AK37

C38

AE38

AF38

AG38

AH38

AM38

AT38

D39

P41

F39

G39

H39

J39

L39

M39

N39

P39

R39

T39

T41

V39

W39

Y39

AA39

AB39

AC39

AJ39

AN39

AR39

AV39

W41

AW39

AY39

AW23

AL24

AU24

BA24

A25

D25

E25

H25

K25

P25

B40

AK25

D26

F26

K26

M26

AN26

B27

C27

F27

G27

AE40

J27

AK27

AM27

AP27

E28

J28

W28

AC28

AD28

AM28

AF40

AP28

AU28

AW28

BA28

A29

B29

C29

E29

G29

K29

AG40

N29

T29

AB29

AN29

AT29

E30

AB30

Y31

AB31

AG31

AH40

AJ31

AN31

AV31

AY31

B32

G32

AB32

AC32

AE32

AF32

AJ40

AG32

AH32

B33

D33

F33

G33

H33

M33

R33

T33

AK40

V33

Y33

AB33

AE33

AR33

AV33

AW33

C34

AC34

AE34

AN40

AA41

AC41

U1200

OMIT

BGA

945GM

NB

AL1

C2

F2

H2

J2

N2

T2

U2

Y2

AB2

AD2

AJ2

AK2

AP2

AR2

AT2

G3

AA3

AC3

AD3

AF3

AG3

AH3

AL3

AV3

AW3

AY3

C4

F4

J4

R4

U4

Y4

AJ4

AL4

AP4

AR4

AY4

AD5

AF5

AV5

B6

H6

K6

N6

U6

Y6

AB6

AD6

AG6

D7

G7

R7

AC7

AF7

AH7

AJ7

AL7

AP7

AV7

BA7

C8

K8

U8

AA8

AD8

AG8

A9

E9

G9

R9

Y9

AB9

AH9

AR9

AW9

BA9

U10

W10

AC10

AG10

AJ10

AL10

AP10

AV10

B11

D11

J11

Y11

AA11

AD11

E12

H12

K12

AC12

AY12

B13

D13

F13

P13

AG13

AL13

AM13

AN13

AR13

AV13

E14

H14

K14

U14

AA14

AD14

AK14

AT14

BA14

A15

B15

L15

M15

N15

AK15

AM15

AN15

C16

F16

J16

AL16

AN16

AV16

AK17

AM17

AP17

AR17

AY17

A18

D18

H18

P18

AH18

C19

G19

K19

W19

AC19

AN19

A20

B20

K20

AA20

AM20

AR20

AW20

C21

H21

J21

K21

P21

Y21

AB21

AL21

AN21

AR21

AV21

BA21

A22

D22

E22

F22

G22

K22

AA22

C23

F23

J23

K23

W23

AC23

AH23

AM23

AN23

AT23

U1200

OMIT

BGA

945GM

NB

18 97

H

051-7039

NB Grounds

SYNC_MASTER=M50_HENRY

SYNC_DATE=08/04/2006

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

These 4 0.1uF caps should

Layout Note:

TVOUT DISABLE

DISPLAY DISABLE

Layout Note:

LVDS DISABLE

on opposite side.

10uF caps should

Layout Note:

Place on the edge

be close to MCH

Place L and C close to MCH

TVOUT DISABLE

be within 5 mm of NB edge

1uH, 20%

Layout Note: 3GPLL 10uF cap should

be placed in cavity

Layout Note: Route to caps, then GND

Layout Note:

Place in cavity

2

1

C1970

2.5V POLY SMB2

220UF

20%

2

1

C1967

0.22uF

402

6.3V

20%

X5R

2

1

C1966

2.2UF

10%

6.3V

603

CERM1

2

1

C1965

CERM

4.7uF

6.3V

603

20%

2

1

C1976

CERM

20%

402

10V

0.1uF

2

1

C1975

10uF

20%

6.3V X5R 603

21

R1975

0.51

1%

402

MF-LF

1/16W

21

L1975

0805

1.0UH-220MA-0.12-OHM

2

1

C1918

0.1uF

10V CERM 402

20%

2

1

C1915

0.1uF

20%

402

CERM

10V

2

1

C1914

10uF

20%

6.3V X5R 603

2

1

C1916

10V CERM 402

20%

0.1uF

21

R1980

5%

402

MF-LF

1/16W

1K

2

1

R1981

402

MF-LF

1/16W

5%

1K

2

1

R1983

MF-LF 402

1/16W

5%

1K

21

R1982

5%

402

MF-LF

1/16W

1K

21

L1970

91NH

1210

21

XW1900

OMIT

SM

2

1

C1968

330UF

NOSTUFF

ELEC

6.3V

20%

CASE-C1

21

L1934

0603

FERR-120-OHM-0.2A

2

1

C1907

6.3V

20%

0.22uF

402

X5R

2

1

C1972

10uF

20%

6.3V X5R 603

2

1

C1971

603

6.3V

10uF

20%

X5R

2

1

C1906

X5R

20%

0.22uF

6.3V

402

2

1

C1905

X5R

20%

0.22uF

6.3V

402

2

1

C1904

1UF

402

6.3V

10%

CERM

2

1

C1937

402

10V CERM

20%

0.1uF

2

1

C1935

0.1uF

402

CERM

10V

20%

2

1

C1934

6.3V

20%

805

22uF

X5R

21

L1936

0603

FERR-120-OHM-0.2A

2

1

C1936

22uF

X5R 805

6.3V

20%

2

1

C1903

10uF

603

20%

6.3V X5R

2

1

C1902

603

20%

X5R

6.3V

10uF

2

1

C1901

20%

6.3V

CASE-C1

ELEC

330UF

2

1

C1900

330UF

CASE-C1

6.3V

20%

ELEC

SYNC_MASTER=M51_DAVE

NB (GM) Decoupling

SYNC_DATE=(MASTER)

19 97

H

051-7039

=PP1V5_S0_NB

=PP1V5_S0_NB_TVDAC

PP1V5_S0_NB_VCCD_QTVDAC

PP1V5_S0_NB_VCCD_TVDAC

PP3V3_S0_NB_VCCA_TVBG

PP3V3_S0_NB_VCCA_TVDACA PP3V3_S0_NB_VCCA_TVDACB

PP3V3_S0_NB_VCCA_TVDACC

TV_DACA_OUT

TV_DACB_OUT

TV_DACC_OUT

TV_IREF

TV_IRTNA

TV_IRTNB TV_IRTNC

MEM_VREF_NB_0MEM_VREF_NB_1

=PP1V05_S0_NB_VTT

=PP1V5_S0_NB_PLL

GND_NB_VSSA_3GBG

=PP1V8_S3_MEM_NB

LVDS_CLKCTLB

LVDS_DDC_DATA

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_MPLL

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCC3G

VOLTAGE=1.5V

PP1V5_S0_NB_VCCA_3GPLL

MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.2 MM

=PP2V5_S0_NB_VCCA_3GBG

=PP3V3_S0_NB_VCC_HV

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=1.0 mm

PP1V5_S0_NB_VCCA_HPLL

PP1V5_S0_NB_VCCA_DPLLB

PP1V5_S0_NB_VCCA_DPLLA

NB_CLK_DREFSSCLKIN_P

NB_CLK_DREFSSCLKIN_N

NB_CLK_DREFCLKIN_N

CRT_VSYNC_R

=PP2V5_S0_NB_VCCSYNC

=PP1V5_S0_NB_VCCAUX

TP_LVDS_A_CLK_N

TRUE

TP_LVDS_A_CLK_P

TRUE

LVDS_A_CLK_P

NB_CLK_DREFCLKIN_P

TP_NB_VCCA_DPLLB

TRUE

TP_CRT_DDC_DATA

CRT_HSYNC_R

TRUE

TP_CRT_DDC_CLK

CRT_DDC_CLK

TP_LVDS_VREFL

TRUE

TP_LVDS_B_DATA_P<0>

TRUE

TP_LVDS_B_DATA_N<2>

TRUE

TP_LVDS_B_DATA_N<1>

TRUE

TP_LVDS_B_DATA_P<2>

TRUE

LVDS_A_CLK_N

LVDS_B_CLK_P

TP_LVDS_B_DATA_P<1>

TRUE

LVDS_B_DATA_P<1>

LVDS_B_DATA_P<0>

TP_LVDS_DDC_CLK

TRUE

TP_LVDS_CLKCTLB

TRUE

TP_LVDS_BKLTEN

TRUE

TP_LVDS_VDDEN

TRUE

TP_GND_NB_VSSA_LVDS

TRUE

TP_LVDS_IBG

TRUE

LVDS_BKLTEN LVDS_VDDEN

LVDS_IBG

GND_NB_VSSA_LVDS

TP_LVDS_VREFH

TRUE

=PP2V5_S0_NB_VCCA_LVDS

LVDS_B_DATA_P<2>

LVDS_A_DATA_P<1>

TP_LVDS_A_DATA_P<1>

TRUE

TP_LVDS_A_DATA_N<0>

TRUE

TP_LVDS_A_DATA_N<2>

TRUE

TP_LVDS_A_DATA_N<1>

TRUE

TP_LVDS_A_DATA_P<0>

TRUE

TP_LVDS_A_DATA_P<2>

TRUE

TP_LVDS_B_DATA_N<0>

TRUE

LVDS_B_CLK_N

LVDS_A_DATA_N<0>

LVDS_A_DATA_N<1> LVDS_A_DATA_N<2>

LVDS_B_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_B_DATA_N<2>

LVDS_B_DATA_N<1>

LVDS_VREFH

LVDS_A_DATA_P<0>

TP_LVDS_B_CLK_N

TRUE

TP_LVDS_B_CLK_P

TRUE

LVDS_VREFL

=PP1V5_S0_NB_VCCD_LVDS

TP_LVDS_DDC_DATA

TRUE

TP_LVDS_BKLTCTL

TRUE

TP_SDVO_CTRLCLK

TRUE

TP_SDVO_CTRLDATA

TRUE

=PP2V5_S0_NB_VCC_TXLVDS

LVDS_BKLTCTL LVDS_CLKCTLA

LVDS_DDC_CLK

TP_NB_VCCA_DPLLA

TRUE

=PP1V5_S0_NB_3GPLL

PP1V5_S0_NB_3GPLL_F

VOLTAGE=1.5V MIN_LINE_WIDTH=1.0 mm MIN_NECK_WIDTH=0.2 MM

=PP1V5_S0_NB_3GPLL

TP_LVDS_CLKCTLA

TRUE

GND_NB_VSSA_CRTDAC

CRT_DDC_DATA

SDVO_CTRLDATA

GND_NB_VSSA_TVBG

SDVO_CTRLCLK

PP2V5_S0_NB_VCCA_CRTDAC

CRT_RED_L

CRT_RED

CRT_IREF

CRT_GREEN_L

CRT_GREEN

CRT_BLUE_L

CRT_BLUE

=PPVCORE_S0_NB

16

17

19

14 14

17

14

17

16

13

19

16

3

17

13

5 5

3

17

3

13

17

3

17

14

13

17

3

13

14

13

5

13

17

13

17

13

3

17

13

14

17

14

17

13

3

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PCIe Backward Interop. Mode

VCC Select

Reversal

DMI Lane

High = Reversed

Low = Normal

High = 1.5V

Low = 1.05V

Internal pull-down

945 External Design Spec says reserved

High = Both active

Low = Only SDVO or PCIe x1

ODT

FSB Dynamic

RESERVED

Low = Disabled

High = Enabled

RESERVED

Internal pull-up

RESERVED

00 = Partial Clock Gating Disable

01 = XOR Mode Enabled

10 = All-Z Mode Enabled 11 = Normal Operation

Internal pull-up

Low = Reversed

RESERVED

CPU Strap

RESERVED

PCIE Graphics

High = Normal

Low = RESERVED

High = DMIx4

Low = DMIx2

NB_CFG<20>

NB_CFG<19>

NB_CFG<9>

NB_CFG<8>

NB_CFG<18>

NB_CFG<17>

NB_CFG<6>

NB_CFG<16>

NB_CFG<15>

NB_CFG<5>

NB_CFG<14>

NB_CFG<13:12>

RESERVED

NB_CFG<3>

NB_CFG<4>

Lane Reversal

PROBABLY NOT NEEDED

DMI x2 Select

Internal pull-up

RESERVED

NB_CFG<7>

High = Mobile CPU

NB_CFG<10>

NB_CFG<11>

RESERVED

Internal pull-up

Internal pull-ups

2

1

R2075

402

5%

2.2K

1/16W MF-LF

NBCFG_DMI_X2

2

1

R2085

2.2K

5% 1/16W MF-LF 402

NBCFG_DYN_ODT_DISABLE

2

1

R2058

402

1/16W

5%

2.2K

NBCFG_VCC_1V5

MF-LF

2

1

R2059

402

MF-LF

1/16W

5%

2.2K

NBCFG_DMI_REVERSE

2

1

R2060

NBCFG_SDVO_AND_PCIE

402

MF-LF

1/16W

5%

2.2K

2

1

R2077

402

MF-LF

1/16W

5%

2.2K

NO STUFF

2

1

R2079

402

MF-LF

1/16W

5%

2.2K

NBCFG_PEG_REVERSE

20 97

H

051-7039

NB Config Straps

SYNC_MASTER=M50_HENRY

SYNC_DATE=08/04/2006

NB_CFG<9>

NB_CFG<7>

NB_CFG<5>

NB_CFG<16>

NB_CFG<20>

NB_CFG<19>

NB_CFG<18>

=PP3V3_S0_NB

20

14

3

www.Vinaﬁx.vn

Preliminary

IO

IN

OUT

IN

OUT

IN

IO

IN

IO

DDACK*

SATARBIASN SATARBIASP

SATA_CLKN

SATA_CLKP

SATA_2TXP

SATA_2TXN

SATA_2RXN

SATA_2RXP

SATA_0TXP

SATA_0TXN

SATA_0RXP

SATA_0RXN

SATALED*

ACZ_SDOUT

ACZ_SDIN1 ACZ_SDIN2

ACZ_SDIN0

ACZ_SYNC

ACZ_BIT_CLK

LAN_TXD2

LAN_TXD0

LAN_TXD1

LAN_RXD1 LAN_RXD2

LAN_RSTSYNC

LAN_RXD0

LAN_CLK

EE_SHCLK

EE_CS

INTVRMEN

INTRUDER*

RTCRST*

RTCX2

RTCX1

THRMTRIP*

STPCLK*

NMI

SMI*

RCIN*

INTR

INIT*

INIT3_3V*

IGNNE*

GPIO49/CPUPWRGD

FERR*

TP1/DPRSTP*

TP2/DPSLP*

A20M*

CPUSPL*

A20GATE

LFRAME*

LDRQ1*/GPIO23

LDRQ0*

LAD3

LAD2

LAD0 LAD1

EE_DOUT

EE_DIN

ACZ_RST*

DIOR*

IDEIRQ

DIOW*

IORDY

DDREQ

DD0

DD1

DD3

DD2

DD5

DD4

DD6

DD7

DD8

DD11

DD9

DD10

DD12

DD13 DD14

DD15

DA0

DA1 DA2

DCS3*

DCS1*

AC-97/

AZALIA

RTC

LPC

LAN

CPU

IDE

SATA

(1 OF 6)

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: EE_CS HAS INTERNAL PD, ONLY ENABLED WHEN LAN_RST#=L

(INT PU)

(WEAK INT PD)

NOTE: R2108=56 IN CV.

BOM CONSOLIDATION

CHANGED TO 54.9 FOR

NOTE: R2110=56 IN CV.

NOTE: PULLED UP PER INTEL

NOTE: LDRQ<0-1># HAVE INTERNAL 20K PU

INTEL CONFIRMS OK TO LEAVE PINS AS NC

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

INTO RESET STATE TO SAVE PWR.

NOTE: POR IS SMC WILL PUT LAN INT’F

NOTE: KEYBOARD CONTROLLER RESET CPU

NOTE: RISING-EDGE TRIGGERED AT CPU

BOM CONSOLIDATION

< 2 IN OF SB

LAYOUT NOTE: R2107 TO BE

CHANGED TO 54.9 FOR

LAYOUT NOTE: R2108 TO BE

< 2 IN OF R2107 W/O STUB

(DSTROBE)

20K PD

(STOP)

(HSTROBE)

NOTE: DD<7> HAS INTERNAL 11.5K PD

NOTE: ENABLE INTERNAL 1.05V SUSPEND REG

INTERNAL 20K PD ONLY ENABLED IN S3COLD

INTERNAL 20K PD

NONE

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

INTERNAL 20K PD ENABLED WHEN

INTERNAL 20K PD

INTERNAL 20K PD ENABLED DURING RESET AND WHEN

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

- BOTH FUNCTION 2 & 3 OF DEVICE 30 ARE DISABLED

- LSO BIT IN AC’97 GLOBAL CONTROL REG = 1; OR

AC ’07

INTERNAL 20K PD

INTERNAL 20K PD ENABLED WHEN

ACZ_SDIN[0-2]

ACZ_RST#

ACZ_BIT_CLK

ACZ_SYNC

ACZ_SDOUT

INTEL HIGH DEFINITION AUDIO

NOTE: LAD<0-3> HAVE INTERNAL 20K PU

NOTE: DDREQ HAS INTERNAL 11.5K PD

LAYOUT NOTE: PLACE R2101 & R2194 WHERE ACCESSIBLE

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S

(WEAK INT PU)

21

R2100

402

5%

0

MF-LF 1/16W

NOSTUFF

21

R2101

MF-LF

1/16W

5%

2.2K

402

NOSTUFF

21

R2195

1/16W

402

39

5%

MF-LF

21

R2198

39

21

R2197

39

21

R2196

39

2

1

R2199

MF-LF

1/16W

5%

10K

402

AH25

AF24

AF26

AH22

AF23

AG10

AH10

AF18

AE1

AF1

AH6

AG6

AE7

AF7

AH2

AG2

AE3

AF3

AB2

AB1

AA3

AG23

AH24

AB3

AA5

AC3

V7

V6

U7

T5

V4

U5

U3

V3

Y6

AC4

AB5

AA6

AG16

W4

Y5

AF25

AG21 AF22

AG22

AH16

AG24

AG26

Y1

Y2

W3

W1

AH15

AF15

AE15

AF16

AF12

AE12

AC12

AD12

AC13

AD14

AF13

AG13

AC15

AH14

AH13

AF14

AC14

AB13

AE14

AB15

AD16

AE16

AF17

AE17

AH17

AG27

R6

T4

T1

T3

T2

R5

U1

AH28

AE22

U2100

OMIT

ICH7-M

SB

BGA

2

1

R2194

MF-LF

1/16W

5%

10K

402

2

1

R2105

MF-LF

1/16W

1%

402

332K

21

R2107

402

1%

1/16W

MF-LF

24.9

2

1

R2108

54.9

1%

1/16W

MF-LF

402

21

R2110

1%

54.9

402

1/16W

MF-LF

SB: 1 OF 4

SYNC_DATE=08/04/2006SYNC_MASTER=M50_DOUG

051-7039

9721

H

IDE_PDD<3>

IDE_PDD<2>

TP_SB_XOR_V3

TP_SB_XOR_W3

TP_SB_XOR_T5

TP_SB_XOR_V4

TP_SB_XOR_U5

TP_SB_XOR_U3

PP3V3_S5_SB_RTC

ACZ_RST_L

ACZ_BITCLK

SB_RTC_RST_L

SB_RTC_X2

LPC_FRAME_L

TP_SB_GPIO23

TP_SB_DRQ0_L

LPC_AD<3>

LPC_AD<2>

LPC_AD<1>

LPC_AD<0>

=PP3V3_S0_SB_GPIO

IDE_PDD<6>

ACZ_SDATAOUT

PM_THRMTRIP_L

=PP1V05_S0_SB_CPU_IO

SMC_RCIN_L

ACZ_SYNC

IDE_PDCS1_L

IDE_PDCS3_L

IDE_PDA<2>

IDE_PDA<1>

IDE_PDA<0>

IDE_PDD<15>

IDE_PDD<14>

IDE_PDD<13>

IDE_PDD<12>

IDE_PDD<10>

IDE_PDD<9>

IDE_PDD<11>

IDE_PDD<8>

IDE_PDD<7>

IDE_PDD<4>

IDE_PDD<5>

IDE_PDD<1>

IDE_PDD<0>

IDE_PDDREQ

IDE_PDIORDY

IDE_PDIOW_L

IDE_IRQ14

IDE_PDIOR_L

SB_ACZ_RST_L

TP_CPU_CPUSLP_L

CPU_A20M_L

CPU_DPSLP_L

CPU_DPRSTP_L

CPU_PWRGD

CPU_IGNNE_L

FWH_INIT_L

CPU_INIT_L

CPU_INTR

CPU_SMI_L

CPU_NMI

CPU_STPCLK_L

CPU_THERMTRIP_R

SB_RTC_X1

SB_SM_INTRUDER_L

SB_ACZ_BITCLK

SB_ACZ_SYNC

ACZ_SDATAIN<0>

TP_SB_ACZ_SDIN2

TP_SB_ACZ_SDIN1

SB_ACZ_SDATAOUT

TP_SB_SATALED_L

SATA_A_D2R_N SATA_A_D2R_P

SATA_A_R2D_C_N

SATA_A_R2D_C_P

SATA_C_D2R_N

SATA_C_R2D_C_N SATA_C_R2D_C_P

SB_CLK100M_SATA_P

SB_CLK100M_SATA_N

SATA_RBIAS_P

SATA_RBIAS_N

IDE_PDDACK_L

SATA_C_D2R_P

CPU_RCIN_L

SB_A20GATE

CPU_FERR_L

=PP1V05_S0_SB_CPU_IO

SB_INTVRMEN

TP_SB_XOR_W1

TP_SB_XOR_Y1

TP_SB_XOR_Y2

TP_SB_XOR_U7

TP_SB_XOR_V6

TP_SB_XOR_V7

67

27

27 25

25

26

60

23

59

24

75

60

24

25

58

21

14

21

38

7

59

34

21

38

24

68

26

5

3

38

68

7

3

58 68

38

5

38

5

38

5

7

5

7

5

7

26

68

59

38

5

38

7

3

www.Vinaﬁx.vn

Preliminary

IN

IO

IN

OUT

IN

OUT

IO

IN

IO

IN

OUT

IN

OUT

IO

DMI_ZCOMP

DMI_CLKP

DMI_IRCOMP

USBRBIAS*

USBRBIAS

DMI0RXN DMI0RXP

DMI0TXN

DMI0TXP

DMI2TXN DMI2TXP

DMI3RXN

DMI3TXP

DMI3TXN

DMI3RXP

USBP0N USBP0P

USBP1N

USBP1P USBP2N

USBP2P

USBP3N USBP3P

USBP4P

USBP5N

USBP5P USBP6N

USBP6P

USBP7N USBP7P

USBP4N

OC0*

OC1*

OC2* OC3*

OC4*

OC6*/GPIO30

OC5*/GPIO29

SPI_CLK

SPI_CS*

SPI_MOSI

SPI_MISO

SPI_ARB

DMI_CLKN

DMI2RXP

DMI2RXN

DMI1TXP

DMI1TXN

DMI1RXN DMI1RXP

PERN1 PERP1

PETN1

PETP1

PERN2 PERP2

PETN2

PETP2

PERN3

PERP3

PETN3 PETP3

PERN4

PERP4

PETN4 PETP4

PERN5

PERP5 PETN5

PETP5

PERN6

PERP6 PETN6

PETP6

OC7*/GPIO31

PCI-EXP

(3 OF 6)

DMI

SPI

USB

REQ4*/GPIO22

REQ0*

MCH_SYNC*

RSVD8

RSVD7

RSVD6

RSVD5

RSVD4

GPIO5/PIRQH*

GPIO4/PIRQG*

GPIO3/PIRQF*

GPIO2/PIRQE*

GPIO17/GNT5*

GPIO1/REQ5*

GNT4*/GPIO48

C/BE0* C/BE1*

DEVSEL*

PERR*

STOP*

PCIRST*

PME*

PLTRST*

TRDY*

FRAME*

IRDY*

PCICLK

PAR

PLOCK*

SERR*

AD0 AD1

AD2 AD3

AD4

AD5 AD6

AD7

AD8 AD9

AD10

AD11 AD12

AD13 AD14

AD15

AD16 AD17

AD18

AD19 AD20

AD21

AD22 AD23

AD24 AD25

AD26

AD27 AD28

AD29

AD30 AD31

C/BE2*

C/BE3*

GNT0*

REQ1* GNT1*

REQ2*

GNT2* REQ3*

GNT3*

PIRQA* PIRQB*

PIRQC* PIRQD*

RSVD0 RSVD1

RSVD2

RSVD3

MISC

INT I/F

PCI

(2 OF 6)

IO

IN

IO

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ENABLED ONLY WHEN PCIRST#=0

BOM NOTE FOR PD ON PCI_GNT3_L:

TARGETING FWH BIOS SPACE)

R2211

NOTE: FWH_WP_L NOT USED

NOTE: USBP[0-7]P/N HAVE INTERNAL 15K PD

GNT5# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

(INT PD)

(AKA TP3, INTERNAL 20K PU)

GNT4# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

PLACE R2204 < 1/2 IN FROM SB

LAYOUT NOTE:

PLACE R2203 < 1/2 IN FROM SB

LAYOUT NOTE:

NOTE:

LPC (DEFAULT)

PCI

SPI

UNSTUFF

STUFF

UNSTUFFUNSTUFF

UNSTUFF

STUFF

01

10

11

STRAP R2210

(INT 20K PU)

NOTE: CHANGE SYMBOL

TO RSVD[1-9]

GNT5# GNT4#

SB BOOT BIOS SELECT

IE SB INVERTS A16 FOR ALL CYCLES

(STRAPPED TO TOP-BLOCK SWAP MODE

NO STUFF - DEFAULT

STUFF - A16 SWAP OVERRIDE

NOTE:

EXTERNAL 0

EXTERNAL 1

EXTERNAL 2

AIRPORT (MINI-PCIE)

CAMERA

CF/SD

BT

IR

NOTE: R2210 WAS PD ON PIN A14 = FWH_TBL_L

GNT[0-3]# HAVE INT 20K PU

AND PWROK=H

21

R2203

1%

MF-LF

24.9

402

1/16W

2

1

R2222

402

5%

MF-LF

1/16W

10K

21

R2204

MF-LF

1/16W

1%

22.6

402

2

1

R2223

402

MF-LF

10K

5% 1/16W

2

1

R2225

402

MF-LF

1/16W

5%

10K

2

1

R2226

5%

10K

1/16W MF-LF 402

2

1

R2299

402

MF-LF

1/16W

5%

10K

D2 D1

N3

N4

M2

M1

L5

L4

K2

K1

J3

J4

H2

H1

G3

G4

F2

F1

P5

P2

P6

R2

P1

R27

N27

L27

J27

G27

E27

R28

N28

L28

J28

G28

E28

T24

P25

M25

K25

H25

F25

T25

P26

M26

K26

H26

F26

B3

A2

C3

E5

D4

D5

C4

D3

C25

D25

AE27

AE28

AC27

AC28

AD24

AD25

AA27

AA28

AB25

AB26

W27

W28

Y25

Y26

U27

U28

V25

V26

U2100

ICH7-M

SB

BGA

OMIT

F14

F15

B10

F21

AH8

AG8

AE9

AD9

AH4

AG4

AD5

AE5

A13

E13

C17

C16

D7

B19

C26

E11

B5

C5

B4

A3

C9

B18

A9

E10

AH20

A7

G7

F8

F7

G8

D8

C8

A14

F13

D17

D16

E7

F16

A12

C15

D12

C12

B15

C14

A15

A17

E17

A18

E16

D6

E6

F18

B6

C7

A6

A8

B9

D9

E9

F10

F11

A10

A16

A11

D11

C11

E12

G13

G15

C13

B12

D14

E14

C18

E18

U2100

SB

ICH7-M

BGA

OMIT

2

1

R2200

1/16W

10K

402

5%

MF-LF

2

1

R2250

1/16W

10K

5%

MF-LF 402

2

1

R2251

402

MF-LF

1/16W

5%

10K

2

1

R2255

402

10K

5% 1/16W MF-LF

2

1

R2298

10K

5% 1/16W MF-LF 402

2

1

R2205

1/16W

10K

5%

402

MF-LF

2

1

R2206

NOSTUFF

1/16W

5%

MF-LF

10K

402

2

1

R2207

5%

402

10K

1/16W

MF-LF

VOLTAGE=0

2

1

R2211

402

1K

5%

MF-LF

1/16W

051-7039

9722

H

SB: 2 OF 4

SYNC_MASTER=M51_DOUG SYNC_DATE=08/04/2006

SB_GPIO30

PCI_REQ1_L

PCI_AD<7>

PCI_GNT1_L

SB_GPIO31

SPI_SO

SPI_SCLK

ODD_PWR_EN_L

SPI_SI

USB_D_OC_L

USB_B_OC_L

USB_E_OC_L

USB_A_OC_L

SB_GPIO31

SPI_CE_L

PCI_REQ0_L

NB_SB_SYNC_L

TP_SB_RSVD9

SB_GPIO4

SB_GPIO3

SB_GPIO2

PCI_C_BE_L<0>

PCI_C_BE_L<1>

PCI_DEVSEL_L

PCI_PERR_L

PCI_STOP_L

PCI_RST_L

TP_PCI_PME_L

PLT_RST_L

PCI_TRDY_L

PCI_FRAME_L

PCI_IRDY_L

PCI_CLK_SB

PCI_PAR

PCI_LOCK_L

PCI_SERR_L

PCI_AD<0> PCI_AD<1>

PCI_AD<2>

PCI_AD<3>

PCI_AD<5>

PCI_AD<8>

PCI_AD<9> PCI_AD<10>

PCI_AD<11> PCI_AD<12>

PCI_AD<13>

PCI_AD<14> PCI_AD<15>

PCI_AD<16>

PCI_AD<17> PCI_AD<18>

PCI_AD<19>

PCI_AD<20> PCI_AD<21>

PCI_AD<22> PCI_AD<23>

PCI_AD<24>

PCI_AD<25> PCI_AD<26>

PCI_AD<27>

PCI_AD<28> PCI_AD<29>

PCI_AD<30>

PCI_AD<31>

PCI_C_BE_L<2>

PCI_C_BE_L<3>

TP_PCI_GNT0_L

INT_PIRQA_L INT_PIRQB_L

INT_PIRQC_L

DMI_IRCOMP_R

SB_CLK100M_DMI_P

USB_RBIAS_PN

DMI_N2S_N<0>

DMI_N2S_P<0> DMI_S2N_N<0>

DMI_S2N_P<0>

DMI_S2N_N<2>

DMI_S2N_P<2>

DMI_N2S_N<3>

DMI_S2N_P<3>

DMI_S2N_N<3>

DMI_N2S_P<3>

USB_A_N

USB_A_P USB_B_N

USB_B_P

USB_C_N USB_C_P

USB_D_N USB_D_P

USB_E_P USB_F_N

USB_F_P

USB_G_N USB_G_P

USB_H_N

USB_E_N

SB_GPIO30

SB_GPIO29

SB_CLK100M_DMI_N

DMI_N2S_P<2>

DMI_N2S_N<2>

DMI_S2N_P<1>

DMI_S2N_N<1>

DMI_N2S_N<1>

DMI_N2S_P<1>

PCIE_A_D2R_N

PCIE_A_D2R_P PCIE_A_R2D_C_N

PCIE_A_R2D_C_P

PCIE_B_D2R_N

PCIE_B_D2R_P PCIE_B_R2D_C_N

PCIE_B_R2D_C_P

PCIE_C_D2R_N PCIE_C_D2R_P

PCIE_C_R2D_C_N

PCIE_C_R2D_C_P

PCIE_D_D2R_N PCIE_D_D2R_P

PCIE_D_R2D_C_N

PCIE_D_R2D_C_P

PCIE_E_D2R_N

PCIE_E_D2R_P

PCIE_E_R2D_C_N PCIE_E_R2D_C_P

PCIE_F_D2R_N

PCIE_F_D2R_P

PCIE_F_R2D_C_N PCIE_F_R2D_C_P

PP1V5_S0_SB_VCC1_5_B

=PP3V3_S5_SB_IO

USB_C_OC_L

USB_A_OC_L USB_B_OC_L

USB_E_OC_L

USB_D_OC_L

USB_C_OC_L

SB_GPIO29

SPI_ARB

USB_H_P

INT_PIRQD_L

TP_SB_XOR_AD5 TP_SB_XOR_AG4

TP_SB_XOR_AH4

TP_SB_XOR_AD9

TP_SB_XOR_AE5 TP_SB_XOR_AE9

TP_SB_XOR_AG8 TP_SB_XOR_AH8

=PP3V3_S0_SB

=PP3V3_S5_SB_USB

BOOT_LPC_SPI_L

PCI_REQ2_L

PCI_PME_FW_L

PCI_AD<6>

TP_SB_GPIO_48

TP_PCI_GNT2_L

SB_CRT_TVOUT_MUX

PCI_GNT3_L

PCI_REQ3_L

PCI_AD<4>

63

60

44

58

63

58

47

63

38

44

34

44

14

54

25

47

44

25

58

22

26

44

22

5

58

26

5

22

58

26

14

26

44

26

45

6

26

5

44

26

44

26

34

5

14

47

53

47

5

47

22

34

14

54

5

54

24

3

22

58

47

26

3

5

26

44

97

5

26

44

www.Vinaﬁx.vn

Preliminary

IN

OUT

IN

IO

OUT

IN

IO

IN

IO

IN

OUT

IO

IN

OUT

IN

OUT

IN

OUT

GPIO19/SATA1GP

GPIO21/SATA0GP

GPIO36/SATA2GP

CLK48

GPIO37/SATA3GP

CLK14

SUSCLK

SLP_S3*

SLP_S4*

SLP_S5*

PWROK

TP0/BATLOW*

GPIO16/DPRSLPVR

PWRBTN*

LAN_RST*

RSMRST*

GPIO10

GPIO9

GPIO12

GPIO14

GPIO13

GPIO24

GPIO15

GPIO25 GPIO35

GPIO38 GPIO39

SMBCLK

SMBDATA LINKALERT*

SMLINK1

SMLINK0

RI*

SYS_RST*

SPKR

SUS_STAT*

GPIO0/BM_BUSY*

GPIO18/STPPCI*

GPIO11/SMBALERT*

GPIO20/STPCPU*

GPIO26

GPIO28

GPIO27

GPIO32/CLKRUN*

GPIO33/AZ_DOCK_EN*

WAKE*

GPIO34/AZ_DOCK_RST*

SERIRQ THRM*

GPIO7

GPIO6

VRMPWRGD

GPIO8

(4 OF 6)

SMB

GPIO

PWR MNGT

SYS GPIO

CLKS

SATA GPIO

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

RESERVED FOR MOBILE AZALIA DOCKING INT’F

OD

SYSTEM REBOOT FEATURE

STRAPPING @ PWROK RISING: SB WILL DISABLE TCO TIMER

NOTE FOR R2323 (DEF=NOSTUFF)

NOT USED

NOTE: RESERVED FOR FUTURE

(INT WEAK PD)

LAYOUT NOTE:

PLACE R2306-14 WHERE PHYSICALLY ACCESSIBLE

NOTE: DPRSLPVR HAS INT 20K PD, ENABLED AT BOOT/RESET FOR STRAPPING FCN

(INT 20K PU)

DEF=GPI

IN RESET STATE TO SAVE PWR

SMC WILL DRIVE 0-1-0 TO KEEP LAN INT’F

NOTE:

SV_SET_UP IS LINDACARD DETECT

LO = NOT PRESENT

HI = PRESENT

NOTE:

- CAN NOT BE LOW FOR 35US AFTER RSMRST# ON BOOT (DMI AC COUPLING MODE STRAP)

NOTE FOR GPIO25:

- HAS INTERNAL 20K PU, ENABLED DURING RSMRST# AND DISABLED WITHIN 100MS AFTER RSMRST# DEASSERTS

21

R2302

100

21

R2303

100

21

R2305

100

2

1

R2306

1/16W

10K

MF-LF 5%

402

NOSTUFF

2

1

R2307

10K

1/16W

MF-LF 5%

402

2

1

R2308

NOSTUFF

10K

5%

MF-LF

1/16W 402

2

1

R2309

10K

402

1/16W

MF-LF 5%

2

1

R2310

10K

1/16W

MF-LF 5%

402

2

1

R2311

10K

402

NOSTUFF

5%

MF-LF

1/16W

2

1

R2313

402

5%

MF-LF

1/16W

10K

2

1

R2314

5%

MF-LF

1/16W

0

NOSTUFF

402

2

1

R2316

5%

MF-LF

1/16W

10K

402

2

1

R2317

5%

MF-LF

1/16W

10K

402

2

1

R2318

10K

5%

MF-LF

1/16W 402

2

1

R2319

10K

1/16W

MF-LF 5%

402

2

1

R2320

10K

1/16W

MF-LF 5%

402

5678

4321

RP2300

SM-LF

10K

5% 1/16W

21

R2399

100K

1/16W MF-LF

402

5%

2

1

R2398

1K

402

5%

MF-LF

1/16W

2

1

R2397

402

8.2K

1/16W

MF-LF 5%

2

1

R2396

402

10K

1/16W

5%

MF-LF

2

1

R2395

5%

402 MF-LF

1/16W

8.2K

F20

AD22

C21

AF20

A22

C20

A27

A19

A25

B25

B22

C22

F22

D23

B24

AH21

Y4

A28

AA4

C23

A26

C19

E20

E21

AC18

AC21

AE20

AD20

AE19

AH19

AD21

U2

AC19

AG18

E23

B21

A21

D20

R3

AF19

AF21

AH18

AC20

AC22

E22

R4

E19

F19

B23

A20

AB18

B2

AC1

U2100

ICH7-M

SB

BGA

OMIT

2

1

R2390

MF-LF

1/16W

5%

10K

402

2

1

R2388

10K

5%

MF-LF

1/16W

402

2

1

R2387

NOSTUFF

10K

1/16W

MF-LF 5%

402

2

1

R2323

1K

402

NO_REBOOT_MODE

1/16W

5%

MF-LF

2

1

R2326

10K

MF-LF

5%

402

1/16W

NOSTUFF

2

1

R2327

10K

402

1/16W

MF-LF 5%

NOSTUFF

2

1

R2343

MF-LF

1/16W

8.2K

402

5%

SB: 3 OF 4

SYNC_DATE=08/04/2006SYNC_MASTER=M51_DOUG

H

23 97

051-7039

SMC_SB_NMI

PATA_PWR_EN_L

SMB_ALERT_L

EFI_OK_R

=PP3V3_S5_SB

SV_SET_UP

SATA_C_PWR_EN_L

BIOS_REC

PM_RSMRST_L

SMB_CLK

SATA_C_DET_L

SB_GPIO19

SB_GPIO21

SB_GPIO37

PM_SLP_S4_L

PM_SLP_S5_L

PM_SB_PWROK

PM_DPRSLPVR

PM_PWRBTN_L

PM_LAN_ENABLE

SMB_LINK_ALERT_L

SMLINK<1>

SMLINK<0>

PM_RI_L

PM_SYSRST_L

PM_SUS_STAT_L

=PP3V3_S5_SB

FWH_MFG_MODE

BIOS_REC

=PP3V3_S0_SB_GPIO

SATA_C_PWR_EN_L

=PP3V3_S5_SB

PATA_PWR_EN_L

PM_STPPCI_L

PM_STPCPU_L

PM_BMBUSY_L

SB_SPKR

SMB_DATA

=PP3V3_S5_SB

PM_BATLOW_L

SB_CLK14P3M_TIMER

SB_CLK48M_USBCTLR

SUS_CLK_SB

PM_SLP_S3_L

=PP3V3_S5_SB_PM

SMS_INT_L

SB_CLK100M_SATA_OE_L

TP_SB_GPIO38

TP_AZ_DOCK_RST_L

FWH_MFG_MODE

SMC_WAKE_SCI_L

IDE_RESET_L

PM_CLKRUN_L

TP_AZ_DOCK_EN_L

SV_SET_UP

TP_SB_GPIO25_DO_NOT_USE

VR_PWRGD_CK410

SMC_EXTSMI_L

INT_SERIRQ

PCIE_WAKE_L

SB_GPIO26

PM_THRM_L

SMC_RUNTIME_SCI_L

TP_SB_GPIO24

GPU_PRESENT_R

80

26

67

26

27

26

79

67

25

60

77

75

60

25

23

25

77

60

23

58

14

58

23

21

23

34

58

11

58

23

26

58

53

58

23

3

5

23

58

27

38

5

58

26

5

58

26

5

3

23

3

23

3

23

33

14

27

3

58

5

59

5

3

26

33

23

58

38

5

58

5

41

10

58

6

www.Vinaﬁx.vn

Preliminary

(6 OF 6)

VSS

V5REF_SUS

VCC3_3

VCCDMIPLL

VCCSATAPLL

VCC3_3

VCCRTC

VCCUSBPLL

VCCSAUS1_5

VCC PAUX

USB CORE

VCC1_5_A

ARX

USB

PCI

IDE

VCCA3GP

CORE

ATX

VCC1_5_A

VCC3_3

VCCSUS3_3

VCC1_5_A

VCCSUS3_3

VCC1_5_A

VCCLAN1_5

V_CPU_IO

VCC3_3/VCCHDA

VCCSUS3_3/VCCSUSHDA

VCCLAN_3_3

VCC1_05

V5REF

VCC1_5_B

(5 OF 6)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE FOR VCCLAN_3_3: S3 IF INTERNAL LAN IS USED

S0 OR S3 IF NOT

CHANGE SYMBOL TO 1.05

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

SO NO CONNECT HERE

VOLTAGE GENERATED INTERNALLY

NOTE: VCCHDA AND VCCSUSHDA CAN BE 1.5V OR 3.3V

DEPENDING ON VIO OF AZALIA INTERFACE

CODEC IC’S CONSIDERED SO FAR ARE 3.3V

0 0

AE21

AE18

AE13

AE11

AE8

AE4

AE2

AD23

AD19

AD15

AD11

AD8

AD7

AD4

AD3

AD1

AC11

AC9

AC5

AC2

AB28

AB27

AB24

AB21

AB19

AB16

AB14

AB11

AB6

AB4

AA26

AA25

AA24

AA1

Y28

Y27

Y24

Y3

W26

W25

W24

W6

V28

V27

V24

V15

V13

V2

U26

U25

U24

U17

U16

U15

U14

U13

U12

U4

T17

T16

T15

T14

T13

T12

T6

R18

R17

R16

R15

R14

R13

R12

R11

R1

P28

P27

P24

P17

P16

P15

P14

P13

P12

P4

P3

N26

N25

N24

AH27

AH23

AH12

AH7

N18

AH3

AH1

AG25

AG20

AG17

AG14

AG11

AG7

AG3

AG1

N17

AF28

AF27

AF11

AF8

AF4

AF2

AE25

AE24

N16

N15

N14

N13

N12

N11

N6

N5

N2

N1

M28

M27

M24

M17

M16

M15

M14

M13

M12

M5

M4

M3

L26

L25

L24

L15

L13

K28

K27

K24

J26

J25

J24

J5

J2

J1

H28

H27

H24

H5

H4

H3

G26

G25

G24

G21

G18

G14

G9

G6

G5

G2

G1

F28

F27

F12

F5

F4

F3

E15

E8

E4

E2

E1

D24

D21

D18

D13

D10

C27

C6

C2

B28

B26

B20

B17

B14

B11

B8

B1

A23

A4

U2100

SB

ICH7-M

BGA

OMIT

C1

K6

K5

K4

K3

G19

D22

D19

C24

E3

N7

M7

M6

L7

L6

L3

L2

L1

A24

P7

R7

G20

C28

K7

AD2

W5

W7

W2

V1

V5

Y7

AA2

AG28

AG15

AG12

AD18

AD13

AC16

AB20

AB12

G16

AA7

G12

G11

F9

D15

C10

B7

B16

B13

A5

AG19

AH11

B27

U6

AD27

AD26

AC26

AC25

Y23

Y22

W23

AC24

W22

V23

V22

U23

U22

T28

T27

T26

T23

T22

AC23

R26

R25

R24

R23

R22

P23

P22

N23

N22

M23

AB23

M22

L23

L22

K23

K22

J23

J22

H23

H22

G23

AB22

G22

F24

F23

E26

E25

E24

D28

D27

D26

AD28

AA23

AA22

AB10

AH5

AG5

AF6

AF5

AE6

AD6

J7

J6

H7

H6

A1

AC8

AB8

G17

F17

T7

AC7

AC17

AB17

AH9

AG9

AF9

AF10

AE10

AD10

AC10

AB9

AC6

AB7

P11

M18

M11

L18

L17

L16

L14

V18

L12

V17

V16

V14

V12

V11

U18

U11

T18

T11

P18

L11

AH26

AE26

AE23

F6

AD17

G10

U2100

ICH7-M

SB

BGA

OMIT

051-7039

9724

H

SYNC_MASTER=M50_DOUG SYNC_DATE=08/04/2006

SB: 4 OF 4

PP1V5_S0_SB_VCC1_5_B

PP5V_S0_SB_V5REF

PP5V_S5_SB_V5REF_SUS

=PPVCORE_S0_SB

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S5_SB_3V3_1V5_VCCSUSHDA

=PP1V05_S0_SB_CPU_IO

=PP3V3_S0_SB_VCC3_3

PP1V5_S0_SB_VCCDMIPLL

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB_VCCSATAPLL

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S0_SB_VCC3_3_IDE

=PP3V3_S0_SB_VCC3_3_PCI

PP3V3_S5_SB_RTC

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP1V5_S0_SB_VCC1_5_A

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP1V5_S0_SB_VCCUSBPLL

25

26

25

21

24

25

24

25

24

25

24

25

22

25

3

25

3

21

3

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

A24 ... G19 AND P7 OF SB

PLACE < 2.54MM OF SB ON

PLACEMENT NOTE:

SECONDARY SIDE OR 3.56MM ON PRIMARY

152S0315

1UH,0.5A,20%,1206

PLACE NEAR PINS AE23, AE26 & AH26 OF SB

AB8 AND AC8 OF SB

PLACEMENT NOTE:

PLACE CAPS NEAR PINS

K3 ... N7 OF SB

PLACEMENT NOTE: PLACE CAPS NEAR PINS

PLACEMENT NOTE:

PLACE CAPS NEAR PINS

PLACEMENT NOTE:

PLACE CAPS NEAR PIN W5 OF SB

PLACEMENT NOTE: PLACE C2520 NEAR PIN C1 OF SB

PLACEMENT NOTE:

DISTRIBUTE IN PCI SECTION OF SB

NEAR PINS A5 ... G16

PLACEMENT NOTE:

PLACE C2520 NEAR PIN E3 OF SB

V5, W2, OR W7

PLACE CAP UNDER SB NEAR PINS V1,

PLACEMENT NOTE:

PLACE C2509 NEAR PIN B27 OF SB

PLACEMENT NOTE:

NEAR PINS D28, T28, AD28

PLACEMENT NOTE: PLACE C2503 < 2.54MM OF PIN AD17 OF SB

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2504 < 2.54MM OF PIN F6 OF SB

ON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACE C2500 & C2505-07 < 2.54MM OF SB ON SECONDARY SIDE OR 3.56MM ON PRIMARY

3.56MM ON PRIMARY NEAR PIN AG9

3.56MM ON PRIMARY NEAR PIN AH11

3.56MM ON PRIMARY NEAR PIN AD2

PLACE < 2.54MM OF SB ON SECONDARY OR

3.56MM ON PRIMARY NEAR PIN U6

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS AA7 ... AG19

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR

3.56MM ON PRIMARY NEAR PINS A1 ... J7

PLACEMENT NOTE:

155S0247

100-OHM,4A,0805

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PIN AG5

PLACEMENT NOTE:

PLACE CAPS AT EDGE OF SB

2

1

C2500

220UF

20%

POLY

2.5V

SMB2

2

1

C2510

402

0.1UF

10% 16V X5R

0

2

1

C2512

X5R

16V

10%

0.1UF

402

0

21

R2500

MF-LF

5%

1

603

1/10W

3

1

D2501

SOT23

BAT54E3

3

1

D2500

SOT23

BAT54E3

2

1

C2524

4.7UF

20%

6.3V CERM 603

2

1

C2540

X5R

16V

10%

0.1UF

402

2

1

C2541

402

6.3V CERM

10%

1UF

2

1

C2542

402

0.1UF

10% 16V X5R

2

1

C2503

X5R

10%

402

0.1UF

16V

0

2

1

C2504

X5R

16V

10%

0.1UF

402

0

21

R2501

MF-LF

1/16W

402

10

1%

21

L2500

100-OHM-EMI

SM-3

0

2

1

C2505

402

X5R

16V

10%

0.1UF

2

1

C2506

402

0.1UF

10% 16V X5R

2

1

C2507

402

X5R

16V

10%

0.1UF

21

L2507

1206

0.28-OHM

2

1

C2501

402

CERM

16V

10%

0.01UF

2

1

C2508

10UF

805-1

CERM

6.3V

20%

0

2

1

C2509

402

X5R

16V

10%

0.1UF

0

2

1

C2511

0.1UF

10% 16V X5R 402

0

2

1

C2517

10% 16V X5R 402

0.1UF

0

2

1

C2513

402

X5R

16V

10%

0.1UF

0

2

1

C2514

1UF

10%

CERM

6.3V

402

0

2

1

C2520

10% 16V

402

0.01UF

CERM

2

1

C2515

402

16V

10%

0.01UF

CERM

0

2

1

C2516

CASE-C1

6.3V ELEC

330UF

20%

2

1

R2502

100

MF-LF

402

1/16W

5%

2

1

C2502

1UF

402

6.3V CERM

10%

2

1

C2518

X5R

16V

10%

0.1UF

402

0

2

1

C2519

402

0.1UF

10% 16V X5R

0

2

1

C2521

X5R

16V

10%

0.1UF

402

0

2

1

C2522

10%

402

X5R

16V

0.1UF

2

1

C2523

402

0.1UF

10% 16V X5R

0

2

1

C2525

402

0.1UF

10% 16V X5R

0

2

1

C2526

402

10%

X5R

16V

0.1UF

2

1

C2527

X5R

16V

10%

0.1UF

402

2

1

C2528

402

0.1UF

10% 16V X5R

2

1

C2529

X5R

16V

10%

0.1UF

402

0

2

1

C2530

X5R

16V

10%

0.1UF

402

2

1

C2534

X5R

16V

10%

0.1UF

402

0

2

1

C2531

X5R

16V

10%

0.1UF

402

2

1

C2532

X5R

16V

10%

0.1UF

402

0

2

1

C2533

X5R

16V

10%

0.1UF

402

SYNC_MASTER=M51_DOUG

051-7039

9725

H

SB:DECOUPLING

SYNC_DATE=08/04/2006

=PPVCORE_S0_SB

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=1.5V

PP1V5_S0_SB_VCC1_5_B

=PP1V05_S0_SB_CPU_IO

=PP3V3_S0_SB

=PP5V_S0_SB

=PP3V3_S5_SB

=PP1V5_S0_SB

=PP3V3_S0_SB_VCC3_3

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB_VCCSATAPLL

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP3V3_S0_SB_VCC3_3

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S0_SB_VCCLAN3_3

=PP3V3_S0_SB_3V3_1V5_VCCHDA

=PP3V3_S0_SB_VCC3_3_IDE

=PP1V5_S0_SB_VCC1_5_A

=PP3V3_S5_SB_VCCSUS3_3

=PP3V3_S5_SB_VCCSUS3_3_USB

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

PP5V_S0_SB_V5REF

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

=PP1V5_S0_SB

VOLTAGE=1.5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

PP1V5_S0_SB_VCCDMIPLL

PP1V5_S0_SB_R

VOLTAGE=1.5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.15MM

=PP1V5_S0_SB_VCCUSBPLL

PP3V3_S5_SB_RTC

=PP3V3_S0_SB_VCC3_3_PCI

PP5V_S5_SB_V5REF_SUS

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

=PP5V_S5_SB

24

26

25

26

24

21

22

23

25

24

25

24

3

22

3

24

3

24

3

21

3

24

3

www.Vinaﬁx.vn

Preliminary

OUT

IO

IN

IO

OUT

IN

OUT

IN

VCC

GND

IN

OUT

IN

OUT

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: R2696 CAN’T EXIST WITH BOTH ITP & DEVELOPMENT

SHOULD BE STUFFED WITH ITP & NO DEVELOPMENT

NOTE: ISL6262 SPEC (P 5) SAID TO USE 1.9K

RESET

RESISTOR TO GND USED TO PROVIDE PADS TO SHORT THIS RESET_L IN CASE OF BAD SMC FLASH DURING DEVELOPMENT

PLACE R2603 IN ACCESSIBLE LOCATION

USING 1% FOR BOM CONSOLIDATION

0

21

R2600

MF-LF

1/16W

402

20.0K

1%

31

D2600

SOT23

BAT54E3

31

D2601

SOT23

BAT54E3

4

5

3

2

U2603

74LVC1G04DBVG4

SOT23-5

21

C2611

0.1UF

CERM

10V

20%

402

2

1

C2605

1UF

402

CERM

6.3V

10%

43

21

SW2600

DEVELOPMENT

SM-LF

SPST

2

1

R2699

402

1/16W

5%

MF-LF

10K

DEVELOPMENT

0

4

32

1

U2699

MAX6816

SOT143

DEVELOPMENT

2

1

C2699

0.1UF

CERM

10V

20%

DEVELOPMENT

402

2

1

R2698

100K

5% 1/16W MF-LF 402

DEVELOPMENT

2

1

C2698

402

CERM

10V

DEVELOPMENT

20%

0.1UF

2

1

R2606

MF-LF

1/16W

1M

402

1%

2

1

R2697

10K

5% 1/16W MF-LF 402

SB_SYSRST_4_PVT

21

R2696

NOT_DEVELOPMENT_PLUS_ITP

402

0

5% 1/16W MF-LF

41

Y2600

CRITICAL

SM-LF

32.768K

5

4

1

2

3

U2601

MC74VHC1G08

SOT23-5-LF

5

4

1

2

3

U2698

MC74VHC1G08

DEVELOPMENT

SOT23-5-LF

21

R2650

402

1K

5% 1/16W MF-LF

DEVELOPMENT

2

1

R2651

MF-LF

1/16W

5%

10K

402

2

1

R2607

1K

402

5%

1/16W

MF-LF

2

1

R2603

NOSTUFF

402

MF-LF

1/16W

5%

0

1

2

J2600

SM

BB1020

CRITICAL

2

1

R2609

5%

1/16W

MF-LF

10M

402

21

R2611

402

MF-LF

1/16W

1.82K

1%

21

C2607

20% 10V

CERM

0.1UF

402

21

R2612

10K

1/16W MF-LF

5%

402

0

21

C2608

50V

5%

402

CERM

15PF

21

R2622

10K

21

C2609

CERM 402

5%

50V

15PF

21

R2623

8.2K

21

R2624

8.2K

21

R2625

8.2K

21

R2626

8.2K

0

21

R2627

8.2K

21

R2628

8.2K

21

R2629

8.2K

21

R2630

8.2K

21

R2631

8.2K

21

R2632

8.2K

21

R2633

8.2K

21

R2634

8.2K

21

R2636

8.2K

21

R2637

8.2K

21

R2638

8.2K

21

R2639

8.2K

21

R2640

8.2K

21

R2641

8.2K

21

R2642

8.2K

21

R2643

8.2K

2

1

C2610

402

1UF

10%

6.3V CERM

SYNC_MASTER=M50_DOUG SYNC_DATE=08/04/2006

SB: MISC

9726

H

051-7039

MIN_LINE_WIDTH=0.6MM

PP3V3_S5_SB_RTC

PP3V3_S5

MIN_LINE_WIDTH=0.6MM

PPVBATT_S5_RTC_R

VOLTAGE=3.3V

SB_RTC_RST_L

SW_RST_BTN_L

SB_RTC_X2

SB_RTC_X1

PM_SYSRST_L

VR_PWRGD_CK410

VR_PWRGD_CK410_L

=PP3V3_S5_SB

SB_SM_INTRUDER_L

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.6MM

PPVBATT_S5_RTC

CK410_PD_VTT_PWRGD_L

PP3V3_S0

PCI_SERR_L

PCI_DEVSEL_L

PCI_LOCK_L

PCI_REQ1_L

PCI_REQ3_L

INT_PIRQA_L INT_PIRQB_L

INT_PIRQD_L

INT_PIRQC_L

SB_GPIO4

SB_GPIO3

SB_GPIO2

=PP3V3_S0_SB_PM

PM_SB_PWROK

XDP_DBRESET_L

SW_RST_DEBNC

VR_PWRGOOD_DELAY

PCI_REQ2_L

PCI_REQ0_L

PCI_STOP_L

PCI_TRDY_L

PCI_FRAME_L PCI_IRDY_L

PCI_PERR_L

PP3V3_S5

=PP3V3_S0_SB_PCI

PP3V3_S5

SMS_INT_L

U2698_4

ODD_PWR_EN_L SB_GPIO5

MAKE_BASE=TRUE

ALL_SYS_PWRGD

83

80

84

80

79

83

79

78

76

78

77

45

77

76

41

76

66

27

66

65

26

65

26

10

26

84

25

6

25

6

11

75

6

77

24

5

58

23

33

5

44

38

7

14

44

5

58

21

3

21

23

5

75

3

21

3

22

3

23

5

22

3

23

22

5

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

U5800

SMC

(MASTER)

U5800

SMC ALS

GPU Heatsink

(Write: 0xD2 Read: 0xA1)

Mini-Card

MXM Temp

J2800 & J2900

2x SO-DIMMS

U2100

(MASTER)

GPU on card - J8400

MAX6649 on nVidia card

(Write: 0x90 Read: 0x91)

HDD Temp

J6602

ODD Temp

CPU Diode Temp

(Write: 0x98 Read: 0x98)

U5800

LM75, J1070

LM75, J1050

J6601

(Write: 0x92 Read: 0x93)

(Write: 0x98 Read: 0x99)

Ambient Intake

SMC "0" SMBus Connections

ICH7-M SMBus Connections

M35 Airport - J5300

Address 0x94

ADT7461: U1000

SMC

(MASTER)

ADDRESS 0x94

LM75, J1000

CPU Heatsink

(MASTER)

U5800

SMC

NB Heatsink

MAX6642, J1080

Address 0x90

SMC "B" SMBus Connections

Address 0x96

(ADDRESS)

SMC "A" SMBus Connections

TAOS PN? J4750

Unused SMC "Battery A/B" SMBus

(MASTER)

SMC

U5800

(MASTER)

CY28445: U3301

ICH7-M

Clock Chip

SMBUS_SB_SDA

2

1

R2700

MF-LF

2.2K

402

1/16W

5%

2

1

R2701

2.2K

MF-LF

1/16W

5%

402

2

1

R2751

2.2K

1/16W

402

MF-LF

5%

2

1

R2750

402

MF-LF

1/16W

5%

2.2K

SMBUS_SMC_0_S0_SDA

2

1

R2771

5%

402

MF-LF

1/16W

2.2K

2

1

R2770

5% 1/16W MF-LF

402

2.2K

SMBUS_SMC_A_S3_SDA

2

1

R2761

1/16W

402

5%

2.2K

MF-LF

2

1

R2760

402

1/16W

2.2K

MF-LF

5%

SMBUS_SMC_B_S0_SDA

2

1

R2781

MF-LF

1/16W

5%

402

10K

2

1

R2780

402

MF-LF

1/16W

5%

10K

SMBUS_SMC_BSA_SDA

2

1

R2791

MF-LF

1/16W

5%

402

10K

2

1

R2790

402

MF-LF

1/16W

5%

10K

SMBUS_SMC_BSB_SDA

SYNC_MASTER=M51_DAVE

SYNC_DATE=(MASTER)

051-7039

H

27 97

M51 SMBus Connections

MAKE_BASE=TRUE

SMBUS_SMC_A_S3_SCL

MAKE_BASE=TRUE

SMB_BSB_CLK

SMB_BSA_DATA

SMB_BSA_CLK

PP3V3_S3

I2C_ALS_SCL

MAKE_BASE=TRUE

SMBUS_SMC_B_S0_SCL

MAKE_BASE=TRUE

SMB_0_S0_DATA

MAKE_BASE=TRUE

SMBUS_SMC_0_S0_SCL

=SMB_NB_HS_THRM_DATA

=SMB_NB_HS_THRM_CLK

=SMB_GPU_HS_THRM_CLK

SMB_B_S0_DATA

PP3V3_S0

SMB_CK410_CLK

SMB_CK410_DATA

=SMB_AMB_TEMP_CLK

=SMB_GPU_HS_THRM_DATA

PP3V3_S0

=SMB_GPU_THRM_CLK

=SMB_AMB_TEMP_DATA

=I2C_HD_TEMP_SCL

=SMB_CPU_HS_THRM_CLK

=SMB_CPU_HS_THRM_DATA

=SMB_THRM_DATA

=SMB_THRM_CLK

SMB_B_S0_CLK

=I2C_ODD_TEMP_SDA

=I2C_ODD_TEMP_SCL

=I2C_HD_TEMP_SDA

MAKE_BASE=TRUE

SMBUS_SB_SCL

=I2C_MEM_SDASMB_DATA

=I2C_MEM_SCL

=PP3V3_S0_SB_GPIO

=SMB_GPU_THRM_DATA

=SMB_AIRPORT_DATA

=SMB_AIRPORT_CLK

SMB_CLK

SMB_0_S0_CLK

I2C_ALS_SDA

SMB_A_S3_CLK

SMB_A_S3_DATA

=PP3V3_S5_SMC

MAKE_BASE=TRUE

SMBUS_SMC_BSA_SCL

MAKE_BASE=TRUE

SMBUS_SMC_BSB_SCL

MAKE_BASE=TRUE

SMB_BSB_DATA

84

83

76

45

41

27

26

83

10

59

53

6

23

58

6

5

29

21

27

5

58

3

47

58

10

58

3

33

10

3

10

66

10

58

66

5

28 23

28

3

10

53

23 58

47

58

3

58

www.Vinaﬁx.vn

Preliminary

DQ58

DQ59

SA1GNDVDDSPD

SDA

SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

One 0.1uF per connector

- =PPSPD_S0_MEM (2.5V - 3.3V)

- =PP1V8_S3_MEM

Page Notes

Signal aliases required by this page:

BOM options provided by this page:

- =I2C_MEM_SDA

- =I2C_MEM_SCL

(NONE)

DDR2 Bypass Caps

(For return current)

NC

ADDR=0xA0(WR)/0xA1(RD)

NC

516S0403

SOME ANCHOR PINS CONNECTED TO NETS TO IMPROVE PLANE POUR

DDR2 VRef

Power aliases required by this page:

2

1

C2813

10V

0.1uF

CERM 402

20%

2

1

C2812

10V

0.1uF

CERM 402

20%

2

1

C2811

10V

0.1uF

CERM 402

20%

2

1

C2810

10V

0.1uF

CERM 402

20%

2

1

C2819

20%

402

CERM

0.1uF

10V

2

1

C2818

20%

402

CERM

0.1uF

10V

2

1

C2817

20%

402

CERM

0.1uF

10V

2

1

C2816

20%

402

CERM

0.1uF

10V

2

1

C2821

20%

402

CERM

0.1uF

10V

2

1

C2820

20%

402

CERM

10V

0.1uF

2

1

C2815

20%

402

CERM

0.1uF

10V

2

1

C2814

20%

402

CERM

0.1uF

10V

2

1

C2800

0.1uF

20%

10V

402

CERM

2

1

C2804

603

X5R

6.3V

10UF

20%

2

1

C2803

603

X5R

6.3V

10UF

20%

2

1

C2802

603

X5R

6.3V

10UF

20%

2

1

C2801

603

X5R

6.3V

10UF

20%

109

24

21

18

15

196

193

190

187

184183

178177

172

12

171

168

165

162161

156155

150149

145

9

144

139

138

133

132

128127

122121

7877

7271

6665

6059

5453

8

4847

4241

4039

3433

2827

3

21

199

112111

104103

9695

8887

118117

8281

195

197

200

198

110

108

114

163

120

83

69

50

115

119

80

84

86

116

205

204

203

202

201

186

188

167

169

146

148

129

131

68

70

49

51

29

31

11

13

25

23

16

194

192

182

180

14

191

189

181

179

176

174

160

158

175

173

6

159

157

154

152

142

140

153

151

143

141

4

136

134

126

124

137

135

125

123

76

74

19

64

62

75

73

63

61

58

56

46

44

17

57

55

45

43

38

36

22

20

37

35

7

5

185

170

147

130

67

52

26

10

79

166

164

32

30

113

85

106

107

91

93

92

94

97 98

99

100

89 90

105

101 102

J2800

F-RT-SM2

CRITICAL

DDR2-SODIMM-STD

2

1

C2850

603

CERM1

6.3V

2.2UF

10%

2

1

C2852

0.1uF

20%

CERM

10V

402

2

1

C2851

603

CERM1

6.3V

10%

2.2UF

2

1

R2800

1/16W

1%

1K

402

MF-LF

2

1

R2801

MF-LF

1/16W

1K

402

1%

DDR2 SO-DIMM Connector A

051-7039

H

9728

SYNC_MASTER=M51_HENRY

SYNC_DATE=08/04/2006

MEM_A_DQ<4>

MEM_A_DQ<5>

MEM_A_DM<0>

MEM_A_DQ<6>

MEM_A_DQ<12>

=PP1V8_S3_MEM

=PPSPD_S0_MEM

MEM_CLK_P<0>

MEM_A_DQ<52>

MEM_A_DQ<31>

MEM_A_DQ<63>

MEM_A_DQ<62>

MEM_A_DQS_P<7>

MEM_A_DQS_N<7>

MEM_A_DQ<60>

MEM_A_DQ<54>

MEM_CLK_N<1>

MEM_CLK_P<1>

MEM_A_DQ<53>

MEM_A_DQS_P<5>

MEM_A_DQS_N<5>

MEM_A_DQ<45>

MEM_A_DQ<44>

MEM_A_DQ<39>

MEM_A_DQ<38>

MEM_A_DM<4>

MEM_A_DQ<37>

MEM_A_DQ<36>

=PP1V8_S3_MEM

MEM_A_A<13>

MEM_ODT<0>

MEM_CS_L<0>

MEM_A_RAS_L

MEM_A_BS<1>

MEM_A_A<0>

MEM_A_A<2>

MEM_A_A<4>

MEM_A_A<6>

MEM_A_A<7>

MEM_A_A<11>

TP_MEM_A_A<14>

TP_MEM_A_A<15>

MEM_A_DQ<46> MEM_A_DQ<47>

MEM_A_DM<6>

MEM_A_DQ<55>

MEM_A_DQ<61>

MEM_CKE<1>

MEM_A_DQ<30>

MEM_A_DQS_P<3>

MEM_A_DQS_N<3>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DM<2>

DIMM_OVERTEMP_L

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_CLK_N<0>

MEM_A_DQ<13>

MEM_A_DQ<7>

MEM_A_DQ<43>

=I2C_MEM_SCL

=I2C_MEM_SDA

MEM_A_DQ<59>

MEM_A_DQ<58>

MEM_A_DM<7>

MEM_A_DQ<56>

MEM_A_DQ<50>

MEM_A_DQS_N<6>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DM<5>

MEM_A_DQ<41>

MEM_A_DQ<35>

MEM_A_DQS_P<4>

MEM_A_DQS_N<4>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_ODT<1>

MEM_CS_L<1>

MEM_A_CAS_L

MEM_A_WE_L

MEM_A_BS<0>

MEM_A_A<10>

MEM_A_A<1>

MEM_A_A<3>

MEM_A_A<5>

MEM_A_A<8>

MEM_A_A<9>

MEM_A_A<12>

MEM_A_BS<2>

MEM_CKE<0>

MEM_A_DQ<27>

MEM_A_DQ<26>

MEM_A_DM<3>

MEM_A_DQ<25>

MEM_A_DQ<24>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQS_P<2>

MEM_A_DQS_N<2>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<11>

MEM_A_DQ<10>

MEM_A_DQS_P<1>

MEM_A_DQS_N<1>

MEM_A_DQ<9>

MEM_A_DQ<8>

MEM_A_DQ<3>

MEM_A_DQS_N<0>

MEM_A_DQ<34>

MEM_A_DQ<40>

MEM_A_DQ<42>

MEM_A_DQS_P<6>

MEM_A_DQ<51>

MEM_A_DQ<57>

MEM_A_DQS_P<0>

MEM_A_DM<1>

=PP1V8_S3_MEM

VOLTAGE=0.9V

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.25 mm

MEM_VREF

MEM_A_DQ<2>

MEM_A_DQ<1>

MEM_A_DQ<0>

MEM_VREF

29

28

29

28

30

59

29

30

28

29

29 15

15

3

14

15

14

15

3

15

14

15

14

15

29

15

14

15

27

15

14

15

14

15

3

28

15

28

www.Vinaﬁx.vn

Preliminary

DQ58

DQ59

SA1GNDVDDSPD

SDA

SCL

DQ4

VSS11

VSS13

DQ14

VSS2

DQ5

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

CK0*

CK0

DQ13

VSS7

VSS5

DM0

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VSS57

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

VSS10

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DQ7

VSS55

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TO NETS TO IMPROVE PLANE POUR

SOME ANCHOR PINS CONNECTED

- =PPSPD_S0_MEM (2.5V - 3.3V)

- =PP1V8_S3_MEM

NOTE: This page does not supply VREF.

ADDR=0XA4(WR)/0XA5(RD)

NC

516S0404

BOM options provided by this page:

Power aliases required by this page:

Page Notes

Signal aliases required by this page:

(For return current)

DDR2 Bypass Caps

- =I2C_MEM_SCL

- =I2C_MEM_SDA

(NONE)

by another page.

The reference voltage must be provided

Resistor prevents pwr-gnd short

2

1

C2908

1UF

10%

CERM 402

6.3V

2

1

C2900

20%

402

CERM

10V

0.1uF

2

1

R2900

10K

5% 1/16W MF-LF 402

2

1

C2909

1UF

10%

CERM

6.3V

402

2

1

C2910

402

6.3V

CERM

10%

1UF

2

1

C2911

402

6.3V

CERM

10%

1UF

2

1

C2915

402

6.3V

CERM

10%

1UF

2

1

C2914

402

6.3V

CERM

10%

1UF

2

1

C2913

402

1UF

10%

CERM

6.3V

2

1

C2912

402

1UF

10%

CERM

6.3V

2

1

C2919

402

6.3V

CERM

10%

1UF

2

1

C2918

402

6.3V

CERM

10%

1UF

2

1

C2917

402

1UF

10%

CERM

6.3V

2

1

C2916

402

1UF

10%

CERM

6.3V

2

1

C2923

402

6.3V

CERM

10%

1UF

2

1

C2922

402

6.3V

CERM

10%

1UF

2

1

C2921

402

1UF

10%

CERM

6.3V

2

1

C2920

402

1UF

10%

CERM

6.3V

109

24

21

18

15

196

193

190

187

184183

178177

172

12

171

168

165

162161

156155

150149

145

9

144

139

138

133

132

128127

122121

7877

7271

6665

6059

5453

8

4847

4241

4039

3433

2827

3

21

199

112111

104103

9695

8887

118117

8281

195

197

200

198

110

108

114

163

120

83

69

50

115

119

80

84

86

116

205

204

203

202

201

186

188

167

169

146

148

129

131

68

70

49

51

29

31

11

13

25

23

16

194

192

182

180

14

191

189

181

179

176

174

160

158

175

173

6

159

157

154

152

142

140

153

151

143

141

4

136

134

126

124

137

135

125

123

76

74

19

64

62

75

73

63

61

58

56

46

44

17

57

55

45

43

38

36

22

20

37

35

7

5

185

170

147

130

67

52

26

10

79

166

164

32

30

113

85

106

107

91

93

92

94

97 98

99

100

89 90

105

101 102

J2900

F-RT-SM2

DDR2-SODIMM-REV

CRITICAL

2

1

C2950

6.3V

CERM1

603

10%

2.2UF

2

1

C2952

0.1uF

20%

CERM

10V

402

2

1

C2951

603

CERM1

6.3V

10%

2.2UF

DDR2 SO-DIMM Connector B

H

051-7039

29 97

SYNC_MASTER=M51_HENRY

SYNC_DATE=08/04/2006

MEM_B_DQ<4>

=PP1V8_S3_MEM

=PPSPD_S0_MEM

MEM_B_DM<1>

MEM_B_DQS_P<0>

MEM_B_DQ<57>

MEM_B_DQ<51>

MEM_B_DQS_P<6>

MEM_B_DQ<42>

MEM_B_DQ<40>

MEM_B_DQ<34>

MEM_B_DQ<0>

MEM_B_DQ<1>

MEM_B_DQ<2>

MEM_B_DQ<3>

MEM_B_DQ<8>

MEM_B_DQ<9>

MEM_B_DQS_N<1>

MEM_B_DQS_P<1>

MEM_B_DQ<10>

MEM_B_DQ<11>

MEM_B_DQ<16>

MEM_B_DQ<17>

MEM_B_DQS_N<2> MEM_B_DQS_P<2>

MEM_B_DQ<18> MEM_B_DQ<19>

MEM_B_DQ<24> MEM_B_DQ<25>

MEM_B_DM<3>

MEM_B_DQ<26>

MEM_B_DQ<27>

MEM_CKE<2>

MEM_B_BS<2>

MEM_B_A<12> MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<5>

MEM_B_A<1>

MEM_B_A<10> MEM_B_BS<0>

MEM_B_WE_L

MEM_B_CAS_L

MEM_CS_L<3>

MEM_ODT<3>

MEM_B_DQ<32>

MEM_B_DQ<33>

MEM_B_DQS_N<4>

MEM_B_DQS_P<4>

MEM_B_DQ<35>

MEM_B_DQ<41>

MEM_B_DM<5>

MEM_B_DQ<48>

MEM_B_DQ<49>

MEM_B_DQS_N<6>

MEM_B_DQ<50>

MEM_B_DQ<56>

MEM_B_DM<7>

MEM_B_DQ<58>

MEM_B_DQ<59>

=I2C_MEM_SDA

=I2C_MEM_SCL

MEM_B_DQ<43>

MEM_B_DQ<12>

MEM_B_DQ<6>

MEM_B_DQ<7>

MEM_B_DQ<15>

MEM_B_DQ<20>

MEM_B_DQ<21>

DIMM_OVERTEMP_L

MEM_B_DM<2>

MEM_B_DQ<22> MEM_B_DQ<23>

MEM_B_DQ<28> MEM_B_DQ<29>

MEM_B_DQS_N<3> MEM_B_DQS_P<3>

MEM_B_DQ<30>

MEM_CKE<3>

MEM_B_DQ<61>

MEM_B_DQ<55>

MEM_B_DM<6>

MEM_B_DQ<47>

MEM_B_DQ<46>

TP_MEM_B_A<15> TP_MEM_B_A<14>

MEM_B_A<11> MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<4>

MEM_B_A<2> MEM_B_A<0>

MEM_B_BS<1> MEM_B_RAS_L

MEM_CS_L<2>

MEM_ODT<2>

MEM_B_A<13>

MEM_B_DQ<36>

MEM_B_DQ<37>

MEM_B_DM<4>

MEM_B_DQ<38> MEM_B_DQ<39>

MEM_B_DQ<44>

MEM_B_DQ<45>

MEM_B_DQS_N<5>

MEM_B_DQS_P<5>

MEM_B_DQ<53>

MEM_CLK_P<2>

MEM_CLK_N<2>

MEM_B_DQ<54>

MEM_B_DQ<60>

MEM_B_DQS_N<7>

MEM_B_DQS_P<7>

MEM_B_DQ<62>

MEM_B_DQ<63>

MEM_B_SPD_SA1

MEM_B_DQ<31>

MEM_B_DQ<52>

=PPSPD_S0_MEM

=PP1V8_S3_MEM

=PP0V9_S0_MEM_TERM

=PP1V8_S3_MEM

MEM_B_A<3>

MEM_B_DM<0>

MEM_B_DQ<14>

MEM_CLK_P<3>

MEM_VREF

MEM_CLK_N<3>

MEM_B_DQ<13>

=PP1V8_S3_MEM

MEM_B_DQS_N<0>

MEM_B_DQ<5>

29

28

30

28

59

30

28

30 28

30

28

15

3

15

14

15

14

15

27

15

28

15

14

15

5

15

14

15

14

15

3

3 3

15

14

28

14

15

3

15

www.Vinaﬁx.vn

Preliminary

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BOMOPTION shown at the top of each group applies to every part below it

One cap for each side of every RPAK, one cap for every two discrete resistors

21

R3001

402

MF-LF1/16W

5%

56

21

R3009

1/16W

56

402

MF-LF

5%

21

R3011

1/16W

56

5%

402

MF-LF

21

R3025

56

5%

1/16W MF-LF

402

21

R3035

56

402

MF-LF1/16W

5%

0

2

1

15 29

2

1

C3004

0.1uF

402

CERM

10V

20%

2

1

C3006

20%

CERM 402

0.1uF

10V

2

1

C3008

0.1uF

402

CERM

10V

20%

2

1

C3009

0.1uF

402

CERM

10V

20%

2

1

C3013

0.1uF

10V

402

CERM

20%

2

1

C3014

0.1uF

20% 10V CERM 402

2

1

C3015

0.1uF

20% 10V CERM 402

63

RP3000

56

SM-LF

1/16W

5%

54

RP3000

56

SM-LF

1/16W

5%

81

RP3000

56

SM-LF

1/16W

5%

72

RP3000

56

SM-LF

1/16W

5%

72

RP3001

1/16W

56

SM-LF

5%

81

RP3001

56

SM-LF

1/16W

5%

54

RP3001

56

SM-LF

1/16W

5%

63

RP3001

1/16W

56

SM-LF

5%

54

RP3002

56

1/16W

SM-LF

5%

81

RP3002

56

SM-LF

1/16W

5%

72

RP3002

56

SM-LF

1/16W

5%

63

RP3002

56

SM-LF

1/16W

5%

81

RP3003

56

5%

1/16W

SM-LF

72

RP3003

5%

1/16W

56

SM-LF

63

RP3003

56

1/16W

5%

SM-LF

54

RP3003

1/16W

56

5%

SM-LF

81

RP3004

56

1/16W

5%

SM-LF

63

RP3004

5%

1/16W

56

SM-LF

54

RP3004

5%

1/16W

56

SM-LF

81

RP3005

56

5%

1/16W

SM-LF

72

RP3005

5%

1/16W

56

SM-LF

63

RP3005

56

1/16W

5%

SM-LF

54

RP3005

1/16W

5%

SM-LF

56

81

RP3006

56

5%

1/16W

SM-LF

72

RP3006

5%

1/16W

56

SM-LF

63

RP3006

1/16W

5%

SM-LF

56

54

RP3007

1/16W

SM-LF

5%

56

63

RP3007

1/16W

SM-LF

56

5%

72

RP3007

5%

1/16W

56

SM-LF

81

RP3007

5%

1/16W

56

SM-LF

54

RP3008

56

1/16W

5%

SM-LF

63

RP3008

5%

1/16W

56

SM-LF

72

RP3008

56

1/16W

5%

SM-LF

81

RP3008

1/16W

5%

56

SM-LF

81

RP3009

1/16W

5%

56

SM-LF

72

RP3009

5%

1/16W

56

SM-LF

63

RP3009

56

1/16W

5%

SM-LF

54

RP3009

56

1/16W

5%

SM-LF

63

RP3010

5%

1/16W

56

SM-LF

72

RP3010

56

1/16W

5%

SM-LF

81

RP3010

SM-LF

5%

1/16W

56

54

RP3010

SM-LF

56

1/16W

5%

81

RP3011

5%

1/16W

SM-LF

56

72

RP3011

56

1/16W

5%

SM-LF

54

RP3011

5%

1/16W

56

SM-LF

54

RP3006

1/16W

5%

SM-LF

56

63

RP3011

56

1/16W

5%

SM-LF

15 29

2

1

C3031

0.1uF

20% 10V CERM 402

2

1

C3032

0.1uF

402

CERM

10V

20%

2

1

C3043

0.1uF

20% 10V CERM 402

2

1

C3036

0.1uF

20% 10V CERM 402

2

1

C3037

0.1uF

20% 10V CERM 402

2

1

C3038

0.1uF

20% 10V CERM 402

2

1

C3001

0.1uF

20% 10V CERM 402

2

1

C3000

0.1uF

20% 10V CERM 402

2

1

C3040

0.1uF

20% 10V CERM 402

2

1

C3039

0.1uF

20% 10V

402

CERM

2

1

C3042

0.1uF

20% 10V CERM 402

2

1

C3041

20% 10V CERM 402

0.1uF

0

1

0

1

0

2

0

1

2

3

4

5

6

7

10

11

9

8

13

12

14 28 29

15 28

2

3

2

3

2

1

C3033

0.1uF

20% 10V CERM 402

2

1

C3030

0.1uF

20% 10V CERM 402

2

1

C3011

0.1uF

CERM 402

20% 10V

2

1

C3010

0.1uF

402

CERM

10V

20%

2

1

C3007

0.1uF

20% 10V CERM 402

2

1

C3005

0.1uF

402

CERM

10V

20%

2

1

C3035

0.1uF

402

CERM

10V

20%

0

1

2

3

14 28 29

Memory Active Termination

30 97

H

051-7039

MEM_A_A<13..0>

MEM_CKE<3..0>

MEM_ODT<3..0>

MEM_A_BS<2..0>

MEM_CS_L<3..0>

MEM_B_BS<2..0>

MEM_A_RAS_L

MEM_B_A<10> MEM_B_A<4>

MEM_B_A<1>

MEM_B_A<11>

MEM_B_A<12> MEM_B_A<13>

MEM_B_A<2>

MEM_B_CAS_L

MEM_B_WE_L

MEM_B_RAS_L

MEM_A_CAS_L

MEM_B_A<3>

MEM_B_A<0>

MEM_A_WE_L

MEM_B_A<5>

MEM_B_A<6> MEM_B_A<7>

MEM_B_A<8>

MEM_B_A<9>

=PP0V9_S0_MEM_TERM

29

3

www.Vinaﬁx.vn

Preliminary

VREF

VTT

GND

VTT_IN

EN

VTTS

VDDQ

VCC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DDR2 Vtt Regulator

(NONE)

Power aliases required by this page:

Signal aliases required by this page:

- =PP5V_S0_MEMVTT

- =PP1V8_S0_MEMVTT

MEMVTT_EN can be used to

Page Notes

If power inputs are not S0,

?Can 5V be S0 if 1V8 is S3?

disable MEMVTT in sleep.

USING 1% FR BOM CONSOLIDATION

- =PP0V9_S0_MEMVTT_LDO

BOM options provided by this page:

2

1

C3101

805-1

CERM

10UF

20%

6.3V

3

7

8

4

56

1

2

U3100

MSOP-8

BD3533FVM

CRITICAL

2

1

R3100

5% 1/16W MF-LF

402

1K

MEMVTT_EN_PU

C3105

6.3V POLY

20%

150UF

SMC-LF

CRITICAL

2

1

C3102

805-1

CERM

10UF

20%

6.3V

21

R3101

1%

221

1/16W MF-LF

402

2

1

C3109

6.3V

2.2UF

10%

CERM1

603

2

1

C3110

20%

0.1UF

10V

CERM

402

2

1

C3100

402

CERM

1uF

10%

6.3V

SYNC_DATE=08/04/2006

SYNC_MASTER=M50_HENRY

31 97

H

051-7039

Memory Vtt Supply

=PP1V8_S0_MEMVTT

=PP0V9_S0_MEMVTT_LDO

MEMVTT_VREF

=PP5V_S0_MEMVTT

MEMVTT_EN

U3100_VDDQ

3

79

www.Vinaﬁx.vn

Preliminary

VTT_PWRGD*/PD

DOT96T/27MHZ_NON-SPREAD

SRCT_0/LCD100MT

CPUC2_ITP/SRCC_10

VDD48

XIN

VDD_PCI1

VDD_SRC0

VDD_REF

VDD_SRC1

VDD_SRC2

VDD_SRC3

REF1/FCTSEL0

REF0/FSC

FSA/48M

DOT96C/27MHZ_SPREAD

CLKREQ_8*

SRCT_8

SRCC_8

SRCT_7

SRCC_7

CLKREQ_6*

CPUT2_ITP/SRCT_10

IREF

SDATA

SCLK

VSS_REF

VSS_PCI1

VSS_PCI0

VSS_CPU

VSS48

VSS_SRC

PCIF1

PCI1

SRCT_5

THRML_PAD

PCI4

PCI2

FSB

CLKREQ_4*

SRCC_5

SRCC_4

SRCT_4

SRCT_3

CLKREQ_3*

SRCC_3

SRCC_2

SRCT_2

SRCC_1

CLKREQ_1*

SRCT_1

SRCC_0/LCD100MC

CPUC1

CPUT1

CPUC0

CPUT0

PCI_STP*

CPU_STP*

SRCC_6

CLKREQ_5*

SRCT_6

PCIF0/ITP_SEL

PCI5/FCTSEL1

PCI3

XOUT

VDDA

VSSA

VDD_PCI0

VDD_CPU

IN

OUT

IN

OUT

IN

IO

OUT

IN

IO

OUT

IN

OUT

IN

OUT

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

(INT PU)

(INT PD)

PIN 7

DOT96C

TBD

SPREAD

27M

(NO USED)

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)

(ICH SM BUS)

(ICH7M PCI 33MHZ)

(PORT80 LPC 33MHZ)

0

(INT PU)

(FOR PCI-E CARD)

(ICH7M,SIO,LPC REF. 14.318MHZ)

(INT PD)

(GMCH G_CLKIN 100 MHZ )

(FROM ICH7 GPIO18 STPPCI* ) (FROM ICH7 GPIO20 STPCPU* )

(GMCH HOST 133/167MHZ)

(ITP HOST 133/167MHZ)

(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

PROTO TO REMOVE 100M FROM SIGNAL NAME)

(SIGNAL NAME WILL BE CHANGED POST

(INT PU)

(CPU HOST 133/167MHZ)

(NOT USED )

(INT PD)

(INT PU)

PIN 6

* FOR EXT. GRAPHIC SYSTEM

* FOR INT. GRAPHIC SYSTEM

SRCT0

DOT96T

PIN 10 PIN 11

100MC_SST

FCTSEL1

00

01

1

11

OFF LOW

27M NON SPREAD

DOT96C 100MT_SST

SRCT0

SRCC0

FCTSEL0

(INT PU)

(ICH SATA 100 MHZ)

(FW PCI 33MHZ) (TPM LPC 33MHZ) (SMC LPC 33MHZ)

(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

(EACH POWER PIN PLACED ONE 0.1UF)

(INT PU) (INT PU)

(GPU PCI-E 100 MHZ )

NEED TO DECIDE THE CLKREQ CONNECTION,TO GPIO?

(ICH7M DMI 100 MHZ )

(FROM ICH7 GPIO35)

(FROM GMCH CLK_REQ*)

(WIRELESS PCI-E 100 MHZ )

(GIGA LAN PCI-E 100 MHZ )

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

(FROM CPU VCORE PWR GOOD) (ICH7M USB 48MHZ)

2

1

C3309

10UF

6.3V

20% X5R

603

21

L3302

0402

FERR-120-OHM-1.5A

2

1

C3305

16V X5R

10%

0.1UF

402

2

1

C3306

0.1UF

402

X5R

16V

10%

2

1

C3307

402

10%

0.1UF

X5R

16V

2

1

C3308

X5R

16V

0.1UF

402

10%

50

51

2

39

31

52

66

62

46

5

38

352817

12

49

67

61

43

3

69

33

29

26

23

21

18

15

13

10

32

30

27

24

22

19

16

14

11

48

47

53

54

1

68

56

65

64

63

58

57

40

8

4

6

7

37

42

45

36

41

44

55

34

25

60

20

59

9

U3301

QFN

CY284455

OMIT

CRITICAL

2

1

C3390

50V CERM

5%

15PF

402

2

1

C3389

CERM

50V

15PF

5%

402

2

1

R3300

1/16W

402

475

1%

MF-LF

2

1

C3312

20%

6.3V CERM

10UF

805-1

2

1

C3311

10% X5R

402

0.1UF

16V

2

1

C3304

X5R

16V

10%

402

0.1UF

2

1

C3303

10%

0.1UF

402

16V X5R

2

1

C3302

402

X5R

16V

10%

0.1UF

2

1

C3301

10%

0.1UF

16V X5R 402

2

1

C3310

402

10%

CERM

6.3V

1UF

2

1

C3316

10UF

20%

6.3V X5R 603

2

1

C3315

0.1UF

402

16V X5R

10%

21

L3301

0402

FERR-120-OHM-1.5A

2

1

C3314

402

6.3V CERM

10%

1UF

21

R3302

2.2

5% 1/16W MF-LF

402

21

R3303

1

MF-LF

5% 1/16W

402

2

1

C3317

10UF

20%

6.3V X5R 603

21

R3304

1/16W

5%

2.2

402

MF-LF

2

1

R3301

1/16W 402

MF-LF

5%

10K

21

Y3301

5X3.2-SM

14.31818

CRITICAL

SYNC_DATE=08/04/2006

SYNC_MASTER=M50_HENRY

CLOCKS

9733

051-7039

H

PP3V3_S0_CK410_VDD_CPU_SRC

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

CK410_CPU1_N

=PP3V3_S0_CK410

CK410_XTAL_OUT

PP3V3_S0_CK410_VDDA

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

CK410_PCI4_CLK

CK410_DOT96_27M_N CK410_DOT96_27M_P

CK410_USB48_FSA

CK410_CPU2_ITP_SRC10_P

CK410_CPU0_N

PM_STPCPU_L

PM_STPPCI_L

CK410_CPU1_P

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

PP3V3_S0_CK410_VDD_REF

CK410_PCI5_FCTSEL1

CK410_PCIF1_CLK

CK410_IREF

SMB_CK410_DATA

CK410_SRC5_P

CLK_NB_OE_L

CK410_SRC_CLKREQ6_L

CK410_CPU0_P

=PP3V3_S0_CK410

CK410_PCI2_CLK

CK410_SRC_CLKREQ1_L

CK410_SRC2_N

CK410_SRC3_P

CK410_LVDS_P

CK410_LVDS_N

CK410_CPU2_ITP_SRC10_N

SMB_CK410_CLK

CK410_SRC_CLKREQ3_L

CK410_SRC1_P

SB_CLK100M_SATA_OE_L

CK410_SRC5_N

CK410_SRC4_P

CK410_SRC4_N

CK410_SRC8_N

CK410_SRC7_P

CK410_SRC7_N

CK410_SRC6_N CK410_SRC6_P

CK410_PCI3_CLK

CK410_SRC3_N

CK410_SRC2_P

=PP3V3_S0_CK410

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

PP3V3_S0_CK410_VDD48

CK410_SRC1_N

CK410_FSB_TEST_MODE

CK410_PCI1_CLK

CK410_XTAL_IN

CK410_PCIF0_CLK

CK410_REF1_FCTSEL0

CK410_CLK14P3M_TIMER

CK410_PD_VTT_PWRGD_L

CK410_SRC_CLKREQ8_L

CK410_SRC8_P

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2mm

MIN_LINE_WIDTH=0.5mm

PP3V3_S0_CK410_VDD_PCI

34

33

85

33

34

3

34

23

34

27

34

14

53

34

3

34

27

34

23

34

3

34

26

34

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

R3459

R3454

(GPU CLK OE*)

(YUKON CLK OE*)

(SPARE CLK OE*)

NOTE: USE THESE PULL-DOWNS IF NOT CONNECTED TO GPIO’S

PULLED DOWN BY MXM GRAPHICS CARD.

NOTE: CLKREQ1 SHOULD BE DRIVEN OR

CPU DRIVEN

(133MHZ CPU CLK)

(166MHZ CPU CLK)

R3461

667MHZ

533MHZ

R3452

R3461

R3457

R3452

R3463

NO STUFF

R3454 R3459 R3463

R3457

R3463

R3457 R3461

R3454 R3459

STUFF

FSB FREQUENCY SELECT:

R3452

TPM CLOCK IS TURNED OFF IN SW AND RESISTOR NOSTUFF

21

R3400

402

33

1/16W5%MF-LF

21

R3401

33

21

R3402

33

21

R3403

33

21

R3404

NOSTUFF

33

21

R3405

33

21

R3406

33

21

R3407

33

21

R3408

33

21

R3409

33

21

R3410

33

21

R3411

33

21

R3412

33

21

R3413

33

21

R3414

33

21

R3415

33

21

R3416

33

21

R3417

33

21

R3418

33

21

R3419

33

21

R3420

33

21

R3421

33

21

R3422

33

21

R3423

33

21

R3424

33

21

R3429

MF-LF

1/16W

402

49.9

1%

21

R3430

49.9

21

R3431

49.9

21

R3432

49.9

21

R3433

49.9

21

R3434

49.9

21

R3435

49.9

21

R3436

49.9

21

R3437

49.9

21

R3438

49.9

21

R3439

49.9

21

R3440

49.9

21

R3441

49.9

21

R3442

49.9

21

R3443

49.9

21

R3444

49.9

21

R3445

49.9

21

R3446

49.9

21

R3462

402

MF-LF1/16W1K5%

2

1

R3460

MF-LF

1/16W

5%

1K

402

21

R3451

2.2K

5%

MF-LF

402

1/16W

2

1

R3463

5% 1/16W MF-LF

0

402

2

1

R3461

0

MF-LF

5%

402

NOSTUFF

1/16W

2

1

R3457

0

MF-LF

1/16W

5%

402

NOSTUFF

2

1

R3456

MF-LF

1/16W

5%

1K

402

2

1

R3459

0

5% 1/16W MF-LF 402

21

R3458

1/16W1KMF-LF5%402

2

1

R3452

1/16W

5%

MF-LF

56

402

NOSTUFF

2

1

R3454

1/16W

402

MF-LF

0

5%

21

R3453

5%

1K

402

MF-LF1/16W

21

R3455

1K

5%

MF-LF

402

1/16W

21

R3499

5%

402

1K

1/16W MF-LF

21

R3497

402

MF-LF

1/16W

5%

2.2K

21

R3498

MF-LF

33

1/16W

5%

402

21

R3496

33

21

R3495

NOSTUFF

1K

21

R3494

1K

21

R3493

1K

21

R3492

33

21

R3489

33

21

R3490

33

21

R3491

33

21

R3487

49.9

21

R3488

49.9

21

R3486

49.9

21

R3485

49.9

051-7039

34 97

H

SYNC_DATE=08/04/2006

CLOCKS: TERMINATIONS

SYNC_MASTER=M51_HENRY

SB_CLK48M_USBCTLR

TP_PCI_CLK_SPARE

CK410_PCI3_CLK

PCI_CLK_PORT80

FSB_CLK_CPU_P

FSB_CLK_NB_N

FSB_CLK_NB_P

FSB_CLK_CPU_N

CK410_USB48_FSA

CK410_PCI4_CLK

CK410_PCI2_CLK

CK410_PCIF0_CLK

CK410_CPU1_P

CK410_SRC5_N

CK410_SRC4_P

CK410_SRC4_N

CK410_SRC2_P

CK410_SRC2_N

CK410_SRC8_N

CK410_SRC1_P

CK410_SRC1_N

CK410_LVDS_P

CK410_LVDS_N

CK410_DOT96_27M_P

CK410_SRC8_P

TP_CK410_27M_NONSPREAD

MAKE_BASE=TRUE

CK410_REF1_FCTSEL0

CK410_CPU2_ITP_SRC10_P

ENET_CLK100M_PCIE_N

GPU_CLK100M_PCIE_N

TP_CK410_LVDS_N

MAKE_BASE=TRUE

TP_CK410_27M_SPREAD

MAKE_BASE=TRUE

SB_CLK100M_SATA_P

NB_CLK100M_GCLKIN_N

PCI_CLK_TPM

CPU_BSEL<2>

CK410_DOT96_27M_N

SB_CLK100M_DMI_P

CK410_SRC6_N

CK410_SRC5_P

TP_CK410_LVDS_P

MAKE_BASE=TRUE

ENET_CLK100M_PCIE_P

SB_CLK100M_SATA_N

NB_CLK100M_GCLKIN_P

AIRPORT_CLK100M_PCIE_N

SB_CLK100M_DMI_N

CK410_FSA

CK410_PCI5_FCTSEL1

CK410_SRC7_N

CK410_SRC3_N

CK410_SRC3_P SPARE_SRC3_P

CK410_CLK14P3M_TIMER

CK410_FSC

CK410_FSA

CK410_PCI1_CLK

PCI_CLK_SB

PCI_CLK_SMC

CK410_FSC

PP1V05_S0

NB_BSEL<1>

NB_BSEL<2>

PP1V05_S0

CPU_BSEL<0>

CK410_PCIF1_CLK

CK410_FSB_TEST_MODE

CPU_BSEL<1>

NB_BSEL<0>

PCI_CLK_FW

CPU_XDP_CLK_P FSB_CLK_XDP_P

MAKE_BASE=TRUE

FSB_CLK_XDP_NCPU_XDP_CLK_N

CK410_CPU0_P

CK410_CPU2_ITP_SRC10_N

CK410_SRC6_P

CK410_CPU0_N

AIRPORT_CLK100M_PCIE_P

SPARE_SRC3_N

SPARE_SRC7_P

SPARE_SRC7_N

CK410_SRC7_P

TP_CLK14P3M_SPARE

SB_CLK14P3M_TIMER

=PP3V3_S0_CK410

CK410_SRC_CLKREQ1_L

CK410_SRC_CLKREQ3_L

CK410_SRC_CLKREQ8_L

CK410_CPU1_N

GPU_CLK100M_PCIE_P

80

34

23

60

21

22

58

5

44

11

23

33

85

5

33

5

7

12

7

33

41

85

5

14

67

7

33

22

33

41

5

14

53

22

34

33

34

33

5

34

3

14

3

7

33

7

14

5

33

53

33

5

3

33

85

www.Vinaﬁx.vn

Preliminary

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PLACE C3805-06 CLOSE TO J3801 FOR PP5V_S0_PATA. APPLY A WIDE TRACE SHAPE FROM J3801 TO C3805-06. MIN_NECK & MIN_LINE WIDTH

STUFFED PER LARRY

PLACE < 0.5 IN FROM BALL OF U2100

VALUE=3900PF IN REFERENCE SCHEM

BUT THE CAPS SHOULD BE THE SAME DISTANCE FROM THE SB WITHIN EACH PAIR

PATA (ODD) CONNECTOR

NOTE: ???

"IDE ACTIVE"

Per ATA Spec

NOTE: ATA-2, NOW OBSOLETE

PER ATA7 SPEC

Obsolete

Per ATA Spec

ARE CONTROLLED BY PP5V_S0 1MM / 0.6MM.

518S0416

NC NC

24

25

27

26

28

22

23

30

29

21

NC

19

20

32

31

33

16

17

18

35

34

14

15

38

37

36

11

12

13

40

39

9

10

43

42

41

8

7

6

45

44

NC

5

4

48

47

46

3

2

1

50

49

SATA PORT 0 IS NOT USED

SATA DIFF PAIR GND VIAS

518S0251

NOTE: GO TO SB AND SMC

C8300 -- C8304 MAY BE PLACED AT ANY POINT ALONG THE TRACES

(SB_GPIO14)

SATA CONNECTOR

PULL UP TO 5V ON P26

7

6

5

4

3

2

1

J3800

M-ST-SM

EP00-081-91

CRITICAL

1

GV3808

HOLE-VIA-P5RP25

1

GV3806

HOLE-VIA-P5RP25

1

GV3801

HOLE-VIA-P5RP25

1

GV3803

HOLE-VIA-P5RP25

1

GV3805

HOLE-VIA-P5RP25

1

GV3807

HOLE-VIA-P5RP25

1

GV3802

HOLE-VIA-P5RP25

1

GV3804

HOLE-VIA-P5RP25

0

21

C3800

402

0.0047UF

21

C3801

0.0047UF

402

21

C3802

402

0.0047UF

21

C3803

0.0047UF

402

2

1

R3899

402

5% 1/16W MF-LF

100

21

R3897

402

1%

MF-LF

1/16W

24.9

0

2

1

R3889

1K

1/16W

402

MF-LF

5%

21

R3800

402

5%

1/16W

0

MF-LF

21

R3801

NO STUFF

5%

MF-LF

1/16W

0

402

9

8

7

6

50

5

49

48

47

46

45

44

43

42

41

40

4

39

38

37

36

35

34

33

32

31

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

52

51

J3801

F-RT-SM

87151-5005N

CRITICAL

2

1

C3804

5%

50V

CERM

402

10pF

NO STUFF

2

1

R3851

4.7K

2

1

R3852

10K

NO STUFF

2

1

C3806

CERM

20%

10UF

10V

805-2

2

1

C3805

402

10V

CERM

20%

0.1uF

2

1

R3858

5% 1/16W MF-LF 402

0

21

LED3800

DEVELOPMENT

2.0X1.25MM-SM

GREEN-3.6MCD

2

1

R3857

1%

DEVELOPMENT

1/16W MF-LF

402

499

2

1

R3853

1K

2

1

R3824

NOSTUFF

10K

2

1

R3859

1/16W

6.2K

5%

MF-LF 402

SYNC_MASTER=M51_DOUG

H

9738

051-7039

SYNC_DATE=08/04/2006

Disk Connectors

IDE_PDD<6>

IDE_PDD<10> IDE_PDD<5>

IDE_PDD<11>

IDE_PDD<4>

IDE_PDD<14>

IDE_PDD<1> IDE_PDD<15>

IDE_PDD<0>

IDE_PDDREQ

SATA_RBIAS_P

MAKE_BASE=TRUE

IDE_RESET_L

SB_GPIO14

SATA_C_R2D_P

NO_TEST=TRUE

SATA_C_R2D_N

NO_TEST=TRUE

SATA_C_D2R_C_P

NO_TEST=TRUE

SATA_C_D2R_P

SATA_C_D2R_N

SATA_C_R2D_C_P

SATA_C_D2R_C_N

NO_TEST=TRUE

SATA_A_R2D_C_N

SATA_C_R2D_C_N

TP_SATA_A_R2D_N

MAKE_BASE=TRUE

TP_SATA_A_R2D_P

MAKE_BASE=TRUE

SATA_C_DET_L

SATA_RBIAS_N

SATA_A_D2R_P

SATA_A_D2R_N

SATA_A_R2D_C_P

SATA_RBIAS

MAKE_BASE=TRUE

=PP5V_S0_PATA

IDE_DASP_L

IDE_CSEL_PD

IDE_PDIOR_L IDE_PDIOW_L

IDE_RESET_L_CONN IDE_PDD<8>

IDE_PDD<7>

IDE_PDD<9>

IDE_PDD<2>

IDE_PDD<13>

IDE_PDD<3>

IDE_PDD<12>

IDE_PDA<0>

IDE_PDA<1>

IDE_PDCS3_L

IDE_DASP_L_DS

IDE_RESET_L_CONN

SB_GPIO3

IDE_PDCS1_L

IDE_PDA<2>

IDE_IOCS16_PU

IDE_IRQ14

IDE_PDDACK_L

IDE_PDIORDY

=PP3V3_S0_PATA

=PP5V_S0_PATA

MAKE_BASE=TRUE

21

38

21

26

21

38

21

23

21

23

21

3

5

21

38

21

5

21

38

22

21

5

3

www.Vinaﬁx.vn

Preliminary

OUT

AVDDL0

AVDDL4

AVDD

THRML_PAD

VDDO_TTL0

AVDDL6

VDDO_TTL1

RX_N

TESTMODE

TSTPT

LINK*

LED_LINK10/100*

LED_LINK1000*

LED_ACT*

RSET

CTRL25

CTRL12

HSDACN

HSDACP

SWITCH_VAUX

SWITCH_VCC

VMAIN_AVLBL

VAUX_AVLBL

LOM_DISABLE*

XTALO

XTALI

SPI_DO

SPI_CLK

SPI_CS

SPI_DI

VPD_CLK

VPD_DATA

MDIP3

MDIN3

MDIN2

MDIP2

MDIN1

MDIP1

MDIN0

MDIP0

WAKE*

REFCLKN

TX_N

VDDO_TTL3

VDDO_TTL2

VDDO_TTL4

VDD0

VDD1

VDD3

VDD2

VDD6

VDD5

VDD4

VDD7

AVDDL1

AVDDL2

AVDDL5

VDD25

PERST*

REFCLKP

RX_P

AVDDL3

TX_P

PU_VDDO_TTL0

PU_VDDO_TTL1

TEST

TWSI

SPI

MAIN CLK

PCI EXPRESS

ANALOG

MEDIA

LED

E2

WC*

NC0

NC1

VCC

VSS

SCL

SDA

IO

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NC

OPTIONAL EXTERNAL LDO

LAYOUT NOTE: PLACE C4112-13 AT U2100

LAYOUT NOTE: PLACE C4110-11 AT U4101

2

1

C4116

CERM 402

27PF

5% 50V

21

R4122

4.7K

1/16W

402

MF-LF

5%

21

R4123

1/16W

5%

402

4.7K

MF-LF

2

1

C4101

0.1UF

10% X5R

402

16V

14

15

6

41

38

47

61454081

5848443933641372

12

49

50

29

65

46

11

9

34

35

36

37

54

53

16

55

56

43

42

5

30

26

20

17

31

27

21

18

10

63

62

60

59

24

25

4

3

57525132282219

23

U4101

QFN

88E8053

OMIT

7

4

8

5

6

2

1

3

U4102

OMIT

SO8

M24C08

2

1

C4140

0.1UF

X5R 402

10% 16V

21

C4110

20%

CERM

10V 402

0.1UF

21

C4111

20%

0.1UF

10V

CERM

402

21

C4112

402

10V20%

0.1UF

CERM

21

C4113

402

CERM

10V20%

0.1UF

21

R4102

1/16W

1%

402

4.75K

MF-LF

21

R4130

4.7K

21

R4131

4.7K

21

R4151

NOSTUFF

1/16W

5%

402

MF-LF

0

21

R4150

402

5%

0

1/16W

MF-LF

31

42

Y4101

25.0000M

CRITICAL

SM-3.2X2.5MM

21

R4119

49.9

1%

1/16W

MF-LF

402

21

R4118

49.9

1%

1/16W

MF-LF

402

21

R4120

49.9

1%

1/16W

MF-LF

402

21

R4117

49.9

1%

1/16W

MF-LF

402

21

R4103

402

1/16W

1%

49.9

MF-LF

21

R4104

49.9

402

1%

1/16W

MF-LF

21

R4105

1%

402

MF-LF

1/16W

49.9

21

R4106

49.9

402

1%

1/16W

MF-LF

21

R4101

MF-LF

402

5%

1/16W

4.7K

2

1

C4106

0.001UF

50V

10%

402

CERM

2

1

C4107

50V

10%

402

CERM

0.001UF

2

1

C4117

10%

402

CERM

0.001UF

50V

2

1

C4118

50V

10%

402

CERM

0.001UF

2

1

C4105

0.001UF

50V

10%

402

CERM

2

1

C4104

X5R

16V

402

0.1UF

10%

2

1

C4103

16V

10%

402

X5R

0.1UF

2

1

C4102

16V

10%

402

X5R

0.1UF

2

1

C4150

0.001UF

50V

10%

402

CERM

2

1

C4128

16V

402

X5R

0.1UF

10%

2

1

C4133

10%

402

0.001UF

50V CERM

2

1

C4134

50V

402

CERM

0.001UF

10%

2

1

C4131

10%

402

0.001UF

CERM

50V

2

1

C4132

50V 402

CERM

0.001UF

10%

2

1

C4127

16V

10% X5R

402

0.1UF

2

1

C4126

16V

402

X5R

10%

0.1UF

2

1

C4129

16V

402

X5R

0.1UF

10%

2

1

C4130

10%

402

X5R

0.1UF

16V

2

1

C4139

50V

10%

0.001UF

402

CERM

2

1

C4138

50V

10%

402

CERM

0.001UF

2

1

C4137

16V

10%

402

X5R

0.1UF

2

1

C4136

0.1UF

16V

10% X5R

402

2

1

C4135

16V

10%

402

X5R

0.1UF

2

1

C4115

402

CERM

27PF

5% 50V

ETHERNET CONTROLLER

41 97

051-7039

H

SYNC_MASTER=M50_DOUG SYNC_DATE=08/04/2006

PCIE_ENET_R2D_N

PCIE_ENET_R2D_P

ENET_XTALI ENET_XTALO

ENET_VPD_CLK ENET_VPD_DATA

ENET_PU_VDDO_TTL0

=PP1V2_S3_ENET

ENET_MDI0

ENET_MDI_N<1>

ENET_MDI1

=PP2V5_S3_ENET

=PP3V3_S3_ENET

ENET_PU_VDDO_TTL1

VMAIN_AVLBL

=PP3V3_S3_ENET

ENET_LOM_DIS_L

ENET_LED_LINK10_100_L ENET_LED_LINK1000_L

PCIE_ENET_R2D_C_N

ENET_ANALOG_RSET

ENET_LED_LINK_L

=PP2V5_S3_ENET

ENET_CTRL25

ENET_CTRL12

ENET_CLK100M_PCIE_P

ENET_MDI2 ENET_MDI3

ENET_VPD_CLK

ENET_VPD_DATA

=PP3V3_S3_ENET

ENET_MDI_P<0> ENET_MDI_N<0>

ENET_MDI_P<1>

ENET_MDI_P<2>

ENET_MDI_P<3> ENET_MDI_N<3>

=PP1V2_S3_ENET

=PP3V3_S3_ENET

PCIE_ENET_D2R_C_N

PCIE_ENET_D2R_C_P

PCIE_ENET_D2R_N

PCIE_ENET_D2R_P

ENET_CLK100M_PCIE_N

PCIE_WAKE_L

ENET_GATED_RST_L

PCIE_ENET_R2D_C_P

ENET_MDI_N<2>

PP3V3_S0

ENET_LED_ACT_L

84 83 76 45 27 26

43

10

42

6

42

41

42

41

42

41

53

5

41

43

41

3

43

54

43

41

42

34

41

3

43

41

3

54

34

23

42

54

43

3

43

www.Vinaﬁx.vn

Preliminary

IN

OUT

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

2

1

C4202

22UF

805

X5R

6.3V

20%

2

1

C4203

4.7UF

603

6.3V CERM

20%

2

1

C4204

0.1UF

16V

10%

402

X5R

2

1

R4202

402

5% 1/16W MF-LF

4.7K

2

1

C4205

4.7UF

603

6.3V

20%

CERM

2

1

C4206

402

0.1UF

X5R

10% 16V

2

1

C4210

0.1UF

X5R 402

10% 16V

2

1

C4209

4.7UF

CERM

20%

6.3V

603

21

L4201

SM

FERR-330-OHM

21

L4200

SM

FERR-330-OHM

I38

2

1

C4207

10UF

6.3V

20%

CERM 805-1

3

42

1

Q4201

PBSS5540Z

CRITICAL

SOT223

2

1

C4200

22UF

805

X5R

6.3V

20%

2

1

C4201

0.1UF

402

10% 16V X5R

SYNC_MASTER=M51_DOUG

ETHERNET MISC

H

051-7039

9742

SYNC_DATE=08/04/2006

PP1V2_S3_ENET

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=1.2V

=PP1V2_S3_ENET

=PP2V5_S3_ENET

ENET_CTRL25

ENET_GATED_RST_L

MAKE_BASE=TRUE

ENET_RST_L

=PP3V3_S3_ENET

=PP1V2_S3_LAN

MAKE_BASE=TRUE

TP_ENET_CTRL12

ENET_CTRL12

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

PP2V5_S3_ENET

VOLTAGE=2.5V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP3V3_S3_ENET_Q

43

41

6

41

3

43

www.Vinaﬁx.vn

Preliminary

IO

1CT:1CT

MDI_3-

ENET_CTAP

MDI_0+

75 OHM

MDI_0-

MDI_1-

MDI_2+

MDI_2-

75 OHM

RJ45

CABLE SIDE

SECONDARY

J4

J8

J7

J6

J5

J1

J2

J3

1CT:1CT

RJ45

CHIP SIDE

ENET_CTAP

MDI_1+

MDI_3+

PRIMARY

SHIELD 1000PF, 2000V

1CT:1CT

75 OHM

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MARVELL DOES NOT REQUIRE/RECOMMEND ANY SERIES TERMINATIONS HERE

RESISTOR PADS USED AS PLACEHOLDER FOR INDUCTOR IF NEEDED

(514-0331)

2

1

C4300

0.1UF

10V

20%

CERM 402

2

1

C4301

0.001UF

402

50V CERM

10%

2

1

C4304

10%

0.001UF

50V

CERM

402

2

1

C4305

10%

0.001UF

50V CERM 402

21

R4300

1/8W

5%

MF-LF

0

805

9

8

7

6

5

4

3

2

10

1

13

12

11

J4300

RJ45-M51

F-ANG-TH

CRITICAL

2

1

R4301

DEVELOPMENT

330

603

MF-LF

1/10W

5%

2

1

LED4300

DEVELOPMENT

2.0X1.25MM-SM

GREEN-3.6MCD

2

1

R4302

603

5% 1/10W MF-LF

330

DEVELOPMENT

2

1

LED4301

2.0X1.25MM-SM

GREEN-3.6MCD

DEVELOPMENT

2

1

R4303

603

5% 1/10W MF-LF

330

DEVELOPMENT

2

1

LED4302

2.0X1.25MM-SM

GREEN-3.6MCD

DEVELOPMENT

2

1

R4304

603

5% 1/10W MF-LF

330

DEVELOPMENT

2

1

LED4303

2.0X1.25MM-SM

GREEN-3.6MCD

DEVELOPMENT

SYNC_DATE=08/04/2006SYNC_MASTER=M51_DOUG

ETHERNET CONNECTOR

43

H

051-7039

97

MAKE_BASE=TRUE

ENET_LED_LINK_L

MAKE_BASE=TRUE

ENET_LED_LINK1000_L

MAKE_BASE=TRUE

ENET_LED_LINK10_100_L

LED4303_1

=PP3V3_S3_ENET

LED4301_1 LED4302_1LED4300_1

GND_CHASSIS_RJ45

PP2V5_S3_ENET

MAKE_BASE=TRUE

ENET_LED_ACT_L

ENET_MDI_P<0>

ENET_MDI_N<0> ENET_MDI_P<1>

ENET_MDI_N<1> ENET_MDI_P<2>

ENET_MDI_N<2>

ENET_MDI_N<3>

ENET_MDI_P<3>

MIN_LINE_WIDTH=0.50mm MIN_NECK_WIDTH=0.38mm

PP2V5_ENET_CTAP

VOLTAGE=2.5V

42 41

41

3

6

42

41

www.Vinaﬁx.vn

Preliminary

PCI_RST*

G_RST*

REG_EN*

PCI_AD38

PCI_DEVSEL*

PCI_FRAME*

PCI_GNT*

PCI_INTA*

PCI_IRDY*

PCI_PERR*

PCI_PME*

PCI_REQ*

PCI_SERR*

PCI_STOP*

PCI_TRDY*

PCI_ACK64*

PCI_REQ64*

PCI_PAR

PCI_IDSEL

PCI_CLK

PCI_PAR64

SDA

SCL

MFUNC

PHY_PCLK

PHY_PINT

PHY_LREQ

PHY_LPS

PHY_LCLK

PHY_LINKON

PHY_CTL1

PHY_CTL0

PHY_D7

PHY_D6

PHY_D5

PHY_D4

PHY_D3

PHY_D2

PHY_D1

PHY_D0

REG18

VCC

PCI_C_BE0

PCI_C_BE1

PCI_C_BE2

PCI_C_BE3

PCI_C_BE4

PCI_C_BE5

PCI_C_BE6

PCI_C_BE7

PCI_AD2

PCI_AD0

PCI_AD1

PCI_AD3

PCI_AD4

PCI_AD5

PCI_AD6

PCI_AD7

PCI_AD8

PCI_AD9

PCI_AD10

PCI_AD11

PCI_AD12

PCI_AD13

PCI_AD14

PCI_AD15

PCI_AD16

PCI_AD17

PCI_AD18

PCI_AD19

PCI_AD20

PCI_AD21

PCI_AD22

PCI_AD23

PCI_AD24

PCI_AD25

PCI_AD26

PCI_AD27

PCI_AD28

PCI_AD29

PCI_AD30

PCI_AD31

PCI_AD32

PCI_AD33

PCI_AD34

PCI_AD35

PCI_AD36

PCI_AD37

PCI_AD39

PCI_AD40

PCI_AD41

PCI_AD42

PCI_AD43

PCI_AD44

PCI_AD45

PCI_AD46

PCI_AD47

PCI_AD48

PCI_AD49

PCI_AD50

PCI_AD51

PCI_AD52

PCI_AD53

PCI_AD54

PCI_AD55

PCI_AD56

PCI_AD57

PCI_AD58

PCI_AD59

PCI_AD60

PCI_AD61

PCI_AD62

PCI_AD63

VCCP

NC

GND

RSVD

TESTW

LKON/DS2

(SYM_VER1)

CORE

VDD

CORE

DVDDAVDD

PC0

PC2

PAD

THRML

AGND

SM

TESTM

SE

D5 D6

RESETZ

D7

DGND

PLL

3.3

DVDD

PLLGND

PLL

3.3

VDD

D3 D4

D1 D2

BMODE

PD

PC1

CPS

D0

LREQ

LPS

LCLK

3.3

TPA1+ TPA1-

PCLK

TPA0-

TPA2+ TPA2-

CTL0 CTL1

CNA

PINT

TPBIAS0 TPBIAS1

XI

TPBIAS2

R1

R0

TPB2-

TPB2+

TPB1-

TPB1+

TPB0-

TPB0+

DS0 DS1

TPA0+

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CHARACTERIZE - CMIN=(.0077 * VDD RAMP IN MS) + .085 + OSC STARTUP TIME

THESE POWER PLANES SHOULD BE MOSTLY ISOLATED

PLACE CLOSE TO REG18 PINS

??? CHECK YELLOW EDS

BYPASS CAPS FOR INTERNAL 1.8V

21

R4401

22

MF-LF

1/16W

5%

402

U10

K1

H17

A12

P15

P11

N1

K14

H4F3E17

D7R5C5

A9

D1

D2

D3

K15

H3

A3

A5

B4

B3

C4

A6

D10

C10

B10

C9

B9

A8

B8

D8

A7

B7

T6

P7

U7

E2

R16

G1

H1

T7

M17

U8

U4

E3

M1

G2

T4

U6

G3

R17

N16

N17

M15

L4

R4

P8

R11

U11

T11

U13

L15

L16

L17

K17

T13

K16

J17

J14

H16

H15

G17

G16

G15

G14

F17

R13

F16

F15

D17

D16

D15

C17

C16

C14

B14

A14

U14

B13

A13

C12

B12

D11

C11

B11

A11

H2

J1

T14

J4

J2

K3

L1

L2

L3

M2

M3

P1

P2

R14

P3

R1

T3

U3

U9

R9

T9

T10

P10

R10

U15

T15

U16

C7

C2

B17

B15

B6

B5

U12

U5

U2

B1

T17

T12

T8

T5

T1

R8

R7

R2

P17

P16

A16

N2

M16

K2

J16

J15

J3

F2

F1

E16

C8

A15

A2

C1

L14

K4

H14

G4

E15

D9

C13

C6

R12

R6

P9

N15

N3

A10

A4

E1

U4400

PBGA

TSB82AA2

CRITICAL

2

1

C4400

X5R

10%

402

16V

0.1UF

2

1

C4401

402

0.1UF

10%

X5R

16V

21

R4411

402

220

5% 1/16W MF-LF

21

R4412

402

220

5% 1/16W MF-LF

2

1

R4404

402

MF-LF

1/16W

5%

2.7K

2

1

R4403

402

2.7K

5% 1/16W MF-LF

2

1

R4402

402

MF-LF

1/16W

5%

2.7K

2

1

R4413

5%

4.7K

1/16W MF-LF 402

2

1

C4450

402

1UF

10% 10V X5R

21

R4498

470

402

5% 1/16W MF-LF

21

R4499

6.34K

603

1/10W MF-LF

1%

2

1

C4460

CERM1 603

2.2UF

6.3V

10%

21

R4450

402

MF-LF

1

5%

1/16W

21

R4453

MF-LF

4.7

5%

402

1/16W

21

R4452

1

5%

1/16W

402

MF-LF

21

R4460

10K

21

R4462

1K

21

R4463

390K

1/16W MF-LF5%402

21

R4464

1K

21

R4465

1K

21

R4466

1K

21

R4467

1K

21

XW4451

SM

OMIT

27

60

54

47

55

56

48

49

41

42

58

59

52

53

45

46

81

73

78

36

35

26

75

22

23

31

30

29

28

25

1

77

5

68

67

66

3

80

2

7

706918

6

716537

8

32

33

7672643814

4

20

19

17

16

15

13

12

11

10

9

34

79

74

6357514439

24

6261504340

21

U4450

CRITICAL

PQFP

TSB81BA3D

051-7039

H

44 97

SYNC_DATE=08/04/2006SYNC_MASTER=M51_DOUG

FW: 1394B-LINK/PHY

FW_PHY_D3

FW_PHY_CPS

=PP3V3_S3_FW

FW_LINK_D7

PCI_ACK64_L

PCI_AD<19>

PCI_AD<7>

PCI_AD<29>

PCI_RST_FW_L

FW_LINK_RESET_L

PCI_DEVSEL_L

PCI_FRAME_L

PCI_GNT1_L

INT_PIRQD_L

PCI_IRDY_L

PCI_PERR_L

PCI_PME_FW_L

PCI_REQ1_L

PCI_SERR_L PCI_STOP_L

PCI_TRDY_L

PCI_REQ64_L

PCI_PAR

PCI_IDSEL

PCI_CLK_FW

PCI_PAR64

FW_ROM_SDA

FW_ROM_SCL

FW_LINK_MFUNC

FW_LINK_PCLK FW_LINK_PINT

FW_LINK_LREQ

FW_LINK_LPS

FW_LINK_LCLK

FW_LINK_LINKON

FW_LINK_CTL1

FW_LINK_CTL0

FW_LINK_D6

FW_LINK_D2

FW_LINK_D1

FW_LINK_D0

PCI_C_BE_L<0> PCI_C_BE_L<1>

PCI_C_BE_L<2>

PCI_C_BE_L<3>

PCI_AD<2>

PCI_AD<0>

PCI_AD<1>

PCI_AD<3>

PCI_AD<4>

PCI_AD<5> PCI_AD<6>

PCI_AD<8> PCI_AD<9>

PCI_AD<10> PCI_AD<11>

PCI_AD<12>

PCI_AD<13> PCI_AD<14>

PCI_AD<15>

PCI_AD<16> PCI_AD<17>

PCI_AD<18>

PCI_AD<20>

PCI_AD<21> PCI_AD<22>

PCI_AD<23>

PCI_AD<24> PCI_AD<25>

PCI_AD<26>

PCI_AD<28>

PCI_AD<30> PCI_AD<31>

PP3V3_FW_DVDD

FW_PORTS_VP_F

=PP3V3_S3_FW

PCI_IDSEL

FW_LINK_D3

LINK1V8_DECAP1

=PP3V3_S5_FW

=PP3V3_S3_FW

FW_LINK_D4

FW_LINK_D5

PCI_AD<27>

LINK1V8_DECAP2

FW_PHY_VREG_PD

PP1V95_FW_PLLVDD

MIN_NECK_WIDTH=0.2MM VOLTAGE=1.95V

MIN_LINE_WIDTH=0.6MM

=PP1V95_S5_FWPHY

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP3V3_FW_PLLVDD

FW_PHY_SM

FW_PHY_TESTM

FW_PHY_SE

FW_PHY_RESET_L

FW_PHY_D6

FW_PHY_D5

FW_PHY_D2

FW_PHY_D1

FW_PHY_D4

FW_PHY_BMODE

FW_PHY_D0

FW_PHY_PC1

FW_PHY_PC2

FW_PHY_PC0

FW_PHY_LREQ

FW_PHY_LPS

FW_PHY_LCLK

MIN_LINE_WIDTH=0.6MM

PP3V3_FW_AVDD

MIN_NECK_WIDTH=0.2MM VOLTAGE=3.3V

FW_B_TPA_N

FW_B_TPA_P

FW_PHY_PCLK

FW_A_TPA_P FW_A_TPA_N

FW_C_TPA_P

FW_C_TPA_N

FW_PHY_CTL1

FW_PHY_CTL0

FW_PHY_PINT

FW_A_TPBIAS

FW_B_TPBIAS

FW_C_TPBIAS

FW_XTAL_XI

FW_R1

FW_R0

FW_C_TPB_N

FW_C_TPB_P

FW_B_TPB_N

FW_B_TPB_P

FW_A_TPB_N

FW_A_TPB_P

FW_PHY_DS0

FW_PHY_DS1

PP3V3_FW_DVDD

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM VOLTAGE=3.3V

FW_PHY_LINKON

FW_PHY_D7

PP3V3_FW_DVDD

45

46

45

44

26

34

45

44

45

44

45

3

45

22

45

22

44

5

45

22

44

46

3

44

45

3

45

22

45

3

45

46

45

46

45

46

45

46

45

44

45

44

www.Vinaﬁx.vn

Preliminary

OUT

TRI-ST/NC

VCC

GND

SHDN*

BYP

ADJ*

SENSE/

NC

GND

NC

IN

OUT

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: PLACE 1 CAP CLOSE TO EACH POWER PIN ON U4400

NOTE: R SHOULD BE CHOSEN TO PREVENT OVERSHOOT

NOTE: 1% FOR BOM CONSOLIDATION(APPLIED TO M50)

NOTE: 1K IS PER TI SPEC TO BALANCE OUT THE 470 PULLUP ON DS2

LINK DECOUPLING

1394 LINK POWER ON RESET AND PCI RESET

NOTE: PLACE 1 CAP CLOSE TO EACH POWER PIN ON U4450

PHY DECOUPLING

1394 PHY DATA/STROBE AND POWER CLASS OPTIONS

197S0179

VOUT = 1.946V

353S1403

1394 PHY CRYSTAL OSCILLATOR

FIXME!!! CHARACTERIZE TO SEE IF THIS BRINGS US CLOSE ENOUGH TO 1.8V - 4.7 CHOSEN FOR BOM CONSOLIDATION

Iadj = 30nA @ 25 deg C

1394 PHY 1.95V REGULATOR

VOUT = 1.22V * (1 + R4500 / R4501) + (Iadj * R4500)

SIMULATIONS SHOW THAT THERMINATIONS WERE NOT NEEDED FOR M51

NORMALLY TERMINATIONS WOULD GO HERE...

CONSTRAIN NETS TO 200-250PS IF NO TERM-Rs...

2

1

R4501

1/16W

27.4K

402

1%

MF-LF

2

1

C4501

10uF

X5R 603

20%

6.3V

2

1

C4510

1UF

6.3V CERM

10%

402

2

1

C4530

6.3V CERM

1UF

10%

402

2

1

C4502

0.22UF

6.3V

20%

X5R 402

2

1

C4540

CERM

6.3V

10%

1UF

402

2

1

C4520

CERM

6.3V

10%

1UF

402

2

1

C4511

402

CERM

6.3V

1UF

10%

2

1

C4512

1UF

6.3V CERM

10%

402

2

1

C4513

6.3V CERM

1UF

10%

402

2

1

C4521

6.3V CERM

1UF

10%

402

2

1

C4522

6.3V CERM

1UF

10%

402

2

1

C4523

6.3V

10%

1UF

CERM 402

2

1

C4531

6.3V CERM

1UF

10%

402

2

1

C4541

6.3V CERM

1UF

10%

402

2

1

C4542

6.3V CERM

1UF

10%

402

2

1

C4543

6.3V

10%

1UF

402

CERM

2

1

C4544

6.3V CERM

10%

402

1UF

2

1

C4545

402

1UF

CERM

6.3V

10%

2

1

R4550

5%

1K

NOSTUFF

402

MF-LF

1/16W

2

1

R4560

1K

5%

402

MF-LF

1/16W

2

1

R4570

402

MF-LF

1/16W

5%

1K

2

1

R4561

402

MF-LF

1/16W

1K

5%

NOSTUFF

2

1

R4551

1/16W

5%

402

1K

MF-LF

2

1

R4571

NOSTUFF

5%

1K

1/16W MF-LF 402

2

1

R4580

NOSTUFF

402

MF-LF

1/16W

5%

1K

2

1

R4581

402

1/16W

5%

1K

MF-LF

2

1

R4572

402

MF-LF

1/16W

1K

5%

NOSTUFF

2

1

R4582

1K

402

MF-LF

1/16W

5%

4

13

2

G4500

CRITICAL

SM

98P3040MHZ

2

1

C4561

CERM

1UF

10%

402

6.3V

2

1

C4560

10%

CERM 402

1UF

6.3V

2

1

C4559

CERM

6.3V

1UF

402

10%

2

1

C4558

6.3V

1UF

10%

402

CERM

2

1

C4557

6.3V CERM

1UF

402

10%

2

1

C4556

6.3V CERM

10%

402

1UF

2

1

C4555

CERM

6.3V

1UF

10%

402

2

1

C4554

10%

402

1UF

CERM

6.3V

2

1

C4553

6.3V CERM

1UF

402

10%

2

1

C4552

10%

402

1UF

CERM

6.3V

2

1

C4551

6.3V CERM 402

1UF

10%

2

1

C4550

402

10%

1UF

CERM

6.3V

21

R4595

402

1%

MF-LF

1/16W

150

21

R4502

402

4.7

1/16W

5%

MF-LF

5

2

1

7

6

8

4

3

U4501

CRITICAL

MSOP

LT1762EMS8

2

1

C4503

20%

0.01uF

CERM

16V

402

2

1

R4503

402

100K

MF-LF

1/16W

5%

NOSTUFF

21

R4520

1K

1

2

6

Q4500

2N7002DW-X-F

SOT-363

4

5

3

Q4510

2N7002DW-X-F

SOT-363

1

2

6

Q4510

2N7002DW-X-F

SOT-363

2

1

R4591

1/16W

402

5%

10K

MF-LF

2

1

C4591

402

NOSTUFF

0.001UF

50V

10%

CERM

2

1

R4592

5%

402

1/16W MF-LF

100K

21

R4590

10K

1/16W MF-LF

5%

402

2

1

C4590

0.001UF

50V

402

10%

CERM

2

1

C4500

CERM1 603

6.3V

10%

2.2UF

2

1

R4500

MF-LF

16.2K

402

1/16W

1%

FW: 1394B MISC

SYNC_DATE=08/04/2006SYNC_MASTER=M51_DOUG

9745

H

051-7039

V_BYP

SMC_RSTGATE_L

FW_PHY_PC1

FW_PHY_D0

FW_PHY_PINT

MAKE_BASE=TRUE

FW_LINK_PINT

FW_LINK_LINKON

FW_PHY_LINKON

PP1V8X_FW_XTAL

VOLTAGE=1.95V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

FW_LINK_LREQ

MAKE_BASE=TRUE

FW_LINK_D5

FW_OSC_EN

V_ADJ

MAKE_BASE=TRUE

FW_LINK_PCLK

FW_PHY_PCLK

FW_PHY_LREQ

FW_PHY_LPS

FW_PHY_D1

FW_PHY_D7

=PP3V3_S5_FW

PP3V3_FW_DVDD

FW_XTAL_XI

MAKE_BASE=TRUE

FW_LINK_D3

FW_PHY_D4

MAKE_BASE=TRUE

FW_LINK_CTL1

FW_PHY_D3

FW_PHY_D2

MAKE_BASE=TRUE

FW_LINK_D2

MAKE_BASE=TRUE

FW_LINK_D4

FW_PHY_D5

MAKE_BASE=TRUE

FW_LINK_D7

FW_PHY_D6

MAKE_BASE=TRUE

FW_LINK_D6

FW_PHY_CTL0

MAKE_BASE=TRUE

FW_LINK_CTL0

FW_PHY_CTL1

FW_PHY_LCLK

FW_LINK_LCLK

MAKE_BASE=TRUE

FW_LINK_D0

MAKE_BASE=TRUE

FW_LINK_D1

PP1V95_FW_PLLVDD

FW_PHY_PC2

FW_PHY_DS0

FW_PHY_PC0

FW_PHY_DS1

PP1v95_S5

=PP3V3_S3_FW

PLT_RST_FW

SMC_RSTGATE_RC_L

FW_RST_L

PP3V3_FW_AVDD

=PP1V95_S5_FWPHY

PP1V95_FW_PLLVDD

PCI_RST_L

PCI_RST_FW_L

=PP3V3_S3_FW

PP3V3_S0

FW_PLT_RST_L

MAKE_BASE=TRUE

FW_LINK_LPS

FW_LINK_RESET_L

PP3V3_FW_DVDD

84 83 76 41 27 26 10

46

45

6

44

45

44

45

44

5

45

58

44

44 44

44

44 44

44

3

44

44 44

44

44 44

44

44 44

44

3

6

44

3

44

22 44

3

44

www.Vinaﬁx.vn

Preliminary

NC

VP

TPB+

TPB<R>

TPB-

VG

TPA+

TPA<R>

TPA-

TPI

VGND

VP

TPI#

TPO#

TPO

SYM_VER-1

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

NOTE: TI PHY REQUIRES 1uF EVEN THOUGH SPEC CALLS OUT .33uF

3rd TPA/TPB pair unused

NOTE: TI RECOMMENDS THIS FOR UNCONNECTED PORTS

ESD Rail

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP

SHOULD BE DONE AS A POWER STRIP(SUBPLANE)

[ LATE VG NOTES ]

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

PORT 0

1394B

PORT 1 1394A

"Snapback" & "Late VG" Protection

514-0342

514-0325

SHOULD BE DONE AS A POWER STRIP(SUBPLANE)

24 VOLTS

15 WATTS MAX

Termination

Place close to FireWire PHY

3

5

4

DP4620

SOT-363

BAV99DW-X-F

6

2

1

DP4620

SOT-363

BAV99DW-X-F

3

5

4

DP4610

SOT-363

BAV99DW-X-F

3

5

4

DP4611

BAV99DW-X-F

SOT-363

6

2

1

DP4610

BAV99DW-X-F

SOT-363

6

2

1

DP4611

BAV99DW-X-F

SOT-363

2

1

C4660

6.3V

10%

1UF

CERM 402

2

1

R4661

MF-LF 402

1/16W

56.2

1%

2

1

R4660

MF-LF

56.2

1%

1/16W

402

2

1

C4650

6.3V CERM

1UF

10%

402

2

1

R4651

1%

56.2

1/16W

402

MF-LF

2

1

R4650

1/16W

402

56.2

MF-LF

1%

2

1

R4663

402

1/16W

1%

56.2

MF-LF

2

1

R4662

402

MF-LF

1/16W

1%

56.2

2

1

R4664

4.99K

1% 1/16W

402

MF-LF

2

1

C4664

CERM

402

25V

5%

270PF

2

1

R4653

402

MF-LF

1/16W

1%

56.2

2

1

R4652

402

MF-LF

1/16W

56.2

1%

2

1

R4654

4.99K

MF-LF

1/16W

1%

402

2

1

C4654

270PF

25V

5%

CERM

402

21

L4690

SM-1

400-OHM-EMI

31

D4690

CRITICAL

SOT23

MMBZ5227B

3

5

4

DP4621

BAV99DW-X-F

SOT-363

6

2

1

DP4621

SOT-363

BAV99DW-X-F

21

R4690

1/16W

1%

MF-LF

402

332

2

1

C4600

0.01UF

10%

X7R 603-1

50V

2

1

C4623

X7R

50V

10%

402

0.01UF

2

1

C4622

X7R 402

50V

0.01UF

10%

2

1

C4612

X7R 402

50V

0.01UF

10%

2

1

C4613

10%

X7R

0.01UF

50V

402

2

1

C4621

X7R

10% 50V

402

0.01UF

2

1

C4620

0.01UF

10%

X7R

50V

402

2

1

C4610

X7R

0.01UF

50V

402

10%

2

1

C4611

0.01UF

50V

402

10%

X7R

21

F4600

CRITICAL

SM

0.75AMP-30V

21

L4600

FERR-250-OHM

SM

21

L4601

FERR-250-OHM

SM

2

1

C4601

0.01UF

50V X7R 603-1

10%

2

1

C4631

402

50V

10%

CERM

0.001UF

NOSTUFF

2

1

C4630

402

CERM

0.001UF

10% 50V

NOSTUFF

2

1

C4632

0.001UF

CERM

10% 50V

402

NOSTUFF

2

1

C4635

0.1UF

10% 50V X7R 603-1

2

1

R4635

1%

MF-LF

402

1/16W

1M

2

1

C4642

CERM

10%

0.001UF

50V

402

NOSTUFF

21

DE4600

SMC

MURS320XXG

21

R4600

2.7

2512

1W

FF-LF

10%

CRITICAL

21

R4601

2.7

2512

1W

10%

CRITICAL

FF-LF

9

8

7

6

5

4

3

2

15

14

13

12

11

10

1

J4600

CRITICAL

F-ST-TH

1394B-M51

1

2

5

6

3

4

987

10

J4601

F-ST-TH

1394A-M51

CRITICAL

3

21

4

FL4600

120-OHM

CRITICAL

DLW21H-SM1

3

21

4

FL4610

CRITICAL

120-OHM

DLW21H-SM1

2

1

L4653

0402

18NH-250MA

2

1

L4652

0402

18NH-250MA

2

1

L4650

0402

18NH-250MA

2

1

L4651

0402

18NH-250MA

FIREWIRE CONNECTORS

051-7039

H

9746

155S0289155S0232

ORIGINAL TOKO CHOKE

FL4610

FL4600

ORIGINAL TOKO CHOKE

155S0232 155S0289

FW_B_TPBIAS

VOLTAGE=1.86V

=PPV_S5_FW

FW_PORTS_VP_F

VOLTAGE=33V

MIN_LINE_WIDTH=1.7MM MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=1.7MM

VOLTAGE=33V

MIN_NECK_WIDTH=0.25MM

FW_PORT1_VP

PP3V3_FW_ESD

FW_PORT0_TPA_N

MAKE_BASE=TRUE

FW_PORT0_TPA_N

FW_PORT0_TPB_N

FW_PORT1_TPA_N

PP3V3_FW_ESD

FW_PORT1_TPA_P

FW_PORT0_TPA_P

FW_PORT0_TPB_P

FW_PORT1_TPA_FL_N

GND_CHASSIS_FIREWIRE

VOLTAGE=33V

MIN_LINE_WIDTH=1.7MM

FW_PORT0_VP

MIN_NECK_WIDTH=0.25MM

VOLTAGE=33V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=1.7MM

FW_PORTS_VP

FW_PORT1_TPB_FL_N

FW_PORT1_TPB_FL_P

FW_PORT0_TPA_R

PP3V3_FW_ESD

MIN_LINE_WIDTH=1.7MM MIN_NECK_WIDTH=0.25MM VOLTAGE=33V

FW_PORTS_VP_R

PP3V3_FW_ESD_F

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

VOLTAGE=3.3V

PP3V3_FW_ESD

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

VOLTAGE=3.3V

=PP3V3_S5_FW

GND_CHASSIS_FIREWIRE

FW_PORT1_TPA_FL_P

GND_CHASSIS_FIREWIRE

NO_TEST=TRUE

NC_FW_C_TPA_P

MAKE_BASE=TRUE

FW_C_TPA_P

MAKE_BASE=TRUE

NC_FW_C_TPBIAS

FW_C_TPBIAS

NC_FW_C_TPA_N

MAKE_BASE=TRUE

FW_C_TPA_N

FW_C_TPB_P

FW_C_TPB_N

FW_PORT1_TPB_N

FW_PORT1_TPB_P

FW_B_TPB_P FW_B_TPB_N

FW_TPA_C1

VOLTAGE=0V

FW_TPA_C0

VOLTAGE=0V

MAKE_BASE=TRUE

FW_PORT0_TPA_P

MAKE_BASE=TRUE

FW_PORT0_TPB_P FW_PORT0_TPB_N

MAKE_BASE=TRUE

FW_PORT1_TPA_N

MAKE_BASE=TRUE

FW_PORT1_TPA_P

FW_PORT1_TPB_N

MAKE_BASE=TRUE

FW_PORT1_TPB_P

FW_B_TPA_P FW_B_TPA_N

VOLTAGE=1.86V

FW_A_TPBIAS

FW_A_TPB_N

VOLTAGE=0V

NO_TEST=TRUE

FW_A_TPB_N_RL

VOLTAGE=1.86V

FW_A_TPA_P_RL

NO_TEST=TRUE

VOLTAGE=0V

NO_TEST=TRUE

FW_A_TPB_P_RL

VOLTAGE=1.86V

NO_TEST=TRUE

FW_A_TPA_N_RL

FW_A_TPB_P

FW_A_TPA_N

FW_A_TPA_P

45

46

44

46

44

3

44

46

6

46

3

6

44

46

44

46

44

www.Vinaﬁx.vn

Preliminary

SYM_VER-1

SYM_VER-2

EN3*

EN1* EN2*

OC1* OC2* OC3*

IN1

IN2

OUT1

OUT2

OUT3

NC

GNDA GNDB

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NOTE: STANDOFFS FOR J4700

SB HAS INTERNAL 15K PULL-DOWNS

514-0330

PORT 1

GND

D-

VDD

D-

D+

GND

VDD D-

TO M13D SLOT

BLUETOOTH

D+

PORT 2

SB HAS INTERNAL 15K PULL-DOWNS

VDD

SB HAS INTERNAL 15K PULL-DOWNS

CAMERA & MIC

External USB Ports

D+

740S0032

PLACE C4743, C4797 & L4740

ORDER LISTED, AND NOT ON BOTH SIDES OF THE PIN.

NEAR J4760 PIN 8 IN THE

LAYOUT NOTE:

PORT 0

I2C ADDR -> 72(1001000)

SB HAS INTERNAL 15K PULL-DOWNS

514-0330

SB HAS INTERNAL 15K PULL-DOWNS

GND

IR RECEIVER & ALS

PLACE C4742 CLOSED TO J4760.

SB HAS INTERNAL 15K PULL-DOWNS

3

21

4

L4712

CRITICAL

120-OHM

DLW21H-SM1

2

1

C4713

16V

0.01uF

20%

402

CERM

2

1

C4712

20%

CERM

402

0.01uF

16V

2

1

C4710

6.3V

20%

150UF

SM

ELEC

21

L4710

FERR-250-OHM

SM

2

1

C4723

20%

0.01uF

402

CERM

16V

2

1

C4722

20%

402

CERM

16V

0.01uF

21

L4720

SM

FERR-250-OHM

3

21

4

L4722

DLW21H-SM1

CRITICAL

120-OHM

I4701

I4702

4

3

2

1

7

6

5

J4710

CRITICAL

F-ANG-TH

USB-M51

4

3

2

1

7

6

5

J4720

F-ANG-TH

USB-M51

CRITICAL

4

3

2

1

7

6

5

J4730

F-ANG-TH

USB-M51

CRITICAL

9

8

7

6

5

4

3

2

1

J4750

M-ST-SM

53398-0776

CRITICAL

3

21

4

L4732

DLW21H-SM1

120-OHM

CRITICAL

2

1

C4733

20%

402

CERM

16V

0.01uF

2

1

C4732

CERM

0.01uF

20% 16V

402

21

L4730

SM

FERR-250-OHM

21

R4712

NOSTUFF

402

0

21

R4713

NOSTUFF

0

402

21

R4722

NOSTUFF

0

402

21

R4723

402

NOSTUFF

0

21

R4732

NOSTUFF

0

402

21

R4733

NOSTUFF

402

0

3

21

4

L4752

DLW21H-SM1

120-OHM

CRITICAL

21

R4755

0

NOSTUFF

402

21

R4754

402

0

NOSTUFF

2

1

C4743

CERM

16V

402

20%

0.01uF

2

1

C4742

CERM

402

0.01uF

16V

20%

21

L4740

SM

FERR-250-OHM

21

R4746

805

MF-LF

0

1/8W

5%

21

F4701

MINISMD-LF

CRITICAL

0.75AMP-13.2V

2

1

C4797

10UF

CERM

20%

6.3V

805-1

9

8

7

6

5

4

3

2

10

1

J4700

CRITICAL

F-ST-SM

QT800101-1210S-8F

2

1

C4798

0.1UF

402

CERM

20% 10V

2

1

C4799

CERM

20%

6.3V

10UF

805-1

1

SDF4700

STDOFF-4OD4.5H-1.35-TH

CRITICAL

1

SDF4701

STDOFF-4OD4.5H-1.35-TH

CRITICAL

2

1

3

D4700

RCLAMP0502B

SC-75

CRITICAL

2

1

3

D4701

RCLAMP0502B

SC-75

2

1

3

D4702

SC-75

RCLAMP0502B

11

14

15

12

13

16

10

9

8

6

2

51

7

4

3

U4700

SOI

CRITICAL

TPS2043B

8

7

6

5

4

3

2

1

10

9

J4760

CRITICAL

53398-0876

M-ST-SM

2

1

C4720

6.3V

20%

SM

ELEC

150UF

2

1

C4730

6.3V

20%

150UF

SM

ELEC

ORIGINAL TOKO CHOKE

155S0289155S0232

L4752

ORIGINAL TOKO CHOKE

155S0289155S0232

L4732

155S0232 155S0289

ORIGINAL TOKO CHOKE

L4722

ORIGINAL TOKO CHOKE

155S0289155S0232

L4712

H

051-7039

47 97

SYNC_DATE=08/04/2006

USB Device Interfaces

SYNC_MASTER=M51_DOUG

USB_PORT1_N

USB_PORT0_N

USB_A_N

USB_A_P

USB_PORT0_P

PP5V_USB2_PORT0 VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

USB_PORT1_P

USB_A_OC_L

MIN_NECK_WIDTH=0.25MM

PP5V_USB2_PORT2 VOLTAGE=5V MIN_LINE_WIDTH=0.6MM

USB_C_OC_L

USB_E_OC_L

USB_E_N

USB_C_P

PP5V_USB2_PORT1 VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

GND_CHASSIS_USB

USB_C_N

USB_H_P

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

VOLTAGE=5V

PP5V_USB2_PORT0_F

=PP5V_S3_USB

GND_CHASSIS_USB

MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.6MM

VOLTAGE=0

USB_H_N

PP5V_USB2_PORT1_F

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

GND_CHASSIS_BNDI

MIN_NECK_WIDTH=0.25MM

VOLTAGE=5V MIN_LINE_WIDTH=0.6MM

PP5V_USB2_PORT2_F

USB_D_P

GND_CHASSIS_BNDI

USB_D_N

GND_AUDIO_MIC_CONN

USB_CAMERA_N

USB_CAMERA_P

PP5V_S3_BNDI

AUD_MIC_IN_P_CONN

AUD_MIC_IN_N_CONN

GND_BNDI

PP5V_S3_BNDI

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=5V

GND_BNDI

VOLTAGE=0V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

=PP5V_S3_BNDI

MAKE_BASE=TRUE

USB_BT_P

MAKE_BASE=TRUE

USB_BT_N

=PP3V3_S3_BT

USB_E_P

USB_G_N

USB_G_P

PP5V_BNDI_LE340

=PP5V_S3_USB

USB_PORT2_P

USB_PORT2_N

GND_CHASSIS_USB

I2C_ALS_SCL

I2C_ALS_SDA =PP3V3_S3_I2C

USB_IR_P

MAKE_BASE=TRUE

USB_IR_N

MAKE_BASE=TRUE

47

22

6

22

3

6

22

6

22

6

22

73

47

73

47

3

22

3

6

27

3

www.Vinaﬁx.vn

Preliminary

KEY

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MINIMIZED IF THE RESISTORS ARE NOT STUFFED

PLACE R5302-03 SUCH THAT STUB LENGTH IS

LAYOUT NOTE:

PLACE CAPS < 250 MILS FROM U2100

SB HAS INTERNAL 15K PULL-DOWNS

1

SDF5300

CRITICAL

STDOFF-5.6OD1.63H-1.35-TH

1

SDF5301

CRITICAL

STDOFF-5.6OD1.63H-1.35-TH

21

C5300

0.1UF

21

C5301

0.1UF

9

87

6

5251

50

5

49

4847

4645

4443

4241

40

4

39

3837

3635

3433

3231

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

54

53

J5300

AS0B226-S40N-7F

CRITICAL

F-RT-SM

2

1

C5304

20%

0.1UF

402

CERM

10V

2

1

C5305

10V CERM

0.1UF

20%

402

2

1

C5306

20%

402

CERM

10V

0.1UF

2

1

C5307

20%

0.1UF

10V CERM 402

2

1

C5308

CERM

10V

0.1UF

20%

402

2

1

C5310

20%

0.1UF

CERM 402

10V

2

1

C5309

10V

0.1UF

20%

402

CERM

21

R5302

0

21

R5303

0

2

1

C5311

20% 10V CERM

10UF

805-2

21

R5304

0

2

1

C5312

20% 10V CERM

10UF

805-2

2

1

C5314

20% 10V CERM

10UF

805-2

2

1

C5313

0.1UF

20% 10V CERM 402

SYNC_MASTER=M51_DOUG SYNC_DATE=08/04/2006

051-7039

AIRPORT CONN

H

53 97

PCIE_AIRPORT_R2D_C_P

PCIE_AIRPORT_R2D_C_N

PCIE_AIRPORT_R2D_P

PCIE_AIRPORT_D2R_N

PCIE_WAKE_L

PCIE_AIRPORT_D2R_P

PCIE_AIRPORT_R2D_N

AIRPORT_WAKE_L

AIRPORT_CLK100M_PCIE_P

AIRPORT_RST_L

=SMB_AIRPORT_DATA

=SMB_AIRPORT_CLK

AIRPORT_CONN_DATA

=PP1V5_S0_AIRPORT

AIRPORT_CLK100M_PCIE_N

CK410_SRC_CLKREQ6_L

USB_B_P

PP3V3_S3

USB_B_N

=PP3V3_S0_AIRPORT

AIRPORT_CONN_CLK

83 27

41

6

54

23

54

34

6

27

3

34

33

22

3

22

3

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

PCI-E X1 PORTS C, D, E, F = UNUSED

PCI-E X1 PORT "B" = MINI CARD (AIRPORT)

PCI-E X1 PORT "A" = ETHERNET (YUKON)

SYNC_DATE=08/04/2006

051-7039

54 97

H

PCI-E CONNECTIONS

SYNC_MASTER=M51_DOUG

PCIE_ENET_R2D_C_N

PCIE_ENET_D2R_P

MAKE_BASE=TRUE

PCIE_A_D2R_P

PCIE_ENET_D2R_N

MAKE_BASE=TRUE

PCIE_A_D2R_N

PCIE_ENET_R2D_C_P

MAKE_BASE=TRUE

PCIE_B_R2D_C_P

MAKE_BASE=TRUE

PCIE_B_D2R_N

PCIE_AIRPORT_D2R_P

MAKE_BASE=TRUE

PCIE_B_D2R_P

PCIE_AIRPORT_R2D_C_P

MAKE_BASE=TRUE

PCIE_A_R2D_C_P

PCIE_AIRPORT_D2R_N

MAKE_BASE=TRUE

TP_PCIE_C_R2D_C_P

MAKE_BASE=TRUE

TP_PCIE_C_R2D_C_N

PCIE_C_D2R_P

TP_PCIE_C_D2R_N

MAKE_BASE=TRUE

TP_PCIE_D_R2D_C_P

PCIE_D_R2D_C_P

PCIE_D_R2D_C_N

PCIE_D_D2R_P

PCIE_D_D2R_N

MAKE_BASE=TRUE

TP_PCIE_E_R2D_C_P

PCIE_E_R2D_C_P

MAKE_BASE=TRUE

TP_PCIE_E_R2D_C_N

PCIE_E_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_E_D2R_N

PCIE_E_D2R_N

MAKE_BASE=TRUE

TP_PCIE_F_R2D_C_P

PCIE_F_R2D_C_P

MAKE_BASE=TRUE

TP_PCIE_F_R2D_C_N

PCIE_F_R2D_C_N

TP_PCIE_F_D2R_N

MAKE_BASE=TRUE

PCIE_F_D2R_N

TP_PCIE_F_D2R_P

MAKE_BASE=TRUE

PCIE_F_D2R_P

MAKE_BASE=TRUE

TP_PCIE_D_R2D_C_N

MAKE_BASE=TRUE

TP_PCIE_D_D2R_N

MAKE_BASE=TRUE

TP_PCIE_D_D2R_P

MAKE_BASE=TRUE

TP_PCIE_E_D2R_P

PCIE_E_D2R_P

PCIE_C_R2D_C_N

PCIE_C_R2D_C_P

PCIE_C_D2R_N

TP_PCIE_C_D2R_P

MAKE_BASE=TRUE

PCIE_A_R2D_C_N

PCIE_AIRPORT_R2D_C_N

MAKE_BASE=TRUE

PCIE_B_R2D_C_N

22

41

22

41

22

41

22

5

53

5

53

22

53

22

53

22

www.Vinaﬁx.vn

Preliminary

IN

OUT

IN

OUT

IN

OUT

IN

OUT

P16

P51

P50

P42/SDA1

P97/IRQ15*/SDA0

P95/IRQ14*

P94/IRQ13*

P93/IRQ12*

P92/IRQ0*

P91/IRQ1*

P86/IRQ5*/SCK1/SCL1

P83/LPCPD*

P82/CLKRUN*

P80/PME*

P35/LRESET*

P34/LFRAME*

P10

P12

P13

P14

P15

P17

P31/LAD1

P30/LAD0

P32/LAD2

P33/LAD3

P36/LCLK

P37/SERIRQ

P44/TMO1

P77/AN7

P76/AN6

P81/GA20

P96/EXCL

P11

P47/PWX1/PWM1

P45

P46/PWX0/PWM0

P40/TMIO

P43/TMI1/EXSCK1

P27

P26

P25

P24

P23

P22

P21

P20

P41/TMO0

P52/SCL0

P60/KIN0*

P61/KIN1*

P62/KIN2*

P63/KIN3*

P64/KIN4*

P65/KIN5*

P66/IRQ6*/KIN6*

P67/IRQ7*/KIN7*

P70/AN0

P71/AN1

P72/AN2

P73/AN3

P74/AN4

P75/AN5

P84/IRQ3*/TXD1

P85/IRQ4*/RXD1

P90/IRQ2*

(1 OF 4)

PA2/KIN10*/PS2AC

PA3/KIN11*/PS2AD

PA5/KIN13*/PS2BD

PA4/KIN12*/PS2BC

PB2

PB3

PB4

PE0

PG6/EXIRQ14*/EXSDAB

PG5/EXIRQ13*/EXSCLA

PH1/EXIRQ7*

PH0/EXIRQ6*

PG7/EXIRQ15*/EXSCLB

PG4/EXIRQ12*/EXSDAA

PH3/EXEXCL

PH2/FWE

PB5

PF4/PWM4

PF2/IRQ10*/TMOY

PG2/EXIRQ10*/SDA2

PG0/EXIRQ8*/TMIX

PF7/PWM7

PC3/TIOCD0/TCLKB/WUE11*

PH5

PB7

PB6

PH4

PF5/PWM5

PF6/PWM6

PG1/EXIRQ9*/TMIY

PA6/KIN14*/PS2CC

PA7/KIN15*/PS2CD

PD0/AN8

PD1/AN9

PD2/AN10

PD3/AN11

PD4/AN12

PD5/AN13

PD6/AN14

PD7/AN15

PF0/IRQ8*/PWM2

PF1/IRQ9*/PWM3

PB0/LSMI*

PB1/LSCI

PC0/TIOCA0/WUE8*

PC1/TIOCB0/WUE9*

PC2/TIOCC0/TCLKA/WUE10*

PC4/TIOCA1/WUE12*

PC5/TIOCB1/TCLKC/WUE13*

PC6/TIOCA2/WUE14*

PC7/TIOCB2/TCLKD/WUE15*

PG3/EXIRQ11*/SCL2

PF3/IRQ11*/TMOX

PA1/KIN9*/PA2DD

PA0/KIN8*/PA2DC

PE1*/ETCK

PE2*/ETDI

PE3*/ETDO

PE4*/ETMS

(2 OF 4)

VCL

AVREF

VCC

AVCC

XTAL

EXTAL

AVCC

VCC

MD1

MD2

NMI

RES*

ETRST*

AVREF

AVSS

VSS

(3 OF 4)

NC22

NC21

NC20

NC19

NC18

NC17

NC16

NC15

NC14

NC13

NC12

NC9

NC6

NC11

NC10

NC8

NC7

NC5

NC4

NC3

NC2

NC1

NC0

(4 OF 4)

OUT

IO

OUT

IN

OUT

IN

IO

IN

IO

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

IO

IN

OUT

IO

IN

IO

IN

IO

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

THEY ARE SET BY SOFTWARE TO BE DRIVEN OUTPUTS ALWAYS SO THEY

VCL IS INTERNAL RAIL

PLACE R5899 AND C5820 NEAR SMC PIN N14,N15

SMC

LAYOUT NOTE:

UNUSED PINS HAVE THE FORMAT

CAN BE LEFT NO-CONNECTED.

SMC_XXX WHERE XXX IS THE PORT NUMBER.

PLACE C5807 NEAR PIN F1

LAYOUT NOTE:

2

1

C5802

805

20%

6.3V X5R

22UF

2

1

C5807

CERM-X5R

6.3V

0.47UF

402

10%

2

1

C5803

10V

0.1UF

20%

CERM 402

2

1

C5820

0.1UF

20%

CERM

10V

402

21

R5899

5%

1/16W

4.7

402

MF-LF

2

1

C5804

0.1UF

20% 10V CERM 402

21

XW5800

SM

OMIT

2

1

C5805

402

10V

20%

0.1UF

CERM

2

1

C5806

20% 10V CERM 402

0.1UF

G2

H1

H2

J4

J3

J1

J2

K4

B6

A6

C6

D6

B7

A7

C7

P15

N13

R15

P14

R14

P13

R13

N12

J13

J12

K14

K13

K12

L15

L14

L13

F2

G4

G1

C1

D3

C2

B1

C3

D5

B5

A5

D7

A8

C8

D8

B9

A9

C9

D9

F14

E13

E15

E14

E12

D15

D14

D13

C15

D12

C14

B15

B14

A15

C13

B12

U5800

BGA

OMIT

SMC_H8S2116

B3

D4

C4

K2

F3

E1

R7

P7

M8

R8

P8

N9

R9

P9

N5

P5

R5

M6

N6

R6

P6

M7

L2

L4

M1

M2

M3

M10

N10

R10

P10

N11

R11

P11

M11

H12

H13

H15

H14

G12

G13

G15

G14

D11

A12

C11

B11

A11

D10

A10

B10

N1

M4

N2

R1

N3

R2

P3

R3

U5800

OMIT

SMC_H8S2116

BGA

A2

D2B4A4

A13

B13

F13

F12

R4P4D1

F1

A1

J15

P1

P2

E3

F4

K1

E2

B2

L1

R12

P12

M15

M14

N15

N14

U5800

BGA

SMC_H8S2116

OMIT

L12

M13

M12

N7

M5

N4

L3

N8

M9

H4

K3

E4

B8

A3

C5

C10

C12

A14

F15

J14

K15

H3

G3

U5800

BGA

SMC_H8S2116

OMIT

2

1

R5809

MF-LF

5%

402

1/16W

10K

2

1

R5801

MF-LF 402

5%

10K

1/16W

2

1

R5802

1/16W

5%

10K

MF-LF 402

2

1

R5803

NOSTUFF

402

MF-LF

1/16W

5%

0

2

1

R5898

10K

MF-LF

5% 1/16W

402

051-7039

H

58 97

=PP3V3_S5_SMC

MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.20 MM

PP3V3_AVCC_SMC

SMC_VCL

PP3V3_AVREF_SMC

SMC_MD1

KBC_MDE

PM_CLKRUN_L

SMC_WAKE_SCI_L

SMC_SYS_VSET

SMC_BATT_ISET

SMC_LID

SMC_PF1

SMS_ONOFF_L

SMS_X_AXIS

SMS_Z_AXIS SMC_ANALOG_ID SMC_NB_ISENSE SMC_MEM_ISENSE

SMC_BS_ALRT_L

SMS_INT_L

SMC_CPU_ISENSE

SPI_SI

SMC_FAN_2_CTL

SMC_EXCARD_OC_L

SMC_PM_G2_EN

SMC_P22

SMC_XTAL SMC_EXTAL

=PP3V3_S5_SMC

ALS_LEFT

SMC_PROCHOT

SMC_TRST_L

SMC_NMI

GND_SMC_AVSS

SPI_ARB

SMC_XDP_TDO_3_3

SMC_SYS_LED_16B

GND_SMC_AVSS

=PP3V3_S5_SMC

SMC_CPU_INIT_3_3_L

SMC_P23

SMC_BC_ACOK

SMC_FWE

ALS_RIGHT

SMS_Y_AXIS

SMC_FAN_3_TACH

SMC_FAN_1_CTL

SMC_FAN_0_CTL

SMC_P21

SMC_BATT_TRICKLE_EN_L

SMC_P20

SMC_BATT_CHG_EN

SMC_P26

SMC_CASE_OPEN SMC_TCK SMC_TDI SMC_TDO SMC_TMS

SMC_SYS_ISET

SMC_BATT_VSET

SMC_ODD_DETECT

SMC_RUNTIME_SCI_L

SMB_0_S0_DATA

SMC_CPU_VSENSE

SMC_ADAPTER_EN

SMC_PF0

SPI_CE_L SMC_XDP_TCK_3_3

SMC_CPU_RESET_3_3_L

SMC_GPU_ISENSE

SMC_DCIN_ISENSE

SMC_EXCARD_CP

PM_SLP_S5_L

PM_SLP_S4_L

PM_SLP_S3_L

SMC_RST_L

ALS_GAIN

SMC_THRMTRIP

SMC_XDP_TRST_L

PM_SYSRST_L

SMC_SUS_CLK

SPI_SCLK

SPI_SO SMC_PROCHOT_3_3_L

SMC_GPU_VSENSE

SMC_PBUS_VSENSE SMC_BATT_ISENSE SMC_FWIRE_ISENSE

SMC_EXCARD_PWR_EN

ISENSE_CAL_EN

SMC_EXTSMI_L

SMC_RX_L

SMC_XDP_TCK

SMC_XDP_TMS

SMB_BSB_DATA SMC_TPM_PP

SMC_FAN_3_CTL

SMC_FAN_2_TACH

SMC_FAN_1_TACH

SMC_FAN_0_TACH

PM_BATLOW_L

SYS_ONEWIRE

PM_THRM_L

PM_EXTTS_L

SMC_TPM_RESET_L

BOOT_LPC_SPI_L

SMC_RCIN_L

SMC_P27

LPC_AD<0> LPC_AD<1> LPC_AD<2> LPC_AD<3> LPC_FRAME_L SMC_LRESET_L PCI_CLK_SMC INT_SERIRQ

SMC_TPM_GPIO

PM_SUS_STAT_L SC_TX_L SC_RX_L

SMC_ONOFF_L

SMB_BSB_CLK

PM_PWRBTN_L

IMVP_VR_ON

PM_RSMRST_L

SMC_SB_NMI

RSMRST_PWRGD

ALL_SYS_PWRGD

PM_LAN_ENABLE SMC_RSTGATE_L

SMB_0_S0_CLK

SMB_BSA_DATA SMB_BSA_CLK SMB_A_S3_DATA SMB_A_S3_CLK SMB_B_S0_DATA SMB_B_S0_CLK

SMC_SYS_KBDLED

SMC_SYS_LED

SMC_TX_L

80

59

67

59

84

59

79

67

84

58

60

63

58

76

58

60

77

77 60

63

60

77

60

27

60

23

26

22

27

59

27

59

63

23

23 59

26

63

22

76

59

23

59

67

22

21

34

23

26

59

3

59

5

23

59

23

76

5

66

59

3

59

58

22

59

58

3

59

65

59

5

59

59 59

23

27

76

59

22

59

84

76

59

23

5

5 5

59

23

59

22

5

59

84

76

59

5

23

5

59

27

59

66

65

23

59

10

14

59

5

21

59

5

6

5

59

5

59

27

23

75

23

76

5

23

45

27

59

5

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

NC

CD

GND

OUT

VDD

G

D

S

D

G

S

LM393A

V+

GND

LM393A

V+

GND

IN

OUT

GND

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

CURRENT SET TO DRIVE LED AT 30MA NOMINAL

AND MINIMIZE ROUTE LENGTH TO U5999.

PULLDOWN UNUSED ANALOG SENSE

WIRE SMC TO SB PINS

GENERATE 0.48V MID-VREF

PRECISION 3.3V AVREF FOR SMC

TURN ON 3.3V VREF ONLY AFTER SMC

CPU 1.05V -> SMC 3.3V SHIFTER

PCB: ENSURE FSB_CPURST_L FANS OUT FROM U1200

LAYOUT: PLACE C5904 ON OPPOSITE LAYER OF SW5901 C5904 FOR TWEEZERS TO TURN ON SYSTEM

SYS POWER BUTTON

* NEVER STUFF C5904

POWER BUTTON HEADER

M51: FOLLOWED M50, NOT CONNECTING TO SMC, AND TERMINATING

SELECT TPM GPIO

HDD ACTIVITY MONITOR

POWER SUPPLY TEMP SENSE

NO-CONNECT UNUSED PINS

SMC ALIASES, PULLUPS, AND TESTPOINTS

SPARE COMPARATER

518S0327

PCB: RUN A TRACE FROM EACH

NEXT TO THIS GND TRACE AND

DEBUG TESTPOINTS ON SELECTED INPUTS/OUTPUTS

SMC RESET BUTTON

NC OR PULLDOWN UNUSED ANALOG SENSE PINS

TIE INTO DIGITAL GND VERY CLOSE TO

M51 SPECIFIC: GPU MONITORING SIGNALS

SMC’S XW5800. PLACE XW5900 NEAR XW5800.

ANALOG OPAMP PSEUDO-DIFFERENTIALLY

SMC CRYSTAL

3.3V RAIL AND AVCC RAIL IS UP.

TPM RESET PULLUP

PINS ON PORT 7.

WHITE SYSLED

ACROSS LARGE VOLUME MANUFACTURING

WIRE-OR DIMM OVERTEMP TO SMC

SMC 3.3V -> CPU 1.05V SHIFTER

TPM CRYSTAL

LAYOUT NOTE: PLACE CAPACITORS BETWEEN CRYSTAL AND SMC/TPM

TIE ANALOG SENSOR OPAMP GROUNDS TO SMC GROUND

SMC PULL-UPS & PULL-DOWNS

353S1278

SMC_SYS_LED_16B - PWM, NORMAL LED ACTIVITY, SLEEP PULSE, RUN, ETC

SMC_SYS_LED - PWM, S/W VARIED TO CONTROL BRIGHTNESS

* BRIGHTER FOR LARGER IMACS

PLACE C5951 NEXT TO Q5952

21

R5920

SMC_TPM_GPIO1

0

21

R5921

402

MF-LF

SMC_TPM_GPIO2

1/16W

5%

0

1

2

6

Q5901

2N7002DW-X-F

SOT-363

4

5

3

Q5901

SOT-363

2N7002DW-X-F

2

1

C5903

0.1uF

10V

402

CERM

20%

2

1

R5930

1/16W

5%

402

MF-LF

6.2K

2

1

4

3

J5903

M-ST-SM

53398-0276

CRITICAL

2

1

R5931

402

5%

1K

MF-LF

1/16W

21

R5830

10K

21

R5829

10K

21

R5808

10K

MF-LF

5%

402

1/16W

21

R5832

10K

21

R5817

10K

21

R5815

10K

2

1

R5950

5%

4.7K

1/16W MF-LF 402

NOSTUFF

21

R5833

10K

21

R5819

10K

21

R5821

10K

21

R5818

100K

21

R5822

10K

21

R5823

10K

21

R5824

10K

21

R5825

10K

21

R5826

10K

21

R5828

10K

21

R5827

10K

21

R5995

SMC_TPM_PP

0

5%

402

MF-LF

1/16W

2

1

C5941

0.01uF

20% CERM

402

16V

2

1

C5942

10UF

20%

6.3V CERM

805-1

2

1

C5940

0.47UF

10% CERM-X5R

6.3V

402

2

1

C5901

0.1uF

20%

CERM

10V

402

2

1

R5932

MF-LF

1/16W

1K

402

5%

21

R5924

10K

5%

MF-LF

1/16W

21

XW5900

OMIT

SM

21

R5940

NOSTUFF

0

5% 1/16W MF-LF

402

2

1

4

3

5

U5900

CRITICAL

RN5VD30A-F

SOT23-5

21

R5941

10K

MF-LF

402

5%

1/16W

2

1

C5943

CERM 402

10%

1UF

6.3V

2

1

3

Q5911

SOT23-LF

2N7002

2

1

3

Q5910

NTR4101P

SOT-23

2

1

R5942

402

MF-LF

10K

1/16W

5%

8

7

5

6

4

U5999

SOI-1-LF

43

21

SW5901

DEVELOPMENT

SM-LF

SPST

8

1

3

2

4

U5999

SOI-1-LF

2

1

C5930

50V

100PF

402

CERM

5%

21

R5922

0

21

R5923

0

21

R5916

10K

21

R5917

10K

21

R5934

1K

21

R5933

1K

2

1

Y5981

TPM

CRITICAL

4.1X1.5X.9-SM

32.768K

21

3

U5940

REF3133

CRITICAL

SOT23-3

I327

I328

2

1

Y5980

8X4.5-SM

20.000M

CRITICAL

2

1

C5951

1UF

402

CERM

6.3V

10%

2

1

R5951

402

1/16W MF-LF

5%

2.2K

2

1

R5957

5% 1/16W

402

4.7K

MF-LF

2

1

3

Q5950

SOT23-LF

2N7002

2

3

1

Q5952

2N3906

SOT23-LF

21

R5831

10K

21

R5960

10K

2

1

3

Q5951

SOT23-LF

2N7002

NOSTUFF

2

1

R5955

MF-LF

1/16W

5%

402

NOSTUFF

4.7K

2

1

C5904

0.01uF

NOSTUFF

603

CERM

50V

20%

4

1

3

2

LED5950

SM

NASW031T

WHITE

2

1

R5952

402

MF-LF

1/16W

1%

26.7

2

1

R5900

402

5%

MF-LF

1/16W

1K

21

R5907

MF-LF

402

1K

5%

1/16W

21

C5980

5%

40250V

22PF

CERM

21

C5981

CERM 5%

50V 402

22PF

21

C5982

TPM

50V

402

15PF

5%

CERM

21

C5983

TPM

CERM

402

15PF

5%

50V

2

1

C5900

16V

CERM

402

10%

0.01UF

2

1

C5902

402

20%

10V

CERM

0.1uF

43

21

SW5900

DEVELOPMENT

SM-LF

SPST

9759

H

SYNC_MASTER=M51_HENRY

SYNC_DATE=07/31/2006

SMC & TPM SUPPORT

051-7039

353S1278353S1381

INTERSIL ISL60002-33

U5940

SMC_SYS_LED

SYS_LED_C

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

SYS_LED_BRT_D

SMC_CPU_RESET_3_3_L

SC_RX_L SC_TX_L SMS_ONOFF_L

SMC_RX_L

SMC_BS_ALRT_L

SMC_BC_ACOK SMC_FWE

SMC_TDO

SMC_TMS

MAKE_BASE=TRUE

NC_SMC_MEM_ISENSE

=PP3V3_S0_FAN

=PP3V3_S5_SMC

TPM_XTALI

MIN_NECK_WIDTH=0.2 MM

GND_SMC_AVSS

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=0V

PP5V_S5

SMC_REF_IN

MIN_NECK_WIDT=0.2 MM

MIN_LINE_WIDTH=0.4 MM

SMC_EXCARD_CP

MAKE_BASE=TRUE

FUNC_TEST=TRUE

TP_SMC_FAN_3_TACH

SMC_PF0 SMC_PM_G2_EN

MAKE_BASE=TRUE

TP_SMC_PB7

FUNC_TEST=TRUE

SMC_EXCARD_PWR_EN

MAKE_BASE=TRUE

FUNC_TEST=TRUE

TP_SMC_ADAPTER_EN

SMC_EXTAL

SMC_XTAL

MXM_AC_BATT_L

MAKE_BASE=TRUE

SMC_XDP_TDO_3_3

SMC_XDP_TMS

MAKE_BASE=TRUE

GPU_OVERTEMP_L

NC_SMS_Y_AXIS

MAKE_BASE=TRUE

NC_SMS_X_AXIS

MAKE_BASE=TRUE

TP_SMC_XDP_TRST_L

SUS_CLK_SB

MAKE_BASE=TRUE

GND_NEXT_TO_SMC

TPM_PP

SMC_TX_L

MAKE_BASE=TRUE

NC_ALS_GAIN

SMC_MANUAL_RST_L

=PP3V3_S5_SMC

SMC_RST_L

TP_SMC_SYS_KBDLED

MAKE_BASE=TRUE

FUNC_TEST=TRUE

TP_PM_G2_EN

MAKE_BASE=TRUE

ALS_RIGHT

MAKE_BASE=TRUE

TP_SMC_XDP_TCK

SMC_REF_GATE1

MAKE_BASE=TRUE

NC_SMC_BATT_VSET

SMC_P26

SMC_SYS_VSET

SMS_X_AXIS

SC_RX_L

SC_TX_L

SMS_Y_AXIS

ALS_GAIN

MAKE_BASE=TRUE

NC_SMC_SYS_VSET

MAKE_BASE=TRUE

NC_SMC_SYS_ISET

SMC_P27

MAKE_BASE=TRUE

NC_SMC_P27

SMC_BATT_ISET

MAKE_BASE=TRUE

NC_SMC_BATT_ISET

SMC_BATT_VSET

SMC_P23

SMC_P22

SMC_P21

SMC_P20

MAKE_BASE=TRUE

NC_SMC_P20

SMC_CPU_INIT_3_3_L

MAKE_BASE=TRUE

FWH_INIT_L

SYS_ONEWIRE

SMC_XDP_TRST_L

SMC_PF1

SMC_SYS_KBDLED

TP_SMC_PF0

MAKE_BASE=TRUE

NC_SMC_P21

MAKE_BASE=TRUE

NC_SMC_BATT_TRICKLE_EN_L

UNUSED_SMC_SENSE

MAKE_BASE=TRUE

SMC_FWIRE_ISENSE

MAKE_BASE=TRUE

TP_ALS_LEFT

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_ALS_RIGHT

MAKE_BASE=TRUE

TP_SMC_PF1

TP_SMC_EXCARD_PWR_EN

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_SMC_PB7

MAKE_BASE=TRUE

FUNC_TEST=TRUE

MAKE_BASE=TRUE

TP_SMC_FAN_3_CTL

SMC_BATT_CHG_EN

TPM_GPIO2

SMC_SUS_CLK

UNUSED_SMC_SENSE

MAKE_BASE=TRUE

SMC_TPM_PP

SMC_TPM_GPIO

PM_EXTTS_L

TPM_XTALO

SMC_ONOFF_L

SMC_ANALOG_ID

SMC_PROCHOT_3_3_L

CPU_PROCHOT_L

SMC_PROCHOT

NC_SMC_NB_ISENSE

MAKE_BASE=TRUE

NC_SMS_Z_AXIS

NC_SMC_P22

MAKE_BASE=TRUE

NC_SMC_P26

NC_SMC_P23

MAKE_BASE=TRUE

TPM_GPIO1

SMC_TPM_RESET_L

SMC_TDI

MAKE_BASE=TRUE

DIMM_OVERTEMP_L

PM_THRMTRIP_L

UNUSED_SMC_SENSE

TP_SB_SATALED_L

=PP3V3_S5_SMC

SMC_EXCARD_OC_L

MAKE_BASE=TRUE

ACDC_TEMP

MAKE_BASE=TRUE

PU_HDD_ACTIVITY_LED

PP5V_S0

SMC_FAN_3_CTL

MAKE_BASE=TRUE

NC_SMC_BATT_CHG_EN

SMC_BATT_TRICKLE_EN_L

SMC_ODD_DETECT

SMC_PB7

SMC_XDP_TCK

SMC_ADAPTER_EN ALS_LEFT

SMC_FAN_3_TACH

SMC_XDP_TCK_3_3

SMC_CASE_OPEN

SMC_LID

SMC_TCK

SMC_TX_L

SMC_ONOFF_L

SMC_SYS_ISET

POWER_BUTTON_L

SMC_REF_GATE2

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM

SMC_RX_L

SMC_THRMTRIP

=PP3V3_S5_SMC

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.4 MM

PP3V3_AVREF_SMC

MIN_NECK_WIDTH=0.2 MM

SYS_LED_CTL_D

SYS_LED_CTL_B

=PP3V3_S0_FAN

SMC_SYS_LED_16B

PP3V3_TPM_3VSB

SMC_BATT_ISENSE

SMC_MEM_ISENSE

SMS_Z_AXIS SMC_NB_ISENSE

CPU_PROCHOT_L

P0V48_SMC_LSREF

SYS_LED_CTL_C

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP5V_S3

83 82 80

79 78

97

60

66

59

77

60

59

83

60

59

66

59

60

65

58

84

75

59

58

60

21

58

75

60

59

58

65

59

58

59

27

76

5

58

27

58

59

21

58

59

67

58

29

14

27

5

58

59

58

27

59

83

58

5

58

5

3

67

58

3

58

85

58

85

5

23

76

67

5

3

5

58

5

58

5

58

5

58

5

58

5

58

5

58

5

59

58

67

58

59

58

14

67

58

7

58

5

67

58

5

28

7

59

21

3

58

6

3

58

5

58

59

58

5

58

5

58

3

58

3

58

67

58

7

3

www.Vinaﬁx.vn

Preliminary

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

J6000

DEVELOPMENT

SM1

F-ST-5047

2

1

C6000

DEVELOPMENT

10%

1UF

CERM

6.3V

402

2

1

C6001

DEVELOPMENT

0.1UF

20% 10V CERM 402

2

1

C6003

DEVELOPMENT

CERM 402

10V

20%

0.1UF

2

1

C6002

DEVELOPMENT

1UF

CERM

6.3V

402

10%

9760

H

051-7039

SYNC_MASTER=M51_HENRY

SYNC_DATE=08/04/2006

LPC+ CONN

=PP3V3_S5_DEBUG

=PP5V_S0_DEBUG

SMC_TX_L

LPC_AD<0> LPC_AD<1>

SMC_MD1

SMC_RX_L

LPC_AD<3>

INT_SERIRQ

SMC_TDI

SMC_RST_L

SMC_NMI

BOOT_LPC_SPI_L

SMC_TMS

DEBUG_RST_L

PM_CLKRUN_L

SMC_TDO

SMC_TRST_L

LPC_FRAME_L

LPC_AD<2>

PM_SUS_STAT_L

SMC_TCK

PCI_CLK_PORT80

FWH_INIT_L

SV_SET_UP

67

67 67

67

59

58

59

58

59

58

59

58

59

58

59

58

21

58 58

21

23

58

22

58

6

23

58

21

23

58

34

21

23

3

5

5 5

5

www.Vinaﬁx.vn

Preliminary

SCK

SO

WP*

SI

VDD

CE*

HOLD*

VSS

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

R6303 SHOULD BE PLACED LESS THAN 2.54MM FROM U6301

R6306-07 SHOULD BE PLACED LESS THAN 2.54MM FROM U2100

IS SHARED WITH SB AND SMC

R6309 NOT NEEDED SINCE SPI ROM

2

1

C6312

20%

0.1UF

10V CERM 402

2

1

R6301

MF-LF

3.3K

5%

402

1/16W

2

1

R6302

402

MF-LF

3.3K

5%

1/16W

2

1

C6301

33PF

CERM 402

5% 50V

21

R6307

5%

47

402

MF-LF

1/16W

2

1

C6308

CERM

5% 50V

402

33PF

2

1

C6309

50V

33PF

CERM

5%

402

21

R6303

1/16W MF-LF

47

402

5%

21

R6306

47

402

MF-LF

1/16W

5%

2

1

C6311

402

50V

33PF

5% CERM

3

4

8

2

5

6

7

1

U6301

SST25VF016B

16MBIT

SOI

OMIT

2

1

R6399

MF-LF

5%

1/16W

10K

402

2

1

R6309

NOSTUFF

402

MF-LF

5%

1/16W

10K

63

SPI BOOTROM

051-7039

H

97

SYNC_MASTER=M50_DOUG SYNC_DATE=08/04/2006

SPI_WP_L

SPI_CE_L

SPI_SO_R

SPI_SI_R

=PP3V3_S5_ROM

SPI_SO

SPI_SCLK

SPI_SCLK_R

SPI_HOLD_L

SPI_SI

58

22

58 22

22

3

5

22

5

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

12V DC

NOTE: ADDED TO PROTECT SMC

FAN 1

TACH

HD FAN

ODD FAN

TACH

518S0406

GND

12V DC

GND

MOTOR CONTROL

518S0406

MOTOR CONTROL

FAN 0

2

1

R6500

402

MF-LF

1/16W

10K

5%

2

1

R6501

402

1/16W

10K

5%

MF-LF

2

1

C6500

NOSTUFF

CERM

25V

20%

0.1UF

603

2

1

R6502

1.5K

5% 1/4W MF-LF 1206

5

4

87632

1

Q6500

NTHS5443T1

1206A-03-LF

2

1

R6503

1/8W

5%

MF-LF

805

1.5K

3

1

D6500

MMBD914XXG

SOT23

21

R6504

1/8W

MF-LF

5%

0

805

2

1

C6501

0.47UF

16V

10%

805

X7R

R6505

3.9K

5%

1/8W

MF-LF

805

2

1

R6506

10K

402

5% MF-LF

1/16W

5

4

87632

1

Q6503

NTHS5443T1

1206A-03-LF

2

1

C6502

NOSTUFF

603

20% CERM

0.1UF

25V

2

1

R6507

1/8W

1.5K

5%

MF-LF

805

21

R6508

805

MF-LF

1/8W

0

5%

2

1

C6503

10%

805

0.47UF

X7R

16V

R6509

3.9K

5%

1/8W

805

MF-LF

3

1

D6501

MMBD914XXG

SOT23

2

1

R6510

MF-LF

5%

1206

1.5K

1/4W

2

1

R6511

402

10K

5%

MF-LF

1/16W

2

1

R6512

5%

NOSTUFF

MF-LF

1/8W

1.0K

805

2

1

R6513

NOSTUFF

1.0K

5% 1/8W MF-LF 805

21

R6514

1/8W

5%

MF-LF

0

805

21

R6515

5%

805

0

1/8W

MF-LF

21

D6502

NOSTUFF

B130LBT01XF

SMB

21

D6503

NOSTUFF

SMB

B130LBT01XF

21

R6599

1/16W

402

47K

5%

MF-LF

21

R6598

402

MF-LF

1/16W

5%

47K

2

1

3

Q6502

SOT23-LF

2N7002

2

1

3

Q6505

SOT23-LF

2N7002

4

3

2

1

6

5

J6500

CRITICAL

M-RT-SM

HS8804F-B

4

3

2

1

6

5

J6501

M-RT-SM

CRITICAL

HS8804F-B

2

1

C6504

6.3X11-TH-LF1

ELEC

20%

120UF

16V

CRITICAL

2

1

C6505

16V

120UF

20%

ELEC

6.3X11-TH-LF1

CRITICAL

SYNC_DATE=08/04/2006

SYNC_MASTER=M51_HENRY

65 97

H

051-7039

HD AND OD FAN

FAN_0_OUT

MIN_NECK_WIDTH=0.25MM MIN_LINE_WIDTH=0.5MM

FAN_0_PWR

=PP12V_S0_FAN

FAN_TACH0

SMC_FAN_1_CTL

FAN_TACH1

SMC_FAN_0_CTL

F0_GATESLOWDNF0_VOLTAGE8R5

=PP3V3_S0_FAN

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

F1_RCFEEDBK

F0_RCFEEDBK

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.25MM

FAN_1_OUT

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM

=PP3V3_S0_FAN

PP3V3_S5

F1_GATESLOWDN

PP3V3_S5

SMC_FAN_1_TACH

SMC_FAN_0_TACH

F1_VOLTAGE8R5

MIN_LINE_WIDTH=0.5MM

FAN_1_PWR

MIN_NECK_WIDTH=0.25MM

=PP12V_S0_FAN

83

80

79

78

77

76

66

65

66

26

66

65

6

66

65

59

5

65

3

58

3

58

3

www.Vinaﬁx.vn

Preliminary

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CPU FAN

FAN 2

TACH

MOTOR CONTROL

518S0406

I2C ADDR:0X92(1001001)

I2C ADDR:0X90(1001000)

HD TEMP SENSOR

518S0413 518S0413

ODD TEMP SENSOR

12V DC

GND

2

1

C6654

0.1UF

20% 10V

402

CERM

2

1

C6655

0.1UF

10V

20%

CERM

402

2

1

3

Q6602

SOT23-LF

2N7002

4

3

2

1

6

5

J6600

M-RT-SM

CRITICAL

HS8804F-B

5

4

3

2

1

7

6

J6601

HS8805F-B

CRITICAL

M-RT-SM

5

4

3

2

1

7

6

J6602

M-RT-SM

HS8805F-B

CRITICAL

2

1

C6602

16V

120UF

20%

ELEC

6.3X11-TH-LF1

CRITICAL

2

1

R6600

5% 1/16W

402

MF-LF

10K

5

4

87632

1

Q6600

1206A-03-LF

NTHS5443T1

3

1

D6600

SOT23

MMBD914XXG

2

1

C6600

25V

603

0.1UF

20%

CERM

NOSTUFF

2

1

R6601

805

MF-LF

1/8W

5%

1.5K

21

R6602

5%

MF-LF

805

1/8W

0

2

1

C6601

0.47UF

16V X7R 805

10%

R6603

805

MF-LF

1/8W

5%

3.9K

2

1

R6604

MF-LF

1/4W

5%

1.5K

1206

2

1

R6605

1/16W

5%

402

10K

MF-LF

2

1

R6606

NOSTUFF

805

MF-LF

1/8W

1.0K

5%

21

R6607

5%

805

1/8W

0

MF-LF

21

D6601

SMB

NOSTUFF

B130LBT01XF

21

R6697

402

MF-LF

1/16W

5%

47K

21

C6650

0.01UF

402

CERM

16V

NOSTUFF

20%

21

C6651

40216V

20%

CERM

0.01UF

NOSTUFF

21

C6653

NOSTUFF

0.01UF

CERM

20% 16V 402

21

C6652

16V

20%

CERM

0.01UF

402

NOSTUFF

CPU FAN, HD & OD TEMP

SYNC_MASTER=M51_HENRY

SYNC_DATE=08/04/2006

051-7039

H

66 97

MIN_NECK_WIDTH=0.25MM

FAN_2_PWR

MIN_LINE_WIDTH=0.5MM

FAN_2_OUT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.5MM

=I2C_ODD_TEMP_SDA

=I2C_ODD_TEMP_SCL

FAN_TACH2

F2_RCFEEDBK

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM

GND_CHASSIS_ODD_TEMP

SMC_FAN_2_CTL

GND_CHASSIS_HDD_TEMP

=PP3V3_S0_HD_TSENS

=PP3V3_S0_ODD_TSENS

GND_CHASSIS_ODD_TEMP

=I2C_HD_TEMP_SCL

=I2C_HD_TEMP_SDA

PP3V3_S5

=PP3V3_S0_FAN

GND_CHASSIS_HDD_TEMP

=PP12V_S0_FAN

F2_VOLTAGE8R5 F2_GATESLOWDN

SMC_FAN_2_TACH

83 80 79 78 77 76 65 26

6

65

66

5

59

66

65

27

6

58

6

3

6

27

3

6

3

58

www.Vinaﬁx.vn

Preliminary

IN

IO

LAD1

LAD2

LCLK

LFRAME*

LRESET*

LPCPD*

SERRIRQ

LAD0

CLKRUN/GPIO*

PP/GPIO

GPIO_EXPRESS_00

GPIO/SM_DAT

GPIO/SM_CLK

XTALI/32K_IN

TESTBI/BADD/GPIO

TESTI

3V0

3V1

3V2

3VSB

VNC

VBAT

XTALO

GND2

GND3

GND0

GND1

LAD3

IO

IN

IO

IN

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BASE ADDR = 0X4E/4F

GPIO2

TESTBI/BADD

1/8W (R6704/R6705) IS USED FOR NOW

SINCE CURRENT OF VSB IS NOT YET ON SPEC,

NOTE:

PLACE R6702-03 WHERE ACCESSIBLE

LAYOUT NOTE:

PLACE WHERE ACCESSIBLE

LAYOUT NOTE:

BASE ADDR = 0X2E/2F

NC

CLKRUN*

GPIO

PP

NC

VDD

VSB

NC

GND

(INT PD)

2

1

C6700

0.1UF

10% 16V X5R 402

TPM

2

1

C6701

10% 16V X5R 402

0.1UF

TPM

2

1

C6702

402

X5R

16V

10%

0.1UF

TPM

2

1

C6703

TPM

0.1UF

10% 16V X5R 402

2

1

R6700

402

MF-LF

1/16W

5%

0

NOSTUFF

14

13

3

12

8

9

27

7

16

28

22

21

17

20

23

26

6

1

2

251811

4

15

5

24

19

10

U6700

TPM

TSSOP

OMIT

2

1

R6702

TPM

402

10K

5% 1/16W MF-LF

2

1

R6703

402

10K

MF-LF

1/16W

5%

NOSTUFF

21

R6704

TPM

0

5%

1/8W

MF-LF

805

2

1

R6705

0

5% 1/8W MF-LF 805

NOSTUFF

21

R6798

TPM

402

1/16W MF-LF

5%

0

21

R6799

402

1/16W

NOSTUFF

0

5%

MF-LF

9767

H

051-7039

SYNC_MASTER=M51_HENRY

SYNC_DATE=08/04/2006

TPM

SMC_TPM_RESET_L

TPM_LRESET_L

TPM_RST_L

LPC_AD<0> LPC_AD<1>

LPC_AD<2>

PCI_CLK_TPM

LPC_FRAME_L

PM_SUS_STAT_L

INT_SERIRQ

=PP3V3_S0_TPM

TPM_XTALO

TPM_XTALI

PM_CLKRUN_L

=PP3V3_S3_TPM

LPC_AD<3>

TPM_GPIO2

TPM_GPIO1

TPM_PP

=PP3V3_S0_TPM

MIN_NECK_WIDTH=0.15MM

VOLTAGE=3.3V MIN_LINE_WIDTH=0.6MM

PP3V3_TPM_3VSB

TPM_BADD

60

58

59

21

23

67

23

21

67

58

6

5

34

5

3

59

5

3

5

59

3

59

www.Vinaﬁx.vn

Preliminary

IN

OUT

GPIO0/DMIC-CLK

RESET*

PORT-A-R

PORT-A-L

SPDIFI/EAPD/MIDI-I/DMIC-R

DVDD_IO

NC

DVDD

BCLK

GPIO1/DMIC-L

AVSS1

SENSE_B

SENSE_A

CD-L

SDATA_IN

SDATA_OUT

AVDD1

AVDD2

AVSS2

BEEP

CD-GND

DVSS

PORT-A-VREFO/DCVOL

PORT-F-L

PORT-F-R

SPDIFO

PORT-C-L

PORT-C-R

PORT-D-L

PORT-D-R

VREF

JDREF

PORT-G-L

PORT-G-R

PORT-H-L

PORT-H-R

PORT-E-L

PORT-E-R

PORT-B-L

PORT-B-R

PORT-C-VREFO

PORT-D-VREFO

PORT-B-VREFO

PORT-E-VREFO

PORT-F-VREFO

CD-R

SYNC

REV B3

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MIC INPUT TO BOTH L&R

NC

APPLE P/N 353S1343

AUDIO CODEC

4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP

NC

NC NC

NC NC NC

NC

2

1

C6821

10%

X5R 402

16V

0.1UF

2

1

C6810

SMA-LF

TANT

6.3V

20%

10UF

21

R6807

1/16W MF-LF

5%

402

39

21

R6808

MF-LF

1/16W

5%

402

39

2

1

C6812

25V

402

X7R

10%

1000PF

2

1

C6830

1000PF

X7R

10%

402

25V

2

1

C6835

402

25V X7R

10%

1000PF

2

1

C6836

1000PF

402

10% 25V X7R

21

L6801

0402

FERR-120-OHM-1.5A

2

1

R6816

1/16W MF-LF

20K

0.5%

603

2

1

C6805

20%

10UF

6.3V TANT

SMA-LF

21

L6800

FERR-120-OHM-1.5A

0402

21

L6802

0402

FERR-120-OHM-1.5A

2

1

C6800

CERM

805

10%

10V

1UF

2

1

C6880

805

10%

10V

CERM

1UF

2

1

C6803

SM-CASE-C1

220UF

20% 16V

ELEC

2

1

C6802

SM-CASE-C1

20% 16V

ELEC

220UF

2

1

C6811

SM-CASE-C1

ELEC

20%

220UF

16V

21

R6809

165

1% 1/16W MF-LF

402

2

1

R6801

NO STUFF

0

5% 1/16W MF-LF 402

2

1

R6810

NO STUFF

402

MF-LF

1/16W

5%

0

27

10

48

47

34

13

5

8

11

46

45

44

43

30

17

16

31

15

14

32

36

35

29

24

23

28

22

21

33

41

39

37

40

3

2

7

4

9

1

20

18

19

12

6

42

26

38

25

U6800

LQFP

CRITICAL

ALC885-VB3-GR

2

1

C6801

1000PF

X7R

10% 25V

402

2

1

R6800

1/16W

5%

402

100K

MF-LF

SYNC_DATE=08/04/2006

AUDIO: CODEC

68

051-7039

97

SYNC_MASTER=AUDIO

H

PP4V5_AUDIO_ANALOG

ACZ_SDATAIN<0>

=PP4V5_S5_AUDIO_ANALOG

AUD_SPDIF_OUT

AUD_BI_PORT_F_RAUD_BI_PORT_F_L

AUD_PSEUDO_VREF_F

AUD_PSEUDO_VREF

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

BAL_IN_R

AUD_VREF_PORT_F

NC_AUD_VREF_PORT_E NC_AUD_VREF_PORT_B

NC_AUD_VREF_PORT_D

NC_AUD_VREF_PORT_C

AUD_BI_PORT_B_R

AUD_BI_PORT_B_L

NC_AUD_BI_PORT_E_R

NC_AUD_BI_PORT_E_L

NC_AUD_BI_PORT_H_R

NC_AUD_BI_PORT_H_L

NC_AUD_BI_PORT_G_R

NC_AUD_BI_PORT_G_L

JDREF

VREF

AUD_BI_PORT_D_R

AUD_BI_PORT_D_L

AUD_BI_PORT_C_R

AUD_BI_PORT_C_L

AUD_SPDIF_OUT_CHIP

AUD_BI_PORT_F_R

AUD_BI_PORT_F_L

AUD_PSEUDO_VREF

BAL_IN_COM

BEEP

MIN_LINE_WIDTH=0.6MM VOLTAGE=4.5V

PP4V5_AUDIO_ANALOG

MIN_NECK_WIDTH=0.25MM

ACZ_SDATAOUT

ACZ_SDATAIN_CHIP

BAL_IN_L

AUD_SENSE_A

AUD_SENSE_B

GND_AUDIO_CODEC

VOLTAGE=0V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

AUD_GPIO_1

ACZ_BITCLK

NC_VRP

PPV_3V3_DVDD_IO

MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM VOLTAGE=3.3V

AUD_SPDIF_IN

AUD_BI_PORT_A_L AUD_BI_PORT_A_R

ACZ_RST_L

AUD_GPIO_0

ACZ_SYNC

MIN_NECK_WIDTH=0.20MM

VOLTAGE=3.3V

PPV_3V3_DVDD

74

72

73

71

72

70

69

74

71

69

74

69

68

21

3

73

68 68

69 68

3

68

69

74

5

71

72

5

70

71

72

68

69

68

21

69

74

68

70

21

73

69

21

71

21

MIN_LINE_WIDTH=0.30MM

www.Vinaﬁx.vn

Preliminary

V-

V+

V-

V+

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

AV= 0.59

LINE IN PSEUDO-DIFFERENTIAL AMP

APPLE P/N 353S1494

2

1

C6902

402

X5R

1UF

10% 10V

8

4

1

2

3

U6900

UMAX

CRITICAL

MAX4477AUA+

8

4

7

6

5

U6900

MAX4477AUA+

CRITICAL

UMAX

21

C6905

805-1

CRITICAL

3.3UF

CERM-X5R

10V

10%

21

C6904

805-1

CRITICAL

10% 10V

CERM-X5R

3.3UF

21

C6901

805-1

CRITICAL

3.3UF

CERM-X5R

10V

10%

21

C6900

805-1

CRITICAL

10% 10V

CERM-X5R

3.3UF

2

1

R6903

100K

1/16W

1%

402

MF-LF

21

R6904

23.7K

402

1/16W

1%

MF-LF

21

R6907

402

1%

14.0K

1/16W MF-LF

2

1

R6900

165

1%

402

1/16W MF-LF

2

1

R6908

1/16W

100K

402

1% MF-LF

21

R6905

23.7K

MF-LF

402

1%

1/16W

21

R6910

23.7K

402

1% 1/16W MF-LF

21

R6909

23.7K

1/16W

1%

MF-LF

402

21

R6913

23.7K

402

MF-LF

1/16W

1%

NO STUFF

21

R6914

23.7K

1%

NO STUFF

1/16W MF-LF

402

21

R6915

23.7K

402

1%

NO STUFF

MF-LF

1/16W

21

R6906

402

MF-LF

14.0K

1%

1/16W

21

R6912

1/16W MF-LF

1%

14.0K

402

21

R6911

1%

14.0K

1/16W

402

MF-LF

21

C6906

10% 10V

CERM-X5R

805-1

3.3UF

CRITICAL

21

C6907

10% 10V

CERM-X5R

805-1

3.3UF

CRITICAL

AUDIO: LINE INPUT AMP

97

H

69

051-7039

AUD_LI_GND

AUD_LI_GNDR1

AUD_LI_R

AUD_LI_GND

AUD_LI_GNDL1

AUD_LI_L

AUD_LI_L1

GND_AUDIO_CODEC

AUD_LI_VREFR

PP4V5_AUDIO_ANALOG

AUD_BI_PORTA_L

BAL_IN_R

AUD_PSEUDO_VREF_F

BAL_IN_COM

AUD_BI_PORT_A_R

AUD_BI_PORT_A_L

AUD_PSEUDO_VREF_F

BAL_IN_L

AUD_LI_VREFL

PP4V5_AUDIO_ANALOG

AUD_BI_PORTA_R

AUD_LI_R1 AUD_LI_R2

AUD_LI_L2

74

72

71

70

73

69

73

69

73

68

www.Vinaﬁx.vn

Preliminary

RIN+

SHDN*

VDDR

PVDD

VDDL

C1P

ROUT

PGND

SGND

PVSS

VSS

RIN-

LOUTLIN-

LIN+

C1N

NC

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

APPLE P/N 353S1536

= -1.18

LINE OUT LOW-PASS FILTER

FC= 37 KHZ, A

V

LINE OUT AMP

2

1

C7008

10V

1UF

CERM 805

10%

2

1

C7010

1UF

805

CERM

10V

10%

11

9

13

16

6

108

7

5

1

3

17

12

14 15

2

4

U7000

QFN

CRITICAL

MAX9722AETE+C2N

21

C7000

20%

16V

ELEC

4X5.5-SM

10UF

2

1

C7002

CRITICAL

25V

CERM 0603

5%

1.5NF

2

1

C7004

25V

CRITICAL

CERM 0603

5%

1.5NF

21

C7003

20%

16V

ELEC

4X5.5-SM

10UF

2

1

R7015

4.7K

MF-LF

402

5%

1/16W

21

R7010

4.7

5% 1/10W MF-LF

603

2

1

C7012

50V

100PF

CERM

402

5%

2

1

C7013

402

50V

100PF

CERM

5%

21

R7016

1/16W

5%

402

MF-LF

1K

2

1

R7017

1K

MF-LF 402

1% 1/16W

2

1

R7018

1% 1/16W

1K

MF-LF 402

2

1

C7007

20%

CERM

10UF

6.3V

805-1

21

R7011

805

MF-LF

1%

14

1/8W

21

R7012

14

MF-LF

805

1%

1/8W

21

R7000

11.8K

1%

402

MF-LF

1/16W

21

R7001

14.0K

MF-LF

1%

1/16W

402

21

R7002

2.37K

1/16W

1%

402

MF-LF

21

C7001

50V

CERM

402

180PF

5%

21

C7005

402

50V

180PF

CERM

5%

21

R7003

14.0K

1/16W

1%

402

MF-LF

21

R7006

14.0K

MF-LF

402

1%

1/16W

21

R7009

14.0K

1/16W

402

MF-LF

1%

21

R7007

11.8K

1/16W MF-LF

402

1%

2

1

R7004

11.8K

1% 1/16W MF-LF 402

2

1

R7005

11.8K

1% 1/16W MF-LF 402

21

R7008

2.37K

MF-LF

402

1%

1/16W

2

1

C7006

20%

100UF

16V

ELEC

6.3X5.5-SM

2

1

C7011

35V

22UF

SM-LF

ELEC

20%

21

L7000

0402

FERR-120-OHM-1.5A

21

R7019

1/8W

14

MF-LF

805

1%

21

R7020

1/8W

14

MF-LF

805

1%

2

1

C7009

10V

1UF

CERM 805

10%

AUDIO: COMBO OUT AMP

70 97

H

051-7039

AUD_LO_GND_PRB

AUD_MAX9722_C1N

GND_AUD_LOAMP_CHGPMP

=PP5V_S0_AUDIO

AUD_MAX9722_C1P

AUD_LO_L MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_BI_PORT_D_L

AUDIO_LO_MUTE_L_F

AUD_LOAMP_IN_L_M

AUDCODECOUTL

AUD_LOAMP_OUT_R

AUDCODECOUTR

AUD_LOAMP_IN_L_P

AUD_LOAMP_IN_R_P

AUD_LOAMP_IN_R_M

AUDCODECOUTR1

AUD_GPIO_1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_R

AUD_BI_PORT_D_R

VOLTAGE=5V

PP5V_AUDIO_FILT

MIN_LINE_WIDTH=0.50mm MIN_NECK_WIDTH=0.20MM MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.50mm

VOLTAGE=5V

PP5V_AUDIO_LOAMP

GND_AUDIO_CODEC

AUD_LOAMP_OUT_L

AUDCODECOUTL1

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LOAMP_OUT_R

AUD_LO_GND_PRB_IN

AUD_LOAMP_OUT_L

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.30MM

GND_AUD_LOAMP_CHGPMP

MIN_LINE_WIDTH=0.30mm

AUD_MAX9722_PVSS

MIN_NECK_WIDTH=0.20mm

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_GND

AUD_LOAMP_IN_R_M

AUD_LOAMP_IN_L_P

AUD_LOAMP_IN_L_M

GND_AUDIO_CODEC

GND_AUD_LOAMP_CHGPMP

AUD_LOAMP_IN_R_P

74

72

71

70

74

70

74

69

74

73

69

74

73

70

3

73

68

70

68

73

68

70

68

70

www.Vinaﬁx.vn

Preliminary

PGND

VDD

G1

G2

CHOLD

AGND

PAD

THM

NC

SHDN*

FS2

FS1

INL-

INL+

INR-

REG

INR+

OUTL+

OUTL-

C1+

C1-

OUTR+

OUTR-

SS

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

DRAWS NO POWER DURING S5 ONLY ON S5 RAIL TO AID ROUTING

GAIN AND SWITCHING FREQUENCY STUFF OPTIONS

NC

MODULATION SETTING: LOW EMI

SPEAKER AMP

APPLE P/N 353S1156

GAIN SETTINGS: +16DB

21

XW7101

SM

OMIT

2

1

C7120

402

5% 50V

100PF

CERM

2

1

C7121

100PF

5%

402

50V CERM

21

R7113

47K

1/16W MF-LF

402

5%

2

1

R7118

402

MF-LF

1/16W

5%

0

NOSTUFF

21

R7119

0

5%

402

MF-LF

1/16W

NOSTUFF

21

L7122

FERR-250-OHM

SM-1

21

XW7102

SM

OMIT

21

R7170

1206

MF-LF

1/4W

0.005

1%

22

21

4

3

33

12

11

14

24

23

2

1

26

28

25

27

30

32

29

31

8

15

16

9

10

18

17

20

19

7

5

6

13

U7100

MAX9714

QFN-LF

CRITICAL

1

2

6

Q7100

SOT-363

2N7002DW-X-F

4

5

3

Q7100

2N7002DW-X-F

SOT-363

21

R7115

5%

402

MF-LF

1/16W

47K

21

R7114

47K

1/16W MF-LF

402

5%

2

1

C7190

100PF

5%

402

50V CERM

21

L7103

0603-LF

180-OHM-1.5A

2

1

C7108

603-1

X7R

50V

0.1UF

10%

21

L7104

0603-LF

180-OHM-1.5A

2

1

C7109

0.47UF

X7R 805

16V

10%

21

L7100

SM-1

FERR-250-OHM

21

C7104

0.47UF

X7R 805

16V

10%

21

C7105

0.47UF

X7R 805

16V

10%

21

L7102

180-OHM-1.5A

0603-LF

2

1

C7114

1UF

X5R 603

25V

10%

21

C7107

805

0.47UF

X7R

16V

10%

21

C7106

0.47UF

805

X7R

16V

10%

2

1

C7100

470UF

ELEC

20% 25V

10X10-SM

21

L7101

0603-LF

180-OHM-1.5A

2

1

R7108

402

MF-LF

1/16W

5%

0

NOSTUFF

2

1

C7117

ELEC

25V

20%

470UF

10X10-SM

2

1

C7102

1UF

X7R 805

35V

10%

5678

4321

RP7100

5%

47K

1/16W SM-LF

2

1

R7112

402

4.7K

MF-LF

5%

1/16W

21

L7105

1000-OHM-200MA

0603

2

1

C7115

100PF

50V

402

5%

CERM

2

1

C7116

50V

5%

100PF

402

CERM

21

L7106

1000-OHM-200MA

0603

21

L7107

0603

1000-OHM-200MA

21

L7108

1000-OHM-200MA

0603

2

1

C7119

20%

0.1UF

603

16V CERM

2

1

C7118

0.1UF

20%

603

16V

CERM

2

1

C7103

1210

10UF

10% 16V X5R-CERM

2

1

C7101

X5R-CERM

16V

10%

10UF

1210

2

1

C7110

25V

1000PF

X7R 402

10%

2

1

C7111

25V

1000PF

X7R 402

10%

2

1

C7112

1000PF

25V X7R 402

10%

2

1

C7113

1000PF

25V X7R 402

10%

SYNC_MASTER=AUDIO

SYNC_DATE=08/04/2006

97

H

71

051-7039

AUDIO: SPEAKER AMP_1

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.2MM VOLTAGE=12V

PP12V_AUD_SPKRAMP_PLANE

GND_AUDIO_SPKRAMP_PLANE

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUDSAMPOUTLP

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

AUDSAMPOUTLN

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBR_N

AUD_SAMP_G1

=PP3V3_S0_AUDIO

AUD_BI_PORT_B_R

AUDSAMPINRN

GND_AUDIO_CODEC

AUDSAMPINLP

AUD_BI_PORT_C_R

MIN_LINE_WIDTH=3.0MM MIN_NECK_WIDTH=0.2MM VOLTAGE=12V

=PP12V_S5_AUDIO_SPKRAMP

NET_SPACING_TYPE=AUDIO

AUD_SAMP_FS1

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTCR_P

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTCR_N

GND_AUDIO_SPKRAMP_PLANE

AUD_SAMP_FS2 AUD_SAMP_FS1

GND_AUDIO_SPKRAMP_PLANE

AUD_SAMP_G2

=PP3V3_S0_AUDIO

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBR_P

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=3.0MM

GND_AUDIO_SPKRAMP

NET_SPACING_TYPE=AUDIO

AUD_SAMP_G1 AUD_SAMP_G2

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_MAX9714_CHOLD

MIN_LINE_WIDTH=0.2MM

AUDSAMPCPP

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.5MM

AUDSAMPOUTRN

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

GND_AUDIO_SPKRAMP_PLANE

AUD_MAX9714_VREG

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_GPIO_0

AUD_SAMP_SHDN_L

AUD_SPKRAMP_MUTE

AUD_SPKRAMP_MUTE_L

GND_AUDIO_CODEC

GND_AUDIO_SPKRAMP_PLANE

GND_AUDIO_CODEC

AUDSAMPCPN

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_SAMP_FS2

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

AUDSAMPOURTP

MIN_LINE_WIDTH=0.5MM

AUDSAMPINRP

AUD_SAMP_INR_P

AUD_SAMP_INR_N

SPKRAMP_SS

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

NET_SPACING_TYPE=AUDIO MIN_NECK_WIDTH=0.2MM

12V_S5_SPKRAMP

VOLTAGE=12V

MIN_LINE_WIDTH=3.0MM

AUDSAMPINLN

AUD_SAMP_INL_N

AUD_SAMP_INL_P

74

73

72

73

72

71

72

71

70

71

70

68

69

72

68

72

69

71

73

71

3

68

3

71

73

71

3

73

6

71

68

72

68

71

68

71

www.Vinaﬁx.vn

Preliminary

PGND

VDD

G1

G2

CHOLD

AGND

PAD

THM

NC

SHDN*

FS2

FS1

INL-

INL+

INR-

REG

INR+

OUTL+

OUTL-

C1+

C1-

OUTR+

OUTR-

SS

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

APPLE P/N 353S1156

SPEAKER AMP

NC

GAIN AND SWITCHING FREQUENCY STUFF OPTIONS

MODULATION SETTING: LOW EMI

GAIN SETTINGS: +16DB

ONLY ON S5 RAIL TO AID ROUTING

DRAWS NO POWER DURING S5

21

XW7201

OMIT

SM

2

1

R7218

402

MF-LF

1/16W

5%

0

NOSTUFF

21

R7219

NOSTUFF

5%

402

MF-LF

1/16W

0

21

L7222

SM-1

FERR-250-OHM

21

XW7202

OMIT

SM

21

R7270

1%

MF-LF

1/4W

1206

0.005

22

21

4

3

33

12

11

14

24

23

2

1

26

28

25

27

30

32

29

31

8

15

16

9

10

18

17

20

19

7

5

6

13

U7200

QFN-LF

MAX9714

CRITICAL

2

1

3

Q7200

2N7002

SOT23-LF

21

R7214

1/16W MF-LF

5%

402

47K

2

1

C7290

50V

5%

402

100PF

CERM

21

L7203

180-OHM-1.5A

0603-LF

2

1

C7208

X7R

50V

0.1UF

603-1

10%

21

L7204

180-OHM-1.5A

0603-LF

2

1

C7209

805

X7R

0.47UF

16V

10%

21

L7200

SM-1

FERR-250-OHM

21

C7204

0.47UF

805

X7R

16V

10%

21

C7205

805

X7R

0.47UF

16V

10%

21

L7202

180-OHM-1.5A

0603-LF

2

1

C7214

603

25V X5R

1UF

10%

21

C7207

0.47UF

805

X7R

16V

10%

21

C7206

0.47UF

X7R 805

16V

10%

2

1

C7200

20%

ELEC

470UF

25V

10X10-SM

21

L7201

180-OHM-1.5A

0603-LF

2

1

R7208

402

MF-LF

1/16W

5%

0

NOSTUFF

2

1

C7217

ELEC

20%

470UF

25V

10X10-SM

2

1

C7202

X7R 805

35V

1UF

10%

5678

4321

RP7200

5%

47K

1/16W SM-LF

21

L7205

1000-OHM-200MA

0603

2

1

C7215

100PF

50V

402

5%

CERM

2

1

C7216

50V

5%

402

100PF

CERM

21

L7206

0603

1000-OHM-200MA

21

L7207

1000-OHM-200MA

0603

21

L7208

1000-OHM-200MA

0603

2

1

C7219

20%

603

0.1UF

16V CERM

2

1

C7218

20%

603

0.1UF

16V

CERM

2

1

C7203

1210

10UF

10% 16V X5R-CERM

2

1

C7201

1210

10UF

10% 16V

X5R-CERM

2

1

C7210

25V

1000PF

X7R 402

10%

2

1

C7211

25V X7R 402

1000PF

10%

2

1

C7212

1000PF

25V X7R 402

10%

2

1

C7213

1000PF

25V X7R 402

10%

SYNC_DATE=08/04/2006

AUDIO: SPEAKER AMP

051-7039

97

H

SYNC_MASTER=AUDIO

72

NET_SPACING_TYPE=AUDIO

VOLTAGE=12V

12V_S5_SPKRAMP1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=3.0MM

VOLTAGE=12V

MIN_NECK_WIDTH=0.2MM

=PP12V_S5_AUDIO_SPKRAMP

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=3.0MM

GND_AUDIO_CODEC

AUD_BI_PORT_C_L

GND_AUDIO_SPKRAMP1_PLANE

AUD_SAMP1_INL_P

VOLTAGE=12V

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP12V_AUD_SPKRAMP1_PLANE

NET_SPACING_TYPE=AUDIO

=PP3V3_S0_AUDIO

AUDSAMPINLN1

AUD_SAMP1_G1

AUD_SAMP1_FS1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_MAX9714_CHOLD1

AUD_BI_PORT_B_L

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUDSAMPCPP1

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

AUDSAMPOUTLN1

NET_SPACING_TYPE=AUDIO

AUD_SAMP1_FS1 AUD_SAMP1_G2 AUD_SAMP1_G1

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

AUD_SPKR_OUTCL_P

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBL_P

NET_SPACING_TYPE=AUDIO

AUDSAMPINRN1

AUD_SAMP1_FS2

GND_AUDIO_CODEC

GND_AUDIO_SPKRAMP1_PLANE

NET_SPACING_TYPE=AUDIO

GND_AUDIO_SPKRAMP

MIN_LINE_WIDTH=3.0MM MIN_NECK_WIDTH=0.2MM

AUDSAMPINRP1

AUDSAMPINLP1

AUD_SAMP1_G2

AUDSAMPOUTLP1

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.2MM

AUDSAMPCPN1

MIN_NECK_WIDTH=0.2MM

AUDSAMPOURTP1

MIN_LINE_WIDTH=0.5MM

NET_SPACING_TYPE=AUDIO

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUDSAMPOUTRN1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTCL_N

MIN_NECK_WIDTH=0.2MM

NET_SPACING_TYPE=AUDIO MIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTBL_N

AUD_SPKRAMP_MUTE

AUD_SAMP1_FS2

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

AUD_MAX9714_VREG1

AUD_SAMP1_INR_N

AUD_SAMP1_INR_P

AUD_SAMP1_INL_N

=PP3V3_S0_AUDIO

GND_AUDIO_SPKRAMP1_PLANE

AUD_SAMP1_SHDN_L

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

NET_SPACING_TYPE=AUDIO

GND_AUDIO_SPKRAMP1_PLANE

MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.15MM

SPKRAMP1_SS

74

72

73

72

73

71

72

71

72

70

71

70

71

69

68

69

71

68

3

68

72

3

72

68

72

73

72

68

72

6

72

73

71

72

3

72

www.Vinaﬁx.vn

Preliminary

IN

TIP_DET

RING

GND_1

GND_2

LED

VCC

VIN

GND

TIP

TYPE_DET

OPTICAL

RECEIVER

VOUT

GND

VCC

GND_2

TIP_DET

RING

GND_1

TIP

TYPE_DET

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

APPLE P/N 514-0328

COMBO IN JACK

TO FHB CONNECTOR PAGE 47

SPEAKER CABLE CONNECTORS

PROPERTIES FOR ALL SPKR NETS

NC

APPLE P/N 518-0193

PROPERTIES FOR ALL SPKR NETS

TO POWER SUPPLY PAGE 6

APPLE P/N 518-0255

NC

APPLE P/N 514-0329

LINE OUT JACK

2

1

C7303

CERM 402

50V

5%

100PF

2

1

C7302

100PF

5%

50V

402

CERM

2

1

R7302

0

402

MF-LF

5%

1/16W

2

1

C7301

402

CERM

50V

5%

100PF

2

1

C7300

100PF

402

5%

CERM

50V

2

1

C7323

402

100PF

CERM

50V

5%

21

L7300

0603-LF

180-OHM-1.5A

21

L7301

0603-LF

180-OHM-1.5A

21

L7302

0603-LF

180-OHM-1.5A

21

L7303

0603-LF

180-OHM-1.5A

21

L7304

0603-LF

180-OHM-1.5A

21

L7305

0603-LF

180-OHM-1.5A

21

L7306

0603-LF

180-OHM-1.5A

21

L7307

0603-LF

180-OHM-1.5A

21

L7309

0603-LF

180-OHM-1.5A

21

L7310

0603-LF

180-OHM-1.5A

21

L7312

0603-LF

180-OHM-1.5A

21

L7313

0603-LF

180-OHM-1.5A

21

L7314

0603-LF

180-OHM-1.5A

21

L7315

0603-LF

180-OHM-1.5A

21

L7316

0603

180-OHM-1.5A

21

L7320

0603-LF

180-OHM-1.5A

21

L7323

0603-LF

180-OHM-1.5A

21

L7324

180-OHM-1.5A

0603-LF

21

L7328

0603-LF

180-OHM-1.5A

21

L7325

0603-LF

180-OHM-1.5A

2

1

C7314

5%

CERM 402

50V

100PF

21

L7317

0603-LF

180-OHM-1.5A

2

1

C7312

5% 50V CERM 402

100PF

21

L7327

0603-LF

180-OHM-1.5A

21

L7319

0603-LF

180-OHM-1.5A

21

L7318

0603-LF

180-OHM-1.5A

2

1

C7313

402

CERM

50V

5%

100PF

21

L7326

0603-LF

180-OHM-1.5A

21

XW7300

SM

42

31

DZ7301

0405

14V-15A

42

31

DZ7302

14V-15A

0405

42

31

DZ7304

14V-15A

0405

NOSTUFF

42

31

DZ7300

0405

14V-15A

42

31

DZ7303

0405

14V-15A

2

1

C7321

100PF

5% 50V CERM 402

2

1

C7322

100PF

50V

402

CERM

5%

2

1

C7318

1UF

10%

CERM

10V

805

21

C7326

10V

20%

0.1UF

402

CERM

21

R7306

1/16W MF-LF

5%

39

402

21

L7381

180-OHM-1.5A

0603-LF

2

1

C7317

20%

402

10V

0.1UF

CERM

21

L7380

0603-LF

180-OHM-1.5A

2

1

C7380

402

CERM

50V

5%

100PF

21

R7305

0

1/16W MF-LF

5%

402

7

8

6

5

4

3

2

13

12

11

10

1

9

J7303

OPTI-AUD-OUT-JCK-M51

F-ANG-TH

CRITICAL

9

7

6

5

4

3

2

13

12

11

10

1

8

J7300

OPTI-AUD-IN-JCK-M51

CRITICAL

F-ANG-TH

43

21

J7301

M-RT-TH

87833-0431

CRITICAL

65

43

21

J7302

87833-0631

CRITICAL

M-RT-TH

2

1

C7315

5%

CERM

50V

402

100PF

2

1

C7311

402

100PF

CERM

50V

5%

73

051-7039

97

H

SYNC_MASTER=AUDIO

SYNC_DATE=08/04/2006

AUDIO: CONNECTORS

PP3V3_AUDIO_SPDIF_JACK

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_L_JACK

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MM

AUD_LO_GND

GND_CHASSIS_AUDIO_EXTERNAL

GND_AUDIO_CODEC_EMI1

AUD_LO_DET2_EMI

MIN_LINE_WIDTH=0.3MM

PP3V3_AUDIO_SPDIF_EMI

MIN_NECK_WIDTH=0.2MM

AUD_LO_R_JACK

MIN_LINE_WIDTH=0.3MM

AUD_LO_GND_JACK

GND_CHASSIS_AUDIO_INTERNAL

AUD_SPDIF_OUT_JACK

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N_EMI

AUD_LO_DET2_JACK

MIN_LINE_WIDTH=0.5MM

MIN_NECK_WIDTH=0.3MM

AUD_LO_DET1_JACK

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.3MM

AUD_LI_GND_EMI

MIN_NECK_WIDTH=0.2MM

AUD_LI_R_EMI

MIN_LINE_WIDTH=0.3MM

AUD_MIC_IN_P_CONN

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LI_DET_EMI

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_P_EMI

AUD_SPKR_OUTCL_N

AUD_LI_L

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LI_L_EMI

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LO_R

=PP3V3_S0_AUDIO

AUD_SPDIF_OUT

AUD_SPKR_OUTBL_P

AUD_SPKR_OUTCL_P

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.2MM NET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTBL_N

AUD_SPKR_OUTCR_N

AUD_LO_DET1

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LI_R

AUD_LO_DET1_EMI

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LO_R_EMI

MIN_LINE_WIDTH=0.25MM

AUD_SPDIF_GND

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_LO_GND_EMI

MIN_NECK_WIDTH=0.3MM

NET_SPACING_TYPE=AUDIO

GND_AUDIO_MIC_CONN

AUD_LO_GND_PRB

AUD_LO_DET2

AUD_LO_L

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

MIN_LINE_WIDTH=0.5MM

AUD_LI_GND

MIN_NECK_WIDTH=0.3MM

AUD_LI_DET_H

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_MIC_IN_N

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_P

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N_CONN

AUD_SPDIF_GND

PP3V3_AUDIO_SPDIF_JACK

NC_AUD_LI_TYPE_JACK

MIN_NECK_WIDTH=0.2MM

AUD_LO_L_EMI

MIN_LINE_WIDTH=0.3MM

AUD_SPDIF_IN

AUD_SPKR_OUTBR_P

NC_J7302_3

AUD_SPKR_OUTBR_N

NC_J7302_6

AUD_SPKR_OUTCR_P

NET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

AUD_SPDIFIN_JACK

AUD_LI_GND_JACK

MIN_NECK_WIDTH=0.3MM

MIN_LINE_WIDTH=0.5MM

AUD_LI_R_JACK

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

GND_CHASSIS_AUDIO_EXTERNAL

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.2MM

AUD_LI_L_JACK

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.3MM

AUD_LI_DET_JACK

74 72

74

71

74

73

68

73

70

6

47

72

69

70

3

68

72

71

74

69

73 70

74

70

69

74

47

73

68

71

5

71

5

71

6

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MUTE CONTROL

PLACE NEAR HEADPHONE PORT

GPIO 1

0X14(D)

PORT A (LI) PLUG DETECT

PORT D/G (LO/DIG_OUT) PLUG DETECT (G TELLS H TO COME ON)

80% 50%

VREF

PIN 0X16H

DETECT DELEGATE

GPIO 0

PORT

PIN=0X1E

CONVERTER=0X06

PIN COMPLEX

PLACE ACROSS GROUND SPLIT

PLACE AT J7303

AUDIO GROUND RETURNS

VOLUME

0X0F

0X0D

0X0C

DAC

0X05

0X03

LINE OUT

FUNCTION

NC

NC NC

SPDIFOUT

FUNCTION

ADC

0X08

0X07

0X23

0X24

MIXER

LINE INPUT

0X19(F) 0X15(A) PIN=0X1F

SPDIFIN

0X1A(C)

0X18(B)

SPKR AMP

0X02

CONVERTER=0X0A

PLACE NEXT TO L6800

CODEC INPUT SIGNAL PATHS

CODEC OUTPUT SIGNAL PATHS

SPKR AMP1

MIC INPUT

MICROPHONE IMPEDANCE MATCHING CIRCUIT

21

R7412

402

1/16W

0

MF-LF

5%

NOSTUFF

2

1

R7405

MF-LF

1%

402

39.2K

1/16W

2

1

3

Q7401

2N7002

SOT23-LF

2

1

C7401

402

10V CERM

20%

0.1UF

21

R7404

402

5%

MF-LF

1/16W

47K

2

1

R7409

270K

5%

MF-LF 402

1/16W

2

1

C7400

402

CERM

0.1UF

20% 10V

21

R7400

47K

402

5% 1/16W MF-LF

2

1

C7402

0.1UF

CERM

20% 10V

402

21

R7408

1/16W

402

MF-LF

5%

47K

2

1

R7420

1/16W

402

5%

100K

MF-LF

2

1

R7413

402

1/16W MF-LF

5%

470K

21

C7419

402

X5R

16V

10%

0.1UF

21

XW6800

SM

2

1

R7427

1/16W MF-LF

2.2K

402

5%

2

1

R7426

MF-LF

100K

402

1/16W

5%

21

R7425

5%

MF-LF

1/16W

330

402

2

1

C7418

1000PF

402

X7R

25V

10%

1

2

6

Q7400

2N7002DW-X-F

SOT-363

4

5

3

Q7400

SOT-363

2N7002DW-X-F

21

R7429

NOSTUFF

0

805

1/8W

MF-LF

5%

21

R7407

100K

1/16W MF-LF

5%

402

4

5

3

Q7402

SOT-363

2N7002DW-X-F

1

2

6

Q7402

SOT-363

2N7002DW-X-F

2

1

R7431

MF-LF

1% 1/16W

402

5.11K

2

1

R7430

1%

402

1/16W MF-LF

10K

2

1

C7435

16V

220UF

20%

ELEC

SM-CASE-C1

21

XW7400

OMIT

SM

21

XW7401

OMIT

SM

21

XW7402

SM

OMIT

21

R7435

2.2K

1/16W MF-LF

5%

402

SYNC_DATE=08/04/2006

SYNC_MASTER=AUDIO

051-7039

97

H

74

AUDIO: POWER SUPPLIES

GND_AUDIO_CODEC

AUD_VREF_PORT_F_RC

AUD_VREF_PORT_F

AUD_LO_GND

GND_AUDIO_CODEC

=PP3V3_S0_AUDIO

GND_AUDIO_CODEC

AUD_LI_DET_H

AUDLINDETH

=PP3V3_S0_AUDIO

AUD_BI_PORT_F_L

AUD_MIC_P1

AUD_SENSE_A

GND_AUDIO_CODEC

AUD_LO_DET1_1

AUD_LO_DET2_1

AUD_LO_DET1

=PP3V3_S0_AUDIO

AUD_LO_DET2

AUD_PORT_G_DET_LAUD_PORT_D_DET_L

AUD_LO_DET1_1

AUD_TYPE_DET_EN

GND_CHASSIS_AUDIO_EXTERNAL

GND_AUDIO_CODEC

NET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N

AUD_MIC_IN_P

NET_SPACING_TYPE=AUDIO

AUD_PORT_A_DET_L

AUD_SENSE_A

AUD_LO_DET1_INV

AUD_SENSE_B

GND_AUDIO

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0V

MIN_NECK_WIDTH=0.25MM

NET_SPACING_TYPE=AUDIO

GND_AUDIO_CODEC

GND_AUD_LOAMP_CHGPMP

GND_CHASSIS_AUDIO_EXTERNAL

74

72

73

72

73

72

73

72

71

72

71

72

71

72

71

70

71

70

71

70

71

74

70

74

69

73

69

68

69

68

74

69

68

73

69

74

69

73

68

70

68

3

68

73

3

68

74

73

3

73

74

6

68

73

68

6

68

70

6

www.Vinaﬁx.vn

Preliminary

TPAD

VSS

BOOT2

BOOT1

PHASE1

UGATE1

LGATE1

PGND1

ISEN1

UGATE2

PHASE2

LGATE2

PVCC

VDDVIN

PGND2

VID6

VID5

VID4

VID2

VID3

VID1

VID0

ISEN2

VSUM

OCSET

VO

DROOP

DFB

VSEN

RTN

DPRSTP*

DPRSLPVR

PSI*

PGD_IN

3V3

CLK_EN*

PGOOD

VR_ON

NTC

VR_TT*

SOFT

RBIAS

VDIFF

FB2

FB

COMP

VW

NC

IN

OUT

IN

OUT

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

0

ROUTE AS 18MIL WIDE, 7MIL SPACE

CPU_VCCSENSE_P & N ARE DIFF PAIRS

1-Phase DCM

(IMVP6_PHASE2)

IMVP6 CPU VCORE REGULATOR

(IMVP6_ISEN1)

(GND)

CLOSE TO CPU

PLACE R7526

LAYOUT NOTE:

1

Operation Mode

1

Note 1: C7532,C7533 = 27.4 Ohm For Validating CPU Only.

(IMVP6_VO)

DPRSLPVR

NTC

*NEED TO CHANGE R7531 TO NTC ERT-J1VR103J PANASONIC

ERT-J1VR103J

FROM 1.5V AND 1.05V VREGS

(GND)

(IMVP6_VW)

(IMVP6_FB)

(IMVP6_COMP)

MIN_NECK_WIDTHMIN_LINE_WIDTHMIN_NECK_WIDTHMIN_LINE_WIDTH

(IMVP6_ISEN2)

(IMVP6_VSUM)

(IMVP6_VO)

MIN_LINE_WIDTH

MIN_NECK_WIDTH

PSI*

DPRSTP*

1

FROM SMC

2-Phase CCM

(IMVP6_PHASE1)

11

1-Phase CCM

NO STUFF THIS

CAP IF USING YONAH

44A MAX CURRENT

2

1

C7500

402

NO STUFF

0.0022UF

50V CERM

10%

2

1

R7503

MF-LF

1/4W

5%

1.0

1206

2

1

C7512

50V

4700PF

603

CERM

10%

2

1

C7590

NO STUFF

0.0022UF

50V

402

CERM

10%

21

R7500

1/16W

1%

10K

402

MF-LF

21

C7503

0.22uF

CERM-X5R 402

6.3V

10%

2

1

XW7503

SM

2

1

XW7504

SM

9

19

21

14

5

44

18

20

43 42

41

40 39

38 37

13

22

27

35

49

7

15

4

31

2

28

34

1

29

33

3

8

6

25

30

32

23

24

12 11

16

46 45

17

10

47

26

36

48

U7500

OMIT

QFN

ISL6262

2

1

C7515

603

X5R

25V

0.22UF

20%

2

1

XW7501

SM

2

1

XW7502

SM

21

R7505

1/16W

10K

402

1%

MF-LF

21

C7504

CERM-X5R

6.3V

402

0.22uF

10%

2

1

C7511

603

4700PF

50V CERM

10%

2

1

R7502

5%

1.0

1206

MF-LF

1/4W

2

1

C7502

50V

0.0022UF

402

NO STUFF

CERM

10%

2

1

C7592

402

0.0022UF

NO STUFF

50V CERM

10%

2

1

C7527

0.22UF

20% 25V X5R

603

21

R7520

MF-LF 402

1/16W

1%

10

21

R7512

MF-LF 402

1/16W

1%

10

2

1

C7526

X5R 603

25V

1uF

10%

2

1

C7596

X5R

0.1uF

402

16V

10%

21

R7521

10

1%

MF-LF

1/16W

402

2

1

C7530

0.1uF

X5R 402

16V

10%

21

R7519

1%

1/16W MF-LF

402

499

2

1

C7507

50V

5%

47PF

402

CERM

2

1

R7510

4.42K

MF-LF 402

1% 1/16W

2

1

C7535

603

20%

6.3V

4.7uF

CERM

2

1

D7500

SMB

B340LBXF

2

1

D7501

SMB

B340LBXF

21

R7595

0

21

R7593

0

21

R7591

0

21

R7596

0

21

R7594

0

21

R7592

0

21

R7590

0

2

1

C7508

22UF

20%

X7R 1210

16V

21

R75A0

MF-LF

1/16W

1%

402

499

21

R7527

402

MF-LF

1/16W

1%

4.02K

21

C7510

402

0.01uF

16V

CERM

10%

21

R7508

1/16WMF-LF

1%402

147K

21

R7513

MF-LF

1/16W

2.0K

NO STUFF

1%

402

2

1

C7506

402

50V

470pF

CERM

10%

2

1

R7511

1.40K

MF-LF 402

1% 1/16W

2

1

R7509

1/16W

1%

402

MF-LF

1.82K

2

1

C7513

390pF

402

50V CERM

10%

2

1

C7514

402

470PF

50V CERM

10%

2

1

R7514

402

1/16W MF-LF

180K

5%

2

1

R7504

1/16W MF-LF

5%

402

1

2

1

R7507

MF-LF

1/16W5%402

1

2

1

C7516

0.001uF

NO STUFF

50V

402

CERM

10%

2

1

R7516

11.5K

MF-LF

1/16W

1%

402

21

R7517

402

MF-LF

1% 1/16W

5.76K

2

1

C7529

50V

5%

180pF

402

CERM

2

1

R7518

1/16W MF-LF

1K

1%

402

2

1

R7530

MF-LF 402

1/16W

1%

2.61K

2

1

R7515

11K

402

1% 1/16W MF-LF

2

1

C7528

0.33uF

402

6.3V CERM-X5R

10%

2

1

C7534

0.033UF

402

X5R

16V

10%

2

1

R7522

0

402

MF-LF

1/16W

5%

21

C7531

0.01uF

402

16V CERM

10%

21

C7532

402

NO STUFF

0.01uF

16V CERM

10%

2

1

R7523

0

1/16W MF-LF

5%

402

21

C7533

402

0.01uF

16V CERM

10%

21

C7521

402

6.3V

20% X5R

0.22UF

2

1

XW7500

SM

2

1

R7501

MF-LF

1% 1/10W

603

3.65K

2

1

R7506

603

1/10W

1%

3.65K

MF-LF

21

C7505

0.01uF

402

16V

CERM

10%

21

R7531

CRITICAL

0603-LF

10KOHM-5%

21

L7500

CRITICAL

SM

0.36UH-30A-0.80MOHM

21

L7501

CRITICAL

SM

0.36UH-30A-0.80MOHM

2

1

C7501

X7R

20%

22UF

1210

16V

2

1

C7517

CRITICAL

20%

1000UF

ELEC TH-KZJ-LF

16V

2

1

C7509

CRITICAL

1000UF

ELEC TH-KZJ-LF

20% 16V

2

1

C7550

1000UF

CRITICAL

TH-KZJ-LF

20%

ELEC

16V

2

1

C7551

20% X7R

22UF

1210

16V

2

1

C7579

TH

20%

POLY

2.5V

680UF

CRITICAL

2

1

C7578

CRITICAL

TH

POLY

2.5V

680UF

20%

2

1

C7577

TH

CRITICAL

680UF

POLY

2.5V

20%

3

1

4

Q7500

CRITICAL

TO-252AA

IRLR7821PBF

3

1

4

Q7501

TO-252AA

CRITICAL

IRLR7843PBF

3

1

4

Q7504

CRITICAL

TO-252AA

IRLR7843PBF

3

1

4

Q7502

TO-252AA

IRLR7821PBF

CRITICAL

3

1

4

Q7503

CRITICAL

TO-252AA

IRLR7843PBF

3

1

4

Q7505

CRITICAL

TO-252AA

IRLR7843PBF

2

1

C7552

X7R

20%

22UF

1210

16V

2

1

C7554

X7R

20%

22UF

1210

16V

2

1

C7553

20% X7R

22UF

1210

16V

21

R7540

603

MF-LF

1/10W

1%

10K

2

1

R7541

603

MF-LF

1/10W

1%

10K

2

1

C7580

680UF

2.5V POLY

20%

TH

CRITICAL

MEROM

21

R7526

470K

1% 1/16W MF-LF

402

21

R7534

5%

0

402

1/16W MF-LF

21

R7535

MF-LF

1/16W

402

5%

0

21

R7532

0

5%

402

1/16W MF-LF

21

R7533

MF-LF

1/16W

402

5%

0

NOSTUFF

051-7039

H

75 97

IMVP6 CPU VCore Regulator

SYNC_MASTER=M51_PAUL SYNC_DATE=08/04/2006

PPVCORE_CPU

IMVP6_NTC

IMVP6_NTC_R

R7504_1

R7507_1

IMVP6_VSUM_R1

MIN_LINE_WIDTH=0.25 MM

PP3V3_S0_IMVP6_3V3

MIN_NECK_WIDTH=0.2 MM

PP12V_S5_CPU_REG

IMVP6_FET_RC1

IMVP6_COMP_RC

IMVP6_VR_TT

IMVP_VID<1>

0.25 MM 0.25 MM

IMVP6_RTN

0.20 MM0.25 MM

IMVP6_VDIFF

0.20 MM0.25 MM

IMVP6_RBIAS

0.20 MM0.25 MM

IMVP6_SOFT

0.20 MM0.25 MM

IMVP6_DROOP

0.20 MM0.25 MM

IMVP6_VO

0.20 MM0.25 MM

IMVP6_VSUM

0.20 MM0.25 MM

IMVP6_OCSET

IMVP6_DFB

0.25 MM0.25 MM

IMVP6_FET_RC1

0.25 MM0.25 MM

IMVP6_VSUM_R1

0.25 MM0.25 MM

R7504_1

0.25 MM

1.5 MM

IMVP6_LGATE1

0.25 MM0.25 MM

IMVP6_ISEN1

0.25 MM

1.5 MM

IMVP6_UGATE1

0.25 MM0.25 MM

IMVP6_BOOT1

0.25 MM

1.5 MM

IMVP6_PHASE1

0.25 MM0.25 MM

IMVP6_UGATE2

IMVP6_RBIAS

CPU_VID<1>

CPU_VID<3>

CPU_VID<5>

CPU_VID<0>

CPU_VID<2>

CPU_VID<4>

CPU_VID<6>

VR_PWRGOOD_DELAY

IMVP_VR_ON

VR_PWRGD_CK410_L

IMVP_PGD_IN

CPU_PSI_L

CPU_DPRSTP_L

0.25 MM0.25 MM

IMVP6_VSEN

0.25 MM0.25 MM

IMVP6_VW

0.20 MM0.25 MM

IMVP6_COMP

0.20 MM0.25 MM

IMVP6_FB

PM_DPRSLPVR

IMVP6_FET_RC2

IMVP_DPRSLPVR

IMVP6_DROOP

GND_IMVP6_SGND

0.20 MM0.25 MM

IMVP6_DFB

IMVP_VID<0>

IMVP_VID<3>

IMVP_VID<4>

IMVP6_SOFT

IMVP6_COMP

0.20 MM0.25 MM

IMVP6_FB2

0.20 MM0.50 MM

GND_IMVP6_SGND

IMVP6_UGATE2

IMVP6_OCSET

IMVP6_LGATE2

IMVP_VID<5>

IMVP6_FB2

0.25 MM0.25 MM

IMVP6_LGATE2

IMVP_VID<2>

GND_IMVP6_SGND

IMVP6_VSUM_R2

IMVP6_VDIFF_RC

IMVP6_VDIFF

=PP3V3_S0_IMVP

0.25 MM0.25 MM

R7507_1

0.25 MM0.60 MM

IMVP6_VSUM_R2

0.25 MM0.25 MM

IMVP6_FET_RC2

0.25 MM0.25 MM

IMVP6_ISEN2

0.25 MM0.25 MM

IMVP6_BOOT2

0.25 MM0.25 MM

IMVP6_PHASE2

PP12V_S5_CPU_REG

IMVP6_ISEN1

IMVP6_FB

IMVP6_VW

GND_IMVP6_SGND

CPU_VCCSENSE_N

CPU_VCCSENSE_P

IMVP6_VSEN

IMVP6_RTN

IMVP6_VO_R

IMVP6_ISEN2

IMVP6_VSUM

IMVP6_VO

IMVP_VID<6>

IMVP6_LGATE1

IMVP6_UGATE1

PP5V_S0_IMVP6_VDD

MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=5V

MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM

PPVIN_S5_IMVP6_VIN

IMVP6_PHASE1

IMVP6_PHASE2

IMVP6_BOOT2

IMVP6_BOOT2_R

IMVP6_BOOT1

IMVP6_BOOT1_R

PP12V_S5_CPU_REG

PP5V_S0

PP5V_S5

PP5V_S0_IMVP6_PVCC

MIN_LINE_WIDTH=0.25 MM MIN_NECK_WIDTH=0.2 MM

VOLTAGE=5V

83 82 80 79

97

78

83

77

76

26

21

23

59

5

75

76

8

14

7

14

76

75

76

75

5

3

75

3

75

5

58

26

77

7

5

75

5

75

3

75

3

75

8

75 75

75

3

www.Vinaﬁx.vn

Preliminary

G

D

S

D

G

S

VIN

IOUT

LOADNC

GND

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SYSTEM VOLTAGE SENSE

(SCALING 12V INPUT VOLTAGE TO SMC)

.010753 A/COUNT

PCB: PLACE D7599, C7599, R7597 WITHIN 1" OF SMC (U5800)

0 TO 3.3V

COUNT

CPU CURRENT SENSE CALIBRATION CIRCUIT

PCB:KEEP SHORTS NEXT TO U7602

PCB: PLACE R7602, C7602 WITHIN 1" OF SMC (U5800)

ADC IS 10BIT 0 TO 1023

PCB:PLACE D7650,R7652,C7650 BY SMC

PROCESSOR VCORE SENSE

1 MS TIME CONSTANT SO SMC ADC SAMPLING

SYSTEM CURRENT SENSE

SMC PWRGD PULLUP

0 TO 3.3V

PCB: PLACE R7612, C7612 WITHIN 1" OF SMC (U5800)

(MEASURING DC/DC INDUCTOR DCR TO DERIVE CPU CURRENT)

PROCESSOR VCORE CURRENT SENSE

TO SMC

SCALE

COUNT

3.33333 A/V

WORKS WELL.

4 V/V

SCALE

PCB: PLACE R7655, C7651 WITHIN 1" OF SMC (U5800)

Switches in fixed load on power supplies to calibrate current sense circuits

.0129 V/COUNT

ADC IS 10BIT 0 TO 1023

2

1

R7640

5% 1/16W MF-LF

100K

402

CPU_PWR_SENSE

21

R7607

5%

402

MF-LF

1/16W

0

CPU_PWR_SENSE

21

R7604

5% 1/16W MF-LF

402

NOSTUFF

0

2

1

3

Q7639

2N7002

SOT23-LF

CPU_PWR_SENSE

2

1

3

Q7640

NTR4101P

SOT-23

CPU_PWR_SENSE

2

1

R7639

1/16W MF-LF 402

5%

10K

CPU_PWR_SENSE

2

1

R7641

5%

10K

CPU_PWR_SENSE

1/16W MF-LF 402

21

R7659

402

1/16W

5%

0

CPU_PWR_SENSE

MF-LF

21

R7605

402

1%

MF-LF

1/16W

40.2K

CPU_PWR_SENSE

21

R7606

402

1%

1/16W

40.2K

CPU_PWR_SENSE

MF-LF

2

5

1

4

3

U7600

LMV2011MF

SOT23-5

CPU_PWR_SENSE

CRITICAL

21

R7669

5%

0

1/16W MF-LF

402

CPU_PWR_SENSE

21

R7652

1%

4.53K

1/16W MF-LF

402

SYS_PWR_SENSE

21

XW7650

SM

OMIT

21

R7650

1W

1%

2010

CRITICAL

MF

0.005

SYS_PWR_SENSE

2

1

C7650

402

20%

X5R

6.3V

0.22UF

SYS_PWR_SENSE

2

1

R7651

402

1%

SYS_PWR_SENSE

5.90K

1/16W MF-LF

21

R7655

1/16W MF-LF

402

1%

SYS_PWR_SENSE

4.53K

2

1

C7651

0.22UF

20%

6.3V

402

SYS_PWR_SENSE

X5R

2

1

R7653

402

SYS_PWR_SENSE

1% 1/16W MF-LF

6.04K

2

1

R7654

SYS_PWR_SENSE

2.0K

1% 1/16W

402

MF-LF

21

R7600

402

MF-LF

1/16W

1M

1%

CPU_PWR_SENSE

4

15

3

2

U7602

CRITICAL

SOT23-5

ZXCT1010

SYS_PWR_SENSE

21

R7656

100

1%

1/16W

402

MF-LF

SYS_PWR_SENSE

3

1

D7650

NOSTUFF

SOT23-LF

BAS16-75V-0.25A

21

C7600

10%

470PF

402

CERM

50V

CPU_PWR_SENSE

2

1

C7603

10% 50V CERM 402

470PF

CPU_PWR_SENSE

2

1

R7603

1M

MF-LF

1/16W

402

1%

CPU_PWR_SENSE

21

C7601

402 10V

CERM

20%

CPU_PWR_SENSE

0.1UF

21

R7602

MF-LF

CPU_PWR_SENSE

1/16W

4.53K

402

1%

2

1

C7602

402

X5R

6.3V

20%

CPU_PWR_SENSE

0.22UF

21

R7612

402

1%

MF-LF

1/16W

4.53K

CPU_PWR_SENSE

2

1

C7612

6.3V

20%

0.22UF

CPU_PWR_SENSE

X5R 402

2

1

R7623

1/16W

10K

402

MF-LF

1%

21

R7620

402

MF-LF

5%

0

1/16W

NOSTUFF

2

1

R7643

1%

1206

MF-LF

1/4W

1.00

CPU_PWR_SENSE

65321

4

7

Q7641

CPU_PWR_SENSE

SUPERSOT-6

FDC796N

CRITICAL

2

1

R7642

CPU_PWR_SENSE

402

MF-LF

1/16W

5%

470K

CPU & SYSTEM SENSE

SYNC_MASTER=M51_DAVE

SYNC_DATE=(MASTER)

9776

H

051-7039

PP12V_S0_B

PP12V_S5

MIN_LINE_WIDTH=0.50 mm MIN_NECK_WIDTH=0.20 mm

CPUVCORE_ISENSE_CAL

=PPVCORE_S0_CPU

CPU_ISENSE_R_NEG

PP3V3_S0

GND_SMC_AVSS

ISENSE_CAL_EN_LS12V

GND_SMC_AVSS

SMC_PBUS_VSENSE

SMC_DCIN_ISENSE

IMVP6_VO

SMC_CPU_ISENSE

SMC_CPU_VSENSE

PPVCORE_CPU

RSMRST_PWRGD

PP3V3_S0

ISENSE_CAL_EN

IMVP6_VO_R_OA

PP3V3_S5

SYS_POWERFAIL_L

IMVP6_DROOP

IMVP6_DROOP_R

ISENSE_CAL_EN_L_R

GND_SMC_AVSS

SYSTEM_SENSE_SET

MIN_LINE_WIDTH=0.20 MM

ISENSE_CAL_EN_L

MIN_NECK_WIDTH=0.20 MM

GND_NEXT_TO_SMC

SMC_SYSTEM_VSENSE_R

CPU_ISENSE_OUT_R

CPU_ISENSE_R_POS

MIN_LINE_WIDTH=0.20 MM

GND_CPU_ISENSE_OPAMP

MIN_NECK_WIDTH=0.25MM VOLTAGE=12V

PP12V_S5_AC_DC

MIN_LINE_WIDTH=0.60MM

SYSTEM_SENSE_I_R

PP12V_S5

SYSTEM_DCIN_SENSE

84

83

80

76

79

83

45

78

83

82

41

77

82

80

27

66

80

79

26

65

79

78

10

84

10

26

84

78

77

9

6

76

75

6

82

76

77

83

76

8

5

59

5

58

5

78

59

76

3

58

75

58

3

58

3

5

3

6

75 58

58

59

6

3

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ALL AND GATE INPUTS ARE 7V TOLERANT REGARDLESS OF INPUT POWER

SILKSCREEN:SYS_PWRGD

put here to stay in sync with M50 on page 82

two additional caps to increase ripple margin

1

2

6

Q7703

2N7002DW-X-F

SOT-363

2

1

R7793

10K

5% 1/16W MF-LF 402

2

1

R7794

NOSTUFF

5% 1/16W MF-LF 402

10K

4

5

3

Q7703

2N7002DW-X-F

SOT-363

21

C7710

0.1UF

10V

21

C7711

0.1UF

10V

21

C7712

0.1UF

10V

5

4

1

2

3

U7710

SOT23-5-LF

MC74VHC1G08

5

4

1

2

3

U7712

MC74VHC1G08

SOT23-5-LF

5

4

1

2

3

U7711

SOT23-5-LF

MC74VHC1G08

2

1

R7700

330

603

MF-LF

1/10W

5%

DEVELOPMENT

2

1

LED7700

GREEN-3.6MCD

2.0X1.25MM-SM

SYS_PWRGD_LED_R

DEVELOPMENT

2

1

R7701

5% 1/16W MF-LF 402

10K

DEVELOPMENT

2

1

3

Q7700

2N7002

SOT23-LF

DEVELOPMENT

2

1

R7795

10K

402

MF-LF

1/16W

5%

21

C7713

10V

0.1UF

5

4

1

2

3

U7713

MC74VHC1G08

SOT23-5-LF

21

R7705

33

1/16W MF-LF

5%

402

2

1

C7700

10uF

20%

6.3V CERM 805-1

2

1

C7701

10uF

20%

6.3V CERM 805-1

PWR GOOD

H

SYNC_MASTER=M51_PAUL SYNC_DATE=08/04/2006

051-7039

77 97

PM_SLP_S4

pp5v_s5

SYS_PWRUP_L

MAKE_BASE=TRUE

ALL_SYS_PWRGD

PP3V3_S5

PP12V_S5

PM_SLP_S3_L

PGOOD_PP2V5_S0

SYS_PWRGD_LED

ALL_SYS_PWRGD

PP3V3_S5

PP12V_S5

PP3V3_S5

PM_SLP_S4_L

PP3V3_S5

PGOOD_PP0V9_S0

PP3V3_S5

PGOOD_PP1V05_S0

PGOOD_PP1V5_S0

PM_PWROK

PP3V3_S5

imvp_pgd_in_r

IMVP_PGD_IN

MOST_SYS_PWRGD

PGOOD_PP1V8_S3

83

80

79

83

78

82

77

83

77

83

77

80

76

82

76

82

76

79

66

80

66

80

66

78

84

65

79

80

84

65

79

65

75

77

26

78

79

77

26

78

26

59

58

6

77

58

6

77

6

58

6

83

5

26

5

76

23

26

5

76

5

23

5

79

3

83

5

3

5

78

5

3

5

3

79

3

80

3

75

79

www.Vinaﬁx.vn

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

GND

V+

LM339A

GND

V+

LM339A

D

G

S

D

G

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

2.50V NOMINAL

3.35V NOMINAL

SB=0.500A

2.5V S5

VREF = 0.800V TYP

0.784V MIN

0.816V MAX

(R1)

(R2)

POWER BUDGET

MISC=1.500A

TOTAL=4.000A

3.3V S5

SPARE COMPARATOR

2.219V

TOTAL=0.426A

YUKON=0.426A

POWER BUDGET

VOUT=VREF*(1+R2/R1)

5% OK ON R7801?

PANEL=1.000A

AIRPORT=1.000A

3.3V AND 2.5V S5 REGULATOR

21

L7803

TH1

CRITICAL

3.0UH

2

1

C7853

1000UF

TH-KZJ-LF

ELEC

20%

CRITICAL

16V

21

C7801

0.1UF

25V

20%

603

CERM

2

1

C7813

805-1

6.3V

20%

10UF

CERM

2

1

C7814

805-1

6.3V

20%

10UF

CERM

2

1

C7815

6.3V

CRITICAL

TH-KZJ-LF

ELEC

20%

1800UF

2

1

R7899

402

1/16W

5%

MF-LF

22

2

1

C7807

402

0.01UF

16V CERM

10%

2

1

R7803

MF-LF

1/16W

1%

402

1.24K

2

1

R7801

392

402

1/16W MF-LF

1%

2

1

R7802

5.11

1/4W

1%

MF-LF 1206

2

1

C7809

1206

50V

5%

1000PF

CERM

2

1

C7802

25V X7R 402

1000PF

10%

21

C7808

402

0.047UF

16V

CERM

10%

21

R7840

1/16W

5%

MF-LF

402

2.2

21

C7892

603

X5R

25V

1UF

10%

2

1

C7800

1UF

402

6.3V CERM

10%

2

1

R7805

1%

10

MF-LF 402

1/16W

2

1

C7823

1000PF

402

X7R

25V

10%

2

1

C7820

X5R

6.3V

20%

22UF

805

21

C7806

560PF

402

50V

CERM

10%

21

R7804

MF-LF

1/16W

1%

8.06K

402

9

87

14

17

10

13

12

11

4

3

16

2

6

1

15

5

U7800

ISL6549

CRITICAL

QFN

2

1

XW7800

SM

2

1

C7803

4.7UF

20%

6.3V

603

CERM

2

1

C7824

nostuff

402

X7R

25V

1000PF

10%

2

1

R7821

402

2.7K

5% 1/16W MF-LF

2

1

R7820

1K

402

MF-LF

1/16W

1%

2

1

R7822

470

402

1/16W

1%

MF-LF

2

1

C7826

805-1

20%

6.3V

10UF

CERM

2

1

R7892

402

MF-LF

1/16W

5%

100K

2

1

3

Q7802

2N7002

SOT23-LF

NOSTUFF

2

1

C7821

805-1

20%

6.3V

10UF

CERM

2

1

C7825

805-1

20%

6.3V

10UF

CERM

2

1

C7822

805-1

20%

6.3V

10UF

CERM

5

4

3

2

1

D7800

CTLSH3-30M833

TLM833

nostuff

2

1

R7810

10K

1% 1/16W MF-LF 402

21

C7880

0.1UF

402

10V

20%

CERM

2

1

R7811

2.49K

1% 1/16W MF-LF 402

2

1

R7812

5.11K

1/16W MF-LF 402

1%

3

14

9

8

12

U7810

SOI-LF

3

13

11

10

12

U7810

SOI-LF

321

4

8765

Q7803

CRITICAL

SO-8

IRF1902PBF

3

1

4

Q7800

TO-252AA

CRITICAL

IRLR7807Z

3

1

4

Q7801

IRLR7807Z

TO-252AA

CRITICAL

2

1

C7811

1210

10UF

10% 16V X5R-CERM

SYNC_MASTER=M51_PAUL

3V DC/DC 2.5V

9778

H

051-7039

SYNC_DATE=08/04/2006

PAGE_BORDER=TRUE

TRUE

PP3V3_S5

PP12V_S5

3V3REG_FB

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

3V3REG_GND

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0 V

PP2V5_S5

2V5_LDODR_C

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_PVCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

3V3REG_LGATE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

3V3REG_SWITCHNODE

MIN_LINE_WIDTH=0.6MM

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_LDO_FB

3V3REG_COMP

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_FB_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

2V2_REF

PP3V3_S5

MIN_LINE_WIDTH=0.6MM

3V3REG_BOOT_R

MIN_NECK_WIDTH=0.25MM

3V3REG_BOOT

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_COMP_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

SYS_POWERFAIL_L

3V3REG_VCC5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

3V3REG_SNUB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PGOOD_PP2V5_S0

3V3REG_FS_DIS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

3V3REG_LDO_DR

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

=PP3V3_S5_2V5_LDO

PP5V_S5

PP2V5_S0

MIN_LINE_WIDTH=0.6MM

3V3REG_UGATE

MIN_NECK_WIDTH=0.25MM

83

80

79

78

83

77

82

76

83

76

80

66

82

66

79

65

80

65

77

26

79

26

75

6

77

83

6

82

59

83

5

76

5

76

5

78

3

6

77

3

www.Vinaﬁx.vn

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

GND

V+

LM339A

GND

V+

LM339A

D

G

S

D

G

S

GND

V+

LM339A

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

AVE=0.3A

PEAK=0.4A

M51

POWER BUDGET

TOTAL=6.3A

PP1V8_S3

POWER BUDGET

0.723V

NEAR VREG

PLACE LED

PP1V8_S3

VREF = 0.800V TYP

(R2)

(R1)

1.8V S3

0.816V MAX

0.784V MIN

1.21V NOMINAL

1.81V NOMINAL

VOUT=VREF*(1+R2/R1)

1.2V S3

PEAK=14.5A

1.21V

1.8V AND 1.2V S3 REGULATOR

2

1

R7912

2.7K

5% 1/16W MF-LF 402

2

1

R7911

1% 1/16W MF-LF 402

5.49K

2

1

R7910

10K

1%

MF-LF 402

1/16W

2

1

R7913

402

MF-LF

1/16W

1%

10K

2

1

R7914

8.45K

1% 1/16W MF-LF 402

2

1

R7915

402

MF-LF

1/16W

1%

2.37K

2

1

R7999

402

1/16W

5%

MF-LF

22

2

1

R7903

1.24K

402

1% 1/16W MF-LF

2

1

C7907

0.01UF

402

16V CERM

10%

2

1

R7901

953

MF-LF

1/16W

1%

402

2

1

R7902

5.11

1/4W

1%

MF-LF 1206

2

1

C7909

5%

1000PF

50V

1206

CERM

21

C7908

402

0.047UF

16V

CERM

10%

21

R7940

2.2

1/16W

402

MF-LF

5%

21

C7906

50V

560PF

402

CERM

10%

2

1

C7900

402

1UF

6.3V CERM

10%

2

1

R7905

1%

402

MF-LF

1/16W

10

21

R7904

8.06K

MF-LF

1/16W

1%

402

9

87

14

17

10

13

12

11

4

3

16

2

6

1

15

5

U7900

QFN

ISL6549

CRITICAL

2

1

C7903

603

6.3V

20%

4.7UF

CERM

2

1

R7992

100K

5% 1/16W MF-LF 402

2

1

3

Q7902

2N7002

SOT23-LF

21

C7992

1UF

25V X5R 603

10%

2

1

C7902

1000PF

25V X7R 402

10%

2

1

C7956

1500UF

6.3V ELEC TH-MCZ

CRITICAL

20%

2

1

C7957

1500UF

6.3V ELEC TH-MCZ

20%

CRITICAL

2

1

C7954

CRITICAL

ELEC

20%

TH-MCZ

680UF

16V

2

1

C7953

CRITICAL

20%

ELEC TH-MCZ

680UF

16V

2

1

C7923

25V X7R 402

1000PF

10%

2

1

C7924

1000PF

25V X7R 402

nostuff

10%

2

1

R7921

2.7K

402

MF-LF

1/16W

5%

2

1

C7921

805-1

20%

6.3V

10UF

CERM

2

1

R7920

1/16W

402

1K

1%

MF-LF

2

1

R7922

1/16W

1%

402

MF-LF

1.96K

2

1

C7920

805

X5R

6.3V

20%

22UF

2

1

C7912

1210

10UF

10% 16V X5R-CERM

21

L7903

TH-LF

1.53UH

CRITICAL

2

1

C7960

1UF

6.3V

402

CERM

10%

2

1

C7958

6.3V

402

1UF

CERM

10%

2

1

C7959

1UF

402

6.3V CERM

10%

2

1

C7926

805-1

20%

6.3V

10UF

CERM

321

4

8765

Q7903

SO-8

IRF1902PBF

CRITICAL

2

1

C7922

805-1

20%

6.3V

10UF

CERM

2

1

C7925

805-1

20%

6.3V

10UF

CERM

5

4

3

2

1

D7900

CTLSH3-30M833

TLM833

nostuff

3

2

5

4

12

U7810

SOI-LF

3

1

7

6

12

U7810

SOI-LF

3

1

4

Q7901

IRLR7807Z

TO-252AA

3

1

4

Q7900

TO-252AA

IRLR7807Z

21

C7901

20% 25V

0.1UF

603

CERM

2

1

C7911

1210

10UF

10% 16V X5R-CERM

2

1

R7906

DEVELOPMENT

402

MF-LF

1/16W

5%

330

LED_PP1V8_S3_P

2

1

LED7900

DEVELOPMENT

GREEN-3.6MCD

2.0X1.25MM-SM

LED_PP1V8_S3_N

3

14

9

8

12

U7901

DEVELOPMENT

SOI-LF

2

1

C7913

805-1

20%

6.3V

10UF

CERM

2

1

XW7900

SM

79

051-7039

H

97

1.8V & 1.2V VREG

SYNC_MASTER=M51_PAUL SYNC_DATE=08/04/2006

1V8REG_DDR_UGATE

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PP12V_S5

PP5V_S5

PGOOD_PP1V8_S3

MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_FB

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_SNUB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

VOLTAGE=0 V MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_GND

=PP1V8_S3_1V2_LDO

PP1V2_S3

PP3V3_S5

MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_COMP

MIN_LINE_WIDTH=0.6MM

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_BOOT

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V2_LDODR_C

1V8REG_DDR_FB_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

PM_SLP_S4

PM_SLP_S3_L

MEMVTT_EN

MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_COMP_R

MIN_LINE_WIDTH=0.6MM

1V0_REF

PP3V3_S5

PP0V9_S0

0V7_REF

PGOOD_PP0V9_S0

1V2_REF

PP5V_S5

1V8REG_DDR_VCC5

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_PVCC5

1V8REG_DDR_BOOT_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_LGATE

MIN_LINE_WIDTH=0.6MM

PP1V8_S3

1V8REG_DDR_FS_DIS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V8REG_DDR_LDO_FB

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_LDO_DR

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V8REG_DDR_SWITCHNODE

83

80

83

79

83

82

78

82

80

77

80

83

79

76

79

82

78

66

78

80

77

65

80

65

77

78

75

26

77

26

75

77

59

6

58

6

59

83

76

5

83

23

5

3

77

3

77

5

31

80

3

77

3

www.Vinaﬁx.vn

Preliminary

D

G

S D

G

S

D

G

S

D

G

S

GND

V+

LM339A

VIN

PHASE2

SOFT2

DDR

OCSET2

PG2/REF

EN2

VSEN2

PGND2

LGATE2

ISEN2

UGATE2

BOOT2

EN1

PG1

OCSET1

PGND1

VSEN1

PHASE1

ISEN1

UGATE1

BOOT1

SOFT1

LGATE1

GND

VCC

GND

V+

LM339A

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

0.867V

1.5V S0 AND 1.05V S0 RAILS

1.05V NOMINAL1.50V NOMINAL

1.5V S0

1.05V S0

PP1V5_S0

PLACE LED NEAR VREG

M51

PEAK=8.4A

AVE=4.5A

POWER BUDGET

PEAK=5.8A

M51

POWER BUDGET

AVE=2.4A

3

1

4

Q8000

TO-252AA

IRLR7807Z

CRITICAL

3

1

4

Q8050

TO-252AA

IRLR7807Z

3

1

4

Q8051

TO-252AA

IRLR7807Z

3

1

4

Q8001

TO-252AA

IRLR7807Z

2

1

C8073

6.3V

20%

805-1

10UF

CERM

2

1

C8072

20%

6.3V

805-1

10UF

CERM

2

1

C8071

CRITICAL

ELEC

6.3V

20%

1500UF

TH-MCZ

2

1

R8050

MF-LF

0

5% 1/16W

402

2

1

C8070

CRITICAL

ELEC

6.3V

20%

TH-MCZ

1500UF

2

1

R8051

3.65K

603

1% 1/10W MF-LF

2

1

R8052

MF-LF

1/10W

20.0K

1%

603

2

1

C8062

603

0.018UF

5% 50V X7R

3

1

D8050

SOT23

BAT54E3

2

1

R8055

10K

1% 1/16W MF-LF 402

21

R8053

402

1/16W MF-LF

1%

2.43K

2

1

C8063

50V X7R

0.01UF

603-1

10%

2

1

R8054

1/10W

1%

MF-LF 603

110K

2

1

R8091

DEVELOPMENT

330

5% 1/16W MF-LF 402

2

1

LED8091

GREEN-3.6MCD

DEVELOPMENT

2.0X1.25MM-SM

LED_PP1V05_S0_P

21

C8090

DEVELOPMENT

0.1UF

402

10V

20%

CERM

3

2

5

4

12

U7901

SOI-LF

DEVELOPMENT

2

1

R8092

8.45K

1% 1/16W MF-LF 402

2

1

R8093

402

MF-LF

1/16W

1%

3.01K

3

1

D8000

SOT23

BAT54E3

2

1

C8005

CRITICAL

20%

ELEC

680UF

TH-MCZ

16V

2

1

C8004

CRITICAL

20%

ELEC

680UF

TH-MCZ

16V

2

1

R8000

402

0

1/16W

5%

MF-LF

2

1

C8003

1210

10UF

10% 16V X5R-CERM

2

1

C8002

1210

10UF

10% 16V X5R-CERM

2

1

C8010

6.3V

20%

4.7UF

603

CERM

2

1

C8001

1210

10UF

10% 16V X5R-CERM

21

L8050

1.53UH

CRITICAL

TH-LF

2

1

C8000

1210

10UF

10% 16V X5R-CERM

1910

14

28

24

5

1712

25

4

26

3

1615

1811

27

2

22

7

9201

21

8

13

23

6

U8000

1V05REG_ISEN

ISL6539

SSOP

1V05REG_SOFT

CRITICAL

2

1

R8004

MF-LF

1/10W

1%

110K

603

2

1

C8013

603-1

0.01UF

X7R

50V

10%

21

R8003

1%

1/16W

2.43K

402

MF-LF

2

1

C8011

20% 25V

0.1UF

603

CERM

2

1

C8061

603

20% 25V

0.1UF

CERM

21

L8000

CRITICAL

TH-LF

1.53UH

2

1

C8012

603

5% 50V X7R

0.018UF

2

1

R8001

1%

3.32K

MF-LF

1/10W

603

2

1

C8023

TH-MCZ

1500UF

20%

ELEC

6.3V

CRITICAL

2

1

R8002

MF-LF

1/10W

4.99K

1%

603

2

1

R8005

402

MF-LF

1/16W

10K

1%

2

1

C8022

CRITICAL

1500UF

20%

ELEC

6.3V

TH-MCZ

2

1

C8021

805-1

20%

6.3V

10UF

CERM

2

1

C8020

805-1

20%

6.3V

10UF

CERM

2

1

R8090

402

MF-LF

1/16W

5%

330

DEVELOPMENT

2

1

LED8090

GREEN-3.6MCD

2.0X1.25MM-SM

DEVELOPMENT

LED_PP1V5_S0_P

3

1

7

6

12

U7901

SOI-LF

DEVELOPMENT

5

4

3

2

1

D8001

TLM833

CTLSH3-30M833

nostuff

2

1

R8006

1206

5.11

1%

MF-LF

1/4W

2

1

C8024

1000pF

25V X7R 402

10%

5

4

3

2

1

D8051

TLM833

CTLSH3-30M833

nostuff

2

1

R8056

5.11

MF-LF

1/4W

1%

1206

2

1

C8064

1000pF

25V X7R 402

10%

80

051-7039

H

97

SYNC_MASTER=M51_PAUL SYNC_DATE=08/04/2006

1.5V_S0 & 1.05V_S0 VREG

PM_SLP_S3_L

PGOOD_PP1V5_S0

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V05_SWITCHNODE

MIN_NECK_WIDTH=0.25MM

1V05REG_UGATE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

1V05_LGATE

MIN_LINE_WIDTH=0.6MM

1V5REG_SOFT

1V5REG_OCSET

PP1V05_S0

PM_SLP_S3_L

MIN_NECK_WIDTH=0.25MM

1V05_VSEN

MIN_LINE_WIDTH=0.6MM

PP1V5_S0

1V5REG_SWITCHNODE

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

1V5REG_BOOT

MIN_LINE_WIDTH=0.6MM

PP12V_S5

1V05_OCSET

PGOOD_PP1V05_S0

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V5REG_UGATE

PP3V3_S5

1V0_REF

LED_PP1V05_S0_N

PP3V3_S5

LED_PP1V5_S0_N

PP1V5_S0

1V0_REF

PP5V_S5

PGOOD_PP1V05_S0

1V05REG_BOOT_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

1V05REG_SNUBBER_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V5REG_ISEN

1V5REG_SNUBBER_R

1V5REG_BOOT_R

PP1V05_S0

PP5V_S5

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V5REG_VSEN

PGOOD_PP1V5_S0

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

1V5REG_LGATE

1V05REG_BOOT

MIN_LINE_WIDTH=0.6MM

MIN_NECK_WIDTH=0.25MM

83

80

79

83 83

83

78

82 82

82

77

80 80

80

83

76

79 79

79

80 80

82

66

78 78

78

79

65

77 77

77

80

77

78

26

75 75

80

75

58

34

58

80

77

6

80

59 59

34

59

23

80

5

23

5

76

80

5

80

5

80

5 5

80

5

80

5

77

3

5

3

77

3

79

3

79

3 3

77

3

77

www.Vinaﬁx.vn

Preliminary

FS_DIS

LDO_DR

LDO_FB

PVCC5

VCC5

DGND

THRML_PAD

AGND PGND

FB

COMP

PHASE

LGATE

BOOT

UGATE

VCC12

G

D

S

D

G

S

D

G

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

4.50V NOMINAL

5V AUDIO S5

TOTAL=?A

AUDIO=?A

5.10V NOMINAL

TOTAL=5.000A

AUDIO O=1.000A

5V S5

ODD=1.000A

USB=1.500A

MISC=1.500A

(R1)

(R2)

VOUT=VREF*(1+R2/R1)

VREF = 0.800V TYP

0.816V MAX

0.784V MIN

POWER SUPPLY 3.3V/5V MAIN SWITCH

5V S5 AND 5V AUDIO S5 REGULATOR

M50 POWER BUDGET

2

1

C8211

1210

10UF

10% 16V X5R-CERM

2

1

C8215

1800UF

20%

6.3V ELEC TH-KZJ-LF

CRITICAL

2

1

R8299

MF-LF 402

1/16W

5%

22

2

1

C8207

402

0.01UF

16V CERM

10%

2

1

R8203

MF-LF

1%

402

1.24K

1/16W

2

1

R8201

MF-LF

1/16W

1%

402

232

2

1

R8202

1206

MF-LF

1% 1/4W

5.11

2

1

C8209

1000PF

5% 50V

1206

CERM

2

1

C8202

402

X7R

25V

1000PF

10%

21

C8208

0.047UF

402

16V

CERM

10%

21

R8240

1/16W

5%

MF-LF

402

2.2

21

C8292

603

X5R

25V

1UF

10%

2

1

C8200

6.3V

1UF

402

CERM

10%

2

1

R8205

10

1/16W MF-LF 402

1%

2

1

C8220

22UF

20%

6.3V

805

X5R

21

L8203

CRITICAL

3.0UH

TH1

21

C8206

470PF

50V

402

CERM

10%

21

R8204

8.06K

402

1% 1/16W MF-LF

9

87

14

17

10

13

12

11

4

3

16

2

6

1

15

5

U8200

ISL6549

QFN

CRITICAL

2

1

XW8200

SM

2

1

C8203

4.7UF

20%

6.3V

603

CERM

2

1

C8224

25V X7R 402

NOSTUFF

1000PF

10%

2

1

C8253

CRITICAL

TH-KZJ-LF

ELEC

20%

1000UF

16V

2

1

C8223

402

25V X7R

1000PF

10%

2

1

R8221

MF-LF

5%

2.7K

402

1/16W

2

1

R8220

1K

402

MF-LF

1/16W

1%

2

1

R8222

1/16W

1%

MF-LF

221

402

2

1

C8226

20%

6.3V

805-1

10UF

CERM

2

1

R8292

402

MF-LF

1/16W

5%

100K

2

1

3

Q8202

SOT23-LF

2N7002

NOSTUFF

2

1

C8221

6.3V

20%

805-1

10UF

CERM

2

1

C8222

805-1

6.3V

20%

10UF

CERM

2

1

C8225

20%

6.3V

805-1

10UF

CERM

5

4

3

2

1

D8200

NOSTUFF

TLM833

CTLSH3-30M833

321

4

8765

Q8203

CRITICAL

IRF1902PBF

SO-8

3

1

4

Q8200

IRLR7807Z

CRITICAL

TO-252AA

3

1

4

Q8201

CRITICAL

IRLR7807Z

TO-252AA

21

C8201

603

0.1UF

25V

20%

CERM

2

1

C8213

6.3V

20%

805-1

10UF

CERM

2

1

C8214

6.3V

20%

805-1

10UF

CERM

5V DC/DC

SYNC_MASTER=M51_PAUL SYNC_DATE=08/04/2006

9782

H

051-7039

PP4V5_S5_AUDIO_ANALOG

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5V_AUDIO_LDODR_C

5VREG_LDO_DR

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_COMP_R

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

PP5V_S5

MIN_LINE_WIDTH=0.6MM

5VREG_PVCC5

MIN_NECK_WIDTH=0.25MM

SYS_POWERFAIL_L

5VREG_COMP

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_BOOT

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_BOOT_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_VCC5

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_FB

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_FB_R

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_GND

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

VOLTAGE=0 V

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_SNUB

=PP5V_S5_AUDIO_LDO

PP12V_S5

5VREG_LGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_UGATE

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

5VREG_SWITCHNODE

5VREG_FS_DIS

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.25MM

5VREG_LDO_FB

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.6MM

83 80 79

83

78

80

77

79

75

78

59

78

77

5

76

3

6

3

www.Vinaﬁx.vn

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

12V S0 - B

2.5V S0

12V S0

12VS0 - B WILL CONNECT TO MXM, FANS

Split 12V S0 is for better power plane structure

5V S0

to blead energy off 1.8V S0 during sleep

3.3V AND 5V S3

24V S0

3.3V S0

Rds on = 13.5mOhm

1.8V S0

4

36

521

Q8319

SI3446DV

CRITICAL

TSOP-LF

21

R8318

MF-LF

1/10W

1%

603

100K

2

1

C8318

X7R

0.01UF

10% 50V

603-1

NOSTUFF

2

1

C8317

10%

X7R

50V

603-1

0.01UF

2

1

3

Q8320

2N7002

SOT23-LF

321

4

8765

Q8323

IRF7807ZPBF

SO-8

CRITICAL

2

1

C8323

402

0.01uF

50V X7R

10%

21

R8319

402

1/16W

5%

100K

MF-LF

2

1

C8324

402

0.01uF

10%

X7R

50V

NOSTUFF

2

1

3

Q8324

SOT23-LF

2N7002

5

4

3

Q8318

CMLDM7002A

SOT563

2

1

6

Q8318

SOT563

CMLDM7002A

2

1

R8313

1%

MF-LF

1/10W

100K

603

2

1

R8312

MF-LF

1/10W

1%

10K

603

321

4

8765

Q8300

CRITICAL

SO-8

IRF7413PBF

21

R8315

603

1/10W MF-LF

5%

47K

21

D8310

B0530WXF

SOD-123

2

1

C8316

NOSTUFF

0.1UF

CERM 603

20% 25V

2

1

3

Q8303

2N7002

SOT23-LF

2

1

3

Q8302

2N7002

SOT23-LF

2

1

C8319

603

20%

0.1UF

CERM

25V

2

1

C8320

0.01UF

10%

402

16V CERM

2

1

R8300

47K

402

MF-LF

1/16W

5%

2

1

C8326

NOSTUFF

25V

20%

0.1UF

603

CERM

3

2

1

4

8

7

6

5

Q8326

SOI

IRF7406PBF

21

R8326

47K

5%

MF-LF

1/10W

603

21

D8311

B0530WXF

SOD-123

2

1

C8322

0.01UF

CERM 603

50V

20%

2

1

R8316

MF-LF

1/10W

1%

10K

603

5

4

3

Q8325

CMLDM7002A

SOT563

2

1

C8327

CERM

20%

0.1UF

50V

805

2

1

R8317

100K

MF-LF

1/10W

603

1%

2

1

6

Q8325

SOT563

CMLDM7002A

2

1

R8320

MF-LF

100K

603

1% 1/10W

2

1

R8325

MF-LF

1/10W

1%

10K

603

2

1

C8346

603

0.1UF

25V CERM

NOSTUFF

20%

2

1

C8340

10%

402

16V CERM

0.01UF

2

1

R8342

10K

MF-LF

1/10W

1%

603

2

1

R8343

MF-LF

1/10W

1%

100K

603

21

R8345

603

1/10W MF-LF

5%

47K

21

D8340

B0530WXF

SOD-123

2

1

6

Q8348

SOT563

CMLDM7002A

5

4

3

Q8348

SOT563

CMLDM7002A

2

1

C8349

25V

603

20%

0.1UF

CERM

2

1

R8340

402

1/16W

5%

10K

MF-LF

321

4

8765

Q8313

SOI

IRF7424PBF

321

4

8765

Q8340

IRF7424PBF

SOI

2

1

R8301

3.6K

MF-LF

402

5%

1/16W

321

4

8765

Q8301

IRF7413PBF

SO-8

CRITICAL

2

1

R8302

3.6K

5%

MF-LF

1/16W

402

2

1

R8303

MF-LF 402

5%

47K

1/16W

2

1

C8399

CERM

20%

603

10V

1UF

2

1

C8398

1UF

10V

603

20%

CERM

4

36

521

Q8310

SI3446DV

TSOP-LF

CRITICAL

2

1

C8310

50V

10%

603

X7R-CERM

0.033UF

2

1

C8311

0.01UF

603-1

X7R

50V

10%

NOSTUFF

21

R8310

1/10W

100K

MF-LF

1%

603

2

1

3

Q8311

2N7002

SOT23-LF

4

36

521

Q8312

TSOP-LF

SI3446DV

CRITICAL

2

1

3

Q8315

2N7002

SOT23-LF

2

1

C8315

NOSTUFF

603-1

0.01UF

50V

10%

X7R

2

1

C8321

0.01UF

603-1

X7R

50V

10%

21

R8311

100K

1% 1/10W MF-LF

603

SYNC_MASTER=M51_PAUL

S0 AND S3 FETS

9783

H

SYNC_DATE=08/04/2006

051-7039

PP1V8_S0

START_G_12V_S0_B

PP24V_S0

PP1V8_S3

SYS_PWRUP_L

START_G_3V3_S0

PP2V5_S5

SYS_PWRUP_L

PP12V_S5

PP2V5_S0

PP12V_S5

GATE_3V3_S3

PP3V3_S3

PP3V3_S5

GATE_5V_S3

PP5V_S3

PP5V_S0

PP12V_S5

TO_GATE_24V_S0_R

PP24V_S5

GATE_24V_S0

START_G_24V_S0

TO_GATE_24V_S0

SYS_PWRUP_L

TO_GATE_12V_S0_R

START_G_12V_S0

SYS_PWRUP_L

PP12V_S5

PP3V3_S5

START_G_1V8_S0

PP5V_S5

START_G_5V_S0

PM_SLP_S4

SYS_PWRUP_L

TO_GATE_12V_S0_B_R

START_G_2V5_S0

SYS_PWRUP_L

PP12V_S5

GATE_12V_S0

PP3V3_S0

PP12V_S0

PP12V_S0_B

GATE_12V_S0_B

PP12V_S5

83

80

79

83

84

78

82

76

83

77

83

77

80

83

45

83

82

76

82

76

79

82

41

82

80

66

80

66

78

80

27

80

79

65

97

79

65

77

79

26

79

78

53

26

75

78

26

75

78

10

78

79

78

77

27

6

59

77

6

59

77

6

77

5

83

5

83

76

78

76

6

5

59

5

76

6

83

76

5

79

83

76

5

76

3

77

3

77

3

77

3

77

3

www.Vinaﬁx.vn

Preliminary

PEX_TX0

PEX_TX0_L

GND37

PEX_TX1

PEX_TX1_L

GND36

PEX_TX2

PEX_TX2_L

GND35

PEX_TX3

PEX_TX3_L

GND34

PEX_TX4

PEX_TX4_L

GND33

PEX_TX5

PEX_TX5_L

GND32

PEX_TX6

PEX_TX6_L

GND31

PEX_TX7

PEX_TX7_L

GND30

PEX_TX8

PEX_TX8_L

GND29

PEX_TX9

PEX_TX9_L

GND28

PEX_TX10

PEX_TX10_L

GND27

PEX_TX11

PEX_TX11_L

GND26

PEX_TX12

PEX_TX12_L

GND25

PEX_TX13

PEX_TX13_L

GND24

PEX_TX14

PEX_TX14_L

GND23

PEX_TX15

PEX_TX15_L

PRSNT2_L

GND22

GND21

GND20

5VRUN

RUNPWROK

1V8RUN6

1V8RUN5

1V8RUN4

1V8RUN3

1V8RUN2

1V8RUN1

1V8RUN0

GND19

PEX_RX0

PEX_RX0_L

GND18

PEX_RX1

PEX_RX1_L

GND17

PEX_RX2

PEX_RX2_L

GND16

PEX_RX3

PEX_RX3_L

GND15

PEX_RX4

PEX_RX4_L

GND14

PEX_RX5

PEX_RX5_L

GND13

PEX_RX6

PEX_RX6_L

GND12

PEX_RX7

PEX_RX7_L

GND11

PEX_RX8

PEX_RX8_L

GND10

PEX_RX9

PEX_RX9_L

GND9

PEX_RX10

PEX_RX10_L

GND8

PEX_RX11

PEX_RX11_L

GND7

PEX_RX12

PEX_RX12_L

GND6

PEX_RX13

PEX_RX13_L

GND5

PEX_RX14

PEX_RX14_L

GND4

PEX_RX15

PEX_RX15_L

GND3

GND2

GND1

PWR_SRC7

PWR_SRC6

PWR_SRC5

PWR_SRC4

PWR_SRC3

PWR_SRC2

PWR_SRC1

PWR_SRC0

GND0

KEY

VIN

IOUT

LOADNC

GND

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MXM PWRSRC (GPU CORE) CURRENT SENSE

ADC IS 10BIT 0 TO 1023

PLACE CAPS NEAR NB

.0129 V/COUNT

COUNT

1.33333 A/V

PCB:PLACE D8450,R8452,C8458 BY SMC

PCB:KEEP SHORTS NEXT TO U8450

0 TO 3.3V

CURRENT

4.95 W

BOM options provided by this page: (NONE)

POWER

2.5 W

4 V/V

WORKS WELL.

TO SMC

SO SMC ADC SAMPLING

1 MS TIME CONSTANT

VOLTAGE

(NONE)

1.25 W

1.5 A

3V3

1V8

- =PP5V_S0_MXM

2V5

- =PP12V_S0_MXM

SCALE

PWR (12V)

PRSNT2_L: RESERVED FOR FUTURE USE

Signal aliases required by this page:

- =PP1V8_S0_MXM

MXM SPEC POWER REQUIREMENTS

Polarity is also inverted (Tx+ goes to Rx-) to untangle routes

Power aliases required by this page:

Page Notes

0.5 A

3.5 A

5V

Note: PCI-E Lanes are reversed to untangle routes

Need to stuff config strap using BOM option NBCFG_PEG_REVERSE

6.3 W PLATFORM DEPENDENT

UP TO 4 A

DECOUPLING, WITH NO DROOP OR NOISE

(NOT NECESSARILY THE SAME FOR EVERY MODULE)

PCB: PLACE R8455, C8459 WITHIN 1" OF SMC (U5800)

COUNT

ADC IS 10BIT 0 TO 1023

0 TO 3.3V

SCALE

(SCALING 12V INPUT VOLTAGE TO SMC)

.004296875 A/COUNT

MXM PWRSRC VOLTAGE SENSE

M51: FIX ON CARD ALLOWS US TO NOT STUFF MOST OF THE 1.8V

21

C8421

0.1uF

21

C8420

0.1uF

10% 402

16V X5R

16 15

13

11

9

7

5

3

1

38

76

78

82

84

88

90

94

96

100

102

106

108

112

114

118

120

124

40

42

46

48

52

54

58

60

64

66

70

72

126

130

132

73

75

79

81

85

87

91

93

97

99

103

105

109

111

115

117

121

37

39

43

45

49

51

55

57

61

63

67

69

123

127

129

71

65

59

53

47

41

128

122

116

110

104

98

92

86

23

80

74

68

62

56

50

44

24

22

20

21

131

125

119

113

107

101

95

89

83

77

19

1718

14

12

10

8

6

4

2

J8400

F-RT-SM

CRITICAL

(1 OF 2)

B33@102-0123

21

C8422

0.1uF

21

C8423

0.1uF

21

C8424

0.1uF

21

C8425

0.1uF

21

C8426

0.1uF

21

C8427

0.1uF

21

C8428

0.1uF

21

C8429

0.1uF

21

C8430

0.1uF

21

C8431

0.1uF

21

C8432

0.1uF

21

C8433

0.1uF

21

C8434

0.1uF

21

C8435

0.1uF

21

C8436

0.1uF

21

C8437

0.1uF

21

C8438

0.1uF

21

C8439

0.1uF

21

C8440

0.1uF

21

C8441

0.1uF

21

C8442

0.1uF

21

C8443

0.1uF

21

C8444

0.1uF

21

C8445

0.1uF

21

C8446

0.1uF

21

C8447

0.1uF

21

C8448

0.1uF

21

C8449

0.1uF

21

C8450

0.1uF

21

C8451

0.1uF

2

1

C8400

22UF

35V ELEC SM-LF

20%

3

1

D8450

NOSTUFF

BAS16-75V-0.25A

SOT23-LF

2

1

C8458

20%

X5R

6.3V

402

0.22UF

MXM_PWR_SENSE

21

R8452

402

1% 1/16W MF-LF

MXM_PWR_SENSE

4.53K

21

R8450

1%

0.025

MF

CRITICAL

2512-1

1W

MXM_PWR_SENSE

21

XW8450

OMIT

SM

2

1

C8459

X5R

20%

0.22UF

6.3V

402

MXM_PWR_SENSE

21

R8455

MF-LF

402

1/16W

4.53K

1%

MXM_PWR_SENSE

2

1

R8453

6.04K

MF-LF

1%

402

1/16W

MXM_PWR_SENSE

2

1

R8454

1/16W

402

MXM_PWR_SENSE

1%

2.0K

MF-LF

4

15

3

2

U8450

SOT23-5

ZXCT1010

MXM_PWR_SENSE

CRITICAL

2

1

R8451

402

1/16W

1%

3.01K

MXM_PWR_SENSE

MF-LF

2

1

C8403

NOSTUFF

6.3V X5R

22UF

20%

805

2

1

C8402

6.3V

20%

22UF

NOSTUFF

X5R 805

2

1

C8401

22UF

X5R

20%

6.3V

805

SYNC_MASTER=M51_DAVE

MXM PCI-E & PWR

SYNC_DATE=(MASTER)

051-7039

84

H

97

PEG_D2R_P<1>

SMC_GPU_VSENSE

=PP1V8_S0_MXM

PEG_D2R_P<0>

PEG_R2D_N<0>

PEG_R2D_P<0>

PEG_R2D_N<1>

PEG_R2D_P<1>

PEG_R2D_N<2>

PEG_R2D_P<2>

PEG_R2D_N<3>

PEG_R2D_P<3>

PEG_R2D_N<4>

PEG_R2D_P<4>

PEG_R2D_N<5>

PEG_R2D_P<5>

PEG_R2D_N<6>

PEG_R2D_P<6>

PEG_R2D_N<7>

PEG_R2D_P<7>

PEG_R2D_N<8>

PEG_R2D_P<8>

PEG_R2D_N<9>

PEG_R2D_P<9>

PEG_R2D_N<10>

PEG_R2D_P<10>

PEG_R2D_N<11>

PEG_R2D_P<11>

PEG_R2D_N<12>

PEG_R2D_P<12>

PEG_R2D_N<13>

PEG_R2D_P<13>

PEG_R2D_N<14>

PEG_R2D_P<14>

PEG_R2D_N<15>

PEG_R2D_P<15>

=PP5V_S0_MXM

ALL_SYS_PWRGD

PEG_D2R_N<15>

PEG_D2R_P<15>

PEG_D2R_N<14>

PEG_D2R_P<14>

PEG_D2R_N<13>

PEG_D2R_P<13>

PEG_D2R_N<12>

PEG_D2R_P<12>

PEG_D2R_N<11>

PEG_D2R_P<11>

PEG_D2R_N<10>

PEG_D2R_P<10>

PEG_D2R_N<9>

PEG_D2R_P<9>

PEG_D2R_N<8>

PEG_D2R_P<8>

PEG_D2R_N<7>

PEG_D2R_P<7>

PEG_D2R_N<6>

PEG_D2R_P<6>

PEG_D2R_N<5>

PEG_D2R_P<5>

PEG_D2R_N<4>

PEG_D2R_P<4>

PEG_D2R_N<3>

PEG_D2R_P<3>

PEG_D2R_N<2>

PEG_D2R_P<2>

PEG_D2R_N<1>

PEG_D2R_N<0>

PPV_S0_MXM_PWRSRC

MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=0.60MM

VOLTAGE=12V

PPV_S0_MXM_PWRSRC

PEG_R2D_C_N<5>

PEG_R2D_C_P<6>

PEG_R2D_C_P<1>

PPV_S0_MXM_PWRSRC

PEG_R2D_C_N<0>

PEG_R2D_C_N<10>

PEG_R2D_C_P<2>

PEG_R2D_C_N<3>

PEG_R2D_C_N<6>

PEG_R2D_C_P<5>

PEG_R2D_C_P<3>

PEG_R2D_C_N<2>

PEG_R2D_C_N<9>

PEG_R2D_C_P<10>

PEG_R2D_C_N<12>

PEG_R2D_C_P<13>

PEG_R2D_C_N<13>

PEG_R2D_C_N<15>

PEG_R2D_C_P<4>

PEG_R2D_C_P<7>

PEG_R2D_C_N<8>

PEG_R2D_C_N<7>

PEG_R2D_C_P<9>

PEG_R2D_C_N<11>

PEG_R2D_C_P<12>

PEG_R2D_C_N<14>

PP3V3_S0

MXM_SENSE_I_R

GND_SMC_AVSS

PEG_R2D_C_P<8>

PEG_R2D_C_P<11>

MXM_PWRSRC_SENSE

GND_SMC_AVSS

SMC_GPU_ISENSE

SMC_MXM_VSENSE_R

PEG_R2D_C_P<15>

PEG_R2D_C_N<1>

PEG_R2D_C_P<0>

PEG_R2D_C_P<14>

PEG_R2D_C_N<4>

=PPV_S0_MXM_PWRSRC

83 76 45 41 27 26

77

10

84

58

6

76

13

26

13

5

59

13

59

13

5

58

3

5

3

5

84

5

84

5

3

58

5

58

5

3

www.Vinaﬁx.vn

Preliminary

DVI_B_HPD/GND

AC/BATT_L

IGP/DVI_B_CLK

IGP10

GND38

IGP/DVI_B_CLK_L

IGP9

IGP8

IGP6

IGP7

IGP5

IGP4

IGP3

RSVD2

RSVD3

IGP2

IGP1

IGP0

DDCA_DAT

DDCA_CLK

THERM_L

VGA_VSYNC

VGA_HSYNC

SMB_CLK

SMB_DAT

RSVD1

RSVD0

PEX_RST_L

PEX_REFCLK

PEX_REFCLK_L

LVDS_UTX0_L

LVDS_LTX1

PRSNT1_L

TV_C_HDTV_PR

GND46

TV_Y_HDTV_Y_TV_CVBS

GND49

LVDS_UCLK

GND52

LVDS_UTX3_L

LVDS_UTX3

LVDS_UTX2_L

LVDS_UTX2

GND54

LVDS_UTX1_L

LVDS_UTX1

GND55

LVDS_UTX0

GND56

LVDS_LCLK_L

LVDS_LCLK

GND57

LVDS_LTX3_L

LVDS_LTX2_L

LVDS_LTX2

GND59

LVDS_LTX1_L

GND60

LVDS_LTX0_L

LVDS_LTX0

GND61

DDCC_DAT

DDCC_CLK

LVDS_PPEN

LVDS_BL_BRGHT

LVDS_BLEN

DDCB_DAT

DDCB_CLK

2V5RUN

GND62

3V3RUN0

3V3RUN1

3V3RUN2

RSVD4

IGP/DVI_B_TX2_L

GND39

RSVD5

GND40

IGP/DVI_B_TX2

IGP/DVI_B_TX1

GND41

IGP/DVI_B_TX1_L

IGP/DVI_B_TX0

IGP/DVI_B_TX0_L

DVI_A_HPD

DVI_A_CLK

DVI_A_CLK_L

DVI_A_TX2

DVI_A_TX2_L

GND42

DVI_A_TX1_L

GND43

DVI_A_TX0_L

GND44

DVI_A_TX1

DVI_A_TX0

GND45

LVDS_LTX3

GND58

GND53

GND51

GND50

GND47

VGA_RED

GND48

TV_CVBS_HDTV_PB

VGA_GRN

VGA_BLU

LVDS_UCLK_L

CLK_REQ_L

SCL

SDA

VSS

VCC

WP

A2 A1 A0

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Power aliases required by this page:

Signal aliases required by this page:

6.3 W

Page Notes

MXM SYSTEM INFORMATION ROM

BOM options provided by this page:

- =PP3V3_S0_MXM

10K PD ON MXM

0.5 A

5V

- =SMB_GPU_THRM_CLK

CARD DETECT

EXT. DVI/VGA

PWM

0.5 A

PWR (12V)

1.5 A

3V3

(NONE)

3.5 A

1V8

2V5

CURRENT

4.95 W

2.5 W

1.25 W

VOLTAGE

UNCONNECTED. USE DDC_A FOR EXT. TMDS

TO INTERNAL PANEL

- =SMB_GPU_THRM_DATA

- =PP2V5_S0_MXM

MXM SPEC POWER REQUIREMENTS

PLACE CLOSE TO J8400

STUFF FOR WRITE PROTECT

(NOT NECESSARILY THE SAME FOR EVERY MODULE)

POWER

PLATFORM DEPENDENT

UP TO 4 A

I2C ADDRESS: AC

PULLED TO GROUND ON MXM...NEED GPIO?

153

148

151 152

156

140

144

136

149

145

147

197

195

167

165

143

141

134

139

133

135

166

168

172

174

178

180

184

186

160

162

224

196

198

202

204

208

210

214

216

190

192

228

226

201

203

207

209

213

215

189

191

183

181

179

177

175

173

171

163

185

161

159

236

218

212

206

200

194

188

182

176

170

164

158

154

150

146

142

138

241

235

229

223

211

205

199

187

193

225

227

231

233

237

239

217

219

221

220

222

230

232

157

155

137

169

242

240

238

234

J8400

B33@102-0123

(2 OF 2)

F-RT-SM

2

1

R8500

5%

MF-LF

1/16W

402

100K

2

1

R8570

MF-LF

1/16W

0

5%

402

NOSTUFF

7

4

8

5

6

3

2

1

U8570

OMIT

M24C02-WMN6

SO8

2

1

C8570

0.1UF

MXM_ROM

10V

20%

402

CERM

21

R8506

1/16W

5%

0

NOSTUFF

21

R8507

0

5%

1/16W

2

1

R8501

100K

1/16W

5%

MF-LF 402

2

1

C8500

805

20%

6.3V X5R

22uF

21

R8502

1/16W

5%

100K

21

R8503

1/16W

5%

0

CK410_SRC_CLKREQ1_L

21

R8504

0

1/16W

5%

SYNC_MASTER=M51_DAVE

MXM I/O

85

H

SYNC_DATE=(MASTER)

97

051-7039

=PP3V3_S0_MXM

TMDS_CLK_N TMDS_CLK_P

LVDS_L_DATA_P<1>

LVDS_L_DATA_N<3>

LVDS_U_DATA_P<0>

GPU_GRN

MXM_CONN_AC_BATT_L

GPU_CLK100M_PCIE_N

PEG_RESET_L

SMB_GPU_THRM_DATA

SMB_GPU_THRM_CLK

=PP3V3_S0_MXM

LVDS_L_DATA_N<2>

LVDS_L_DATA_P<2>

LVDS_L_DATA_N<0>

GPU_ENABLE_BL

TP_GPU_DDC_B_DATA

TP_GPU_DDC_B_CLK

LVDS_L_CLK_N

GPU_DDC_C_CLK

MXM_ROM_WP

GPU_DDC_C_DATA

=PP2V5_S0_MXM

MXM_DETECT_L

LVDS_U_DATA_N<2> LVDS_U_DATA_P<2>

LVDS_U_DATA_N<1>

LVDS_U_DATA_P<1>

GPU_V2SYNC

LVDS_L_CLK_P

LVDS_L_DATA_P<3>

LVDS_U_DATA_N<0>

GPU_BLU

GPU_TV_C

GPU_TV_COMP

=PP3V3_S0_MXM

INV_ENABLE_BL

GPU_RED

LVDS_U_DATA_P<3>

LVDS_U_DATA_N<3>

GPU_DIGON

GPU_VARY_BL

GPU_DDC_C_CLK

GPU_HPD

TMDS_DATA_P<2>

TMDS_DATA_N<2>

TMDS_DATA_P<1>

LVDS_U_CLK_N

TMDS_DATA_N<0> TMDS_DATA_P<0>

TMDS_DATA_N<1>

GPU_H2SYNC

GPU_TV_Y

GPU_CLK100M_PCIE_P

LVDS_U_CLK_P

GPU_DDC_A_DATA

GPU_CLK_REQ_L

GPU_DDC_A_CLK

MXM_AC_BATT_L

=PP3V3_S0_MXM

LVDS_L_DATA_N<1>

LVDS_L_DATA_P<0>

GPU_DDC_C_DATA

GPU_OVERTEMP_L

=PP3V3_S0_MXM

34

85

94

85

94

85

94

85

33

3

97

94

97

34

6

10

3

94

85

3

94

97

94

97

3

5

97

94

85

97

94

97

34

94

97

59

3

94

85

59

3

www.Vinaﬁx.vn

Preliminary

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

INVERTER INTERFACE

Page Notes

Signal aliases required by this page:

- =PP3V3_S0_VIDEO

- =PP12V_LCD

(NONE)

Power aliases required by this page:

- =PP24V_INVERTER

MXM also has 2.2K pull-ups

Panel has 4.7K DDC pull-ups

(NONE)

BOM options provided by this page:

PINS 6-9 (GND) ARE CONNECTED TO LCD CHASSIS

LCD (LVDS) INTERFACE

PANEL POWER SEQUENCING

PLACE NEAR J9402

2

1

C9410

50V

20%

402

0.001uF

CERM

2

1

C9401

20% 50V

0.001uF

402

CERM

21

L9400

SM

FERR-250-OHM

21

C9400

0.1UF

X7R

50V

603-1

10%

21

R9401

MF-LF

402

1%

29.4K

1/16W

2

1

R9400

5%

MF-LF

402

1/16W

100K

4

36

5

2

1

Q9400

SI3443DV

TSOP-LF

2

1

3

Q9401

2N7002

SOT23-LF

2

1

R9470

100K

402

5%

MF-LF

1/16W

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

J9402

53307-3072

F-ST-SM

CRITICAL

1

SDF9400

CRITICAL

STDOFF-3MMOD4.6MMH-1.35-TH

1

SDF9401

STDOFF-3MMOD4.6MMH-1.35-TH

CRITICAL

21

R9490

0

5%

NOSTUFF

1/8W

805

MF-LF

2

1

C9420

1210

10UF

10% 16V

X5R-CERM

21

R9475

402

1/16W

5%

47

MF-LF

2

1

R9474

402

MF-LF

5%

10K

1/16W

NOSTUFF

2

1

C9440

X7R

2.2UF

50V

1206

10%

2

1

R9440

MF-LF

5%

402

1/16W

10K

NOSTUFF

9

8

7

6

5

4

3

2

14

13

12

11

10

1

16

15

J9400

CRITICAL

88290-14XG

M-ST-SM

2

1

R9499

402

MF-LF

5%

100K

1/16W

Internal Display Conns

SYNC_MASTER=M51_DAVE

051-7039

H

9794

SYNC_DATE=(MASTER)

LCD_PWREN_L

LCD_PWREN_DIV

GPU_DIGON

LVDS_U_DATA_N<1>

LVDS_U_DATA_N<0>

LVDS_U_DATA_N<2>

LVDS_U_CLK_P

LVDS_L_DATA_P<0>

LVDS_L_DATA_N<2>

LCD_PWM

=PPV_S0_LCD

LVDS_U_DATA_N<3>

=PPV_S0_INVERTER

INV_ENABLE_BL

GPU_VARY_BL

=PP3V3_S0_VIDEO

LVDS_U_DATA_P<3>

LVDS_L_DATA_N<1>

LVDS_L_DATA_P<2>

LVDS_L_CLK_P

=PP3V3_DDC_LCD

LVDS_U_DATA_P<0>

LVDS_U_DATA_P<1>

LVDS_U_DATA_P<2>

LVDS_L_DATA_P<3>

GPU_DDC_C_CLK

PP12V_LCD_CONN

=PP3V3_S0_VIDEO

=PP3V3_DDC_LCD

LCD_PWM

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.5 mm

VOLTAGE=12V

PP12V_LCD_SW

LVDS_L_DATA_N<0>

GPU_DDC_C_DATA

LVDS_L_DATA_N<3>

LVDS_L_CLK_N

LVDS_U_CLK_N

LVDS_L_DATA_P<1>

PP12V_LCD_CONN

MIN_LINE_WIDTH=0.5 mm

VOLTAGE=12V

MIN_NECK_WIDTH=0.25 mm

LCD_PWREN_L_RC

97

94

85

94

85

5

3

85

3

5

85

3

85

94

85

6

3

94

5

85

6

www.Vinaﬁx.vn

Preliminary

G

SD

G

SD

SYM_VER-1

125

125125

GND

VCC

DA

S1A

S2A

S1B

S2B

S1C

S2C

S1D

S2D

IN

EN_L

DD

DC

DB

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

ANALOG FILTERING

PLACE CLOSE TO CONNECTOR

TMDS TERMINATION, IF ANY,

DVI DDC CURRENT LIMIT

(55mA requirement per DVI spec)

PLACE R9760 & R9761 CLOSE TO DVI CONNECTOR

PLACE FILTER CLOSE

TO MINI-DVI CONNECTOR

DVI INTERFACE

DISABLE UNUSED BUFFERS

on the MXM card

IS ON MXM CARD

Note: this clamp is supposed to be

NC

PLACE CLOSE TO MINI-DVI CONNECTOR

3V LEVEL SHIFTERS

2

1

R9721

10K

5% 1/16W

402

MF-LF

2

1

R9720

5%

10K

1/16W MF-LF 402

1

2

6

Q9711

2N7002DW-X-F

SOT-363

4

5

3

Q9711

2N7002DW-X-F

SOT-363

2

1

R9722

NOSTUFF

1/16W MF-LF

100K

5%

402

2

1

C9713

50V

100pF

CERM 402

5%

2

1

R9712

4.7K

402

MF-LF

5% 1/16W

2

1

R9710

402

MF-LF

1/16W

5%

4.7K

2

1

C9711

100pF

5% 50V

402

CERM

2

1

C9710

50V

603

CERM

20%

0.01uF

21

L9710

400-OHM-EMI

SM-1

2

1

C9714

402

CERM

5% 50V

100pF

21

R9711

100

1/16W MF-LF

402

5%

21

R9713

1/16W

100

5%

402

MF-LF

21

R9714

402

MF-LF

1/16W

5%

0

2

1

C9741

402

CERM

50V

5%

10PF

2

1

R9742

MF-LF 402

150

1% 1/16W

2

1

R9740

1%

150

402

1/16W MF-LF

2

1

R9741

MF-LF 402

1% 1/16W

150

2

1

C9742

10PF

50V CERM 402

5%

2

1

C9740

CERM

50V

402

5%

10PF

21

R9700

0

NOSTUFF

4

32

1

L9700

90-OHM

CRITICAL

SM

21

R9702

0

NOSTUFF

21

R9703

NOSTUFF

0

21

R9704

NOSTUFF

0

4

32

1

L9701

CRITICAL

SM

90-OHM

21

R9705

NOSTUFF

0

4

32

1

L9702

CRITICAL

90-OHM

SM

21

R9708

0

NOSTUFF

21

R9709

0

NOSTUFF

4

32

1

L9703

CRITICAL

SM

90-OHM

21

R9715

NOSTUFF

0

31

27

19

34

33

24

17

29

22

30

28

16

15

14

13

12

11

32

10

9

25

18

26

1

2

3

4

5

6

7

8

20

J9710

MINI-DVI-M51

CRITICAL

F-ST-SM

12

D9700

NOSTUFF

CASE425

MMSZ4681XXG

3

14

17

2

U9760

TSSOP

74LC125

2

1

C9760

20%

CERM

10V

402

0.1UF

21

R9760

1/16W

402

MF-LF

33

5%

21

R9761

1/16W

33

MF-LF

402

5%

6

14

47

5

U9760

74LC125

TSSOP

2

1

C9762

10PF

CERM

50V

5%

402

2

1

C9763

10PF

402

CERM

5% 50V

11

14

13

7

12

U9760

TSSOP

74LC125

2

1

C9730

402

CERM

10V

0.1UF

20%

8

14

10

7

9

U9760

TSSOP

74LC125

2

1

C9720

402

X5R

16V

10%

0.1UF

2

1

C9721

0.1UF

402

X5R

16V

10%

2

1

C9731

CERM

6.3V

20%

10uF

805-1

21

D9710

SOD-123

B0530WXF

21

F9710

0.5AMP-13.2V

SM-LF

CRITICAL

21

L9740

27NH-200MA

0402

2

1

C9743

50V CERM

5%

10PF

402

NOSTUFF

2

1

C9744

NOSTUFF

50V CERM

5%

10PF

402

2

1

C9745

50V CERM

5%

10PF

402

NOSTUFF

21

L9741

0402

27NH-200MA

21

L9742

27NH-200MA

0402

21

L9761

27NH-200MA

0402

21

L9760

27NH-200MA

0402

2

1

R9790

49.9

MF-LF

1/16W

402

1%

NOSTUFF

2

1

R9791

1/16W

402

MF-LF

1%

49.9

NOSTUFF

2

1

R9793

1/16W

402

MF-LF

1%

49.9

NOSTUFF

2

1

R9792

402

1/16W

49.9

MF-LF

1%

NOSTUFF

2

1

R9795

49.9

1/16W

402

MF-LF

1%

NOSTUFF

2

1

R9794

49.9

1%

MF-LF

1/16W

402

NOSTUFF

16

13

10

6

3

14

11

5

2

1

8

15

12

9

7

4

U9730

TS3V330

CRITICAL

SOP

051-7039

H

9797

External Display Conns

SYNC_DATE=(MASTER)

SYNC_MASTER=M51_DAVE

GPU_DDC_A_DATA

GPU_DDC_A_CLK

VIDEO_MUX_BLU

SB_CRT_TVOUT_MUX

TMDS_CONN_CLKP

TMDS_DATA_N<1>

TMDS_DATA_P<0>

GPU_BLU

GPU_GRN

GPU_TV_Y

GPU_TV_C

VIDEO_MUX_RED

VIDEO_MUX_GRN

VGA_BLU

VGA_RED

VGA_GRN

DVI_CHASSIS_33

GPU_HPD

VGA_GRN

VGA_RED

TMDS_CONN_DN<1>

TMDS_CONN_DP<0>

PP5V_S0_DDC

MIN_LINE_WIDTH=0.38 mm

VOLTAGE=5V

MIN_NECK_WIDTH=0.25 mm

TMDS_CONN_DP<2>

VGA_BLU

TMDS_CONN_DP<1>

VGA_HSYNC

TMDS_CONN_DN<2>

TMDS_CONN_DN<0>

VGA_VSYNC

DVI_HPD_UF

DVI_DDC_CLK_UF

DVI_DDC_DATA_UF

DVI_DDC_CLK_UF

=PP3V3_S0_VIDEO

DVI_DDC_DATA

DVI_DDC_CLK

PP5V_S0

PP5V_S0_DDC_DIODE

MIN_NECK_WIDTH=0.25 mm

VOLTAGE=5V MIN_LINE_WIDTH=0.38 mm

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.38 mm

PP5V_S0_DDC_FUSE

VOLTAGE=5V

VGA_HSYNC

VGA_VSYNC_R

GPU_H2SYNC

GPU_HSYNC_BUF

VGA_VSYNC

TMDS_DATA_N<2>

TMDS_DATA_N<0>

TMDS_CONN_DN<0>

=PP3V3_S0_VIDEO

TMDS_DATA_P<1>

TMDS_CONN_DP<1>

TMDS_CONN_DP<2>

TMDS_CONN_CLKN

TMDS_CONN_CLKP

=PP3V3_S0_VIDEO

TMDS_CONN_DN<1>

GPU_VSYNC_BUF

=PP3V3_S0_VIDEO

TMDS_CONN_CLKN

=PP3V3_S0_VIDEO

DVI_DDC_DATA_UF

TMDS_DATA_P<2>

TMDS_CLK_N

VGA_HSYNC_R

GPU_RED

PP5V_S0_DDC

DVI_HPD_UF

GND_CHASSIS_DVI

TMDS_CONN_DP<0>

GPU_V2SYNC

TMDS_CONN_DN<2>

GPU_TV_COMP

=PP3V3_S0_VIDEO

TMDS_CLK_P

83 75

97

59

97

94

5

94

85

22

97

85

97

85

97

3

97 85

97

85

97

3

85

97

3

97

3

97

3

97

85

97

6

97

85

97

85

3

85

www.Vinaﬁx.vn

Preliminary

Apple IMAC M51 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual