Anritsu MP1632A Data Sheet

DIGIT AL TRANSMISSION MEASURING INSTRUMENTS
334
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DIGITAL DATA ANALYZER
MP1632A
Core networks and computer networks are becoming increasingly rapid as the volume of data transmitted in this multimedia data is growing. In addition to the STM-16/OC-48 (2.488 Gbit/s), Fibre chan­nel, Giga-bit Ethernet, etc. are being commercialized. Compact and low-cost BERTSs (Bit Error Rate Test Sets) are required for produc­tion inspections of all kinds of transfer devices, optical modules, and logic devices.
The MP1632A realizes a compact and low-cost solution that incor­porates existing measuring equipment (MP1652A Pulse Pattern Generator and MP1653A Error Detector) into one cabinet.
Features
3.2 Gb/s PPG and ED in one cabinet
Eye diagram measurement and burst signal measurement supported
Performance and functions
Easy to view, superb operability
The MP1632A comes with a large, color LCD with touch screen. Moreover, it employs the Microsoft Windows®operating system ver­sion 3.1. In addition to the graphic display of measurement results, customized screens enable one-key and one-parameter operation.
High-quality pulse pattern generator
Programmable patterns of 8 Mb max, PRBS patterns [(27– 1) to (2
31
– 1), variable mark ratio], and zero substitution patterns can be generated. Moreover , v ariable cross-point of data output w a v ef orm is also supported.
H: 100 ps/div, V: 1 V/div MU163220A output waveform (3.2 GHz)
Error detector with many functions
High input sensitivity (25 mVp-p*) and wide phase margin (250 ps*) performance is provided. Phase margin and threshold margin can be measured using various error rates. Eye diagram displa y is also sup­ported. Moreover, the autosearch function enables PRBS pattern search in addition to ordinary phase and threshold search.
*
Typical values at 3 Gb/s, PRBS 223– 1
Internal synthesizer with high signal purity (Option)
Generates highly pure signals with SSB phase noise characteristics of –85 dBc/Hz or less (10 kHz offset).
Support of various applications
Testing of SDH/SONET (STM-0, 1, 4, 16/OC-1, 3, 12, 48) devices and modules, research and development on WDM components, Fibre channels, Giga-bit Ethernet, evaluation of E/O and O/E mod­ule, GaAs IC, and high-speed ASIC/FPGAs
GPIB
OPTION
335
DIGIT AL TRANSMISSION MEASURING INSTRUMENTS
9
Specifications
MU163220A 3.2G Pulse Pattern Generator
Operating frequency 10 MHz to 3.2 GHz External clock input 0.5 to 2 Vp-p
Pseudo random pattern (PRBS)
Pattern length: 2
n
– 1 (n: 7, 9, 11, 15, 20, 23, 31)
Mark ratio: 1/2, 1/4, 1/8, 0/8, 1/2, 3/4, 7/8, 8/8 AND bit shift upon mark ratio setting: 1, 3 bits
Data pattern
Generation pattern
Data length: 2 to 8,338,608 bits
Zero substitution pattern
Continuous 0 bit length: 1 to (pattern length – 1) bits Pattern length: 2
n
(n: 7, 9, 11, 15)
Error insertion
Error ratio: 10
–n
(n: 3, 4, 5, 6, 7, 8, 9), single error
External error input: Provided
Number of outputs: 2 (DATA/DATA, independent) Amplitude: 0.5 to 2 Vp-p (10 mV steps) Offset voltage
V
OH
: –2 to +2 V (5 mV steps)
Display: V
OH
, VTH, and VOLselectable
Rise/fall time: 80 ps (10% to 90% of amplitude)
Data output
Pattern jitter: 30 psp-p Waveform distor tion: 10% or 0.1 V of amplitude, whichever is greater Load impedance: 50 (with back termination) Connector: SMA
DATA/DATA tracking: DATA amplitude and offset voltage can be set to same value as DATA. Crosspoint adjustment function: Provided
Number of output: 2 (CLOCK/CLOCK, independent) Amplitude: 0.5 to 2 Vp-p (10 mV steps) Offset voltage
V
OH
: –2 to +2 V (5 mV steps)
Clock output Display: V
OH
, VTH, and VOLselectable Rise/fall time: 80 ps (10% to 90% of amplitude) Load impedance: 50 (with back termination) Connector: SMA Clock delay: –1 to +1 ns (2 ps steps)
External burst trigger input
Input level: 0/–1 V, connector: SMA
Internal burst signal Burst cycle: 2 µs to 50 ms (1 µs steps); Enable length: 1 µs to 49.999 ms (1 µs steps) Burst trigger output Output level: 0/–1 V, connector: SMA
Number of outputs: 1 (1/8 clock, variable pattern synchronization output selectable)
Sync signal output Output level: 0/–1 V
Connector: SMA
Operating temperature +5 to +45˚C Power 200 VA Dimensions and mass 232 (W) x 49 (H) x 449 (D) mm, 4.5 kg
MU163240A 3.2G Error Detector
Operating frequency 10 MHz to 3.2 GHz
Input waveform: NRZ Input voltage: 0.5 to 4 Vp-p
Data input Variable threshold voltage: –4 to +4 V (1 mV steps)
Termination: Connected to GND, –2 V or +3 V via 50 Connector: SMA
Input waveform: Square wave (<0.5 GHz), square wave or sine wave (0.5 GHz), duty: 50% Input amplitude: 0.5 to 4 Vp-p
Clock input
Variable input delay: –1 to +1 ns (2 ps steps) Polarity inversion: POS/NEG inversion selectable Termination: Connected to GND, –2 V or +3 V via 50 Connector: SMA
Auto search function Phase, threshold, PRBS patter n
Pseudo random pattern (PRBS)
Pattern length: 2
n
– 1 (n: 7, 9, 11, 15, 20, 23, 31)
Marker ratio: 1/2, 1/4, 1/8, 0/8, 1/2, 3/4, 7/8, 8/8 AND bit shift upon marker ratio setting: 1, 3 bits
Receive pattern Data pattern
Data length: 2 to 8,338,608 bits
Zero substitution pattern
Continuous 0 bit length: 1 to (pattern length – 1) bits Pattern length: 2
n
(n: 7, 9, 11, 15) Sync mode Normal, frame Sync threshold AUTO or 10–n(n: 2, 3, 4, 5, 6, 7, 8) Error detection mode Omission, insertion, total
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