Analog Devices DAC8248HS, DAC8248HP, DAC8248GP, DAC8248FW, DAC8248FP Datasheet

Dual 12-Bit (8-Bit Byte)

a

FEATURES
Two Matched 12-Bit DACs on One Chip
12-Bit Resolution with an 8-Bit Data Bus
Direct Interface with 8-Bit Microprocessors
Double-Buffered Digital Inputs
RESET to Zero Pin
12-Bit Endpoint Linearity (61/2 LSB) Over Temperature
15 V to 115 V Single Supply Operation
Latch-Up Resistant
Improved ESD Resistance
Packaged in a Narrow 0.3" 24-Pin DIP and 0.3" 24-Pin

SOL Package

Available in Die Form
APPLICATIONS

Multichannel Microprocessor-Controlled Systems
Robotics/Process Control/Automation
Automatic Test Equipment
Programmable Attenuator, Power Supplies, Window

Comparators
Instrumentation Equipment
Battery Operated Equipment

GENERAL DESCRIPTION

The DAC8248 is a dual 12-bit, double-buffered, CMOS digital­to-analog converter. It has an 8-bit wide input data port that inter­faces directly with 8-bit microprocessors. It loads a 12-bit word in
two bytes using a single control; it can accept either a least signifi­cant byte or most significant byte first. For designs with a 12-bit or
16-bit wide data path, choose the DAC8222 or DAC8221.

FUNCTIONAL BLOCK DIAGRAM

Double-Buffered CMOS D/A Converter

DAC8248

PIN CONNECTIONS

24-Pin 0.3" Cerdip (W Suffix),

24-Pin Epoxy DIP (P Suffix),

24-Pin SOL (S Suffix)

The DAC8248’s double-buffered digital inputs allow both
DAC’s analog output to be updated simultaneously. This is par­ticularly useful in multiple DAC systems where a common

LDAC signal updates all DACs at the same time. A single
RESET pin resets both outputs to zero.

The DAC8248’s monolithic construction offers excellent DAC­to-DAC matching and tracking over the full operating tempera­ture range. The DAC consists of two thin-film R-2R resistor
ladder networks, two 12-bit, two 8-bit, and two 4-bit data regis­ters, and control logic circuitry. Separate reference input and
feedback resistors are provided for each DAC. The DAC8248

(continued on page 4)

REV. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] Fax: [phone]

DAC8248–SPECIFICA TIONS

ELECTRICAL CHARACTERlSTICS

(@ VDD = +5 V or +15 V; V

REF A

= V

= +10 V; V

REF B

OUTA

= V

= 0 V; AGND = DGND = 0 V;

OUT B

TA = Full Temp Range specified in Absolute Maximum Ratings; unless otherwise noted. Specifications apply for DAC A and DAC B.)

DAC8248

Parameter Symbol Conditions Min Typ Max Units

STATIC ACCURACY

Resolution N 12 Bits
Relative Accuracy INL DAC8248A/E/G ± 1/2 LSB

DAC8248F/H ±1 LSB
Differential Nonlinearity DNL All Grades are Guaranteed Monotonic ±1 LSB
Full-Scale Gain Error

1

G

FSE

DAC8248A/E ±1 LSB

DAC8248G ±2 LSB

DAC8248F/H ±4 LSB
Gain Temperature Coefficient

(∆Gain/∆Temperature) TCG

FS

(Notes 2, 3) ±2 ±5 ppm/°C

All Digital Inputs = 0s
Output Leakage Current I

I

(Pin 2), I

OUT A

Input Resistance (V

(Pin 24) TA = Full Temperature Range ±50 nA

OUT B

REF A, REF B

)R

Input Resistance Match

LKG

∆R

REF

R

REF

REF

TA = +25°C ±5 ±10

(Note 4) 8 11 15 kΩ

±0.2 ±1%

DIGITAL INPUTS

Digital Input High V
Digital Input Low V
Input Current (V

or V

and V

DD

= 0 V TA = +25°C ±0.001 ±1 µA

IN

INL

or V

)IINTA = Full Temperature Range ±10 µA

INH

Input Capacitance C

(Note 2)

INH

INL

IN

VDD = +5 V 2.4 V

V

= +15 V 13.5 V

DD

VDD = +5 V 0.8 V

V

= +15 V 1.5 V

DD

DB0–DB11 10 pF

WR, LDAC, DAC A/DAC B,

LSB/MSB, RESET 15 pF

POWER SUPPLY

Supply Current I

DD

Digital Inputs = V

Digital Inputs = 0 V or V
DC Power Supply Rejection Ratio PSRR ∆V

= ±5%

DD

INL

or V

DD

INH

2mA

10 100 µA

(∆Gain/∆VDD) 0.002 %/%

AC PERFORMANCE CHARACTERISTICS

Propagation Delay
Output Current Setting Time

5, 6

6, 7

Output Capacitance C

2

t

PD

t

S

O

TA = +25°C 350 ns

TA = +25°C1µs

Digital Inputs = All 0s

C

OUT A

, C

OUT B

90 pF
Digital Inputs = All 1s
C

AC Feedthrough at FT

I

or I

OUT A

OUT B

FT

, C

OUT A

A

V

REF A

to I

OUT B

OUT A

; V

= 20 V p-p

REF A

f = 100 kHz; TA = +25°C –70 dB
V

B

REF B

to I

OUT B

; V

= 20 V p-p

REF B

120 pF

f = 100 kHz; TA = +25°C –70 dB

–2–

REV. B

DAC8248

Parameter Symbol Conditions DAC8248 Units

= +5 V VDD = +15 V

V

Switching Characteristics +258C –408C to +858C –558C to +1258C All Temps

(Notes 2, 8) (Note 9) (Note 10)

LSB/MSB Select to

Write Set-Up Time t

CBS

130 170 180 80 ns min

LSB/MSB Select to

Write Hold Time t

CBH

0 0 0 0 ns min

DAC Select to

Write Set-Up Time t

AS

180 210 220 80 ns min

DAC Select to

Write Hold Time t

AH

0 0 0 0 ns min

LDAC to

Write Set-Up Time t

LS

120 150 160 80 ns min

LDAC to

Write Hold Time t

LH

0 0 0 0 ns min

Data Valid to

Write Set-Up Time t

DS

160 210 220 70 ns min

Data Valid to

Write Hold Time t
Write Pulse Width t
LDAC Pulse Width t
Reset Pulse Width t

NOTES

11

Measured using internal R

12

Guaranteed and not tested.

13

Gain TC is measured from +25°C to T

14

Absolute Temperature Coefficient is approximately +50 ppm/° C.

15

From 50% of digital input to 90% of final analog output current. V

16

WR, LDAC = 0 V; DB0–DB7 = 0 V to VDD or VDD to 0 V.

17

Settling time is measured from 50% of the digital input change to where the output settles within 1/2 LSB of full scale.

18

See Timing Diagram.

19

These limits apply for the commercial and industrial grade products.

10

These limits also apply as typical values for VDD = +12 V with +5 V CMOS logic levels and TA = +25°C.

Specifications subject to change without notice.

FB A

and R

DH
WR
LWD
RWD

. Both DAC digital inputs = 1111 1111 1111.

FB B

or from +25°C to T

MIN

MAX

.

REF A

0 0 0 10 ns min
130 150 170 90 ns min
100 110 130 60 ns min
80 90 90 60 ns min

= V

REF B

DD

= +10 V; OUT A, OUT B load = 100 Ω, C

= 13 pF.

EXT

REV. B

Burn-In Circuit

–3–

DAC8248

(continued from page 1)

operates on a single supply from +5 V to +15 V, and it dissi­pates less than 0.5 mW at +5 V (using zero or V

logic levels).

DD

The device is packaged in a space-saving 0.3", 24-pin DIP.
The DAC8248 is manufactured with PMI’s highly stable thin-

film resistors on an advanced oxide-isolated, silicon-gate,
CMOS technology. PMI’s improved latch-up resistant design
eliminates the need for external protective Schottky diodes.

ABSOLUTE MAXIMUM RATINGS

(TA = +25°C, unless otherwise noted.)

VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, +17 V

V

to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, +17 V

DD

AGND to DGND . . . . . . . . . . . . . . . . . . –0.3 V, V

Digital Input Voltage to DGND . . . . . . . –0.3 V, V

I

, I

OUT A

V

REF A

V

RFB A

to AGND . . . . . . . . . . . . . . –0.3 V, VDD +0.3 V

OUT B

, V
, V

to AGND . . . . . . . . . . . . . . . . . . . . . . . .±25 V

REF B

to AGND . . . . . . . . . . . . . . . . . . . . . . . . ±25 V

RFB B

+0.3 V

DD

+0.3 V

DD

Operating Temperature Range

AW Version . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C

EW, FW, FP Versions . . . . . . . . . . . . . . . . –40°C to +85°C

GP, HP, HS Versions . . . . . . . . . . . . . . . . . . .0°C to +70°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C

Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C

Package Type u

1

JA

u

JC

Units

24-Pin Hermetic DIP (W) 69 10 °C/W
24-Pin Plastic DIP (P) 62 32 °C/W
24-Pin SOL (S) 72 24 °C/W

NOTE

1

u

specified for worst case mounting conditions, i.e., uJA is specified for device in

JA

socket for cerdip and P-DIP packages; uJA is specified for device soldered to printed
circuit board for SOL package.

CAUTION

1. Do not apply voltages higher than VDD or less than GND
potential on any terminal except V

and RFB.

REF

2. The digital control inputs are Zener-protected; however,
permanent damage may occur on unprotected units from
high energy electrostatic fields. Keep units in conductive
foam at all times until ready to use.

3. Do not insert this device into powered sockets; remove
power before insertion or removal.

4. Use proper antistatic handling procedures.

5. Devices can suffer permanent damage and/or reliability deg­radation if stressed above the limits listed under Absolute
Maximum Ratings for extended periods. This is a stress rat­ing only and functional operation at or above this specifica­tion is not implied.

ORDERING GUIDE

1

Relative
Accuracy Gain Error Temperature Package

Model (+5 V or +15 V) (+5 V or +15 V) Range Description

DAC8248AW

2

±1/2 LSB ±1 LSB –55°C to +125°C 24-Pin Cerdip
DAC8248EW ±1/2 LSB ±1 LSB –40°C to +85°C 24-Pin Cerdip
DAC8248GP ±1/2 LSB ±2 LSB 0°C to +70°C 24-Pin Plastic DIP
DAC8248FW ±1 LSB ±4 LSB –40°C to +85°C 24-Pin Cerdip
DAC8248HP ±1 LSB ±4 LSB 0°C to +70°C 24-Pin Plastic DIP
DAC8248FP ±1 LSB ±4 LSB –40°C to +85°C 24-Pin Plastic DIP
DAC8248HS3±1 LSB ±4 LSB 0°C to +70°C 24-Pin SOL

NOTES

1

Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages.

2

For devices processed in total compliance to MIL-STD-883, add/883 after part number. Consult factory for 883 data sheet.

3

For availability and burn-in information on SO and PLCC packages, contact your local sales office.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the DAC8248 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

–4–

REV. B

DICE CHARACTERISTICS

Die Size 0.124 × 0.132 inch, 16,368 sq. mils

(3.15

×

3.55 mm, 10.56 sq. mm)

DAC8248

11. AGND 13. NC

12. I

OUTA

13. R

FB A

14. V

REF A

15. DGND 17.

16. DB7(MSB) 18.

17. DB6 19.

18. DB5 20.

19. DB4 21. V

10. DB3 22. V

11. DB2 23. R

12. NC 24. I
SUBSTRATE (DIE BACKSIDE) IS INTERNALLY

CONNECTED TO V

14. DB1

15. DB0(LSB)

16. RESET

.

DD

LSB/MSB
DAC A/DAC B

LDAC
WR

DD
REF B
FB B

OUT B

W AFER TEST LIMITS

@ VDD = +5 V or +15 V, V

REF A

= V

= +10 V, V

REF B

OUT A

= V

= 0 V; AGND = DGND = 0 V; TA = 258C.

OUT B

DAC8248G

Parameter Symbol Conditions Limit Units

Relative Accuracy INL Endpoint Linearity Error ±1 LSB max
Differential Nonlinearity DNL All Grades are Guaranteed Monotonic ±1 LSB max
Full-Scale Gain Error

1

G

FSE

Digital Inputs = 1111 1111 1111 ±4 LSB max

Output Leakage Digital Inputs = 0000 0000 0000

(I

, I

OUT A

)I

OUT B

LKG

Pads 2 and 24 ±50 nA max

Input Resistance

(V

, V

)R

REF B

Input ∆R

V

REF A

REF A

, V

REF B

Resistance Match R

Digital Input High V
Digital Input Low V
Digital Input Current I

Supply Current I

REF

REF
REF
INH

INL

IN
DD

Pads 4 and 22 8/15 kΩ min/kΩ max

±1 % max
VDD = +5 V 2.4 V min
V

= +15 V 13.5 V min

DD

VDD = +5 V 0.8 V max
V

= +15 V 1.5 V max

DD

VIN = 0 V or VDD; V
All Digital Inputs V
All Digital Inputs 0 V or V

INL

INL

or V

or V

DD

INH

INH

±1 µA max

2 mA max

0.1 mA max

DC Supply Rejection

(∆Gain/∆VDD) PSR ∆VDD = ±5% 0.002 %/% max

NOTES

1

Measured using internal R

Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.

FB A

and R

FB B

.

REV. B

–5–