ANALOG DEVICES AD5543-EP Service Manual

Current Output/Serial

Data Sheet

FEATURES

−1/+2 LSB DNL
±3 LSB INL
Low noise: 12 nV/√Hz
Low power: I

0.5 μs settling time
4Q multiplying reference input
2 mA full-scale current ± 20%, with V
Built-in RFB facilitates voltage conversion
3-wire interface
Ultracompact 8-lead MSOP and 8-lead SOIC packages

ENHANCED PRODUCT FEATURES

Supports defense and aerospace applications (AQEC)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request

APPLICATIONS

Automatic test equipment
Instrumentation
Digitally controlled calibration
Industrial control PLCs

= 10 μA

DD

= 10 V

REF

Input, 16-Bit DAC

AD5543-EP

FUNCTIONAL BLOCK DIAGRAM

AD5543-EP

V

DD

V

CLK

REF

CS

SDI

CONTROL

LOGIC

DAC

16

DAC

REGISTER

16

16-BIT SHIFT

REGISTER

Figure 1.

R

FB

I

OUT

GND

10082-001

GENERAL DESCRIPTION

The AD5543-EP is a precision 16-bit, low power, current
output, small form factor digital-to-analog converter (DAC). It
is designed to operate from a single 5 V supply with a ±10 V
multiplying reference.

The applied external reference, V
output current. An internal feedback resistor (R
R-2R and temperature tracking for voltage conversion when
combined with an external op amp.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

, determines the full-scale

REF

) facilitates the

FB

A serial-data interface offers high speed, 3-wire microcontroller­compatible inputs using serial data in (SDI), clock (CLK), and
chip select (

CS

).

The AD5543-EP is packaged in an ultracompact (3 mm × 4.7 mm)
8-lead MSOP package.

Full details about this enhanced product are available in the

AD5543 data sheet, which should be consulted in conjunction

with this data sheet.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2012 Analog Devices, Inc. All rights reserved.

AD5543-EP Data Sheet

TABLE OF CONTENTS

Features.............................................................................................. 1

Enhanced Product Features ............................................................ 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

REVISION HISTORY

2/12—Revision 0: Initial Version

Timing Diagram............................................................................4

Absolute Maximum Ratings ............................................................5

ESD Caution...................................................................................5

Pin Configuration and Function Descriptions..............................6

Typical Performance Characteristics..............................................7

Outline Dimensions..........................................................................9

Ordering Guide .............................................................................9

Rev. 0 | Page 2 of 12

Data Sheet AD5543-EP

SPECIFICATIONS

VDD = 5 V ± 10%, VSS = 0 V, I

Table 1.

Parameter Symbol Condition 5 V ± 10% Unit

STATIC PERFORMANCE1

Resolution N 1 LSB = V
Relative Accuracy INL ±3 LSB max
Differential Nonlinearity DNL Monotonic −1/+2 LSB max
Output Leakage Current I
Data = 0x0000, TA = TA maximum 20 nA max
Full-Scale Gain Error G
Full-Scale Temperature Coefficient2 TCVFS 1 ppm/°C typ

REFERENCE INPUT

V

Range V

REF

Input Resistance R
Input Capacitance2 C

ANALOG OUTPUT

Output Current I
Output Capacitance2 C

LOGIC INPUTS AND OUTPUT

Logic Input Low Voltage VIL 0.8 V max
Logic Input High Voltage VIH 2.4 V min
Input Leakage Current IIL 10 μA max
Input Capacitance2 C

INTERFACE TIMING

2, 4

Clock Input Frequency f
Clock Width High tCH 10 ns min
Clock Width Low tCL 10 ns min
CS to Clock Setup

Clock to CS Hold
Data Setup tDS 5 ns min
Data Hold tDH 10 ns min

SUPPLY CHARACTERISTICS

Power Supply Range V
Positive Supply Current IDD Logic inputs = 0 V 10 μA max
Power Dissipation P
Power Supply Sensitivity PSS ΔVDD = ±5% 0.006 %/% max

AC CHARACTERISTICS4

Output Voltage Settling Time tS To ±0.1% of full scale, 0.5 μs typ
Data = 0x0000 to 0xFFFF to 0x0000
Reference Multiplying Bandwidth BW V
DAC Glitch Impulse Q V
Feedthrough Error V
Digital Feedthrough Q CS = 1 and f
Total Harmonic Distortion THD V
Output Spot Noise Voltage eN f = 1 kHz, BW = 1 Hz 12 nV/√Hz

1

All static performance tests (except I

the amplifier output. The +IN op amp is grounded, and the DAC I

2

These parameters are guaranteed by design and are not subject to production testing.

3

All ac characteristic tests are performed in a closed-loop system using an AD8038 I-to-V converter amplifier except for THD where an AD8065 was used.

4

All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V.

= virtual GND, GND = 0 V, V

OUT

Data = 0x0000, TA = 25°C 10 nA max

OUT

Data = 0xFFFF ±1/±4 mV typ/max

FSE

−15/+15 V min/max

REF

5 kΩ typ3

REF

5 pF typ

REF

Data = 0xFFFF 2 mA typ

OUT

Code dependent 200 pF typ

OUT

10 pF max

IL

50 MHz

CLK

t

0 ns min

CSS

t

10 ns min

CSH

4.5/5.5 V min/max

DD RANGE

Logic inputs = 0 V 0.055 mW max

DISS

REF

REF

Data = 0x0000, V

OUT/VREF

REF

) are performed in a closed-loop system using an external precision OP177 I-to-V converter amplifier. The RFB terminal is tied to

OUT

is tied to the −IN op amp. Typical values represent average readings measured at 25°C.

OUT

= 10 V, TA = full operating temperature range, unless otherwise noted.

REF

/216 = 153 μV when V

REF

= 10 V 16 Bits

REF

= 100 mV rms, data = 0xFFFF 6.6 MHz typ
= 0 V, data = 0x7FFF to 0x8000 7 nV-sec

= 100 mV rms, same channel −83 dB

REF

= 1 MHz 7 nV-sec

CLK

= 5 V p-p, data = 0xFFFF, f = 1 kHz −103 dB typ

Rev. 0 | Page 3 of 12

AD5543-EP Data Sheet

CLK

TIMING DIAGRAM

SDI

CS

D15 D14 D13 D12 D11 D10 D9 D8 D1 D0

t

t

CSS

DS

t

DH

t

CH

t

CL

t

CSH

10082-016

Figure 2. Timing Diagram

Rev. 0 | Page 4 of 12