Analog Devices AD5247 Datasheet

128-Position I2C Compatible

FEATURES

128-position
End-to-end resistance 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Ultracompact SC70-6 (2 mm × 2.1 mm) package

2

C® compatible interface

I
Full read/write of wiper register
Power-on preset to midscale
Single supply 2.7 V to 5.5 V
Low temperature coefficient 45 ppm/°C
Low power, I
Wide operating temperature –40°C to +125°C
Evaluation board available

APPLICATIONS

Mechanical potentiometer replacement in new designs
Transducer adjustment of pressure, temperature, position,

chemical, and optical sensors
RF amplifier biasing
LCD brightness and contrast adjustment
Automotive electronics adjustment
Gain control and offset adjustment

GENERAL OVERVIEW

The AD5247 provides a compact 2 mm × 2.1 mm packaged
solution for 128-position adjustment applications. This device
performs the same electronic adjustment function as a
mechanical potentiometer or a variable resistor. Available in
four different end-to-end resistance values (5 kΩ, 10 kΩ, 50 kΩ,
100 kΩ), these low temperature coefficient devices are ideal for
high accuracy and stability variable resistance adjustments.

The wiper settings are controllable through the I
digital interface, which can also be used to read back the present
wiper register control word. The resistance between the wiper
and either end point of the fixed resistor varies linearly with
respect to the digital code transferred into the RDAC

= 3 µA typical

DD

2

C compatible

1

latch.

Digital Potentiometer

AD5247

FUNCTIONAL BLOCK DIAGRAM

V

DD

SDA

SCL

1

Note: The terms digital potentiometer, VR, and RDAC are used

interchangeably in this document.

I2C INTERFACE

WIPER

REGISTER

GND

B

Figure 1.

A

W

03876-0-001

Operating from a 2.7 V to 5.5 V power supply and consuming
3 µA allows for usage in portable battery-operated applications.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

AD5247

TABLE OF CONTENTS

Electrical Characteristics—5 kΩ Version ...................................... 3

Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions ....... 4

Timing Characteristics

5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Versions........................................ 5

Absolute Maximum Ratings............................................................ 6

Typical Performance Characteristics ............................................. 7

Test Circuits..................................................................................... 11

I2C Interface..................................................................................... 12

Operation......................................................................................... 13

Programming the Variable Resistor......................................... 13

Programming the Potentiometer Divider............................... 14

I2C Compatible 2-Wire Serial Bus............................................ 14

REVISION HISTORY

Revision 0: Initial Version

Level Shifting for Bidirectional Interface................................ 15

ESD Protection ........................................................................... 15

Terminal Voltage Operating Range.......................................... 15

Maximum Operating Current.................................................. 15

Power-Up Sequence ................................................................... 15

Layout and Power Supply Bypassing ....................................... 16

Constant Bias to Retain Resistance Setting............................. 16

Evaluation Board........................................................................ 16

Pin Configuration and Function Descriptions........................... 17

Outline Dimensions....................................................................... 18

Ordering Guide .......................................................................... 18

Rev. 0 | Page 2 of 20

AD5247

ELECTRICAL CHARACTERISTICS—5 kΩ VERSION

Table 1. VDD = 5 V ±10% or 3 V ± 10%; VA = +VDD; –40°C < TA < +125°C; unless otherwise noted

Parameter Symbol Conditions Min Typ1 Max Unit

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity2 R-DNL RWB, VA = No Connect –1.5 ±0.1 +1.5 LSB

Resistor Integral Nonlinearity2 R-INL RWB, VA = No Connect –4 ±0.75 +4 LSB

Nominal Resistor Tolerance3 ∆RAB –30 +30 %

Resistance Temperature Coefficient ∆RAB/∆T VA = VDD, Wiper = No Connect 45 ppm/°C

RWB R
DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE

Differential Nonlinearity4 DNL –1 ±0.1 +1 LSB

Integral Nonlinearity4 INL –1 ±0.2 +1 LSB

Voltage Divider Temperature Coefficient ∆VW/∆T Code = 0x40 15 ppm/°C

Full-Scale Error V

Zero-Scale Error V
RESISTOR TERMINALS

Voltage Range5 V

Capacitance6 A CA

Capacitance6 W CW

Common-Mode Leakage ICM V
DIGITAL INPUTS AND OUTPUTS

Input Logic High VIH V

Input Logic Low VIL V

Input Logic High VIH V

Input Logic Low VIL V

Input Current IIL V

Input Capacitance6 C
POWER SUPPLIES

Power Supply Range V

Supply Current IDD V

Power Dissipation7 P

Power Supply Sensitivity PSSR

DYNAMIC CHARACTERISTICS

6, 8

Bandwidth –3 dB BW_5K RAB = 5 kΩ, Code = 0x40 1.2 MHz

Total Harmonic Distortion THDW

VW Settling Time tS V

Resistor Noise Voltage Density e

1

Typical specifications represent average readings at 25°C and VDD = 5 V.

2

Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3

VA = VDD, Wiper (VW) = no connect.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.

DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor terminals A and W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

P

is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

DISS

8

All dynamic characteristics use VDD = 5 V.

Code = 0x00 75 300 Ω

WB

Code = 0x7F –3 –2 0 LSB

WFSE

Code = 0x00 0 +1 +2 LSB

WZSE

GND VDD V

B, W

f = 1 MHz, Measured to GND,
Code = 0x40

f = 1 MHz, Measured to GND,
Code = 0x40

= VDD/2 1 nA

A

= 5 V 2.4 V

DD

= 5 V 0.8 V

DD

= 3 V 2.1 V

DD

= 3 V 0.6 V

DD

= 0 V or 5 V ±1 µA

IN

5 pF

IL

2.7 5.5 V

DD RANGE

= 5 V or VIL = 0 V 3 8 µA

IH

V

DISS

= 5 V or VIL = 0 V, VDD = 5 V 40 µW

IH

= +5 V ± 10%,

V

DD

Code = Midscale

= 1 V rms, VB = 0 V,

V

A

f = 1 kHz

= 5 V, ±1 LSB Error Band 1 µs

A

N_WB

RWB = 2.5 kΩ, RS = 0 Ω 6 nV/√Hz

45 pF

60 pF

±0.003 ±0.05 %/%

0.05 %

Rev. 0 | Page 3 of 20

AD5247

ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS

Table 2. VDD = 5 V ± 10% or 3 V ± 10%; VA = VDD; –40°C < TA < +125°C; unless otherwise noted

Parameter Symbol Conditions Min Typ1 Max Unit

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity2 R-DNL RWB, VA = No Connect –1 ±0.1 +1 LSB
Resistor Integral Nonlinearity2 R-INL RWB, VA = No Connect –2 ±0.25 +2 LSB
Nominal Resistor Tolerance3 ∆RAB –20 +20 %
Resistance Temperature Coefficient ∆RAB/∆T VA = VDD, Wiper = No Connect 45 ppm/°C
RWB R

DC CHARACTERISTICS—POTENTIOMETER
DIVIDER MODE

Differential Nonlinearity4 DNL –1 ±0.1 +1 LSB
Integral Nonlinearity4 INL –1 ±0.2 +1 LSB
Voltage Divider Temperature Coefficient ∆VW/∆T Code = 0x40 15 ppm/°C
Full-Scale Error (50 kΩ, 100 kΩ) V
Zero-Scale Error (50 kΩ, 100 kΩ) V
Full-Scale Error (10 kΩ) V
Zero-Scale Error (10 kΩ) V

RESISTOR TERMINALS

Voltage Range5 V
Capacitance6 A CA

Capacitance6 W CW

Common-Mode Leakage ICM V

DIGITAL INPUTS AND OUTPUTS

Input Logic High VIH V
Input Logic Low VIL V
Input Logic High VIH V
Input Logic Low VIL V
Input Current IIL V
Input Capacitance6 C

POWER SUPPLIES

Power Supply Range V
Supply Current IDD V
Power Dissipation7 P
Power Supply Sensitivity PSSR VDD = +5 V ± 10%, Code = Midscale ±0.01 ±0.02 %/%

DYNAMIC CHARACTERISTICS

6, 8

Bandwidth –3 dB BW

Total Harmonic Distortion THDW VA =1 V rms, f = 1 kHz, RAB = 10 kΩ 0.05 %
VW Settling Time (10 kΩ/50 kΩ/100 kΩ) tS V
Resistor Noise Voltage Density e

1

Typical specifications represent average readings at 25°C and VDD = 5 V.

2

Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3

VA = VDD, Wiper (VW) = no connect.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.

DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor terminals A and W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

P

is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

DISS

8

All dynamic characteristics use VDD = 5 V.

Code = 0x00 75 300 Ω

WB

Code = 0x7F –1 –1 0 LSB

WFSE

Code = 0x00 0 +0.4 +1 LSB

WZSE

Code = 0x7F –2 –0.5 0 LSB

WFSE

Code = 0x00 0 +0.5 +1 LSB

WZSE

GND VDD V

A, W

f = 1 MHz, Measured to GND,
Code = 0x40

f = 1 MHz, Measured to GND,
Code = 0x40

= VDD/2 1 nA

A

= 5V 2.4 V

DD

= 5 V 0.8 V

DD

= 3 V 2.1 V

DD

= 3 V 0.6 V

DD

= 0 V or 5 V ±1 µA

IN

5 pF

IL

2.7 5.5 V

DD RANGE

= 5 V or VIL = 0 V 3 8 µA

IH

VIH = 5 V or VIL = 0 V, VDD = 5 V 40 µW

DISS

= 10 kΩ/50 kΩ/100 kΩ,

R

AB

Code = 0x40

= 5 V ±1 LSB Error Band 2 µs

A

RWB = 5 kΩ, RS = 0 9 nV/√Hz

N_WB

45 pF

60 pF

600/100/40 kHz

Rev. 0 | Page 4 of 20

AD5247

TIMING CHARACTERISTICS—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS

Table 3. VDD = 5 V ± 10% or 3 V ± 10%; VA = VDD; –40°C < TA < +125°C; unless otherwise noted

Parameter Symbol Conditions Min Typ1 Max Unit

I2C INTERFACE TIMING CHARACTERISTICS

(Specifications Apply to All Parts)

SCL Clock Frequency f

t

Bus Free Time between STOP and START t1 1.3 µs

BUF

t

Hold Time (Repeated START) t2

HD;STA

t

Low Period of SCL Clock t3 1.3 µs

LOW

t

High Period of SCL Clock t4 0.6 50 µs

HIGH

t

Setup Time for Repeated START Condition t5 0.6 µs

SU;STA

t

Data Hold Time t6 0.9 µs

HD;DAT

t

Data Setup Time t7 100 ns

SU;DAT

tF Fall Time of Both SDA and SCL Signals t8 300 ns

tR Rise Time of Both SDA and SCL Signals t9 300 ns

t

Setup Time for STOP Condition t10 0.6 µs

SU;STO

1

Typical specifications represent average readings at 25°C and VDD = 5 V.

2

Guaranteed by design and not subject to production test.

3

See timing diagrams ( , Figu , ) for locations of measured values. Figure 31 re 32 Figure 33

2, 3

400 kHz

SCL

After this period, the first clock pulse is
generated. 0.6 µs

Rev. 0 | Page 5 of 20

AD5247

ABSOLUTE MAXIMUM RATINGS

Table 4. TA = 25°C, unless otherwise noted1

Parameter Value

VDD to GND –0.3 V to +7 V
VA, VW to GND VDD
Terminal Current, Ax–Bx, Ax–Wx, Bx–Wx

Pulsed2 ±20 mA

Continuous ±5 mA
Digital Inputs and Output Voltage to GND 0 V to VDD + 0.3 V
Operating Temperature Range –40°C to +125°C
Maximum Junction Temperature (T

) 150°C

JMAX

Storage Temperature –65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Thermal Resistance3 θJA: SC70-6 340°C/W

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

1

Stresses above those listed under Absolute Maximum Ratings may cause

permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those
indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.

2

Maximum terminal current is bounded by the maximum current handling of

the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.

3

Package power dissipation = (T

– TA)/θJA.

JMAX

Rev. 0 | Page 6 of 20