Analog Devices AD5245 a Datasheet

256-Position I2C Compatible

SDA

FEATURES

256-position
End-to-end resistance 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Compact SOT-23-8 (2.9 mm × 3 mm) package
Fast settling time: t
Full read/write of wiper register
Power-on preset to midscale
Extra package address decode pin AD0
Computer software replaces µC in factory programming

applications
Single supply: 2.7 V to 5.5 V
Low temperature coefficient 45 ppm/°C
Low power, I
Wide operating temperature –40°C
Evaluation board available

APPLICATIONS

Mechanical potentiometer replacement in new designs
LCD panel V

COM

LCD panel brightness and contrast control
Transducer adjustment of pressure, temperature, position

chemical, and optical sensors
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment

GENERAL OVERVIEW

= 5 µs typ on power-up

S

= 8 µA

DD

adjustment

to +125°C

Digital Potentiometer

AD5245

FUNCTIONAL BLOCK DIAGRAM

V

DD

SCL

AD0

I2C

INTERFACE

WIPER

REGISTER

POR

GND

Figure 1.

PIN CONFIGURATION

V

GND

SCL

W

DD

1
2

AD5245

3

TOP VIEW

(Not to Scale)

4

Figure 2.

8

A

7

B

6

AD0

5

SDA

A

W

B

03436-A-001

03436-A-002

The AD5245 provides a compact 2.9 mm × 3 mm packaged
solution for 256-position adjustment applications. These devices
perform the same electronic adjustment function as mechanical
potentiometers or variable resistors, with enhanced resolution,
solid-state reliability, and superior low temperature coefficient
performance.

2

The wiper settings are controllable through an I

C compatible
digital interface, which can also be used to read back the wiper
register content. AD0 can be used to place up to two devices on
the same bus. Command bits are available to reset the wiper
position to midscale or to shut down the device into a state of
zero power consumption.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

Operating from a 2.7 V to 5.5 V power supply and consuming
less than 8 µA allows for usage in portable battery-operated
applications.

Note that the terms digital potentiometer, VR, and RDAC are
used interchangeably.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

AD5245

TABLE OF CONTENTS

Electrical Characteristics—5 kΩ Version...................................... 3

Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions....... 4

Timing Characteristics—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Vers ion s 5

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics ............................................. 8

Test Circuits..................................................................................... 12

Theory of Operation ...................................................................... 13

Programming the Variable Resistor......................................... 13

Programming the Potentiometer Divider............................... 14

ESD Protection ........................................................................... 14

Terminal Voltage Operating Range.......................................... 14

Power-Up Sequence ...................................................................14

Layout and Power Supply Bypassing .......................................15

Constant Bias to Retain Resistance Setting............................. 15

Evaluation Board........................................................................ 15

2

I

C Interface..................................................................................... 16

2

I

C Compatible 2-Wire Serial Bus............................................ 16

Outline Dimensions....................................................................... 19

Ordering Guide........................................................................... 19

REVISION HISTORY

3/04—Changed Data Sheet from Rev. 0 to Rev. A

Updated Format.................................................................Universal

Changes to Features ........................................................................ 1

Changes to Applications................................................................. 1

Changes to Figure 1......................................................................... 1

Changes to Electrical Characteristics—5 kΩ Version ................ 3

Changes to Electrical Characteristics—10 kΩ, 50 kΩ,

and 100 kΩ Versions ....................................................................... 4

Changes to Timing Characteristics.............................................. 5

Changes to Absolute Maximum Ratings ...................................... 6

Moved ESD Caution to Page.......................................................... 6

Changes to and Moved Pin Configuration and Function

Descriptions to Page........................................................................ 7

Changes to Figures 22 and 23...................................................... 11

Moved Figure 25 to Figure 26...................................................... 11

Moved Figure 26 to Figure 27...................................................... 11

Moved Figure 27 to Figure 25...................................................... 11

Deleted Figures 31 and 32 ............................................................ 12

Changes to Figure 32, Figure 33 and Figure 34 .........................12

Changes to Rheostat Operation Section .................................... 13

Added Figure 35 ............................................................................13

Changes to Equation 1 and Equation 2 ......................................13

Changes to Table 6 and Table 7 ...................................................13

Added Figure 37 ............................................................................14

Changes to Equation 4.................................................................. 14

Deleted Readback RDAC Value Section..................................... 14

Deleted Level Shifting for Bidirectional Interface Section ...... 14

Moved ESD Protection Section to Page .....................................14

Changes to Figure 38 and Figure 39............................................ 14

Moved Terminal Voltage Operating Range Section to Page.... 14

Changes to Figure 40.....................................................................14

Moved Power-Up Sequence Section to Page ............................. 14

Moved Layout and Power Supply Bypassing Section to Page . 15

Added Constant Bias to Retain Resistance Setting Section..... 15

Added Figure 42 ............................................................................15

Added Evaluation Board Section ................................................15

Added Figure 43 ............................................................................15

2

Moved I

C Interface Section to Page...........................................16

Changes to and Moved I2C Compatible 2-Wire Serial Bus

Section to Page............................................................................... 16

Moved Table 5 and Table 6 to Page ............................................. 17

(Renumbered as Table 8 and Table 9)

Moved Figure 36, Figure 37, and Figure 38 to Page .................. 17

(Renumbered as Figure 44, Figure 45, and Figure 46)

Moved Multiply Devices on One Bus Section to Page .............18

Updated Ordering Guide.............................................................. 19

Updated Outline Dimensions...................................................... 19

2

Moved I

C Disclaimer to Page..................................................... 20

5/03—Revision 0: Initial Version

Rev. A | Page 2 of 20

AD5245

ELECTRICAL CHARACTERISTICS—5 kΩ VERSION

VDD = 5 V ± 10%, or 3 V ± 10%; VA = +VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.

Table 1.

Parameter Symbol Conditions Min Typ1 Max Unit

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity2 R-DNL RWB, V
Resistor Integral Nonlinearity2 R-INL RWB, V
Nominal Resistor Tolerance3 ∆RAB T
Resistance Temperature Coefficient (∆RAB/RAB)/∆T × 106 VAB = VDD, Wiper = no connect 45 ppm/°C
Wiper Resistance RW 50 120 Ω

DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications apply to all VRs)

Differential Nonlinearity4 DNL –1.5 ±0.1 +1.5 LSB
Integral Nonlinearity4 INL –1.5 ±0.6 +1.5 LSB
Voltage Divider Temperature Coefficient (∆VW/VW)/∆T × 106 Code = 0x80 15 ppm/°C
Full-Scale Error V
Zero-Scale Error V

Code = 0xFF –6 –2.5 0 LSB

WFSE

Code = 0x00 0 +2 +6 LSB

WZSE

RESISTOR TERMINALS

Voltage Range5 V

, VB, VW GND VDD V

A

Capacitance6 A, B CA, CB f = 1 MHz, measured to GND,

Capacitance6 W CW f = 1 MHz, measured to GND,

Shutdown Supply Current7 I

A_SD

Common-Mode Leakage ICM V

DIGITAL INPUTS AND OUTPUTS

Input Logic High VIH V
Input Logic Low VIL V
Input Logic High VIH V
Input Logic Low VIL V
Input Current IIL V
Input Capacitance6 C

5 pF

IL

POWER SUPPLIES

Power Supply Range V

2.7 5.5 V

DD RANGE

Supply Current IDD V
Power Dissipation8 P

V

DISS

Power Supply Sensitivity PSS VDD = +5 V ± 10%, Code = Midscale ±0.02 ±0.05 %/%

DYNAMIC CHARACTERISTICS

6, 9

Bandwidth –3 dB BW_5K RAB = 5 kΩ, Code = 0x80 1.2 MHz
Total Harmonic Distortion THDW V
VW Settling Time tS V
Resistor Noise Voltage Density e

R

N_WB

1

Typical specifications represent average readings at +25°C and VDD = 5 V.

2

Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3

VAB = VDD, Wiper (VW) = no connect.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.

DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor terminals A, B, W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

Measured at the A terminal. The A terminal is open circuited in shutdown mode.

8

P

is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

DISS

9

All dynamic characteristics use VDD = 5 V.

= no connect –1.5 ±0.1 +1.5 LSB

A

= no connect –4 ±0.75 +4 LSB

A

= 25°C –30 +30 %

A

90 pF

Code = 0x80

95 pF

Code = 0x80
VDD = 5.5 V 0.01 1 µA

= VB = VDD/2 1 nA

A

= 5 V 2.4 V

DD

= 5 V 0.8 V

DD

= 3 V 2.1 V

DD

= 3 V 0.6 V

DD

= 0 V or 5 V ±1 µA

IN

= 5 V or VIL = 0 V 3 8 µA

IH

= 5 V or VIL = 0 V, VDD = 5 V 44 µW

IH

= 1 V rms, VB = 0 V, f = 1 kHz 0.1 %

A

= 5 V, VB = 0 V, ±1 LSB error band 1 µs

A

= 2.5 kΩ, RS = 0 6 nV/√Hz

WB

Rev. A | Page 3 of 20

AD5245

ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS

VDD = 5 V ± 10%, or 3 V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.

Table 2.

Parameter Symbol Conditions Min Typ1 Max Unit

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity2 R-DNL RWB, V
Resistor Integral Nonlinearity2 R-INL RWB, V
Nominal Resistor Tolerance3 ∆RAB T
Resistance Temperature Coefficient (∆RAB/RAB)/∆T × 106 V
Wiper Resistance RW V

DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications apply to all VRs)

Differential Nonlinearity4 DNL –1 ±0.1 +1 LSB
Integral Nonlinearity4 INL –1 ±0.3 +1 LSB
Voltage Divider Temperature Coefficient (∆VW/VW)/∆T × 106 Code = 0x80 15 ppm/°C
Full-Scale Error V
Zero-Scale Error V

Code = 0xFF –3 –1 0 LSB

WFSE

Code = 0x00 0 1 3 LSB

WZSE

RESISTOR TERMINALS

Voltage Range5 V

, VB, VW GND VDD V

A

Capacitance6 A, B CA, CB f = 1 MHz, measured to GND,

Capacitance6 W CW f = 1 MHz, measured to GND,

Shutdown Supply Current I

A_SD

Common-Mode Leakage ICM V

DIGITAL INPUTS AND OUTPUTS

Input Logic High VIH V
Input Logic Low VIL V
Input Logic High VIH V
Input Logic Low VIL V
Input Current IIL V
Input Capacitance6 C

5 pF

IL

POWER SUPPLIES

Power Supply Range V

2.7 5.5 V

DD RANGE

Supply Current IDD V
Power Dissipation7 P

V

DISS

Power Supply Sensitivity PSS VDD = 5 V ± 10%, Code = Midscale ±0.02 ±0.05 %/%

DYNAMIC CHARACTERISTICS

6, 8

Bandwidth –3 dB BW RAB = 10 kΩ/50 kΩ/100 kΩ,

Total Harmonic Distortion THDW V

VW Settling Time (10 kΩ/50 kΩ/100 kΩ) tS V

Resistor Noise Voltage Density e

R

N_WB

1

Typical specifications represent average readings at +25°C and VDD = 5 V.

2

Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3

VAB = VDD, Wiper (VW) = no connect.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. DNL

specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor terminals A, B, W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

P

is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

DISS

8

All dynamic characteristics use VDD = 5 V.

= no connect –1 ±0.1 +1 LSB

A

= no connect –2 ±0.25 +2 LSB

A

= 25°C –30 +30 %

A

= V

, Wiper = no connect 45 ppm/°C

AB

DD

= 5 V 50 120 Ω

DD

90 pF

Code = 0x80

95 pF

Code = 0x80
VDD = 5.5 V 0.01 1 µA

= VB = VDD/2 1 nA

A

= 5 V 2.4 V

DD

= 5 V 0.8 V

DD

= 3 V 2.1 V

DD

= 3 V 0.6 V

DD

= 0 V or 5 V ±1 µA

IN

= 5 V or VIL = 0 V 3 8 µA

IH

= 5 V or VIL = 0 V, VDD = 5 V 44 µW

IH

600/100/40 kHz

Code = 0x80

=1 V rms, VB = 0 V, f = 1 kHz,

A

= 10 kΩ

R

AB

= 5 V, VB = 0 V,

A

0.1 %

2 µs

±1 LSB error band

= 5 kΩ, RS = 0 9 nV/√Hz

WB

Rev. A | Page 4 of 20

AD5245

TIMING CHARACTERISTICS—5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS

VDD = 5V ± 10%, or 3V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.

Table 3.

Parameter Symbol Conditions Min Typ1 Max Unit

I2C INTERFACE TIMING CHARACTERISTICS

SCL Clock Frequency f
t

Bus Free Time between STOP and START t1 1.3 µs

BUF

t

Hold Time (Repeated START) t2

HD;STA

t

Low Period of SCL Clock t3 1.3 µs

LOW

t

High Period of SCL Clock t4 0.6 µs

HIGH

t

Setup Time for Repeated START Condition t5 0.6 µs

SU;STA

t

Data Hold Time t6 0.9 µs

HD;DAT

t

Data Setup Time t7 100 ns

SU;DAT

tF Fall Time of Both SDA and SCL Signals t8 300 ns
tR Rise Time of Both SDA and SCL Signals t9 300 ns
t

Setup Time for STOP Condition t10 0.6 µs

SU;STO

1

Typical specifications represent average readings at +25°C and VDD = 5 V.

2

Guaranteed by design and not subject to production test.

3

See timing diagrams for locations of measured values.

2, 3

(Specifications Apply to All Parts)

400 kHz

SCL

After this period, the first clock

0.6 µs

pulse is generated.

Rev. A | Page 5 of 20

AD5245

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 4.

Parameter Value

VDD to GND –0.3 V to +7 V
VA, VB, VW to GND VDD
Terminal Current, A to B, A to W, B to W1

Pulsed ±20 mA

Continuous ±5 mA
Digital Inputs and Output Voltage to GND 0 V to +7 V
Operating Temperature Range –40°C to +125°C
Maximum Junction Temperature (T

) 150°C

JMAX

Storage Temperature –65°C to +150°C
Lead Temperature (Soldering, 10 sec) 245°C
Thermal Resistance2 θJA: SOT-23-8 230°C/W

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

1

Maximum terminal current is bounded by the maximum current handling of

the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.

2

Package power dissipation = (T

– TA)/θJA.

JMAX

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. A | Page 6 of 20