Alliance Semiconductor Corporation AS7C31025-15JC, AS7C31025-12TJI, AS7C31025-12TJC, AS7C31025-12TI, AS7C31025-12TC Datasheet

March 2001	AS7C1025
	AS7C31025
	®

5V/3.3V 128Kx8 CMOS SRAM (Revolutionary pinout)

Features

•AS7C1025 (5V version)

•AS7C31025 (3.3V version)

•Industrial and commercial temperatures

•Organization: 131,072 words × 8 bits

•High speed

-12/15/20 ns address access time

-6,7,8 ns output enable access time

•Low power consumption: ACTIVE

-715 mW (AS7C1025) / max @ 12 ns (5V)

-360 mW (AS7C31025) / max @ 12 ns (3.3V)

•Low power consumption: STANDBY

-27.5 mW (AS7C1025) / max CMOS (5V)

-1.8 mW (AS7C31025) / max CMOS (3.3V)

•2.0V data retention

•Easy memory expansion with CE, OE inputs

•Center power and ground

•TTL/LVTTL-compatible, three-state I/O

•JEDEC-standard packages

-32-pin, 300 mil SOJ

-32-pin, 400 mil SOJ

-32-pin TSOP II

•ESD protection ≥ 2000 volts

•Latch-up current ≥ 200 mA

Logic block diagram
VCC
GND
		Input buffer
A0
A1	decoderRow		I/O7
A2		512× 256× 8	ampSense
A3		Array
A4
A5		(1,048,576)
A6
A7			I/O0
A8

Control

WE

Column decoder

circuit

OE

CE

A9

A10

A11

A12

A13

A14

A15

A16

Pin arrangement

32-pin TSOP II

		A0				1		32		A16
		A1				2		31		A15
		A2				3		30		A14
		A3				4		29		A13
						5		28
		CE									OE
I/O0						6	AS7C1025 AS7C31025	27		I/O7
I/O3						11		22		I/O4
I/O1						7		26		I/O6
VCC						8		25		GND
GND						9		24		VCC
I/O2						10		23
										I/O5
						12		21
	WE									A12
	A4					13		20		A11
	A5					14		19		A10
	A6					15		18			A9
	A7					16		17			A8

32-pin SOJ (300 mil)

32-pin SOJ (400 mil)

	A0				1			32					A16
													A15
	A1				2			31
	A2				3			30					A14
	A3				4			29					A13
		CE			5			28
						AS7C1025	AS7C31025						OE
I/O0					6			27					I/O7
I/O1					7			26					I/O6
VCC					8
								25					GND
GND					9			24				VCC
I/O2					10			23					I/O5
I/O3					11			22					I/O4
					12			21					A12
	WE
	A4				13			20					A11
	A5				14			19					A10
	A6				15			18					A9
	A7				16			17					A8

Selection guide

		AS7C1025-12		AS7C1025-15	AS7C1025-20
		AS7C31025-12		AS7C31025-15	AS7C31025-20	Unit
Maximum address access time		12		15	20	ns
Maximum output enable access time		3		4	5	ns
Maximum operating current	AS7C1025	130		85	80	mA
	AS7C31025	100		85	80	mA
Maximum CMOS standby current	AS7C1025	5		5	5	mA
	AS7C31025	5		5	5	mA
Shaded areas contain advance information.
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Copyright © Alliance Semiconductor. All rights reserved.

AS7C1025

AS7C31025

®

Functional description

The AS7C1025 and AS7C31025 are high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 131,072 words × 8 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times (tAA, tRC, tWC) of 12/15/20 ns with output enable access times (tOE) of 6,7,8 ns are ideal

for high-performance applications. The chip enable input CE permits easy memory and expansion with multiple-bank memory systems.

When CE is high the devices enter standby mode. The standard AS7C1025 is guaranteed not to exceed 27.5 mW power consumption in standby mode, and typically requires only 5 mW. Both devices also offer 2.0V data retention.

A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0-I/O7 is

written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive

I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).

A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chips drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active, output drivers stay in high-impedance mode.

All chip inputs and outputs are TTL-compatible, and operation is from a single 5V supply (AS7C1025) or 3.3V supply (AS7C31025). The AS7C1025 and AS7C31025 are packaged in common industry standard packages.

Absolute maximum ratings

Parameter		Device	Symbol	Min	Max	Unit
Voltage on VCC relative to GND		AS7C1025	Vt1	–0.50	+7.0	V
		AS7C31025	Vt1	–0.50	+5.0	V
Voltage on any pin relative to GND			Vt2	–0.50	VCC + 0.5	V
Power dissipation			PD	–	1.0	W
Storage temperature (plastic)			T	–65	+150	oC
			stg
Ambient temperature with V	applied		T	–55	+125	oC
CC			bias
DC current into outputs (low)			IOUT	–	20	mA

NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Truth table

	CE			WE			OE		Data	Mode
	H			X			X		High Z	Standby (ISB, ISB1)
	L			H			H		High Z	Output disable (ICC)
	L			H			L		DOUT	Read (ICC)
	L			L			X		DIN	Write (ICC)

Key: X = Don’t Care, L = Low, H = High

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AS7C1025

AS7C31025

®

Recommended operating conditions

Parameter			Device	Symbol	Min	Nominal	Max	Unit
Supply voltage			AS7C1025	VCC	4.5	5.0	5.5	V
			AS7C31025	VCC	3.0	3.3	3.6	V
			AS7C1025	VIH	2.2	–	VCC + 0.5	V
Input voltage			AS7C31025	VIH	2.0	–	VCC + 0.5	V
				VIL†	–0.5	–	0.8	V
			commercial	T	0	–	70	oC
Ambient operating temperature				A
			industrial	T	–40	–	85	oC
				A
†V min = –3.0V for pulse width less than t	RC	/2.
IL

DC operating characteristics (over the operating range)1

-12

-15

-20

Parameter

Sym

Test conditions

Device

Min

Max

Min

Max

Min

Max

Unit

Input leakage

| I |

V

CC

= Max, V = GND to V

–

1

–

1

–

1

A

current

LI

IN

CC

Output

| ILO |

VCC = Max, CE = VIH, Vout =

–

1

–

1

–

1

A

leakage

GND to VCC

current

Operating

AS7C1025

–

130

–

120

–

110

power supply

ICC

= VIL, f = fMax, IOUT = 0 mA

mA

CE

AS7C31025

–

100

–

85

–

80

current

ISB

= VIH, f = fMax, fOUT = 0

AS7C1025

–

50

–

40

–

40

mA

Standby

CE

AS7C31025

–

50

–

40

–

40

power supply

≥

VCC–0.2V, VIN ≤

AS7C1025

–

5

–

5

–

5

current1

ISB1

CE

0.2V or

mA

V

≥

V –0.2V, f = 0, f

= 0

OUT

AS7C31025

–

5

–

5

–

5

IN

CC

Output

VOL

IOL = 8 mA, VCC = Min

–

0.4

–

0.4

–

0.4

V

voltage

VOH

IOH = –4 mA, VCC = Min

2.4

–

2.4

–

2.4

–

V

Shaded areas contain advance information.

Capacitance (f = 1 MHz, Ta = 25 oC, VCC = NOMINAL)2

Parameter

Symbol

Signals

Test conditions

Max

Unit

Input capacitance

CIN

A,

CE,

WE,

OE

VIN = 0V

5

pF

I/O capacitance

CI/O

I/O

VIN = VOUT = 0V

7

pF

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