TEXAS INSTRUMENTS XTR117 Technical data

SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
4-20mA Current-Loop Transmitter
XTR117
FEATURES
D LOW QUIESCENT CURRENT: 130µA D 5V REGULATOR FOR EXTERNAL CIRCUITS D LOW SPAN ERROR: 0.05% D LOW NONLINEARITY ERROR: 0.003% D WIDE-LOOP SUPPLY RANGE: 7.5V to 40V D MSOP-8 AND DFN-8 PACKAGES
APPLICATIONS
TRANSMITTER
D SMART TRANSMITTER D INDUSTRIAL PROCESS CONTROL D TEST SYSTEMS D CURRENT AMPLIFIER D VOLTAGE-TO-CURRENT AMPLIFIER
DESCRIPTION
The XTR1 17 i s a p recision current o utput c onverter d esigned to transmit analog 4-20mA s ignals over a n industry-standard current loop. It provides accurate current scaling and output current limit functions.
The on-chip vol tage regulator (5V) can be us ed to power external circuitry. A current return pin (I current used in external circuitry to assure an accurate control of the output current.
The XTR117 is a fundamental building block of smart sensors using 4-20mA current transmission. The XTR117 is specified for operation over the extended industrial temperature range, −40°C to +125°C.
RELATED 4-20mA PRODUCTS
XTR115 5V regulator output and 2.5V reference output XTR116 5V regulator output and 4.096V reference output
NOTE:For 4-20mA complete bridge and RTO conditioner solutions,
see the XTR product family website at www.ti.com.
) senses any
RET
XTR117
V
REG
8
R
IN
I
IN
2
V
IN
I
RET
3
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
                      !     !   
R
1
2.475k
A1
+5V
Regulator
www.ti.com
R 25
R
2
LIM
V+
7
B
6
E
5
IO= 100 V
4
Q1
R
IN
I
O
V
LOOP
R
L
IN
Copyright 2005−2006, Texas Instruments Incorporated
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XTR117
MSOP-8
DGK
BOZ
XTR117
DFN-8
DRB
BOY
SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
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ABSOLUTE MAXIMUM RATINGS
(1)
Power Supply, V+ (referenced to IO pin) +50V. . . . . . . . . . . . . . . .
Input Voltage, (referenced to I
pin) 0V to V+. . . . . . . . . . . . . . . .
RET
Output Current Limit Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
, Short-Circuit Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
REG
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
Operating Temperature Range −55°C to +125°C. . . . . . . . . . . . . . .
Storage Temperature Range −55°C to +125°C. . . . . . . . . . . . . . . . .
Junction Temperature +165°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Rating (Human Body Model) 2000V. . . . . . . . . . . . . . . . . . . . . . .
(Charged Device Model) 1000V. . . . . . . . . . . . . . . . .
(1)
Stresses above these ratings may cause permanent damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible t o damage because very small parametric changes could cause the device not to meet its published specifications.
Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only , an d functional operation of the device at these or any other conditions beyond those specified is not implied.
PACKAGE/ORDERING INFORMATION
(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www .ti.com.
PIN ASSIGNMENTS
Top View
NC
I
RET
XTR117 XTR117
(1)
1
I
2
IN
3
I
4
O
NOTES: (1) NC = No connection. Leave unconnected on PCB.
(2)Connect thermaldie padto I
8
7
6
5
V
REG
V+
B(Base)
E(Emitter)
RET
(1)
1
NC
I
IN
I
RET
I
O
or leave unconnected on PCB.
2
3
4
Exposed
Thermal Die Pad
on
Underside
DFN−8MSOP−8
8
V
REG
V+
7
B(Base)
6
(2)
E (Emitter)
5
2
"##$
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SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
ELECTRICAL CHARACTERISTICS: V+ = +24V
Boldface limits apply over the temperature range, TA = −40°C to +125°C.
All specifications at TA = +25°C, V+ = 24V, RIN = 20k, and TIP29C external transistor, unless otherwise noted.
PARAMETER CONDITION
MIN TYP MAX
OUTPUT
Output Current Equation I
O
Output Current, Linear Range 0.20 25 mA
Over-Scale Limit I Under-Scale Limit I
LIM MIN
I
= 0 0.13 0.20 mA
REG
SPAN
Span (Current Gain) S 100 A/A
(1)
Error
IO = 200µA to 25mA ±0.05 ±0.4 %
vs Temperature TA = −40°C to +125°C ±3 ±20 ppm/°C
Nonlinearity IO = 200µA to 25mA ±0.003 ±0.02 %
INPUT
Offset Voltage (Op Amp) V
OS
IIN = 40µA ±100 ±500 µV
vs Temperature TA = −40°C to +125°C ±0.7 ±6 µV/°C
vs Supply Voltage, V+ V+ = 7.5V to 40V +0.1 +2 µV/V
Bias Current I
B
vs Temperature TA = −40°C to +125°C 150 pA/°C
Noise: 0.1Hz to 10Hz e
n
DYNAMIC RESPONSE
Small-Signal Bandwidth C
= 0, RL = 0 380 kHz
LOOP
Slew Rate 3.2 mA/µs
(2)
V
REG
Voltage 5 V Voltage Accuracy I
= 0 ±0.05 ±0.1 V
REG
vs Temperature TA = −40°C to +125°C ±0.1 mV/°C
vs Supply Voltage, V+ V+ = 7.5V to 40V 1 mV/V vs Output Current See Typical Characteristics
Short-Circuit Current 12 mA
POWER SUPPL Y
Specified Voltage Range V+ +24 V Operating Voltage Range +7.5 +40 V Quiescent Current I
Q
Over Temperature TA = −40°C to +125°C 250 µA
TEMPERATURE RANGE
Specified Range −40 +125 °C Operating Range −55 +125 °C Storage Range −55 +150 °C Thermal Resistance q
JA
MSOP 150 °C/W DFN 53 °C/W
(1)
Does not include initial error or temperature coefficient of R
(2)
Voltage measured with respect to I
RET
pin.
.
IN
XTR117
I
= I
x 100
O
IN
32 mA
−35 nA
0.6 µV
130 200 µA
UNITS
PP
3
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SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
TYPICAL CHARACTERISTICS: V+ = +2.7V to +5.5V
At TA = +25°C, V+ = 24V, RIN = 20k, and TIP29C external transistor, unless otherwise noted.
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45
CURRENT GAIN vs FREQUENCY
40
30
Gain (dB)
20
10
10k 100k
OVER−SCALE CURRENT vs TEMPERATURE
34
With External Transistor
33
32
V+ = 36V
31
30
Over−Scale Current (mA)
29
V+ = 24V
28
−75−
50−250 255075100
C
OUT
R
Frequency (Hz)
V+ = 7.5V
Temperature (_C)
=250
L
= 10nF
180
QUIESCENT CURRENT vs TEMPERATURE
170 160
A)
µ
150
C
=0
OUT
=0
R
L
140 130 120 110
Quiescent Current (
100
90
V+=36V
V+ = 24V
V+ = 7.5V
80
1M
−75−
50−250255075100
125
Temperature (_C)
VOLTAGEvs V
V
−55_
REG
C
Sourcing
Current
5.5 +125_C
5.0
Voltage (V)
+25_C
REG
V
Sinking Current
CURRENT
REG
+25_C
−55_
+125_C
C
4.5
125
101 2 3
Current (mA)
I
REG
4
SPAN ERROR vs TEMPERATURE
OFFSET VOLTAGE DISTRIBUTION
50 40 30 20 10
0
Population
500−450−400−350−300−250−200−150−100
0
50
50
100
Offset Voltage (µV)
150
200
250
300
350
400
450
500
Span Error (m%)
10
20
30
40
50
−75−
50−250255075100
Temperature(_C)
125
4
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SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
APPLICATIONS INFORMATION
BASIC OPERATION
The XTR117 is a precision current output converter designed to transmit analog 4-20mA signals over an industry-standard current loop. Figure 1 shows basic circuit connections with representative simplified input circuitry. The XTR117 is a two-wire current transmitter. Its input current (pin 2) controls the output current. A portion of the output current flows into the V+ power supply, pin 7. The remaining current flows in Q1. External input circuitry connected to the XTR1 17 can be powered from V terminals must be returned to I a local ground for input circuitry driving the XTR117.
The XTR117 is a current-input device with a gain of 100. A current flowing into pin 2 produces IO = 100 x IIN. The input voltage at the IIN pin is zero (referred to the I pin). A voltage input is converted to an input current with an external input resistor, RIN, as shown in Figure 1. Typical full-scale input voltages range from 1V and upward. Full-scale inputs greater than 0.5V are recommend to minimize the ef fects of offset voltage and drift of A1.
. Current drawn from these
REG
, pin 3. The I
RET
RET
pin is
RET
EXTERNAL TRANSISTOR
The external transistor, Q1, conducts the majority of the full-scale output current. Power dissipation in this transistor can approach 0.8W with high loop voltage (40V) and 20mA output current. The XTR117 is designed to use an external transistor to avoid on-chip, thermal-induced errors. Heat produced by Q1 will still cause ambient temperature changes that can influence the XTR117 performance. To minimize these effects, locate Q1 away from sensitive analog circuitry , including XTR117. Mount Q1 so that heat is conducted to the outside of the transducer housing.
The XTR117 is designed to use virtually any NPN transistor with sufficient voltage, current and power rating. Case style and thermal mounting considerations often influence the choice for any given application. Several possible choices are listed in Figure 1. A MOSFET transistor will not improve the accuracy of the XTR117 and is not recommended.
For improved precision use an external voltage reference.
DEVICE VOLTAGE
REF3140 REF3130 REF3125
Use REF32xx for lower drift.
(V
)
REF
4.096V
3.0V
2.5V
Input
Circuitry
5V
V
IN
from I All return current
R
20k
REG
I
REG
IN
I
IN
and I
REF
XTR117
V
REG
8
I
IN
I
2
RET
3
R
1
2.475k
A1
Figure 1. Basic Circuit Connections
+5V
Regulator
Possible choices for Q1(see text):
TYPE PACKAGE
MJE3440
TIP41C
MJD3340
V+ 7
B
6
E
LIM
5
I
O
4
R
R
2
25
Q1
SOT−32 TO−220
D−PAK
C
OUT
10nF
I=100(I
I
O
V
LOOP
R
L
)
IN
5
"##$
SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
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MINIMUM OUTPUT CURRENT
The quiescent current of the XTR117 (typically 130 µA) is the lower limit of its output current. Zero input current (IIN = 0) will produce an IO equal to the quiescent current. Output current will not begin to increase until IIN > IQ/100. Current drawn from V
will be added to
REG
this minimum output current. Up to 3.8mA is available to power external circuitry while still allowing the output current to go below 4mA.
OFFSETTING THE INPUT
A low-scale output of 4mA is produced by creating a 40µA input current. This input current can be created with the proper value resistor from an external reference voltage (V can be used as shown in Figure 2 but will not have the temperature stability of a high quality reference such as the REF3125.
V
REF
R
IN
62.5k
0to160µA
REF
(2.5V )or
...................
40µA
) as shown in Figure 2. V
XTR117
V
REG
8
I
IN
2
A1
REG
MAXIMUM OUTPUT CURRENT
The XTR117 provides accurate, linear output up to 25mA. Internal circuitry limits the output current to approximately 32mA t o protect the transmitter and loop power/measurement circuitry.
It is possible to extend the output current range of the XTR117 by connecting an external resistor from pin 3 to pin 5, to change the current limit value. Since all output current must flow through internal resistors, it is possible to cause internal damage with excessive current. Output currents greater than 45mA may cause permanent damage.
REVERSE-VOLTAGE PROTECTION
The XTR117 low compliance voltage rating (minimum operating voltage) of 7.5V permits the use of various voltage protection methods without compromising operating range. Figure 3 shows a diode bridge circuit which allows normal operation even when the voltage connection lines are reversed. The bridge causes a two diode drop (approximately 1.4V) loss in loop supply voltage. This voltage drop results in a compliance voltage of approximately 9V—satisfactory for most applications. A diode can be inserted in series with the loop supply voltage and the V+ pin to protect against reverse output connection lines with only a 0.7V loss in loop supply voltage.
I
RET
3
R
1
2.475k
Figure 2. Creating Low-Scale Offset
XTR117
V
REG
8
R
IN
I
IN
2
V
IN
I
RET
3
NOTE: (1) Someexamples of zener diodes include: P6KE51 or 1N4755A. Use lower voltage zener diodes with loop power−supply voltages < 30Vfor increased protection. See Over−voltage Surge Protection.
R
1
2.475k
A1
+5V
Regulator
Figure 3. Reverse Voltage Operation and Over-Voltage Surge Protection
V+ 7
B
Q1
6
E
5
R
LIM
R
2
25
IO=100V
R
4
0.01µF
IN
IN
(1)
D
1
IN4148
The diode bridge causes a
1.4Vloss in loopsupplyvoltage. See Reverse−Voltage Protec tion.
MaximumVPSmust be less than minimum voltagerating of the zener diode.
V
R
LOOP
L
6
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SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
OVER-VOLTAGE SURGE PROTECTION
Remote connections to current transmitters can sometimes be subjected to voltage surges. It is prudent to limit the maximum surge voltage applied to the XTR117 t o a s low as practical. Various zener diode an d surge clamping diodes are specially designed for this purpose. Select a clamp diode with as low a voltage rating as possible for best protection. Absolute maximum power-supply rating on the XTR117 is specified at +50V. Keep overvoltages and transients below +50V to ensure reliable operation when the supply returns to normal (7.5V to 40V).
Most surge protection zener diodes have a diode characteristic in the forward direction that will conduct excessive current, possibly damaging receiving-side circuitry if the loop connections are reversed. If a surge
protection diode is used, a series diode or diode bridge should be used for protection against reversed connections.
RADIO FREQUENCY INTERFERENCE
The long wire lengths of current loops invite radio frequency (RF) interference. RF interference can be rectified by the input circuitry of the XTR117 or preceding circuitry. This effect generally appears as an unstable output current that varies with the position of loop supply or input wiring. Interference may also enter at the input terminals. For integrated transmitter assemblies with short connections to the sensor, the interference more likely comes from the current loop connections.
XTR117
V
REG
8
R
IN
V
D/A
O
I
IN
2
Digital Control
Optical
Isolation
Digital Control
µ
C
Optical
Isolation
PWM
Out
R
I
O
D/A
FILTER
R
C
IN
FILTER
I
RET
3
XTR117
V
REG
8
I
IN
2
I
RET
3
V
XTR117
REG
8
I
IN
2
I
RET
3
Figure 4. Digital Control Methods
7
"##$
SBOS344B − SEPTEMBER 2005 − REVISED JANUARY 2006
V
S
www.ti.com
P
+125_C
40_ C
Nonlinear
Bridge
psi
0
50
Transducer
T
Ext Temp
PGA309
Fault
Monitor
Digital Temperature Compensation
Ext Temp
AnalogSensorLinearization
Int Temp
Linearization
Circuit
Auto−Zero
PGA
Analog Signal Conditioning
Temp
ADC
Over/Under
ScaleLimiter
Control Register
Interface Ci rcuitry
EEPROM
(SOT23−5)
Ref
LinDAC
Digital Calibration
Figure 5. Complete 4-20mA Pressure Transducer Solution with PGA309 and XTR117
DFN PACKAGE
The XTR117 is offered in a DFN-8 package (also known as SON). The DFN is a QFN package with lead contacts on only two sides of the bottom of the package. This leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad.
DFN packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics. Additionally , the absence of external leads eliminates bent-lead issues.
The DFN package can be easily mounted using standard printed circuit board (PCB) assembly techniques. See Application Note, QFN/SON PCB
Attachment (SLUA271) and Application Report, Quad Flatpack No-Lead Logic Packages (SCBA017), both
available for download at www.ti.com.
The exposed leadframe die pad on the bottom of the package should be connected to I unconnected.
RET
or left
2.5V
Linear
V
OUT
(1)
R
IN
25k
NOTE: (1) PGA309V
V
R 125k
XTR117
REG
8
OS
I
IN
2
I
RET
3
R
1
2.475k
: 0.5V to4.5V.
OUT
A1
+5V
Regulator
R 25
V+ 7
B
Q1
6
E 5
R
LIM
IO=100V
2
IN
R
IN
4
LAYOUT GUIDELINES
The exposed leadframe die pad on the DFN package should be soldered to a thermal pad on the PCB. A mechanical drawing showing an example layout is attached at the end of this data sheet. Refinements to this layout may be required based on assembly process requirements. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The five holes in the landing pattern are optional, and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the PCB.
Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low power dissipation, the exposed pad must be soldered to the PCB to provide structural integrity and long-term stability.
I
O
V
LOOP
R
L
8
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
XTR117AIDGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br)
XTR117AIDGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &
no Sb/Br)
XTR117AIDGKT ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br)
XTR117AIDGKTG4 ACTIVE MSOP DGK 8 250 Green (RoHS &
no Sb/Br)
XTR117AIDRBR ACTIVE SON DRB 8 3000 Green (RoHS &
no Sb/Br)
XTR117AIDRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS &
no Sb/Br)
XTR117AIDRBT ACTIVE SON DRB 8 250 Green (RoHS &
no Sb/Br)
XTR117AIDRBTG4 ACTIVE SON DRB 8 250 Green (RoHS &
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Lead/Ball Finish MSL Peak Temp
Call TI Level-3-260C-168 HR
Call TI Level-3-260C-168 HR
Call TI Level-3-260C-168 HR
Call TI Level-3-260C-168 HR
CU NIPDAU Level-3-260C-168 HR
CU NIPDAU Level-3-260C-168 HR
CU NIPDAU Level-3-260C-168 HR
CU NIPDAU Level-3-260C-168 HR
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
11-Mar-2008
*All dimensions are nominal
Device Package
XTR117AIDGKR MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
XTR117AIDGKT MSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 XTR117AIDRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 XTR117AIDRBT SON DRB 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
Type
Package Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
XTR117AIDGKR MSOP DGK 8 2500 346.0 346.0 29.0 XTR117AIDGKT MSOP DGK 8 250 184.0 184.0 50.0 XTR117AIDRBR SON DRB 8 3000 346.0 346.0 29.0 XTR117AIDRBT SON DRB 8 250 190.5 212.7 31.8
Pack Materials-Page 2
IMPORTANT NOTICE
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