Page 1
WM8729
24-bit, 192kHz Stereo DAC
Product Preview, Rev 1.2, April 2001
DESCRIPTION
The WM8729 is a high perform ance stereo DAC designed
for audio applications suc h as DVD, hom e theatre syst ems,
and digital TV. The WM8729 supports data input word
lengths from 16 to 24-bit s and s am pling rat es up t o 192kHz.
The WM8729 consists of a serial interface port, digital
interpolation filters, multi-bit sigma delta modulators and
stereo DAC in a small 16-pin SOIC package.
The WM8729 has a hardware control interface for selec tion
of audio data interface format and de-emphasis.
The WM8729 is an ideal device to interface to AC-3,
DTS, and MPEG audio decoders for surround sound
applications, or for use in DVD players , incl uding supporti ng
the implementation of 2 channels at 192kHz for high-end
DVD-Audio applications.
BLOCK DIAGRAM
FEATURES
• Stereo DAC
• Audio Performance
- 106dB SNR (‘A’ weighted @ 48kHz) DAC
- -97dB THD
• DAC Sampling Frequency: 8kHz – 192kHz
• Pin Selectable Audio Data I nterface Format
2
- I
S or Right Justified
• 3.0V - 5.5V Supply Operation
• 16-pin SOIC Package
• Exceeds Dolby Class A Performance Requirements
APPLICATIONS
• DVD-Audio and DVD ‘Universal’ Pl ayers
• Home theatre systems
• Digital TV
• Digital broadcast receivers
DEMMUTEBFORMAT
CONTROL INTERFACE
BCKIN
LRCIN
DIN
SERIAL
INTERFACE
MUTE
DIGITAL FILTERS
MUTE
MCLK
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edi nburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: [email protected]
www.wolfsonmicro.com
WM8729
SIGMA
DELTA
MODULATOR
SIGMA
DELTA
MODULATOR
DVDDAVDD AGND
RIGHT
DAC
LEFT
DAC
VREFNVREFP
LOW
PASS
FILTER
LOW
PASS
FILTER
Product Preview data sheets contain
specifications for products in the formative
phase of development. These products may
be changed or discontinued without notice.
2001 Wolfson Microelectronics Ltd.
VOUTR
VOUTL
VMID
DGND
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WM8729 Product Preview
PIN CONFIGURATION ORDERING INFORMATION
LRCIN
DIN
BCKIN
MCLK
1
2
3
4
16
15
14
13
O
DEM
T
E
M
U
VREFP
B
A
M
T
R
F
DEVICE TEMP. RANGE PACKAGE
XWM8729ED -25 to +85oC 16-pin SOIC
WM8729
DGND
DVDD
VOUTR
AGND
5
6
7
12
11
10
V
R
E
F
N
VMID
VOUTL
AVDD
98
PIN DESCRIPTION
PIN NAME TYPE DESCRIPTION
1 LRCIN Digital Input
2 DIN Digital Input
3 BCKIN Digital Input
4 MCLK Analogue Input
5 DGND Supply
6 DVDD Supply
7 VOUTR Analogue Output
8 AGND Supply
9 AVDD Supply
10 VOUTL Analogue Output
11 VMID Analogue Output
12 VREFN Supply
13 VREFP Supply
14 MUTEB Digital Bi-directional
DAC Sample Rate Clock Input
Serial Audio Data Input
Audio Data Bit Clock Input.
Master Clock Input
Digital Ground Supply
Digital Positive S uppl y
Right Channel DAC Output
Analogue Ground Supply
Analogue Positive Supply
Left Channel DAC Output
Mid Rail Decoupling Point
DAC Negative Reference – normally A GND, must not be below AGND
DAC Positive Reference – normally AVDD, must not be above AVDD
Mute Control, (L = Mute on, H = Mute off, Z = Automute Enabled)
15 DEM Digital Input
16 FORMAT Digital Input
(Pull-Up)
Note:
Digital input pins have Schmitt trigger input buffers.
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
De-Emphasis Selec t
0 = De-Emphasis Off
1 = De-Emphasis On
Digital Audio Data Input Format Selection
0 = Right justified Audio Dat a
2
S Audio Data
1 = I
2
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WM8729 Product Preview
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are s tres s rat ings only. P erm anent damage to the device may be c aused by c onti nuously operat ing at
or beyond these limits. Device functional operating lim its and guaranteed performance s pecifications are gi ven under Electrical
Characteristics at the test conditions s pecified.
ESD Sensitive Device. Thi s device i s m anufactured on a CMOS process . It i s t herefore generi cally suscept ible
to damage from excessi ve stati c voltages . Proper ES D precautions mus t be tak en during handling and st orage
of this device.
CONDITION MIN MAX
Digital supply voltage
Analogue supply voltage
Voltage range digital inputs
Voltage range analogue inputs
Master Clock Frequency
Operating temperature range, T
Storage temperature
Package body temperature (s ol deri ng 10 seconds)
Package body temperature (s ol deri ng 2 minutes)
A
-0.3V +7V
-0.3V +7V
DGND -0.3V DVDD +0.3V
AGND -0.3V AVDD +0. 3V
50MHz
-25°C+85°C
-65°C +150°C
+220°C
+183°C
Note:
Analogue and digital grounds mus t always be within 0.3V of each other.
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Digital supply range
Analogue supply range
Ground
Difference DGND to AGND
Analogue supply current
Digital supply current
Analogue supply current
Digital supply current
DVDD 3.0 5.5 V
AVDD 3.0 5.5 V
AGND, DGND 0 V
-0.3 0 +0.3 V
AVDD = 5V 19 mA
DVDD = 5V 8 mA
AVDD = 3.3V 18 mA
DVDD = 3.3V 4 mA
ELECTRICAL CHARACTERISTICS
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, T
PARAMETER SYM BOL TEST CONDITIONS MIN TYP MAX UNIT
Digital Logic Levels (TTL Levels)
Input LOW level V
Input HIGH level V
Output LOW V
Output HIGH V
Analogue Reference Levels
Reference voltage
Potential divider resis tance R
VMID
DAC Output (Load = 10k ohms. 50pF)
0dBFs Full scale output volt age
SNR (Note 1,2,3)
SNR (Note 1,2,3)
SNR (Note 1,2,3)
SNR (Note 1,2,3)
SNR (Note 1,2,3)
SNR (Note 1,2,3)
THD (Note 1,2,3)
THD+N (Dynamic range, Note 2)
DAC channel separation
Analogue Output Levels
Output level
Gain mismatch
channel-to-channel
= +25oC, fs = 48kHz, MCLK = 256fs unles s otherwise stated.
A
IL
2.0 V
(VREFP -
VREFN)/2 -
VREFN)/2
OL
OH
IH
IOL = 1mA AGND + 0.3V V
IOH = 1mA AVDD - 0.3V V
VMID (VREFP -
50mV
12k ohms
At DAC outputs 1. 1 x
AVDD/5
A-weighted,
100 106 dB
@ fs = 48kHz
A-weighted
106 dB
@ fs = 96kHz
A-weighted
106 dB
@ fs = 192kHz
A-weighted,
105 dB
@ fs = 48kHz
AVDD, DVDD = 3.3V
A-weighted
103 dB
@ fs = 96kHz
AVDD, DVDD = 3.3V
Non ‘A’ weighted @ fs
106 dB
= 48kHz
1kHz, 0dBFs -97 dB
1kHz, -60dBFs 100 106 dB
100 dB
Load = 10k ohms,
1.1 V
0dBFS
Load = 10k ohms,
0.726 V
0dBFS,
(AVDD = 3.3V)
0.8 V
(VREFP -
V
VREFN)/2 +
50mV
Vrms
RMS
RMS
±1 %FSR
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, T
PARAMETER SYM BOL TEST CONDITIONS MIN TYP MAX UNIT
Minimum resist ance load
Maximum capacitance load
Output d.c. level
Power On Reset (POR)
POR threshold
Notes:
1. Ratio of output level with 1kHz ful l scale input, to the output l evel with al l zeros into the digital input, measured ‘A’ weighted
over a 20Hz to 20kHz bandwidth.
2. All performance m easurements done with 20kHz low pass fil ter, and where noted an A-weight filter. Failure to use such a
filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical
Characteristics. The l ow pass filter removes out of band noise; although it is not audible it may affect dynamic specificat i on
values.
3. VMID decoupled with 10uF and 0.1uF capacitors (smaller values may res ul t in reduced performance).
= +25oC, fs = 48kHz, MCLK = 256fs unles s otherwise stated.
A
To midrail or a.c.
coupled
To midrail or a.c.
coupled
(AVDD = 3.3V)
5V or 3.3V 100 pF
1 kohms
600 ohms
(VREFP -
VREFN)/2
2.4 V
V
TERMINOLOGY
1. Signal-to-noise ratio (dB) - SNR is a measure of the difference in level between the full s cal e output and the out put with no
signal applied. (No Auto-zero or Aut omute function is employed in achieving these results).
2. Dynamic range (dB) - DNR is a measure of the difference between the highest and lowest portions of a signal. Normall y a
THD+N measurement at 60dB bel ow full scale. The measured signal is t hen corrected by adding the 60dB to it. (e.g.
THD+N @ -60dB= -32dB, DR= 92dB).
3. THD+N (dB) - THD+N is a ratio, of the rms values, of (Noise + Dis t ortion)/Signal.
4. Stop band attenuation (dB) - Is the degree to which the frequency spectrum is attenuated (outside audi o band).
5. Channel Separation (dB) - Also known as Cross-Talk. This is a meas ure of the amount one channel is isolated from the
other. Normally measured by sending a full scale signal down one channel and measuring the other.
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
MASTER CLOCK TIMING
t
MCLKL
MCLK
t
MCLKH
t
MCLKY
Figure 1 Master Clock Timing Requirements
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, T
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
System Clock Timing Information
MCLK Master clock pulse width high
MCLK Master clock pulse width low
MCLK Master clock cycle time
MCLK Duty cycle
t
MCLKH
t
MCLKL
t
MCLKY
DIGITAL AUDIO INTERFACE
= +25oC, fs = 48kHz, MCLK = 256fs unles s otherwise stated.
A
13 ns
13 ns
26 ns
40:60 60:40
t
BCH
t
BCL
BCKIN
t
BCY
LRCIN
t
DS
t
LRH
t
LRSU
DIN
t
DH
Figure 2 Digital Audio Data Timing
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, AGND, DGND = 0V, T
= +25oC, fs = 48kHz, MCLK = 256fs unles s otherwise stated.
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Audio Data Input Timing Information
BCKIN cycle time
BCKIN pulse width high
BCKIN pulse width low
LRCIN set-up time to
t
BCY
t
BCH
t
t
LRSU
BCL
40 ns
16 ns
16 ns
8ns
BCKIN rising edge
LRCIN hold time from
t
LRH
8ns
BCKIN rising edge
DIN set-up time to BCKIN
t
DS
8ns
rising edge
DIN hold time from BCKIN
t
DH
8ns
rising edge
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
DEVICE DESCRIPTION
INTRODUCTION
The WM8729 is a high perform ance DAC designed for digital consumer audio applications. Its
range of features make it ideally suited for us e in DVD players, A V receivers and other high end
consumer audio equipment .
The WM8729 is a com plete 2-channel stereo audio digit al-to-analogue converter, inc luding digi tal
interpolation filter, m ulti-bit sigma delta with dither, and switched capacitor multi-bit stereo DAC
and output smoothing filters. It is fully compatible and an ideal partner for a range of industry
standard microproces sors, controllers and DSP s.
Control of internal functi onal i ty of the device is provided by hardware control (pin programmed).
Operation using master clocks of 256fs, 384fs, 512fs or 768fs is provided, selection between
clock rates being automatical ly controlled. Sample rates (fs ) from less than 8ks/s to 96k s/s are
allowed, provided the appropriate system clock is input . S upport is als o provided f or up to 192k s/ s
using a master cloc k of 128fs or 192fs.
The audio data interface supports right justified or I
interface formats.
The device is packaged in a small 16-pin SOIC.
CLOCKING SCHEMES
In a typical digital audio system there is only one c entral cl ock sourc e produci ng a referenc e cl ock
to which all audio data processing is synchronised. This clock is often referred to as the audio
system’s Master Clock. The external mast er cl ock can be appl ied direc tly t hrough t he MCLK i nput
pin with no configuration necessary for sample rate selection.
2
S (Philips left justified, one bit delayed)
Note that on the WM8729, MCLK is used to derive clocks for the DAC path. The DAC path
consists of DAC sampli ng clock, DAC digital f ilter cloc k and DAC digita l audio interfac e timing. In
a system where there are a number of pos sible sources for the referenc e clock it is recommended
that the clock source with the lowest jitter be used to opt i mise the performance of the DAC.
DIGITAL AUDIO INTERFACE
Audio data is applied to the internal DAC filters via the Digital Audio Interface. Two popular
interface formats are supported:
Right Justified mode
2
I
S mode
Both formats send t he MSB first. The WM8729 supports word lengths of 16 or 24 bit s in I
mode and 16 or 20 bits in right jus tified mode. In right j ustified and I
interface receives data on t he DIN input. Audio Data is time m ultiplexed with LRCIN indicating
whether the left or right channel is pres ent. LRCIN is also used as a tim ing reference to indicate
the beginning or end of the data words.
In right justified and I
selected word length. LRCIN mus t be high for a minimum of word length BCKINs and low for a
minimum of word length BCKINs. Any m ark to space rati o on LRCIN is acceptable provided the
above requirements are met.
2
S modes, the digital audio
2
S modes, the m inimu m num ber of BCKI Ns per LRCIN peri od is 2 tim es the
2
S
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
RIGHT JUSTIFIED MODE
In right justified mode, the LSB is sampled on the rising edge of BCKIN preceding a LRCIN
transition. LRCIN is hi gh duri ng the left samples and l ow during the ri ght samples.
1/fs
LEFT CHANNEL RIGHT CHANNEL
LRCIN
BCKIN
DIN
Figure 3 Right Justified Mode Timing Diagram
I2S MODE
In I2S mode, the MSB is sampled on the second rising edge of BCKIN following a LRCIN
transition. LRCIN is l ow during the l eft samples and high during the right samples.
LRCIN
BCKIN
DIN
Figure 4 I2S Mode Timing Diagram
AUDIO DATA SAMPLING RATES
The master clock for W M8729 supports audi o sampl ing rates f rom 128f s to 768fs , where fs is the
audio sampling frequency (LRCIN) typically 32kHz, 44.1kHz, 48kHz, 96kHz or 192kHz. The
master clock i s used to operate the digital fi l ters and the noise shaping circ ui t s.
MSB
1 BCKIN
n321
n-2 n-1
LSBMSB
1/fs
LEFT CHANNEL RIGHT CHANNEL
1 BCKIN
n321
n-2 n-1
LSB
MSB
n-2 n-1
n-2 n-1
n321
LSB
n321
LSBMSB
The WM8729 has a master clock detection circuit that automatically determines the relation
between the master clock frequency and the sampli ng rate (to within +/ - 8 mas ter clocks). If there
is a greater than 8 clocks error, the interface shuts down the DAC and mutes the output. The
master clock should be synchronised with LRCIN, although the WM8729 is tolerant of phase
differences or jitter on this clock.
SAMPLING
RATE
(LRCIN)
128fs 192fs 256fs 384fs 512fs 768fs
MASTER CLOCK FREQUENCY (MHZ) (MCL K)
32kHz 4.096 6.144 8.192 12.288 16.384 24.576
44.1kHz 5.6448 8.467 11.2896 16.9340 22.5792 33.8688
48kHz 6.114 9.216 12.288 18.432 24.576 36.864
96kHz 12.288 18.432 24.576 36.864 Unavailable Unavailable
192kHz 24.576 36.864 Unavailable Unavailable Unavailable Unavailable
Table 1 Master Clock Frequencies Versus Sampling Rate
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
HARDWARE CONTROL MODES
The WM8729 is hardware programmabl e provi di ng the user with options to select i nput audio data
format, de-emphas i s and mute.
MUTE AND AUTOMUTE OPERATION
Pin 14 (MUTEB) controls selec t i on of MUTE directly, and can be used to enable and disable the
automute function, or as an output of the automuted signal.
MUTEB PIN DESCRIPTION
0
1
Floating
Table 2 Mute and Automute Control
1.5
1
0.5
0
-0.5
Mute DAC channels
Normal Operation
Enable IZD, MUTEB becomes an output to indicate when IZD occurs.
-1
-1.5
-2
-2.5
0 0.001 0.002 0.003 0.004 0.005 0.006
Time(s)
Figure 5 Application and Release of MUTEB
The MUTEB pin is an input to select mute or not mute. MUTEB is active low; t aking the pin l ow
causes the filters to soft m ute, ramping down the audio signal over a few milliseconds. Taking
MUTEB high again allows data into the filter. Refer to Figure 5.
The Infinite Zero Detect (IZD) function detects a series of zero value audio samples of 1024
samples long being applied to both channels. After suc h an event, a latch is set whose output
(AUTOMUTED) is connected through a 10kohm resistor to the MUTEB pin. Thus if the MUTEB
pin is not being driven, the automute function will assert mute.
If MUTEB is tied high, AUTOMUTED is overridden and will not mute. If MUTEB is driven from a
bi-directional source, then both MUTE and automute functions are available. If MUTEB is not
driven, AUTOMUTED appears as a weak output (10k source im pedance) s o can be used to dri ve
external mute circuits. AUTOMUTED will be removed as s oon as any channel receives a non-zero
input.
A diagram showing how the various Mute modes i nteract is shown below in Figure 6.
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
AUTOMUTED
(Internal Signal)
10k
Ω
MUTEB
PIN
SOFTMUTE
(Internal Signal)
Figure 6 Selection Logic for MUTE Modes
INPUT FORMAT SELECTION
FORMAT (pin 16) controls the data input format.
FORMAT INPUT DATA MODE
0 20-bit right justified (note 2)
1 24-bit I2S (note 2)
Table 3 Input Format Selection
Notes:
1. In 24 bit I
2
S mode, any width of 24 bits or m ore is s upported provided t hat LRCI N is high f or
a minimum of 24 BCKINs and low for a minim um of 24 BCKINs, unles s Note 2.
2. If exactly 16 BCKIN cycles occur in bot h the low and high period of LRCIN the W M8729 will
assume the data is 16 bi t and accept the data accordingl y.
DE-EMPHASIS CONTROL
DEM (pin 15) is an input control for s el ection of de-emphasis filtering to be applied.
DEM DE-EMPHASIS
0Off
1On
Table 4 De-emphasis Control
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
DIGITAL FILTER CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT
Passband Edge
Passband Ripple
Stopband Attenuation
-3dB 0.487fs
f < 0.444fs ±0.05 dB
f > 0.555fs -60 dB
Table 5 Digital Filter Characteristics
DAC FILTER RESPONSES
0
-20
-40
0.2
0.15
0.1
0.05
-60
Response (dB)
-80
-100
-120
0 0.5 1 1.5 2 2.5 3
Frequency (Fs)
Figure 7 DAC Digital Filter Frequency Response
-44.1, 48 and 96kHz
0
-20
-40
Response (dB)
-60
-80
0 0.2 0.4 0.6 0.8 1
Frequency (Fs)
Figure 9 DAC Digital Filter Frequency Response -192kHz
0
Response (dB)
-0.05
-0.1
-0.15
-0.2
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Frequency (Fs)
Figure 8 DAC Digital Filter Ripple -44.1, 48 and 96kHz
0.2
0
-0.2
-0.4
Response (dB)
-0.6
-0.8
-1
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Frequency (Fs)
Figure 10 DAC Digital Filter Ripple -192kHz
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
DIGITAL DE-EMPHASIS CHARACTERISTICS
0
-2
1
0.5
0
-4
-6
Response (dB)
-8
-10
0 2 4 6 8 10 12 14 16
Frequency (kHz)
Figure 11 De-Emphasis Frequency Response (32kHz)
0
-2
-4
-6
Response (dB)
-8
-10
0 5 10 15 20
Frequency (kHz)
-0.5
-1
Response (dB)
-1.5
-2
-2.5
-3
0 2 4 6 8 10 12 14 16
Frequency (kHz)
Figure 12 De-Emphasis Error (32kHz)
0.4
0.3
0.2
0.1
0
Response (dB)
-0.1
-0.2
-0.3
-0.4
0 5 10 15 20
Frequency (kHz)
Figure 13 De-Emphasis Frequency Response (44.1kHz)
0
-2
-4
-6
Response (dB)
-8
-10
0 5 10 15 20
Frequency (kHz)
Figure 15 De-Emphasis Frequency Response (48kHz)
Figure 14 De-Emphasis Error (44.1kHz)
1
0.8
0.6
0.4
0.2
0
-0.2
Response (dB)
-0.4
-0.6
-0.8
-1
0 5 10 15 20
Frequency (kHz)
Figure 16 De-Emphasis Error (48kHz)
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
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WM8729 Product Preview
RECOMMENDED EXTERNAL COMPONENTS
Hardware Control
Audio Serial Data I/F
Notes:
1. AGND and DGND should be connected as close to the WM8729 as possible.
2. C
3. Capacitor types should be carefully chosen. Capacitors with very low ESR are
recommended for optimum performance.
C
DVDD
1
DGND
+
6
DVDD
C
2
5
DGND
VREFN
16
FORMAT
15
DEM
14
MUTEB
VOUTR
WM8729
1
LRCIN
4
MCLK
3
BCKIN
2
DIN
, C3, C4 and C8 should be positioned as close to the WM8729 as possible.
2
AVDD
VREFP
AGND
VOUTL
VMID
9
13
C3C4C
8
12
C
6
7
+ +
C
7
10
11
C
C
8
AVDD
+
5
AGND
AC-Coupled
VOUTR/L
to External LPF
+
9
AGND
Figure 17 External Component Diagram
RECOMMENDED EXTERNAL COMPONENTS VALUES
COMPONENT
REFERENCE
C1 and C5 10µF
C2 to C4 0.1µF
C6 and C7 10µF
C8 0.1µF
C9 10µF
Table 6 External Components Description
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
SUGGESTED
VALUE
DESCRIPTION
De-coupling for DVDD and AVDD/V RE F P
De-coupling for DVDD and AVDD/V RE F P
Output AC coupling caps t o remove midrail DC level from outputs.
Reference de-coupling capacit ors for VMID pin.
13
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WM8729 Product Preview
RECOMMENDED ANALOGUE LOW PASS FILTER (OPTIONAL)
4.7k
Ω
4.7k
Ω
+VS
_
+
10uF
47k
1.8k
Ω
Ω
1.0nF
7.5K
Ω
+
-VS
680pF
Figure 18 Recommended Low Pass Filter (Optional)
Ω
51
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WM8729 Product Preview
α
PACKAGE DRAWING
D: 16 PIN SOIC 3.9mm Body
e
D
A
0.10 (0.004)
DM012.B
B
916
E H
81
L
o
h x 45
A1
-C-
SEATING PLANE
C
Symbols
Dimensions
(mm)
Dimensions
(Inches)
MIN MAX MIN MAX
A
A1
B
C
D
E
e
H
h
L
α
REF:
NOTES:
A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS (INCHES).
B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE.
C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.25MM (0.010IN).
D. MEETS JEDEC.95 MS-012, VARIATION = AC. REFER TO THIS SPECIFICATION FOR FURTHER DETAIL S.
1.35 1.75 0.0532 0.0688
0.10 0.25 0.0040 0.0098
0.33 0.51 0.0130 0.0200
0.19 0.25 0.0075 0.0098
9.80 10.00 0.3859 0.3937
3.80 4.00 0.1497 0.1574
1.27BSC 0.05BSC
5.80 6.20 0.2284 0.2440
0.25 0.50 0.0099 0.0196
0.40 1.27 0.0160 0.0500
o
0
o
8
o
0
o
8
JEDEC.95, MS-012
WOLFSON MICROELECTRONICS LTD PP Rev 1.2 April 2001
15
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