TEXAS INSTRUMENTS TLC555, TLC555Y Technical data

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

D

Very Low Power Consumption

1 mW Typ at VDD = 5 V

D

Capable of Operation in Astable Mode

D

CMOS Output Capable of Swinging Rail
to Rail

D

High Output-Current Capability

Sink 100 mA Typ
Source 10 mA Typ

D

Output Fully Compatible With CMOS, TTL,
and MOS

D

Low Supply Current Reduces Spikes
During Output Transitions

D

Single-Supply Operation From 2 V to 15 V

D

Functionally Interchangeable With the
NE555; Has Same Pinout

D

ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015.2

description

The TLC555 is a monolithic timing circuit
fabricated using the TI LinCMOS process. The

D, DB, JG, P, OR PW PACKAGE

(TOP VIEW)

GND

TRIG

OUT

RESET

NC

TRIG

NC

OUT

NC

NC – No internal connection

1
2
3
4

FK PACKAGE

(TOP VIEW)

NC

3212019

4
5
6
7
8

910111213

NC

GND

NC

NC

RESET

8
7
6
5

V

DD

NC

18
17
16
15
14

NC

CONT

V

DD

DISCH
THRES
CONT

NC
DISCH
NC
THRES
NC

timer is fully compatible with CMOS, TTL, and
MOS logic and operates at frequencies up to 2 MHz. Because of its high input impedance, this device uses
smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations
are possible. Power consumption is low across the full range of power supply voltage.

Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a
threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of
the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is
set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the
threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs
and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low.
Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and
GND. All unused inputs should be tied to an appropriate logic level to prevent false triggering.

While the CMOS output is capable of sinking over 100 mA and sourcing over 10 mA, the TLC555 exhibits greatly
reduced supply-current spikes during output transitions. This minimizes the need for the large decoupling
capacitors required by the NE555.

The TLC555C is characterized for operation from 0°C to 70°C. The TLC555I is characterized for operation from
– 40°C to 85°C. The TLC555M is characterized for operation over the full military temperature range of – 55°C
to 125°C.

This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These
circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,
Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated
voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device
should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level,
preferably either supply voltage or ground. Specific guidelines for handling devices of this type are contained in the publication

Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies

LinCMOS is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

available from Texas Instruments.

Copyright  1997, Texas Instruments Incorporated

1

TLC555, TLC555Y

CHIP

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

AVAILABLE OPTIONS

PACKAGED DEVICES

V

T

A

0°C to

70°C

–40°C to

85°C

–55°C to

125°C

The D package is available taped and reeled. Add the R suffix to device type (e.g., TLC555CDR). The DB and PW packages are only available
left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TLC555CDBLE). Chips are tested at 25°C.

DD

RANGE

2 V to 15 V TLC555CD TLC555CDBLE — — TLC555CP TLC555CPWLE

3 V to 15 V TLC555ID — — — TLC555IP —

5 V to 15 V TLC555MD — TLC555MFK TLC555MJG TLC555MP —

SMALL

OUTLINE

(D)

RESET

VOLTAGE

†

For conditions shown as MIN or MAX, use the appropriate value specified under
electrical characteristics.

†

<MIN Irrelevant Irrelevant L On
>MAX <MIN Irrelevant H Off
>MAX >MAX >MAX L On
>MAX >MAX <MIN As previously established

SSOP

(DB)

TRIGGER

VOLTAGE

†

CHIP

CARRIER

(FK)

FUNCTION TABLE

THRESHOLD

VOLTAGE

†

CERAMIC

DIP

(JG)

OUTPUT

PLASTIC

DIP

(P)

DISCHARGE

SWITCH

TSSOP

(PW)

FORM

(Y)

TLC555Y

functional block diagram

CONT

V

DD

8

R

TRIG

6

R

2

R

1

GND

THRES

Pin numbers are for all packages except the FK package.
RESET can override TRIG, which can override THRES.

RESET

5

4

R1

3

R

1

S

OUT

7

DISCH

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

TLC555Y chip information

This chip, when properly assembled, displays characteristics similar to the TLC555. Thermal compression or
ultrasonic bonding may be used on the doped aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

RESETCONT

50

64

(5)

V

DD

(8)

R

THRES

(6)

R

(2)

TRIG

R

(1)

GND

RESET can override TRIG, which can override THRES.

(4)

R1
R
S

1

(3)

(7)

OUT

DISCH

CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ± 10%.
ALL DIMENSIONS ARE IN MILS.
PIN (1) IS INTERNALLY CONNECTED

TO BACKSIDE OF CHIP.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

T
l

R
l

D

7
11

94

4

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

•

equivalent schematic (each channel)

CONT

THRES

COMPONENT COUNT

Transistors
Resistors

39

OUT

TLC555, TLC555Y

LinCMOS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

emp

5

V

DD

TIMERS

ate
e

ease

ate:

–
–

TRIG RESET

DISCH

GND

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, VDD (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (any input) –0.3 to V

Sink current, discharge or output 150 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Source current, output, I

15 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, TA: C-suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, DB, P, or PW package 260°C. . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to network GND.

PACKAGE

D
DB
FK
JG

P

PW

TA ≤ 25°C

POWER RATING

725 mW

525 mW
1375 mW
1050 mW
1000 mW

525 mW

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I-suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

M-suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DISSIPATION RATING TABLE

DERATING FACTOR

ABOVE TA = 25°C

5.8 mW/°C

4.2 mW/°C

11.0 mW/°C

8.4 mW/°C

8.0 mW/°C

4.2 mW/°C

TA = 70°C

POWER RATING

464 mW
336 mW
880 mW
672 mW
640 mW
336 mW

TA = 85°C

POWER RATING

377 mW
273 mW
715 mW
546 mW
520 mW
273 mW

TA = 125°C

POWER RATING

145 mW
105 mW
275 mW
210 mW
200 mW
105 mW

†

DD

recommended operating conditions

Supply voltage, V

Operating free-air temperature range, T

DD

TLC555C 0 70
TLC555I –40 85

A

TLC555M –55 125

MIN MAX UNIT

2 15 V

°C

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5

TLC555, TLC555Y

PARAMETER

T

†

UNIT

VITThreshold voltage

V

IITThreshold current

pA

V

Trigger voltage

V

I

Trigger current

pA

V

Reset voltage

V

I

Reset current

pA

gg

I

mA

V

gg

nA

VOHHigh-level output voltage

I

300 µA

V

VOLLow-level output voltage

I

mA

V

IDDSupply current

See Note 2

A

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

electrical characteristics at specified free-air temperature, VDD = 2 V for TLC555C, VDD = 3 V for
TLC555I

TEST

CONDITIONS

I(TRIG)

I(TRIG)

I(RESET)

I(RESET)

Control voltage (open circuit) as
a percentage of supply voltage

Discharge switch on-stage
voltage

Discharge switch off-stage
current

p

p

pp

†

Full range is 0°C to 70°C for the TLC555C and – 40°C to 85°C for the TLC555I. For conditions shown as MAX, use the appropriate value specified
in the recommended operating conditions table.

NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or to TRIG.

OL

OH

OL

= 1

= –

= 1

A

25°C 0.95 1.33 1.65 1.6 2.4

Full range 0.85 1.75 1.5 2.5

25°C 10 10
MAX 75 150
25°C 0.4 0.67 0.95 0.71 1 1.29

Full range 0.3 1.05 0.61 1.39

25°C 10 10
MAX 75 150
25°C 0.4 1.1 1.5 0.4 1.1 1.5

Full range 0.3 2 0.3 1.8

25°C 10 10
MAX 75 150

MAX 66.7% 66.7%
25°C 0.03 0.2 0.03 0.2

Full range 0.25 0.375

25°C 0.1 0.1
MAX 0.5 120
25°C 1.5 1.9 1.5 1.9

Full range 1.5 2.5

25°C 0.07 0.3 0.07 0.3

Full range 0.35 0.4

25°C 250 250

Full range 400 500

TLC555C TLC555I

MIN TYP MAX MIN TYP MAX

p

p

p

µ

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

T

†

UNIT

V

Threshold voltage

V

I

Threshold current

pA

V

Trigger voltage

V

I

Trigger current

pA

V

Reset voltage

V

I

Reset current

pA

g

I

10 mA

V

g

nA

V

g

I

1 mA

V

I

8 mA

V

I

5 mA

V

I

3.2 mA

IDDSupply current

See Note 2

A

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

electrical characteristics at specified free-air temperature, VDD = 5 V

TEST

CONDITIONS

IT

IT

I(TRIG)

I(TRIG)

I(RESET)

I(RESET)

Control voltage (open
circuit) as a
percentage of supply
voltage

Discharge switch
on-state voltage

Discharge switch
off-state current

OH

OL

†

Full range is 0°C to 70°C the for TLC555C, – 40°C to 85°C for the TLC555I, and – 55°C to 125°C for the TLC555M. For conditions shown as

High-level output
voltage

Low-level output
voltage

pp

OL

OH

OL

OL

OL

=

= –

=

=

=

A

25°C

Full range 2.7 3.9 2.7 3.9 2.7 3.9

25°C
MAX 75 150 5000
25°C

Full range 1.26 2.06 1.26 2.06 1.26 2.06

25°C
MAX 75 150 5000
25°C

Full range 0.3 1.8 0.3 1.8 0.3 1.8

25°C
MAX 75 150 5000

MAX 66.7% 66.7% 66.7%

25°C

Full range 0.6 0.6 0.6

25°C
MAX 0.5 120 120
25°C

Full range 4.1 4.1 4.1

25°C

Full range 0.5 0.5 0.6

25°C

Full range 0.4 0.4 0.45

25°C

Full range 0.35 0.35 0.4

25°C

Full range 500 600 700

MAX, use the appropriate value specified in the recommended operating conditions table.

NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.

TLC555C TLC555I TLC555M

MIN TYP MAX MIN TYP MAX MIN TYP MAX

2.8 3.3 3.8 2.8 3.3 3.8 2.8 3.3 3.8

10 10 10

1.36 1.66 1.96 1.36 1.66 1.96 1.36 1.66 1.96

10 10 10

0.4 1.1 1.5 0.4 1.1 1.5 0.4 1.1 1.5

10 10 10

0.14 0.5 0.14 0.5 0.14 0.5

0.1 0.1 0.1

4.1 4.8 4.1 4.8 4.1 4.8

0.21 0.4 0.21 0.4 0.21 0.4

0.13 0.3 0.13 0.3 0.13 0.3

0.08 0.3 0.08 0.3 0.08 0.3

170 350 170 350 170 350

p

p

p

µ

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

7

TLC555, TLC555Y

PARAMETER

T

†

UNIT

VITThreshold voltage

V

IITThreshold current

pA

V

Trigger voltage

V

I

Trigger current

pA

V

Reset voltage

V

I

Reset current

pA

g

I

100 mA

V

g

nA

I

10 mA

V

g

I

5 mA

V

I

1 mA

I

100 mA

V

I

50 mA

V

I

10 mA

IDDSupply current

See Note 2

µA

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

electrical characteristics at specified free-air temperature, VDD = 15 V

TEST

CONDITIONS

I(TRIG)

I(TRIG)

I(RESET)

I(RESET)

Control voltage (open
circuit) as a
percentage of supply
voltage

Discharge switch
on-state voltage

Discharge switch
off-state current

OH

OL

†

Full range is 0°C to 70°C for TLC555C, – 40°C to 85°C for TLC555I, and – 55°C to 125°C for TLC555M. For conditions shown as MAX, use the

High-level output
voltage

Low-level output
voltage

pp

OL

OH

OH

OH

OL

OL

OL

=

= –

= –

= –

=

=

=

A

25°C 9.45 10 10.55 9.45 10 10.55 9.45 10 10.55

Full range 9.35 10.65 9.35 10.65 9.35 10.65

25°C 10 10 10
MAX 75 150 5000
25°C 4.65 5 5.35 4.65 5 5.35 4.65 5 5.35

Full range 4.55 5.45 4.55 5.45 4.55 5.45

25°C 10 10 10
MAX 75 150 5000
25°C 0.4 1.1 1.5 0.4 1.1 1.5 0.4 1.1 1.5

Full range 0.3 1.8 0.3 1.8 0.3 1.8

25°C 10 10 10
MAX 75 150 5000

MAX 66.7% 66.7% 66.7%

25°C 0.77 1.7 0.77 1.7 0.77 1.7

Full range 1.8 1.8 1.8

25°C 0.1 0.1 0.1
MAX 0.5 120 120
25°C 12.5 14.2 12.5 14.2 12.5 14.2

Full range 12.5 12.5 12.5

25°C 13.5 14.6 13.5 14.6 13.5 14.6

Full range 13.5 13.5 13.5

25°C 14.2 14.9 14.2 14.9 14.2 14.9

Full range 14.2 14.2 14.2

25°C 1.28 3.2 1.28 3.2 1.28 3.2

Full range 3.6 3.7 3.8

25°C 0.63 1 0.63 1 0.63 1

Full range 1.3 1.4 1.5

25°C 0.12 0.3 0.12 0.3 0.12 0.3

Full range 0.4 0.4 0.45

25°C 360 600 360 600 360 600

Full range 800 900 1000

appropriate value specified in the recommended operating conditions table.

NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.

TLC555C TLC555I TLC555M

MIN TYP MAX MIN TYP MAX MIN TYP MAX

p

p

p

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DD

,

AB

,

R

10 MΩ

C

10 pF

ns

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

operating characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)

PARAMETER

Initial error of timing interval
Supply voltage sensistivity of timing interval

t

Output pulse rise time

r

t

Output pulse fall time

f

f

Maximum frequency in astable mode

max

‡

Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process
run.

NOTE 3: RA, RB, and CT are as defined in Figure 1.

‡

V

= 5 V to 15 V, R

CT = 0.1 µF,

=

L

RA = 470 Ω,
CT = 200 pF,

electrical characteristics at VDD = 5 V, TA = 25°C

PARAMETER

V

IT

I

IT

V

I(TRIG)

I

I(TRIG)

V

I(RESET)

I

I(RESET)

V

OH

V

OL

I

DD

NOTE 2: These values apply for the expected operating configurations in which THRES is connected directly to DISCH or TRIG.

Threshold voltage 2.8 3.3 3.8 V
Threshold current 10 pA
Trigger voltage 1.36 1.66 1.96 V
Trigger current 10 pA
Reset voltage 0.4 1.1 1.5 V
Reset current 10 pA
Control voltage (open circuit) as a percentage of supply voltage 66.7%
Discharge switch on-state voltage IOL = 10 mA 0.14 0.5 V
Discharge switch off-state current 0.1 nA
High-level output voltage IOH = – 1 mA 4.1 4.8 V

Low-level output voltage

Supply current See Note 2 170 350 µA

TEST CONDITIONS MIN TYP MAX UNIT

= R

= 1 kΩ to 100 kΩ,

See Note 3

,

RB = 200 Ω,
See Note 3

p

=

L

TEST CONDITIONS MIN TYP MAX UNIT

IOL = 8 mA 0.21 0.4
IOL = 5 mA 0.13 0.3
IOL = 3.2 mA 0.08 0.3

1% 3%

0.1 0.5 %/V
20 75
15 60

1.2 2.1 MHz

V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

9

TLC555, TLC555Y
LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

TYPICAL CHARACTERISTICS

DISCHARGE SWITCH ON-STATE RESISTANCE

vs

FREE-AIR TEMPERATURE

100

70

Ω

40

VDD = 2 V, IO = 1 mA

PROPAGATION DELAY TIMES TO DISCHARGE

OUTPUT FROM TRIGGER AND THRESHOLD

SHORTED TOGETHER

vs

SUPPLY VOLTAGE

600

I

≥ 1 mA

O(on)

500

CL ≈ 0
TA = 25°C

20

10

7

4

2

Discharge Switch On-State Resistance –

1

–75 – 50 – 25 0 25 75 125

TA – Free-Air Temperature – °C

VDD = 5 V, IO = 10 mA

VDD = 15 V, IO = 100 mA

50 100

Figure 1

400

300

200

PLH

t – Propagation Delay Times – ns

100

PHL

t,

0

0 2 4 6 8 12 16

VDD – Supply Voltage – V

†

The effects of the load resistance on these values must be
taken into account separately.

10 14

t

t

PLH

PHL

†

Figure 2

2018

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

APPLICATION INFORMATION

0.1 µF

R

A

R

B

Pin numbers shown are for all packages except the
FK package.

0.1 µF

CONT V

4

RESET
DISCH

THRES
TRIG

CIRCUIT

TLC555

GND

7

6

2

C

T

85

DD

OUT

1

3

R

L

Output

t

c(H)

V

DD

2/3 V

DD

1/3 V

C

L

DD

GND

TRIGGER AND THRESHOLD VOLTAGE WAVEFORM

t

PHL

t

PLH

t

c(L)

Figure 3. Astable Operation

Connecting TRIG to THRES, as shown in Figure 3, causes the timer to run as a multivibrator. The capacitor C
charges through RA and RB to the threshold voltage level (approximately 0.67 VDD) and then discharges through R
only to the value of the trigger voltage level (approximately 0.33 VDD). The output is high during the charging cycle
(t

) and low during the discharge cycle (t

c(H)

). The duty cycle is controlled by the values of RA, RB, and CT as shown

c(L)

in the equations below.

T

B

t

[

c(H)

t

c(L)

Period

CT(RA)

[

CTRBIn 2

+

t

c(H)

Output driver duty cycle

Output waveform duty cycle

RB)In2 (In2+0.693)

)

t

[

c(L)

CT(RA)

+

t

c(H)

t

c(L)

)

t

+

t

c(H)

2RB)In2

[

t

c(L)

c(H)

)

t

c(L)

1–

[

RA)

R

RA)

R

B

2R

B

B

2R

B

The 0.1-µF capacitor at CONT in Figure 3 decreases the period by about 10%.
The formulas shown above do not allow for any propagation delay times from the TRIG and THRES inputs to DISCH.

These delay times add directly to the period and create differences between calculated and actual values that
increase with frequency. In addition, the internal on-state resistance ron during discharge adds to RB to provide
another source of timing error in the calculation when RB is very low or ron is very high.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

11

TLC555, TLC555Y
LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

APPLICATION INFORMATION

The equations below provide better agreement with measured values.

–t

t

+

c(H)

t

c(L)

These equations and those given earlier are similar in that a time constant is multiplied by the logarithm of a number
or function. The limit values of the logarithmic terms must be between In 2 at low frequencies and In 3 at extremely
high frequencies. For a duty cycle close to 50%, an appropriate constant for the logarithmic terms can be substituted

with good results. Duty cycles less than 50%

conditions can be difficult to obtain.
In monostable applications, the trip point on TRIG can be set by a voltage applied to CONT . An input voltage between

10% and 80% of the supply voltage from a resistor divider with at least 500-µA bias provides good results.

CT(RA)

+

CT(RB)

RB)Inƪ3–exp

ron)In

3–exp

ƪ

t

c(H)

ǒ

CT(RB)

ǒ

CT(RA)

t

c(H)

)

PLH

–t

PHL

require that

t

c(L)

ron)

RB)

Ǔ

)

t

ƫ

Ǔ

ƫ

t

t

PHL

)

t

PLH

c(H)

< 1 and possibly RA ≤ ron. These

c(L)

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

MECHANICAL DATA

D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

14

1

0.069 (1,75) MAX

0.050 (1,27)

A

0.020 (0,51)

0.014 (0,35)

0.010 (0,25)

0.004 (0,10)

8

7

0.010 (0,25)

0.157 (4,00)

0.150 (3,81)

M

0.244 (6,20)

0.228 (5,80)

Seating Plane

0.004 (0,10)

PINS **

DIM

A MAX

A MIN

0.008 (0,20) NOM

Gage Plane

0°–8°

8

0.197

(5,00)

0.189

(4,80)

14

0.344

(8,75)

0.337

(8,55)

0.010 (0,25)

0.044 (1,12)

0.016 (0,40)

4040047/D 10/96

16

0.394

(10,00)

0.386

(9,80)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

13

TLC555, TLC555Y
LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

MECHANICAL INFORMATION

DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

28 PIN SHOWN

0,65

28

1

2,00 MAX

0,38
0,22

15

14

A

0,05 MIN

0,15

5,60
5,00

M

8,20
7,40

Seating Plane

0,10

0,15 NOM

Gage Plane

0°–8°

0,25

1,03
0,63

PINS **

DIM

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150

8

3,30

2,70

14

6,50

6,50

5,905,90

2016

7,50

6,90

24

8,50

28

10,50

9,907,90

30

10,50

9,90

38

12,90

12,30

4040065 /C 10/95

14

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

MECHANICAL INFORMATION

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

A SQ

B SQ

19

20

21

22

23

24

25

12826 27

1314151618 17

12

0.020 (0,51)

0.010 (0,25)

MIN

0.342

(8,69)

0.442

0.640

0.739

0.938

1.141

A

0.358
(9,09)

0.458

(11,63)

0.660

(16,76)

0.761

(19,32)(18,78)

0.962

(24,43)

1.165

(29,59)

NO. OF

TERMINALS

**

11

10

9

8

7

6

5

432

20

28

44

52

68

84

0.020 (0,51)

0.010 (0,25)

(11,23)

(16,26)

(23,83)

(28,99)

MINMAX

0.307
(7,80)

0.406

(10,31)

0.495

(12,58)

0.495

(12,58)

0.850
(21,6)

1.047
(26,6)

0.080 (2,03)

0.064 (1,63)

B

MAX

0.358
(9,09)

0.458

(11,63)

0.560

(14,22)

0.560

(14,22)

0.858
(21,8)

1.063
(27,0)

0.055 (1,40)

0.045 (1,14)

0.028 (0,71)

0.022 (0,54)

0.050 (1,27)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.045 (1,14)

0.035 (0,89)

0.045 (1,14)

0.035 (0,89)

4040140/D 10/96

15

TLC555, TLC555Y
LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

MECHANICAL INFORMATION

JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE

0.400 (10,20)

0.355 (9,00)

0.063 (1,60)

0.015 (0,38)

0.100 (2,54)

8

1

5

4

0.065 (1,65)

0.045 (1,14)

0.020 (0,51) MIN

0.280 (7,11)

0.245 (6,22)

0.200 (5,08) MAX

0.130 (3,30) MIN

0.023 (0,58)

0.015 (0,38)

0.310 (7,87)

0.290 (7,37)

Seating Plane

0°–15°

0.014 (0,36)

0.008 (0,20)

NOTES: A. All linear dimensions are in inches (millimeters).

16

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.

E. Falls within MIL-STD-1835 GDIP1-T8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4040107/C 08/96

TLC555, TLC555Y

LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

MECHANICAL DATA

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60)

0.355 (9,02)

58

0.260 (6,60)

0.240 (6,10)

41

0.070 (1,78) MAX

0.020 (0,51) MIN

0.200 (5,08) MAX

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.015 (0,38)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001

0.010 (0,25)

M

0.310 (7,87)

0.290 (7,37)

Seating Plane

0°–15°

0.010 (0,25) NOM

4040082/B 03/95

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

17

TLC555, TLC555Y
LinCMOS TIMERS

SLFS043C – SEPTEMBER 1983 – REVISED SEPTEMBER 1997

MECHANICAL INFORMATION

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0,65

14

1

1,20 MAX

A

7

0,05 MIN

0,30
0,19

8

4,50
4,30

6,60
6,20

M

0,10

Seating Plane

0,10

0,15 NOM

Gage Plane

0,25

0°–8°

0,75
0,50

PINS **

DIM

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

8

3,10

2,90

14

5,10

4,90

16

5,10

20

6,60

6,404,90

24

7,90

7,70

28

9,80

9,60

4040064/E 08/96

18

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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