Texas Instruments TLC542IDWR, TLC542CDWR, TLC542IFNR Datasheet

U

TLC542C, TLC542I

8-BIT ANALOG-TO-DIGITAL CONVERTERS

WITH SERIAL CONTROL AND 11 INPUTS

SLAS075A – FEBRUARY 1989 – REVISED MARCH 1995

D

8-Bit Resolution A/D Converter

D

Microprocessor Peripheral or Stand-Alone
Operation

D

On-Chip 12-Channel Analog Multiplexer

D

Built-in Self-Test Mode

D

Software-Controllable Sample and Hold

D

Total Unadjusted Error... ±0.5 LSB Max

D

Direct Replacement for Motorola
MC145041

D

On-Board System Clock

D

End-of-Conversion (EOC) Output

D

Pinout and Control Signals Compatible

INPUT A0
INPUT A1
INPUT A2
INPUT A3
INPUT A4
INPUT A5
INPUT A6
INPUT A7
INPUT A8

With the TLC1542/3 10-Bit A/D Converters

D

CMOS Technology

PARAMETER VALUE

Channel Acquisition/Sample Time 16 µs
Conversion TIme (Max) 20 µs
Samples per Second (Max) 25 × 10
Power Dissipation (Max) 10 mW

description

The TLC542 is a CMOS converter built around an
8-bit switched-capacitor successive-approximation

3

INPUT A3
INPUT A4
INPUT A5
INPUT A6
INPUT A7

analog-to-digital converter. The device is designed
for serial interface to a microprocessor or peripheral
via a 3-state output with three inputs [including I/O
CLOCK, CS

(chip select), and ADDRESS INPUT].
The TLC542 allows high-speed data transfers and
sample rates of up to 40,000 samples per second.
In addition to the high-speed converter and
versatile control logic, an on-chip 12-channel
analog multiplexer can sample any one of 1 1 inputs or an internal “self-test” voltage, and the sample and hold
is started under microprocessor control. At the end of conversion, the end-of-conversion (EOC) output pin goes
high to indicate that conversion is complete. Detailed information on interfacing to most popular
microprocessors is readily available from the factory.

AVAILABLE OPTIONS

PACKAGE

T

A

0°C to 70°C — TLC542CN TLC542CDW

–40°C to 85°C TLC542IFN TLC542IN TLC542IDW

CHIP CARRIER

(FN)

PLASTIC DIP

(N)

DW OR N PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9

GND

SMALL OUTLINE

10

FN PACKAGE

(TOP VIEW)

INPUT A2

INPUT A1

3212019

4
5
6
7
8

910111213

GND

INPUT A8

(DW)

V

20

CC

EOC

19

I/O CLOCK

18

ADDRESS INPUT

17

DATA OUT

16

CS

15

REF+

14

REF–

13

INPUT A10

12

INPUT A9

11

CC

INPUT A0

V

EOC

18
17
16
15
14

REF–

INPUT A9

INPUT A10

I/O CLOCK
ADDRESS INP
DATA OUT
CS
REF+

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1995, Texas Instruments Incorporated

1

TLC542C, TLC542I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS

SLAS075A – FEBRUARY 1989 – REVISED MARCH 1995

description (continued)

The converter incorporated in the TLC542 features differential high-impedance reference inputs that facilitate
ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noises. A switched­capacitor design allows low-error (±0.5 LSB) conversion in 20 µs over the full operating temperature range.

The TLC542C is characterized for operation from 0°C to 70°C and the TLC542I is characterized for operation
from –40°C to 85°C.

functional block diagram

REF+ REF–

Analog

Inputs

ADDRESS

INPUT

I/O CLOCK

CS

EOC

12-Channel

Analog

Multiplexer

Self-Test

Reference

typical equivalent inputs

Sample and

4

Input Address

Register

Multiplexer

Hold

4

Input

8-Bit

Analog-to-Digital

Converter

(Switched-Capacitors)

8

Output

Data

Register

Control Logic

and I/O

2

Counters

8

8-to-1 Data

Selector and

Driver

4

DATA
OUT

INPUT CIRCUIT IMPEDANCE DURING SAMPLING MODE INPUT CIRCUIT IMPEDANCE DURING HOLD MODE

INPUT

A0–A10

2

1 kΩ TYP

Ci = 60 pF TYP
(equivalent input
capacitance)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

INPUT

A0–A10

5 MΩ TYP

operating sequence

1 2345678 1 2345678

I/O

CLOCK

t

t

su(CS)

CS

su(A)

(see Note A)

Access
Cycle B

t

acq

8-BIT ANALOG-TO-DIGITAL CONVERTERS

WITH SERIAL CONTROL AND 11 INPUTS

Don’t Care

t

conv

12 Internal System Clocks ≤ 12 µs

TLC542C, TLC542I

SLAS075A – FEBRUARY 1989 – REVISED MARCH 1995

Access
Cycle C

t

acq

MSB LSB

ADDRESS

INPUT

DATA

OUT

EOC

NOTES: A. To minimize errors caused by noise at the chip select input, the internal circuitry waits for two rising edges and one falling edge

B. The output is 3-stated on CS

B3 B2 B1 B0 C3 C2 C1 C0

Previous Conversion Data A Conversion Data B

MSB

(see Note B)

of the internal system clock after CS
specifications. Therefore, no attempt should be made to clock-in an address until the minimum chip select setup time has elapsed.

Don’t Care Don’t Care

Hi-Z State

See Note B

LSB

t

t

d(I/O–EOC)

t

cycle

↓ before responding to control input signals. The CS setup time is given by the t

going high or on the negative edge of the eighth I/O clock.

d(EOC–DATA)

MSB LSB

B7 B6 B5 B4 B3 B2 B1 B0A7 A6 A5 A4 A3 A2 A1 A0

MSB LSB

Hi-Z

State

su(CS)

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V
Input voltage range (any input) –0.3 V to V
Output voltage range –0.3 V to V

Peak input current range (any input) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak total input current (all inputs) ±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range: TLC542C 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Case temperature for 10 seconds: FN package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package 260°C. . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to digital ground with REF– and GND wired together (unless otherwise noted).

(see Note 1) 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

TLC542l –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

CC

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

TLC542C, TLC542I

I/O CLOCK transition time, t

(see Note 3)

ns

Operating free-air temperature, T

°C

(g )

A

Selected channel leakage current

CC

,

A

CiInput capacitance

pF

8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS

SLAS075A – FEBRUARY 1989 – REVISED MARCH 1995

recommended operating conditions, V

Supply voltage, V
Positive reference voltage, V
Negative reference voltage, V
Differential reference voltage, V
Analog input voltage (see Note 3) 0 V
High-level control input voltage, V
Low-level control input voltage, V
Setup time, address bits at data input before I/O CLOCK↑, t
Hold time, address bits after I/O CLOCK↑, t
Hold time, CS low after 8th I/O CLOCK↑, t
Setup time, CS low before clocking in first address bit, t
Input/output clock frequency, f
Input/output clock high, t
Input/output clock low, t

p

NOTES: 2. Analog input voltages greater than that applied to REF+ convert as all ones (11111111), while input voltages less than that applied

CC

(see Note 2) V

ref+

(see Note 2) –0.1 0 V

ref–

– V

ref+

IH

IL

clock(I/O)

wH(I/O)

wL(I/O)

t

p

to REF – convert as all zeros (00000000). For proper operation, REF+ must be at least 1 V higher than REF–. Also, the total
unadjusted error may increase as this differential reference voltage falls below 4.75 V.

3. This is the time required for the clock input signal to fall from VIH min to VIL max or to rise from VIL max to VIH min. In the vicinity
of normal room temperature, the devices function with input clock transition time as slow as 2 µs for remote data acquisition
applications where the sensor and the A/D converter are placed several feet away from the controlling microprocessor.

4. To minimize errors caused by noise at the chip select input, the internal circuitry waits for two rising edges and one falling edge of
the internal system clock after CS
specifications. Therefore, no attempt should be made to clock-in address data until the minimum chip select setup time has elapsed.

A

(see Note 2) 1 V

ref–

h(A)

h(CS)

f

clock(I/O)

f

clock(I/O)

TLC542C 0 70
TLC542I –40 85

↓ before responding to control input signals. The CS setup time is given by the t

= 4.75 to 5.5 V

CC

MIN NOM MAX UNIT

4.75 5 5.5 V
ref–VCC

2 V

su(A)

(see Note 4) 3.8 µs

su(CS)

≤ 525 kHz 100
> 525 kHz 40

400 ns

0 ns
0 ns

0 1.1 MHz
404 ns
404 ns

VCC + 0.1 V

CCVCC

ref+

+ 0.2 V
CC

V

V

0.8 V

°

su(CS)

electrical characteristics over recommended operating temperature range, VCC = V

= 1.1 MHz (unless otherwise noted)

5.5 V, f

V
V

I
I
I

I

†

clock(I/O)

High-level output voltage (DATA OUT) VCC = 4.75 V, IOH = –360 µA 2.4 V

OH

Low-level output voltage VCC = 4.75 V, IOL = 1.6 mA 0.4 V

OL

Off-state (high-impedance state)
output current

High-level input current VI = V

IH

Low-level input current VI = 0 –0.005 –2.5 µA

IL

Operating supply current CS at 0 V 1.2 2 mA

CC

Maximum static analog reference current into

ref

REF+

p

All typical values are at TA = 25°C.

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

VO = VCC, CS at V
VO = 0,

CC

Selected at V
Unselected channel at 0 V

V

= VCC, V

ref+

p

Analog inputs 7 55
Control inputs 5 15

,

CC

CS at V

CC

0.005 2 µA

0°C to 70 °C 0.4
–40°C to 85°C –0.4

= GND 10 µA

ref–

= 4.75 V to

ref+

–10

10

µ

µ

p

4

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