TLC542C, TLC542I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS
SLAS075B – FEBRUARY 1989 – REVISED JULY 2000
D
8-Bit Resolution A/D Converter
D
Microprocessor Peripheral or Stand-Alone
Operation
D
On-Chip 12-Channel Analog Multiplexer
D
Built-In Self-Test Mode
D
Software-Controllable Sample and Hold
D
Total Unadjusted Error ... ±0.5 LSB Max
D
Direct Replacement for Motorola
MC145041
D
On-Board System Clock
D
End-of-Conversion (EOC) Output
D
Pinout and Control Signals Compatible
With the TLC1542/3 10-Bit A/D Converters
D
CMOS Technology
PARAMETER VALUE
Channel Acquisition/Sample Time 16 µs
Conversion Time (Max) 20 µs
Samples per Second (Max) 25 × 10
Power Dissipation (Max) 10 mW
description
The TLC542 is a CMOS converter built around an
8-bit switched-capacitor successive-approximation
INPUT A0
INPUT A1
INPUT A2
INPUT A3
INPUT A4
INPUT A5
INPUT A6
INPUT A7
INPUT A8
3
INPUT A3
INPUT A4
INPUT A5
INPUT A6
INPUT A7
DW OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
GND
10
FN PACKAGE
(TOP VIEW)
INPUT A2
INPUT A1
INPUT A0
3212019
4
5
6
7
8
910111213
V
20
CC
EOC
19
I/O CLOCK
18
ADDRESS INPUT
17
DATA OUT
16
CS
15
REF+
14
REF–
13
INPUT A10
12
INPUT A9
11
CC
V
EOC
I/O CLOCK
18
ADDRESS INP
17
DATA OUT
16
CS
15
REF+
14
analog-to-digital converter. The device is designed
for serial interface to a microprocessor or peripheral
INPUT A8
GND
INPUT A9
REF–
INPUT A10
via a 3-state output with three inputs [including I/O
CLOCK, CS
(chip select), and ADDRESS INPUT].
The TLC542 allows high-speed data transfers and
sample rates of up to 40,000 samples per second. In addition to the high-speed converter and versatile control
logic, an on-chip 12-channel analog multiplexer can sample any one of 1 1 inputs or an internal
self-test
and the sample and hold is started under microprocessor control. At the end of conversion, the
end-of-conversion (EOC) output pin goes high to indicate that conversion is complete. Detailed information on
interfacing to most popular microprocessors is readily available from the factory.
voltage,
The converter incorporated in the TLC542 features differential high-impedance reference inputs that facilitate
ratiometric conversion, scaling, and isolation of analog circuitry from logic and supply noises. A switchedcapacitor design allows low-error (±0.5 LSB) conversion in 20 µs over the full operating temperature range.
AVAILABLE OPTIONS
PACKAGE
T
A
0°C to 70°C — TLC542CN TLC542CDW
–40°C to 85°C TLC542IFN TLC542IN TLC542IDW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
CHIP CARRIER
(FN)
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PLASTIC DIP
(N)
SMALL OUTLINE
(DW)
Copyright 2000, Texas Instruments Incorporated
1
TLC542C, TLC542I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS
SLAS075B – FEBRUARY 1989 – REVISED JULY 2000
description (continued)
The TLC542C is characterized for operation from 0°C to 70°C and the TLC542I is characterized for operation
from –40°C to 85°C.
functional block diagram
REF+ REF–
Analog
Inputs
ADDRESS
INPUT
I/O CLOCK
CS
EOC
12-Channel
Analog
Multiplexer
Self-Test
Reference
typical equivalent inputs
Sample and
4
Input Address
Register
Multiplexer
Hold
4
Input
8-Bit
Analog-to-Digital
Converter
(Switched-Capacitors)
8
Output
Data
Register
Control Logic
and I/O
2
Counters
8
8-to-1 Data
Selector and
Driver
4
DATA
OUT
INPUT CIRCUIT IMPEDANCE DURING SAMPLING MODE INPUT CIRCUIT IMPEDANCE DURING HOLD MODE
INPUT
A0–A10
1 kΩ TYP
Ci = 60 pF TYP
(equivalent input
capacitance)
INPUT
A0–A10
5 MΩ TYP
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating sequence
1 2345678 1 2345678
I/O
CLOCK
t
t
su(CS)
CS
su(A)
(see Note A)
Access
Cycle B
t
acq
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS
Don’t Care
t
c(1)
12 Internal System Clocks ≤ 12 µs
TLC542C, TLC542I
SLAS075B – FEBRUARY 1989 – REVISED JULY 2000
Access
Cycle C
t
(acq)
MSB LSB
ADDRESS
INPUT
DATA
OUT
EOC
NOTES: A. To minimize errors caused by noise at the chip select input, the internal circuitry waits for two rising edges and one falling edge
B. The output becomes 3-state on CS
B3 B2 B1 B0 C3 C2 C1 C0
Previous Conversion Data A Conversion Data B
MSB
(see Note B)
of the internal system clock after CS
specifications. Therefore, no attempt should be made to clock-in an address until the minimum chip select setup time has elapsed.
Don’t Care Don’t Care
Hi-Z State
See Note B
LSB
t
t
d(I/O–EOC)
t
c(2)
↓ before responding to control input signals. The CS setup time is given by the t
going high or on the negative edge of the eighth I/O clock.
d(EOC–DATA)
MSB LSB
B7 B6 B5 B4 B3 B2 B1 B0A7 A6 A5 A4 A3 A2 A1 A0
MSB LSB
Hi-Z
State
su(CS)
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage range (any input) –0.3 V to VCC + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO –0.3 V to VCC+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak input current range (any input), I
Peak total input current (all inputs), I
Operating free-air temperature range: TLC542C 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Case temperature for 10 seconds, TC: FN package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package 260°C. . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to digital ground with REF– and GND wired together (unless otherwise noted).
(see Note 1) 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
p-p)
±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
P
TLC542l –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3