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TL1593C
3-CHANNEL SAMPLE-AND-HOLD CIRCUIT
SOCS027B – APRIL 1987 – REVISED JULY 1991
• Designed for Use With TI Virtual-Phase
CCD Image Sensors
• Supports Both Color and Monochrome
Applications
• Contains Three Separate Sample-and-Hold
Circuits
• Differential Input With 11-dB Gain
• 5-MHz Sampling Rate on Each Channel
• Separate Analog and Digital Supplies for
Immunity to Switching Transients
ANLG V
ANLG GND
CC
AIN1
CIN1
AIN2
CIN2
AIN3
CIN3
NS PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S/H
S/H
S/H
DIG V
OUT1
OUT2
OUT3
DIG GND
description
The TL1593C is a three-channel sample-and-hold integrated circuit designed for use in processing video
signals generated by TI virtual-phase CCD image sensors. It can be used with one-, two-, and three-channel
color and monochrome TI virtual-phase CCDs.
Each sample-and-hold channel consists of a differential-input buffer , a digitally controlled switch, and an output
buffer that has high impedance. Separate supply and ground pins are provided for the analog and digital
sections to ensure optimum isolation. Internal-hold capacitors are included to reduce the external parts count.
The differential inputs allow the amplifier return pin of the imager to be connected to CIN of the sample-and-hold
circuit to obtain common-mode rejection for antiblooming clock transients in the CCD. The analog inputs should
be capacitively coupled from the CCD outputs to ensure optimum performance.
The TL1593C is supplied in a 16-pin plastic package and is characterized for operation from 0°C to 70°C.
1
2
3
CC
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These
circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,
Method 3015; however, precautions should be taken to avoid application of any voltage higher than maximum-rated voltages to these
conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic voltage level, preferably either VCC or ground.
Specific guidelines for handling devices of this type are contained in the publication
(ESDS) Devices and Assemblies
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
high-impedance circuits. During storage or handling, the device leads should be shorted together or the device should be placed in
Guidelines for Handling Electrostatic-Discharge-Sensitive
available from Texas Instruments.
Copyright 1991, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
TL1593C
3-CHANNEL SAMPLE-AND-HOLD CIRCUIT
SOCS027B – APRIL 1987 – REVISED JULY 1991
schematic
16
S/H1
CIN1
AIN1
S/H2
CIN2
AIN2
S/H3
CIN3
AIN3
3
2
15
5
4
14
7
6
+
–
11 dB
DIG GND
+
–
11 dB
DIG GND
+
–
11 dB
DIG GND
ANLG
GND
ANLG
GND
ANLG
GND
Terminal Functions
TERMINAL
NAME NO.
AIN1 2 I Channel 1 analog input
AIN2 4 I Channel 2 analog input
AIN3 6 I Channel 3 analog input
ANLG GND 8 Analog ground
ANLG V
CC
CIN1 3 I Channel 1 compensation input
CIN2 5 I Channel 2 compensation input
CIN3 7 I Channel 3 compensation input
DIG GND 9 Digital ground
DIG V
CC
OUT1 12 O Channel 1 output
OUT2 11 O Channel 2 output
OUT3 10 O Channel 3 output
S/H1 16 I Channel 1 sample-and-hold input
S/H2 15 I Channel 2 sample-and-hold input
S/H3 14 I Channel 3 sample-and-hold input
1 Analog supply voltage
13 Digital supply voltage
+
–
+
–
+
–
12
11
10
OUT1
OUT2
OUT3
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265