D
DVideo Distribution
DMotor Drivers
DPiezo Drivers
DESCRIPTION
The THS3112/5 are low-noise, high-speed current
feedback amplifiers, ideal for any application requiring
high output current. The low noninverting current noise
of 2.9 pA/√Hz
pA/√Hz
signal resolution. The THS3112/5 can operate from
±5-V to ±15-V supply voltages, while drawing as little as
4.5 mA of supply current per channel. It offers low
–78-dBc total harmonic distortion driving 2 V
100-Ω load. The THS3115 features a low power
shutdown mode, consuming only 300-µA shutdown
quiescent current per channel. The THS3112/5 is
packaged in a standard SOIC, SOIC PowerP AD, and
TSSOP PowerPAD packages.
and the low inverting current noise of 10.8
increase signal to noise ratios for enhanced
into a
PP
VOLTAGE NOISE AND CURRENT NOISE
100
Hz
Hz
nV/
pA/
10
– Voltage Noise –
– Current Noise –
n
I
V
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
V
n
n
1
10
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
vs
FREQUENCY
VCC = ±5 V to ±15 V
TA = 25°C
I
n–
I
n+
100
1 K
f – Frequency – Hz
10 K
100 K
THS3112
SOIC (D) AND
SOIC PowerPAD
(TOP VIEW)
1 OUT
1 IN–
1 IN+
V
CC–
1
2
3
4
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(DDA) PACKAGE
V
8
7
6
5
CC+
2 OUT
2 IN–
2 IN+
THS3115
1 OUT
1 IN–
1 IN+
V
CC–
N/C
GND
N/C
SOIC (D) AND
(TOP VIEW)
1
14
2
13
3
12
4
11
5
10
6
7
9
8
V
CC+
2 OUT
2 IN–
2 IN+
N/C
SHUTDOWN
N/C
TSSOP PowerPAD (PWP) PACKAGE
Copyright 2001, Texas Instruments Incorporated
1
THS3112
THS3112EVM
THS3115
SLOS385 – SEPTEMBER 2001
T
A
0°C to 70°CTHS3112CDTHS3112CDDATHS3115CDTHS3115CPWP
–40°C to 85°CTHS3112IDTHS3112IDDATHS3115IDTHS3115IPWP
SOIC-8
(D)
AVAILABLE OPTIONS
PACKAGED DEVICE
SOIC-8 PowerPAD
(DDA)
SOIC-14
(D)
TSSOP-14
(PWP)
EVALUATION
MODULES
THS3112EVM
THS3115EVM
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds300°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS3112 and THS31 15 may incorporate a PowerP AD on the underside of the chip. This acts as a heatsink and must be connected
to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature
which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPAD
thermally enhanced package.
DISSIPATION RATING TABLE
PACKAGE
D-895°C/W
DDA67°C/W1.87 W
D-1466.6°C/W
PWP37.5°C/W3.3 W
‡
This data was taken using the JEDEC proposed high-K test PCB.
For the JEDEC low-K test PCB, the θJA is168°C/W for the D-8
package and 122.3°C/W for the D-14 package.
θ
JA
‡
‡
TA = 25°C
POWER RATING
1.32 W
1.88 W
recommended operating conditions
Supply voltage, V
Operating free-air temperature, T
Shutdown pin input levels, relative to the GND pin
2
CC+
to V
CC–
MINNOMMAXUNIT
Dual supply±5±15
Single supply1030
A
C-suffix070
I-suffix–4085
High level (device shutdown)2
Low level (device active)0.8
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V
°C
V
R
F
kΩ,
R
F
750 Ω,
R
F
750 Ω,
SR
Slew rate (see Note 2), G8
R
680 Ω
V/µs
G 2,R
F
680 Ω,
G 2,R
F
680 Ω,
G = 2
f = 1 MHz
G
R
150 Ω
40 IRE modulation
THS3112
THS3115
SLOS385 – SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
NOTE 3: Disable/enable time is defined as the time from when the shutdown signal is applied to the SHDN pin to when the supply current has
Shutdown quiescent current (per channel)V
Disable time (see Note 3)VCC = ±15 V0.1µs
Enable time (see Note 3)VCC = ±15 V0.4µs
Shutdown pin input bias current for power upVCC = ±5 V, ±15 V, V
Shutdown pin input bias current for power downVCC = ±5 V, ±15 V, V
reached half of its final value.
= 0 V, VCC = ±5 V, ±15 V0.30.45mA
GND
TA = 25°C4.45.5
TA = full range6
TA = 25°C4.96.5
TA = full range7.5
TA = 25°C5360
TA = full range50
TA = 25°C6874
TA = full range66
= 0 V1825µA
(SHDN)
= 3.3 V110130µA
(SHDN)
mA
dB
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Small signal closed loop gainvs Frequency1 – 11, 13, 14
Gain and phasevs Frequency12
Small signal closed loop noninverting gainvs Frequency15, 16
Small signal closed loop inverting gainvs Frequency17, 18
Small and large signal outputvs Frequency19, 20