TEXAS INSTRUMENTS N74LVC32244 Technical data

www.ti.com

SN74LVC32244

32-BIT BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCES342C – OCTOBER 2000 – REVISED APRIL 2005

FEATURES

• Member of the Texas Instruments Widebus+™
Family • I

• Operates From 1.65 V to 3.6 V

• Inputs Accept Voltages to 5.5 V

• Max tpdof 4.1 ns at 3.3 V

• Typical V

< 0.8 V at V

OLP

CC

(Output Ground Bounce)

= 3.3 V, T

A

= 25°C

• Typical V

> 2 V at V

Supports Partial-Power-Down Mode

off

OHV

CC

(Output V

= 3.3 V, T

A

OH

= 25°C

Undershoot)

Operation

• Supports Mixed-Mode Signal Operation on

All Ports (5-V Input/Output Voltage With

3.3-V V

)

CC

DESCRIPTION/ORDERING INFORMATION

This 32-bit buffer/driver is designed for 1.65-V to 3.6-V V
The SN74LVC32244 is designed specifically to improve the performance and density of 3-state memory address

drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It

provides true outputs and symmetrical active-low output-enable ( OE) inputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using I

preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

operation.

CC

. The I

off

circuitry disables the outputs,

off

through a pullup

CC

ORDERING INFORMATION

T

A

–40°C to 85°C Tape and reel NC244

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

LFBGA – GKE SN74LVC32244GKER
LFBGA – ZKE (Pb-free) SN74LVC32244ZKER

PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus+ is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2000–2005, Texas Instruments Incorporated

www.ti.com

GKE OR ZKE PACKAGE

(TOP VIEW)

J

H

G

F

E

D

C

B

A

21 3 4 65

P

N

M

L

K

T

R

SN74LVC32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS

SCES342C – OCTOBER 2000 – REVISED APRIL 2005

2

TERMINAL ASSIGNMENTS

1 2 3 4 5 6

A 1Y2 1Y1 1 OE 2 OE 1A1 1A2
B 1Y4 1Y3 GND GND 1A3 1A4
C 2Y2 2Y1 V
D 2Y4 2Y3 GND GND 2A3 2A4
E 3Y2 3Y1 GND GND 3A1 3A2
F 3Y4 3Y3 V
G 4Y2 4Y1 GND GND 4A1 4A2
H 4Y3 4Y4 4 OE 3 OE 4A4 4A3
J 5Y2 5Y1 5 OE 6 OE 5A1 5A2
K 5Y4 5Y3 GND GND 5A3 5A4
L 6Y2 6Y1 V
M 6Y4 6Y3 GND GND 6A3 6A4
N 7Y2 7Y1 GND GND 7A1 7A2
P 7Y4 7Y3 V
R 8Y2 8Y1 GND GND 8A1 8A2
T 8Y3 8Y4 8 OE 7 OE 8A4 8A3

CC

CC

CC

CC

V

CC

V

CC

V

CC

V

CC

2A1 2A2

3A3 3A4

6A1 6A2

7A3 7A4

FUNCTION TABLE

(EACH 4-BIT BUFFER)

INPUTS

OE A

L H H
L L L

H X Z

OUTPUT

Y

www.ti.com

1OE

1A1

1A2

1A3

1A4

1Y1

1Y2

1Y3

1Y4

A3

A5

A6

B5

B6

A2

A1

B2

B1

2OE

2A1

2A2

2A3

2A4

2Y1

2Y2

2Y3

2Y4

A4

C5

C6

D5

D6

C2

C1

D2

D1

3OE

3A1

3A2

3A3

3A4

3Y1

3Y2

3Y3

3Y4

H4

E5

E6

F5

F6

E2

E1

F2

F1

4OE

4A1

4A2

4A3

4A4

4Y1

4Y2

4Y3

4Y4

H3

G5

G6

H6

H5

G2

G1

H1

H2

5OE

5A1

5A2

5A3

5A4

5Y1

5Y2

5Y3

5Y4

J3

J5

J6

K5

K6

J2

J1

K2

K1

6OE

6A1

6A2

6A3

6A4

6Y1

6Y2

6Y3

6Y4

J4

L5

L6

M5

M6

L2

L1

M2

M1

7OE

7A1

7A2

7A3

7A4

7Y1

7Y2

7Y3

7Y4

T4

N5

N6

P5

P6

N2

N1

P2

P1

8OE

8A1

8A2

8A3

8A4

8Y1

8Y2

8Y3

8Y4

T3

R5

R6

T6

T5

R2

R1

T1

T2

LOGIC DIAGRAM (POSITIVE LOGIC)

SN74LVC32244

32-BIT BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCES342C – OCTOBER 2000 – REVISED APRIL 2005

3

www.ti.com

SN74LVC32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS

SCES342C – OCTOBER 2000 – REVISED APRIL 2005

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

V

Supply voltage range –0.5 6.5 V

CC

V

Input voltage range

I

V

Voltage range applied to any output in the high-impedance or power-off state

O

V

Voltage range applied to any output in the high or low state

O

I

Input clamp current VI< 0 –50 mA

IK

I

Output clamp current VO< 0 –50 mA

OK

I

Continuous output current ±50 mA

O

Continuous current through each V

θ

Package thermal impedance

JA

T

Storage temperature range –65 150 °C

stg

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of V
(4) The package thermal impedance is calculated in accordance with JESD 51-7.

(2)

is provided in the recommended operating conditions table.

CC

(1)

MIN MAX UNIT

–0.5 6.5 V

(2)

(2) (3)

or GND ±100 mA

CC

(4)

GKE/ZKE package 40 °C/W

–0.5 6.5 V
–0.5 V

CC

+ 0.5 V

Recommended Operating Conditions

(1)

MIN MAX UNIT

V

V

V

V

V

I

OH

I

OL

Supply voltage V

CC

High-level input voltage V

IH

Low-level input voltage V

IL

Input voltage 0 5.5 V

I

Output voltage V

O

High-level output current mA

Low-level output current mA

Operating 1.65 3.6
Data retention only 1.5
V

= 1.65 V to 1.95 V 0.65 × V

CC

= 2.3 V to 2.7 V 1.7 V

CC

V

= 2.7 V to 3.6 V 2

CC

V

= 1.65 V to 1.95 V 0.35 × V

CC

= 2.3 V to 2.7 V 0.7 V

CC

V

= 2.7 V to 3.6 V 0.8

CC

CC

High or low state 0 V
3-state 0 5.5
V

= 1.65 V –4

CC

V

= 2.3 V –8

CC

V

= 2.7 V –12

CC

V

= 3 V –24

CC

V

= 1.65 V 4

CC

V

= 2.3 V 8

CC

V

= 2.7 V 12

CC

V

= 3 V 24

CC

∆ t/ ∆ v Input transition rise or fall rate 10 ns/V
T

(1) All unused inputs of the device must be held at V

Operating free-air temperature –40 85 °C

A

or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

CC

CC

CC

4

www.ti.com

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS V

IOH= –100 µ A 1.65 V to 3.6 V V
IOH= –4 mA 1.65 V 1.2

V

OH

V

OL

I

I

I

off

I

OZ

I

CC

∆ I

CC

C

i

C

o

(1) All typical values are at V
(2) This applies in the disabled state only.

IOH= –8 mA 2.3 V 1.7

IOH= –12 mA

IOH= –24 mA 3 V 2.2
IOL= 100 µ A 1.65 V to 3.6 V 0.2
IOL= 4 mA 1.65 V 0.45
IOL= 8 mA 2.3 V 0.7 V
IOL= 12 mA 2.7 V 0.4
IOL= 24 mA 3 V 0.55
VI= 0 to 5.5 V 3.6 V ±5 µ A
VIor VO= 5.5 V 0 ±10 µ A
VO= 0 to 5.5 V 3.6 V ±10 µ A
VI= V

3.6 V ≤ VI≤ 5.5 V
One input at V
VI= V
VO= V

or GND 40

CC

or GND 3.3 V 5.5 pF

CC

CC

CC

(2)

– 0.6 V, Other inputs at V

CC

or GND 3.3 V 6 pF

= 3.3 V, TA= 25°C.

IO= 0 3.6 V µ A

or GND 2.7 V to 3.6 V 500 µ A

CC

32-BIT BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCES342C – OCTOBER 2000 – REVISED APRIL 2005

CC

2.7 V 2.2
3 V 2.4

MIN TYP

– 0.2

CC

SN74LVC32244

(1)

MAX UNIT

V

40

Switching Characteristics

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )

V

= 1.8 V V

PARAMETER UNIT

t

pd

t

en

t

dis

t

sk(o)

FROM TO

(INPUT) (OUTPUT)

A Y
OE Y
OE Y

CC

± 0.15 V ± 0.2 V ± 0.3 V

MIN MAX MIN MAX MIN MAX MIN MAX

(1) (1) (1) (1)
(1) (1) (1) (1)
(1) (1) (1) (1)

(1) This information was not available at the time of publication.

= 2.5 V V

CC

V

= 2.7 V

CC

CC

4.7 1.1 4.1 ns

5.8 1 4.6 ns

6.2 1.8 5.8 ns

Operating Characteristics

TA= 25°C

V

PARAMETER UNIT

C

Power dissipation capacitance

pd

per buffer/driver

(1) This information was not available at the time of publication.

= 1.8 V V

TEST

CONDITIONS

Outputs enabled
Outputs disabled

f = 10 MHz pF

CC

TYP TYP TYP

(1) (1)
(1) (1)

= 2.5 V V

CC

CC

= 3.3 V

1 ns

= 3.3 V

34

4

5

www.ti.com

V

M

From Output

Under Test

C

L

(see Note A)

LOAD CIRCUIT

S1

V

LOAD

Open

GND

R

L

R

L

Data Input

Timing Input

V

I

0 V

V

I

0 V

0 V

t

w

Input

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

VOLTAGE WAVEFORMS

PULSE DURATION

t

PLH

t

PHL

t

PHL

t

PLH

V

OH

V

OH

V

OL

V

OL

V

I

0 V

Input

Output
Waveform 1
S1 at V

LOAD

(see Note B)

Output
Waveform 2

S1 at GND

(see Note B)

V

OL

V

OH

t

PZL

t

PZH

t

PLZ

t

PHZ

V

LOAD

/2

0 V

VOL + V

∆

VOH − V

∆

≈0 V

V

I

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

Output

Output

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open

V

LOAD

GND

TEST S1

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. t

PLZ

and t

PHZ

are the same as t

dis

.

F. t

PZL

and t

PZH

are the same as ten.

G. t

PLH

and t

PHL

are the same as tpd.

H. All parameters and waveforms are not applicable to all devices.

Output

Control

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

M

V

I

V

M

V

M

1.8 V ± 0.15 V

2.5 V ± 0.2 V

2.7 V

3.3 V ± 0.3 V

1 kΩ
500 Ω
500 Ω
500 Ω

V

CC

R

L

2 × V

CC

2 × V

CC

6 V
6 V

V

LOAD

C

L

30 pF
30 pF
50 pF
50 pF

0.15 V

0.15 V

0.3 V

0.3 V

V

∆

V

CC

V

CC

2.7 V

2.7 V

V

I

VCC/2
VCC/2

1.5 V

1.5 V

V

M

tr/t

f

≤2 ns

≤2 ns
≤2.5 ns
≤2.5 ns

INPUTS

t

su

t

h

SN74LVC32244
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS

SCES342C – OCTOBER 2000 – REVISED APRIL 2005

PARAMETER MEASUREMENT INFORMATION

6

Figure 1. Load Circuit and Voltage Waveforms

PACKAGE OPTION ADDENDUM

www.ti.com

18-Jul-2006

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package
Drawing

Pins Package

Qty

Eco Plan

SN74LVC32244GKER ACTIVE LFBGA GKE 96 1000 TBD SNPB Level-3-220C-168 HR
SN74LVC32244ZKER ACTIVE LFBGA ZKE 96 1000 Green (RoHS &

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(2)

Lead/Ball Finish MSL Peak Temp

SNAGCU Level-3-250C-168 HR

(3)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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Addendum-Page 1

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