LM3526
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LM3526 Dual Port USB Power Switch and Over-Current Protection
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1
FEATURES
2
• Compatible with USB1.1 and USB 2.0
• 1 ms Fault Flag Delay Filters Hot-Plug Events
• Smooth Turn-on Eliminates In-rush Induced
Voltage Drop
• UL Recognized Component: REF# 205202
• 1A Nominal Short Circuit Output Current
Protects PC Power Supplies
• Thermal Shutdown Protects Device in Direct
Short Condition
• 500mA Minimum Continuous Load Current
• Small SOIC-8 package minimizes board space
• 2.7V to 5.5V Input Voltage Range
• 140 mΩ Max. Switch Resistance
• 1 µA Max. Standby Current
• 200 µA Max. Operating Current
• Under-voltage Lockout (UVLO)
APPLICATIONS
• Universal Serial Bus (USB) Root Hubs
including Desktop and Notebook PC
• USB Monitor Hubs
• Other Self-Powered USB Hub Devices
• High Power USB Devices Requiring In-rush
Limiting
• General Purpose High Side Switch
Applications
SNVS054E –FEBRUARY 2000–REVISED MARCH 2013
DESCRIPTION
The LM3526 provides Universal Serial Bus standard
power switch and over-current protection for all host
port applications. The dual port device is ideal for
Notebook and desktop PC's that supply power to
more than one port.
A 1 ms delay on the fault flag output prevents
erroneous overcurrent reporting caused by in-rush
currents during hot-plug events.
The dual stage thermal protection circuit in the
LM3526 provides individual protection to each switch
and the entire device. In a short-circuit/over-current
event, the switch dissipating excessive heat is turned
off, allowing the second switch to continue to function
uninterrupted.
The LM3526 accepts an input voltage between 2.7V
and 5.5V allowing use as a device-based in-rush
current limiter for 3.3V USB peripherals, as well as
Root and Self-Powered Hubs at 5.5V. The Enable
inputs accept both 3.3V and 5.0V logic thresholds.
The small size, low RON, and 1 ms fault flag delay
make the LM3526 a good choice for root hubs as well
as per-port power control in embedded and standalone hubs.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
LM3526
SNVS054E –FEBRUARY 2000–REVISED MARCH 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Typical Operating Circuit and Connection Diagram
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Figure 1. LM3526-H
Figure 2. LM3526-L
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Absolute Maximum Ratings
(1)(2)
SNVS054E –FEBRUARY 2000–REVISED MARCH 2013
Supply Voltage −0.3V to 6V
Output Voltage −0.3V to 6V
Voltage at All Other Pins −0.3V to 5.5V
Power Dissipation (TA= 25°C)
(3)
T
JMAX
(3)
700 mW
150°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by T
θ
(junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any
JA
temperature is P
DMAX
= (T
− TA)/θJAor the number given in the Absolute Maximum Ratings, which ever is lower. θJA= 150°C/W.
JMAX
(Maximum junction temperature),
JMAX
Operating Ratings
Supply Voltage Range 2.7V to 5.5V
Operating Ambient Range −40°C to 85°C
Operating Junction Temperature Range −40°C to 125°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 5 seconds) 260°C
ESD Rating
ESD Rating Output Only 8kV
(1) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Enable pin ESD threshold is 1.7kV.
(1)
2kV
DC Electrical Characteristics
Limits in standard typeface are for TJ= 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN= 5.0V, VEN= 0V (LM3526-L) or VEN= VIN(LM3526-H).
Symbol Parameter Conditions Min Typ Max Units
R
ON
I
OUT
I
SC
OC
I
LEAK
R
FO
I
EN
V
IH
V
IL
V
UVLO
I
DDOFF
I
DDON
Th
SD
THRESH
On Resistance mΩ
VIN= 5V, I
VIN= 2.7V, I
OUT pins continuous output Each Output 0.5 A
current
Short Circuit Output Current Each Output (enable into Load)
V
= 4.0V 0.5 1.2 1.9
OUT
V
= 0.1V 1 1.5
OUT
Over-current Threshold 2.2 3.2 A
OUT pins Output Leakage VEN= VIN(LM3526-L) 0.01 10 µA
Current VEN= 0V (LM3526-H)
IFO= 10 mA, VIN= 5.0V 10 25
FLAG Output Resistance IFO= 10 mA, VIN= 3.3V 11 35 Ω
IFO= 10 mA, VIN= 2.7V 12 40
EN/EN Leakage Current VEN/VEN= 0V or VEN/VEN= V
EN/EN Input Logic High See
EN/EN Input Logic Low See
(2)
(2)
Under-Voltage Lockout 1.8 V
Threshold
Supply Current Switch-Off 0.2 1 µA
−40°C ≤ TJ≤ 85°C 2
Supply Current Switch-On 115 200 µA
Over-temperature Shutdown TJIncreasing, with no shorted output 150 °C
Threshold TJIncreasing, with shorted output (s) 145
TJDecreasing
= 500mA, each switch 100 140
OUT
= 500mA, each switch 110 180
OUT
(1)
IN
−0.5 0.5 µA
2.4 1.9 V
1.7 0.8 V
(1)
135
A
(1) Thermal Shutdown will protect the device from permanent damage.
(2) For LM3526-L, OFF is EN ≥ 2.4V and ON is EN ≤ 0.8V. For LM3526-H, OFF is EN ≤ 0.8V and ON is EN ≥ 2.4V.
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DC Electrical Characteristics (continued)
Limits in standard typeface are for TJ= 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN= 5.0V, VEN= 0V (LM3526-L) or VEN= VIN(LM3526-H).
Symbol Parameter Conditions Min Typ Max Units
I
FH
Error Flag Leakage Current V
= 5V 0.01 1 µA
flag
AC Electrical Characteristics
Limits in standard typeface are for TJ= 25°C, and limits in boldface type apply over the full operating temperature range.
Unless otherwise specified: VIN= 5.0V.
Symbol Parameter Conditions Min Typ Max Units
t
t
t
t
t
r
f
ON
OFF
OC
OUT Rise Time RL= 10Ω 100 µs
OUT Fall Time RL= 10Ω 5 µs
Turn on Delay, EN to OUT RL= 10Ω 150 µs
Turn off Delay, EN to OUT RL= 10Ω 5 µs
Over Current Flag Delay RL= 0 1 ms
TYPICAL APPLICATION CIRCUIT
PIN DESCRIPTIONS
Pin Number Pin Name Pin Function
1, 4 ENA, ENB Enable (Input): Logic-compatible enable inputs.
2, 3 FLAG A Fault Flag (Output): Active-low, open-drain outputs. Indicates overcurrent, UVLO or thermal shutdown.
6 GND Ground
7 IN Supply Input: This pin is the input to the power switch and the supply voltage for the IC.
8, 5 OUT A Switch Output: These pins are the outputs of the high side switch.
(LM3526-L)
ENA, ENB
(LM3526-H)
FLAG B *See Application Information for more information.
OUT B
Figure 3. Typical Application Circuit
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Typical Performance Characteristics
VIN= 5.0V, IL= 500 mA, TA= 25°C unless otherwise specified.
R
ON
vs vs
Temperature Temperature
Figure 4. Figure 5.
Quiescent Current Quiescent Current
vs vs
Input Voltage Temperature
R
ON
Figure 6. Figure 7.
Current Limit OC Threshold
vs vs
Output Voltage Temperature
Figure 8. Figure 9.
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Typical Performance Characteristics (continued)
VIN= 5.0V, IL= 500 mA, TA= 25°C unless otherwise specified.
Fault Flag Delay Fault Flag Delay
vs vs
Temperature Temperature
Figure 10. Figure 11.
Under Voltage Lockout (UVLO) Temperature
Under Voltage Lockout Threshold
vs
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Figure 12. Figure 13.
Over Current/Current Limit Response* Thermal Cycling*
* Output is shorted to Ground through a 100 mΩ resistor
Figure 14. Figure 15.
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Short Circuit Response with
LM3526
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Typical Performance Characteristics (continued)
VIN= 5.0V, IL= 500 mA, TA= 25°C unless otherwise specified.
Turn-ON/OFF Response with Turn-ON/OFF Response with
47Ω/10µF Load 47Ω/150µF Load
Figure 16. Figure 17.
Thermal Shutdown Response
(Port A output shorted*) Thermal Shutdown Response (See Notes)
SNVS054E –FEBRUARY 2000–REVISED MARCH 2013
* Port A is shorted to GND through a 100 mΩ resistor
Figure 18. Figure 19.
Enable into a short
Figure 20.
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FUNCTIONAL DESCRIPTION
The LM3526-H and LM3526-L are high side P-Channel switches with active-high and active-low enable inputs,
respectively. Fault conditions turn-off and inhibit turn-on of the output transistor and activate the open-drain error
flag transistor sinking current to the ground.
INPUT AND OUTPUT
IN (Input) is the power supply connection to the control circuitry and the source of the output MOSFET.
OUT (Output) is the connection to the drain of the output MOSFET. In a typical application circuit, current flows
through the switch from IN to OUT towards the load.
If V
is greater than VINwhen the switch is enabled, current will flow from OUT to IN since the MOSFET is
OUT
bidirectional.
THERMAL SHUTDOWN
The LM3526 is internally protected against excessive power dissipation by a two-stage thermal protection circuit.
If the device temperature rises to approximately 145°C, the thermal shutdown circuitry turns off any switch that is
current limited. Non-overloaded switches continue to function normally. If the die temperature rises above 150°C,
both switches are turned off and both fault flag outputs are activated. Hysteresis ensures that a switch turned off
by thermal shutdown will not be turned on again until the die temperature is reduced to 135°C. Shorted switches
will continue to cycle off and on, due to the rising and falling die temperature, until the short is removed.
UNDERVOLTAGE LOCKOUT
UVLO prevents the MOSFET switch from turning on until input voltage exceeds 1.8V (typical).
If input voltage drops below 1.8V (typical), UVLO shuts off the MOSFET switch and signals the fault flag. UVLO
functions only when device is enabled.
CURRENT LIMIT
The current limit circuit is designed to protect the system supply, the MOSFET switches and the load from
damage caused by excessive currents. The current limit threshold is set internally to allow a minimum of 500 mA
through the MOSFET but limits the output current to approximately 1.0A typical.
FAULT FLAG
The fault flag is an open-drain output capable of sinking 10 mA load current to typically 100 mV above ground.
A parasitic diode exists between the flag pins and VINpin. Pulling the flag pins to voltages higher than VINwill
forward bias this diode and will cause an increase in supply current. This diode will also clamp the voltage on the
flag pins to a diode drop above VIN.
The fault flag is active (pulled low) when any of the following conditions are present: under-voltage, current limit,
or thermal shutdown.
A 1ms (typ.) delay in reporting the fault condition prevents erroneous fault flags and eliminates the need for an
external RC delay network.
Application Information
FILTERING
The USB specification indicates that “no less than 120 µF tantalum capacitors” must be used on the output of
each downstream port. This bulk capacitance provides the short-term transient current needed during a hot plugin. Current surges caused by the input capacitance of the down stream device could generate undesirable EMI
signals. Ferrite beads in series with all power and ground lines are recommended to eliminate or significantly
reduce EMI.
In selecting a ferrite bead, the DC resistance of the wire used must be kept to a minimum to reduce the voltage
drop.
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A 0.01 µF ceramic capacitor is recommended on each port directly between the V
SNVS054E –FEBRUARY 2000–REVISED MARCH 2013
and ground pins to prevent
bus
EMI damage to other components during the hot-detachment.
Adequate capacitance must be connected to the input of the device to limit the input voltage drop during a hot-
plug event to less than 330 mV. For a few tens of µs, the host must supply the in-rush current to the peripheral,
charging its bulk capacitance to V
. This current is initially supplied by the input capacitor. A 33 µF 16V
bus
tantalum capacitor is recommended.
In choosing the capacitors, special attention must be paid to the Effective Series Resistance, ESR, of the
capacitors to minimize the IR drop across the capacitor's ESR.
SOFT START
To eliminate the upstream voltage droop caused by the high in-rush current drawn by the output capacitors, the
maximum in-rush current is internally limited to 1.5A.
TRANSIENT OVER-CURRENT DELAY
High transient current is also generated when the switch is enabled and large values of capacitance at the output
have to be rapidly charged. The in-rush currents created could exceed the short circuit current limit threshold of
the device forcing it into the current limit mode. The capacitor is charged with the maximum available short circuit
current set by the LM3526. The duration of the in-rush current depends on the size of the output capacitance and
load current. Since this is not a valid fault condition, the LM3526 delays the generation of the fault flag for 1 ms.
If the condition persists due to other causes such as a short, a fault flag is generated after a 1 ms delay has
elapsed.
The LM3526's 1 ms delay in issuing the fault flag is adequate for most applications. If longer delays are required,
an RC filter as shown in Figure 21 may be used.
Figure 21.
PCB LAYOUT CONSIDERATIONS
In order to meet the USB requirements for voltage drop, droop and EMI, each component used in this circuit
must be evaluated for its contribution to the circuit performance. The PCB layout rules and guidelines must be
followed.
• Place the switch as close to the USB connector as possible. Keep all V
at least 50-mil, 1 ounce copper for all V
traces. Solder plating the traces will reduce the trace resistance.
bus
traces as short as possible and use
bus
• Avoid vias as much as possible. If vias are used, use multiple vias in parallel and/or make them as large as
possible.
• Place the output capacitor and ferrite beads as close to the USB connector as possible.
• If ferrite beads are used, use wires with minimum resistance and large solder pads to minimize connection
resistance.
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Figure 22. Self-Powered Hub Per-Port Voltage Drop
Typical Applications
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Figure 23. Dual-Port USB Self-Powered Hub
Figure 24. Soft-Start Application (Single port shown)
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Figure 25. In-rush Current-limit Application
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REVISION HISTORY
Changes from Revision D (March 2013) to Revision E Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 11
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device Status
LM3526M-H NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 3526
LM3526M-H/NOPB ACTIVE SOIC D 8 95 Green (RoHS
LM3526M-L NRND SOIC D 8 95 TBD Call TI Call TI -40 to 125 3526
LM3526M-L/NOPB ACTIVE SOIC D 8 95 Green (RoHS
LM3526MX-H/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
LM3526MX-L NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 125 3526
LM3526MX-L/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
Lead/Ball Finish
(6)
CU SN Level-1-260C-UNLIM -40 to 125 3526
CU SN Level-1-260C-UNLIM -40 to 125 3526
CU SN Level-1-260C-UNLIM -40 to 125 3526
CU SN Level-1-260C-UNLIM -40 to 125 3526
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
M-H
M-H
M-L
M-L
M-H
M-L
M-L
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
1-Nov-2013
Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
1-Nov-2013
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type
LM3526MX-H/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM3526MX-L SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM3526MX-L/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)B0(mm)K0(mm)P1(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Mar-2013
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3526MX-H/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM3526MX-L SOIC D 8 2500 367.0 367.0 35.0
LM3526MX-L/NOPB SOIC D 8 2500 367.0 367.0 35.0
Pack Materials-Page 2
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