TEXAS INSTRUMENTS DRV593 Technical data

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SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002

±3−A HIGH−EFFICIENCY PWM POWER DRIVER

DRV593 DRV594

FEATURES

D Operation Reduces Output Filter Size and

Cost by 50% Compared to DRV591

D ±3-A Maximum Output Current D Low Supply Voltage Operation: 2.8 V to 5.5 V D High Efficiency Generates Less Heat D Overcurrent and Thermal Protection D Fault Indicators for Overcurrent, Thermal and

Undervoltage Conditions

D Two Selectable Switching Frequencies D Internal or External Clock Sync D PWM Scheme Optimized for EMI D 9×9 mm PowerPAD Quad Flatpack Package

APPLICATIONS

D Thermoelectric Cooler (TEC) Driver D Laser Diode Biasing

DESCRIPTION

The DRV593 and DRV594 are high-efficiency, high-current power amplifiers ideal for driving a wide variety of thermoelectric cooler elements in systems powered from 2.8 V to 5.5 V. The operation of the device requires only one inductor and capacitor for the output filter, saving significant printed-circuit board area. Pulse-width modulation (PWM) operation and low output stage on-resistance significantly decrease power dissipation in the amplifier.

The DRV593 and DRV594 are internally protected against thermal and current overloads. Logic-level fault indicators signal when the junction temperature has reached approximately 115°C to allow for system-level shutdown before the amplifier’s internal thermal shutdown circuitry activates. The fault indicators also signal when an overcurrent event has occurred. If the overcurrent circuitry is tripped, the devices automatically reset (see application information section for more details).

The PWM switching frequency may be set to 500 kHz or 100 kHz depending on system requirements. To eliminate external components, the gain is fixed at 2.3 V/V for the DRV593. For the DRV594, the gain is fixed at 14.5 V/V.

1 µF

120 kΩ

DC Control

Voltage

1 kΩ

Shutdown Control

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

220 pF

1 µF

FAULT1 FAULT0

AVDD AGND (Connect to PowerPAD) ROSC COSC AREF IN+ IN-INSHUTDOWN

10 µF

FREQ

FAULT1

PVDD

INT/EXT

DRV593 DRV594

FAULT0

PVDD

1 µF

PVDD

1 µF

PWM

PVDD

H/C

PWM

H/C

PWM

PGND PGND PGND PGND PGND PGND

H/C

PWM

H/C

10 µH

To TEC or Laser Diode Anode

10 µF

To TEC or Laser Diode Cathode

DRV593 DRV594

SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe

proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to

complete device failure. Precision integrated circuits may be more susceptible t o damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

-40°C to 85°C

(1)

This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g.,

PowerPAD QUAD FLATPACK

(VFP)

DRV593VFP DRV594VFP

(1) (1)

DRV593VFPR or DRV594VFPR).

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted

Supply voltage, AVDD, PVDD -0.3 V to 5.5 V Input voltage, V

Output current, IO (FAULT0, FAULT1) 1 mA Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, T Operating junction temperature range, T Storage temperature range, T

(1)

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and

stg

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .

(1)

DRV593, DRV594

-0.3 V to VDD + 0.3 V

-40°C to 85°C

-40°C to 150°C

-65°C to 165°C

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

Supply voltage, AVDD High-level input voltage, V Low-level input voltage, V Operating free-air temperature, T

PVDD

2.8

5.5

FREQ, INT/EXT, SHUTDOWN, COSC FREQ, INT/EXT, SHUTDOWN, COSC

-40

0.8 85

V V V

°C

PACKAGE DISSIPATION RATINGS

PACKAGE

(°C/W)

(1)

VFP 29.4 1.2 4.1 W

(1)

This data was taken using 2 oz trace and copper pad that is soldered directly to a JEDEC standard 4-layer 3 in× 3 in PCB.

POWER RATING

= 25°C

DRV593

VDD = 5 V, IO = 4 A

VDD = 3.3 V, IO = 4 A

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SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range unless otherwise noted

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

|VOO| Output offset voltage (measured differentially) VI = VDD/2, IO = 0 A 14 100 mV |IIH| High-level input current VDD = 5.5V , VI = V |IIL| Low-level input current VDD = 5.5V , VI = 0 V 1 µA V

ICM

Integrated output noise voltage f = <1 Hz to 10 kHz 40 µV

Common-mode voltage range

Closed-loop voltage gain

VDD = 5 V 1.2 3.8 VDD = 3.3 V 1.2 2.1 DRV593 2.1 2.3 2.6 V/V DRV594 13.7 14.5 15.3 V/V

Full power bandwidth 60 kHz

Voltage output (measured dif ferentially)

IO = ±1 A, r IO = ±3 A, r

VDD = 5 V , IO = 4 A,

= 65 mΩ, VDD = 5 V 4.87

ds(on)

= 65 mΩ, VDD = 5 V 4.61

ds(on)

TA = 25°C

DS(on)

Drain-source on-state resistance

VDD = 3.3 V , IO = 4 A,

TA = 25°C

Maximum continuous current output 3 A

q(SD)

Status flag output pins (FAULT0, FAULT1) Fault active (open drain output)

External clock frequency range

Quiescent current Quiescent current in shutdown mode VDD = 5 V, SHUTDOWN = 0.8 V 0 40 80 µA

Sinking 200 µA 0.1 V For 500 kHz operation 225 250 300

For 100 kHz operation 45 50 55 VDD = 5 V , No load or filter 4 12 VDD = 3.3 V , No load or filter 2.5 8

Output resistance in shutdown SHUTDOWN = 0.8 V 1 2 kΩ Power-on threshold 1.7 2.8 V Power-off threshold 1.6 2.6 V Thermal trip point FAULT0 active 115 °C Thermal shutdown Power off 150 °C

Input impedance (IN+, IN-) 100 kΩ

High side 25 60 95 Low side 25 65 95 High side 25 80 140 Low side 25 90 140

DRV594

1 µA

mΩ

kHz

DRV593 DRV594

SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002

PIN ASSIGNMENTS

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VFP PACKAGE

(TOP VIEW)

AVDD AGND ROSC COSC

AREF

IN+ IN-

SHUTDOWN

PVDD

FREQ

INT/EXT

PVDD

31 30 29 28 27

32 26

1 2 3 4 5 6 7 8

PowerPAD

910

11 12 13 14 15

PVDD

FAULT1

FAULT0

PVDD

PWM

H/C

PWM

H/C

24 23 22 21 20 19 18 17

PWM PGND PGND PGND PGND PGND PGND H/C

Terminal Functions

TERMINAL

NAME NO. AGND 2 Analog ground

AREF 5 O Connect 1 µF capacitor to ground for AREF voltage filtering AVDD 1 I Analog power supply COSC 4 I Connect capacitor to ground to set oscillation frequency (220 pF for 500 kHz, 1 nF for 100 kHz) when the internal

FAULT0 10 O Fault flag 0, low when active open drain output (see application information) FAULT1 9 O Fault flag 1, low when active open drain output (see application information)

FREQ 32 I IN- 7 I Negative differential input IN+ 6 I Positive differential input INT/EXT 31 I Selects the internal oscillator when a TTL logic high is applied to this terminal; selects the use of an external oscil-

H/C 14, 15,

16, 17

PWM 24, 25,

26, 27

PGND 18, 19,

20, 21,

22, 23

PVDD 11, 12,

13, 28,

29, 30

ROSC 3 I Connect 120-kΩ resistor to AGND to set oscillation frequency (either 500 kHz or 100 kHz). Not needed if an

SHUTDOWN 8 I Places the amplifier in shutdown mode when a TTL logic low is applied to this terminal; places the amplifier

I/O DESCRIPTION

oscillator is selected; connect clock signal when an external oscillator is used

Selects 500 kHz switching frequency when a TTL logic low is applied to this terminal; selects 100 kHz switching frequency when a TTL logic high is applied

lator when a TTL logic low is applied to this terminal

O Direction control output for heat and cool modes (4 pins)

O PWM output for voltage magnitude (4 pins)

High-current ground (6 pins)

I High-current power supply (6 pins)

external clock is used.

in normal operation when a TTL logic high is applied

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FUNCTIONAL BLOCK DIAGRAM

DRV593 DRV594

SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002

IN-

IN+

SHUTDOWN

INT/EXT

FREQ

COSC ROSC

AREF

TTL

Input

Buffer

AVDD

AGND

2.3 ×R (DRV593)

14.5 x R (DRV594)

+ _

2.3 ×R (DRV593)

14.5 x R (DRV594)

Biases

References

and

+ _

Ramp

Generator

+ _

Thermal VDDok

Gate

Drive

Gate

Drive

Start-Up

Protection

Logic

PVDD

H/C

PGND

PVDD

PWM

PGND

Detect

FAULT0 FAULT1

DRV593

)

DS(on)

Drain source on state resistance

DRV594

SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002

TYPICAL CHARACTERISTICS

TABLE OF GRAPHS

Efficiency vs Load resistance 2, 3

vs Supply voltage 4

DS(on

PSRR Power supply rejection ratio vs Frequency 8, 9

Drain-source on-state resistance

Supply current vs Supply voltage 7

Closed loop response 12, 13

Maximum output current Input offset voltage Common-mode input voltage 16, 17

TEST SETUP FOR GRAPHS

The LC output filter used in Figures 2, 3, 8, and 9 is shown below.

PWM

vs Free-air temperature 5 vs Free-air temperature 6

vs Output voltage 14 vs Ambient temperature 15

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FIGURE

H/C

L1 = 10 µH (part number: CDRH104R, manufacturer: Sumida) C1 = 10 µF (part number: ECJ-4YB1C106K, manufacturer: Panasonic)

Figure 1. LC Output Filter

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DRV593 DRV594

SLOS401A - SEPTEMBER 2002 REVISED - OCTOBER 2002

TYPICAL CHARACTERISTICS

EFFICIENCY

LOAD RESISTANCE

100

90 80

70 60

Efficiency - %

20 10

PO = 0.5 W

12345678910

PO = 1 W

RL - Load Resistance - Ω

PO = 2 W

VDD = 5 V fS = 500 kHz

Figure 2

DRAIN-SOURCE ON-STATE RESISTANCE

SUPPLY VOLTAGE

300

IO = 1 A TA = 25°C

250

EFFICIENCY

LOAD RESISTANCE

100

90 80

70 60

Efficiency - %

20 10

PO = 0.25 W

12345678910

RL - Load Resistance - Ω

PO = 0.5 W

PO = 1 W

VDD = 3.3 V fS = 500 kHz

Figure 3

DRAIN-SOURCE ON-STATE RESISTANCE

FREE-AIR TEMPERATURE

300

VDD = 5 V IO = 1 A VFP Package

250

200

150

100

- Drain-Source On-State Resistance - mΩ

DS(on)

2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5

Total

Low Side

High Side

VDD - Supply Voltage - V

Figure 4

200

Total

150

100

- Drain-Source On-State Resistance - mΩ

DS(on)

-40 -15 10 35 60 85 TA - Free-Air Temperature - °C

Figure 5

Low Side

High Side

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TEXAS INSTRUMENTS DRV593 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual