outputs (P-channel open- drain with pull-down
resistor outputs)
■ Key scanning (up to 12mm x 2mm matrix)
■ Led ports (4 channels, 20mA, max)
■ Serial interface (STB, CLK, D
communication protocol
■ Dimming circuit (adjustable up to 8 steps)
■ Supports auto-increment of display digit, which
lightens the load on the MCU
■ Programmable 8 hot keys for the IR remote
control command
■ Programmable 8 hot keys for key scan
command
■ Low power consumption in standby mode
■ 2 general purpose input ports (SW1, SW2)
■ Available in PQFP-52 package
) to –30V (VSS)
DD
- 33.3V max)
, and D
IN
OUT
)
STFPC311
Front panel controller/driver
with standby power management
PQFP-52
Description
The STFPC311 is a complete, low-cost,
integrated solution for controlling and driving a
front panel Vacuum Fluorescent Display (VFD). It
is ideal for decreasing power consumption in
standby mode by reducing the application standby
current to a minimum. It also contains a built-in
remote control decoder module.
While in the standby mode of operation, a valid
key press or signal from infrared decoder will start
a proper power-up see Figure 6 on page 12.
The STFPC311 integrates a VFD controller with a
driver that is run on a 1/8 to 1/16-duty factor. It
consists of 12 segments output lines, 8 grid output
lines, 8 shared segments/grid output drive lines, a
display memory, a control circuit, and a key scan
circuit. Serial data is input to the STFPC311
through the SPI Interface of a microcontroller
(STB, D
Additionally, this IC can support 2 general
purpose input switches (SW1 and SW2).
The STFPC311 receives serial data from the microcontroller through the SPI interface, latches
the data, and then masks the inputs from the MCU. This data consists of commands followed
by data. There are 4 types of commands:
●configuration,
●data,
●address, and
●display.
The STFPC311 integrates the supply standby power management functionality, remote control
decoder, and a 28-bit VFD driver. Microcontrollers usually run the first two tasks.
This device reduces the stand-by power consumption of the whole Front Panel application as
well as the hardware by integrating the infrared (IR) remote control decoder.
A dedicated supply voltage powers the STFPC311 directly from the main supply board. When
power is plugged in, control of the power supply management is done using the following pins:
1. STBY,
2. IR_DATA_IN, and
3. READY.
1.1 Block diagram
Figure 1.Block diagram
IR_DATA_IN
IR_DATA_IN
IR_ DATA_ IN
READY/STBY_n
READY/STBY_n
READY/STBY_n
D
D
D
IN
IN
IN
D
D
D
OUT
OUT
OUT
CLK
CLK
CLK
STB
STB
STB
V
V
V
DD
DD
DD
R
R
R
OSC
OSC
OSC
SW1
SW1
SW1
SW2
SW2
SW2
KEY1
KEY1
KEY1
KEY2
KEY2
KEY2
2
2
2
Serial
Serial
Seri al
OSC
OSC
OSC
2-bit
2-bit
2-bit
Latch
Latch
Lat ch
SPI
SPI
SPI
I/F
I/F
I/F
Remote Control
Remote Control
Remote Control
Decoder & Stand
Decoder & Stand
Decoder & Stand
By Function
By Function
By Function
Command Decoder
Command Decoder
Command Decod er
Display Memory
Display Memory
Display Memory
(20 x 16)
(20 x 16)
(20 x 16)
Timing Generator
Timing Generator
Timing Generator
Key Scanand
Key Scanand
Key Scan and
Dimming Circuit
Dimming Circuit
Dimmi ng Circuit
Key DataMemory
Key DataMemory
Key Dat a Memor y
(2 x12)
(2 x12)
(2 x 12)
2
2
2
Latch
Latch
Lat ch
4-bit
4-bit
4-bit
LED1
LED1
LED1
LED2
LED2
LED2
LED3
LED3
LED3
LED4
LED4
LED4
STBY
STBY
STBY
MUTE
MUTE
MUTE
20-bit
20-bit
20-bit
Output
Output
Out put
Latch
Latch
Lat ch
16-bit
16-bit
16-bit
Shift
Shift
Shift
Register
Register
Regis ter
V
V
V
DD
DD
DD
(+3.3V)
(+3.3V)
(+3.3V)
GND
GND
GND
(0V)
(0V)
(0V)
Watchdog
Watchdog
Watchdog
Timer
Timer
Timer
2012
2012
2012
8
8
8
Data
Data
Dat a
Selector
Selector
Selec tor
8
8
8
16
16
16
V
V
V
SS
SS
SS
(-30V)
(-30V)
(-30V)
SEG1/KS1
SEG1/KS1
SEG1/KS1
Drivers
Drivers
Dri vers
Segment
Segment
Segment
8
8
8
Multiplexed
Multiplexed
Multiplexed
Grid
Grid
Gri d
8
8
8
Drivers
Drivers
Dri vers
Drivers
Drivers
Dri vers
SEG12/KS2
SEG12/KS2
SEG12/KS2
SEG13/GRID16
SEG13/GRID16
SEG20/GRID9
SEG20/GRID9
SEG20/GRID9
GRID8
GRID8
GRID8
GRID1
GRID1
GRID1
4/39
STFPC3112 Pin connection
2 Pin connection
Figure 2.Connection diagram (top view PQFP-52)
STFPC311
Note:For a description of the behavior of each pin, refer to the Table 1: Pin description on page 6.
5/39
2 Pin connectionSTFPC311
2.1 Pin description
Table 1.Pin description
Pin NºSymbolTypeName and function
1OSCIThis is the oscillator input pin. Connect this pin to an external resistor.
2, 3SW1, SW2IGeneral purpose switch input ports.
4MUTEO
5STBYO
7GNDPOWERConnect this pin to system GND.
High level indicates mute status for audio. Low level indicates normal
working.Note 1
there is a typo. Pin5 and name is STBY. Standby output to put the MCU
in low power mode.
It is a command to the main power board. High level indicates stand-by
status. Low level indicates normal working. Note 1
8, 9KEY1, KEY2I
Input data to these pins from external keyboard are latched at end of
the display cycle (maximum keyboard size is 12 x 2).
High level on this pin means that main board chip has been working
10READYI
normally.Note 1 This pin should never float. It is recommended have a
pull-down resistor on this input.
1IR_DATA_INIRemote control input. Feeds the IR data from photodiode to this pin.
14 to 25
12, 26
27 to 34
SEG1/KS1 to
SEG12/KS12
V
SS
SEG13/GRID16
to SEG20/GRID9
OSegment output pins (dual function as key source).
V
POWER
outputs high voltage pull-down level. VDD--33.3V max.
FD
OThese pins are selectable for segment or grid driving.
35 to 37GRID8 to GRID6OGrid output pins.
6, 13,38
V
DD
POWER 3.3V ± 0.3V Core main supply voltage.
39NCONot used. Left unconnected.
40 to 44GRID5 to GRID1OGrid output pins.
Initializes the serial interface at the rising or falling edge to make the
STFPC31 wait for reception of command. The data input after the falling
45STBI
edge of STB is processed as a command. While the command data is
processed, current processing is stopped, and the serial interface is
initialized. While STB is high, CLK is ignored and any instruction from
the MCU is neglected.
46CLKI
Reads serial data at the rising edge, and outputs data at the falling
edge.
47
48
49-52
D
IN
D
OUT
LED1, LED2,
LED3, LED4
O
OCMOS outputs (20mA, max).
Inputs serial data at the rising edge of the shift clock, starting from the
I
lower bit.
Outputs serial data at the faling edge of the shift clock, starting from the
lower bit. This is the N-channel opendrain output pin.
Note: 1 For a detailed behavioral description of these pins, refer to the “STFPC311 Timing Power
Stand-by Sequencer Flow-Chart”. See Table 6 on page 12
6/39
STFPC3113 Initialization
3 Initialization
After the power is plugged in, the device will supply power to all of the components (including
the host processor) by setting STBY to logic low in order to allow the host processor to program
the STFPC311. Once the STBY is set to low, the watchdog timer starts to count up to 10s (10s
is the default value of the watchdog timer upon power-up). When the READY is asserted within
this time, it indicates that the system has booted up well. If the READY pin is not asserted (logic
high) within this time (10s), the STFPC311 will put the system into standby mode again by
setting STBY to logic high.
If READY is detected as logic high, the watchdog timer will be turned OFF. The main processor
should program the remote control hot key and initialize the other parameters of the STFPC311
in preparation for normal operation before the system goes into standby mode. After all of the
STFPC311 configuration is finished, the host processor may set the READY to low so that the
STFPC311 enters standby mode. The STFPC311 then sets the MUTE pin to logic high to mute
the audio output as well as the STBY pin to logic high. As a consequence of this action, the
main supply voltage is turned off.
3.1 Normal mode of operation
After the power is plugged in, the device will supply power to all of the components (including
the host processor) by setting STBY to logic low in order to allow the host processor to program
the STFPC311. Once the STBY is set to low, the watchdog timer starts to count up to 10s (10s
is the default value of the watchdog timer upon power-up). When the READY is asserted within
this time, it indicates that the system has booted up well. If the READY pin is not asserted (logic
high) within this time (10s), the STFPC311 will put the system into standby mode again by
setting STBY to logic high.
If READY is detected as logic high, the watchdog timer will be turned OFF. The main processor
should program the remote control hot key and initialize the other parameters of the STFPC311
in preparation for normal operation before the system goes into standby mode. After all of the
STFPC311 configuration is finished, the host processor may set the READY to low so that the
STFPC311 enters standby mode. The STFPC311 then sets the MUTE pin to logic high to mute
the audio output as well as the STBY pin to logic high. As a consequence of this action, the
main supply voltage is turned off.
3.2 Receive operation
In receive condition, the STFPC311 waits for a valid command from the MCU. The receive
circuit of STFPC311 receives 8 bit serial data, latches the data and then masks the inputs from
the MCU. Refer to Figure 28 on page 32 for receive timing.
3.3 Transmit operation
In transmit condition, the STFPC311 sends the 8-bit serial data (LSB transmitted first)
whenever a key is pressed or IR data is received. STFPC311 transmits data on the falling edge
of CLK. Refer to Figure 29 on page 32 for transmit timing.
7/39
3 InitializationSTFPC311
3.4 Standby or power-down mode
Once the STFPC311 detects the status change of the READY to a logic low or after the preset
waiting time (1s to 15s) has elapsed, the STFPC311 sets the STBY pin to a logic high to turn off
the power. The MUTE signal is set to high before the power is turned off. The STFPC311
always senses the level on the READY pin during normal operation.
3.5 IR Decoding
Encoded IR data from photodiode is supplied to the IR_DATA_IN input pin. The data is
decoded by the internal remote control decoder module of STFPC311. In standby mode, the
remote control decoder recognizes a set of predefined commands (such as STANDBY, PLAY,
and OPEN/CLOSE), and takes appropriate action to manage the power supply.
These predefined commands are known as "hot keys" and are programmable. The decoded IR
commands are passed on to the main processor through the SPI interface by sending 3 bytes
of data on the D
OUT
pin.
3.6 Watchdog timer
The watchdog timer is used to detect an out-of-control microprocessor. The watch dog timer is
implemented in the STFPC311 to detect the abnormal processor behavior or processor-hung
condition. The default state of the watchdog timer is 10s when the device powers-up. It is
initialized by writing to the watchdog register and can be programmed to up to 15s (4-bit
watchdog timer, present in the configuration mode setting command).
If the processor does not reset the timer within the specified period, the STFPC311 will put the
entire system into standby mode to reset the appliance that has stopped abnormally. The action
to take when the watchdog timer has reached its count is to set the Watchdog Action register.
The watchdog timer can be reset by the host processor by sending a command to reset the
watchdog timer. The time-out period then starts over again. If the processor needs to be reset
as a result of a hung condition (signalled using the STBY output of the STFPC311), the
watchdog timer uses the amount of the time-out programmed into the Watchdog Register by
the user to generate an interrupt.
Note:The accuracy of the timer is within ±10% the selected resolution. This depends on the value of
the external bias resistor, as it determines the internal clock frequency.
The watchdog function is automatically set to 10s upon power-up and the Watchdog Interrupt is
cleared. This boot-up watchdog timer is used to make sure that if the host processor hangs
during the first boot-up, the STFPC311 will put the system to standby mode. During the first
boot-up, the watchdog timer is disabled after the first READY signal is received.
8/39
STFPC3113 Initialization
3.6.1 Watchdog timer operation during power-up
Figure 3.Power-up condition
Note:Watchdog timer is turned off by default upon READY assertion.
If Watchdog is to be kept on during READY high condition, the WDG registers must be set
accordingly by proper commands through SPI bus.
In this power-up condition, the watchdog timer is triggered by internal POR pulse.
During power-up, the watchdog timer value is 10s.
9/39
3 InitializationSTFPC311
3.6.2 Watchdog timer operation during power-down
Figure 4.Power-down condition
Note:The watchdog timer can be kept on during normal conditions when READY is high (depending
on the user’s settings).
In this condition, the watchdog timer can be disabled or enabled. If the watchdog timer is
enabled, the timer needs to be cleared before the programmed count of the timer is reached. If
the programmed count is reached, the STBY will be asserted.
Caution: It is advisable not to enable the watchdog timer during normal operation.
10/39
STFPC3113 Initialization
3.6.3 Watchdog timer operation during standby
●When a hot-key signal is detected either from the front panel or remote control during
standby, the STBY de-asserts.
●The de-assertion of the STBY triggers the watchdog timer.
●The timer value is the programmed value that is set by the user (1s-15s). If the user did not
change the value before entering standby, then it remains 10s.
●Also note: that The watchdog timer is off when the STFPC311 is in the standby mode to
save power.
Figure 5.Standby condition
3a) Standby Condition (Normal behavior)
3a) Standby Condition (Normal behavior)
Hot key com mand from IR
Hot key com mand from IR
or Key pad for wake up
or Key pad for wake up
STBY
STBY
W DG timer triggers
W DG timer triggers
READY
READY
MUTE
MUTE
3b) Standby Condition (Abnormal behavior, processor is not responding)
3b) Standby Condition (Abnormal behavior, processor is not responding)
Hot key com mand from IR
Hot key com mand from IR
or Key pad for wake up
or Key pad for wake up
STBY
STBY
READY
READY
MUTE
MUTE
READY asserts within programm ed timer value (1 s-15s)
READY asserts within programm ed timer value (1 s-15s)
Signals STBY after
WDG timer
WDG timer
triggers
triggers
Signals STBY after
W DG count is over
W DG count is over
REA DY continues to remain low
REA DY continues to remain low
The watchdog timer is triggered by a de-assertion of the STBY signal or by the internal
Power-on Reset signal. It is not affected by the STB pin.
11/39
3 InitializationSTFPC311
3.7 Flow charts
Figure 6.Timing power standby sequencer flow chart
* Programmable from 1 to 15s.
† FPK = Front Panel Keys
12/39
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