Page 1
Low voltage 0.5 Ω dual SPDT switch
Features
■ Ultra low power dissipation:
I
= 0.2 μA (max.) at TA= 85 °C
CC
■ Low ON resistance:
–R
–R
–R
■ Wide operating voltage range:
V
■ 5 V tolerant and 1.8 V compatible threshold on
digital control input at V
■ Latch-up performance exceeds 300 mA
(JESD 17)
■ ESD performance:
HBM > 2 kV (MIL STD 883 method 3015)
Description
The STG5223 is a high-speed CMOS dual analog
SPDT (single pole dual throw) switch or dual 2:1
multiplexer/demultiplexer bus switch fabricated in
silicon gate C
operate from 1.65 to 4.3 V, making this device
ideal for portable applications.
=0.50 Ω (max. TA=25°C) at
ON
V
=4.3V
CC
=0.55Ω (max. TA=25°C) at
ON
V
=3.6V
CC
=0.55Ω (max. TA=25°C) at
ON
V
=3.0V
CC
(opr) = 1.65 V to 4.3 V single supply
CC
= 1.65 to 4.3 V
CC
2
MOS technology. It is designed to
STG5223
with break-before-make
QFN10
(1.8x1.4mm)
exists between the two ports) when nIN is held
low. The switches nS2 are ON (connected to
common ports Dn) when the nIN input is held low
and OFF (high impedance state exists between
the two ports) when IN is held high. Additional key
features are fast switching speed, break-beforemake delay time and ultra low power
consumption. All inputs and outputs are equipped
with protection circuits against static discharge,
giving them ESD immunity and transient excess
voltage immunity.
It offers very low ON resistance (<0.5 Ω) at
V
= 3.0 V. The nIN inputs are provided to
CC
control the switches. The switches nS1 are ON
(connected to common ports Dn) when the nIN
input is held high and OFF (high impedance state
Table 1. Device summary
Order code Package Packaging
STG5223QTR QFN10 (1.8 x 1.4 mm) Tape and reel
May 2009 Doc ID 14312 Rev 3 1/19
\
www.st.com
19
Page 2
Contents STG5223
Contents
1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Input equivalent circuit and truth table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19 Doc ID 14312 Rev 3
Page 3
STG5223 Pin settings
1 Pin settings
1.1 Pin connection
Figure 1. Pin connection (top through view)
GND
2S2
10
SEL2
10
8
1
6
9
9
7
1S2
5
81
8
1.2 Pin description
Table 2. Pin description
Pin number Symbol Name and function
1V
2 1S1 Independent channel
3 D1 Common channel
4 SEL1 Control
5 1S2 Independent channel
2S1
CC
D2
9
2
2
10
3
3
1
4
4
VCC
Positive supply voltage
SEL1
4
7
7
D1
3
6
6
2
5
5
1S1
6 GND Ground (0V)
7 2S2 Independent channel
8 SEL2 Control
9 D2 Common channel
10 2S1 Independent channel
Warning: Exposed pad must be soldered to a floating plane. Do NOT
connect to power or ground.
Doc ID 14312 Rev 3 3/19
Page 4
Input equivalent circuit and truth table STG5223
2 Input equivalent circuit and truth table
Figure 2. Input equivalent circuit
Table 3. Truth table
IN Switch S1 Switch S2
HON
L
OFF
(1)
OFF
ON
(1)
1. High impedance
4/19 Doc ID 14312 Rev 3
Page 5
STG5223 Maximum rating
3 Maximum rating
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
Supply voltage -0.5 to 5.5 V
CC
V
DC input voltage -0.5 to VCC + 0.5 V
I
DC control input voltage -0.5 to 5.5 V
IC
DC output voltage -0.5 to VCC + 0.5 V
O
DC input diode current on control pin (V
IKC
I
DC input diode current (VIN < 0 V) ± 50 mA
IK
DC output diode current ± 20 mA
OK
DC output current ± 300 mA
I
O
DC output current peak (pulse at 1 ms, 10% duty cycle) ± 500 mA
OP
or
DC VCC or ground current ± 100 mA
D
Power dissipation at TA=70 °C
(1)
< 0 V) − 50 mA
SEL
1120 mW
I
CC
I
V
V
V
I
I
I
GND
P
T
Storage temperature -65 to 150 °C
STG
Lead temperature (10 sec) 300 °C
T
L
1. Derate above 70 °C by 18.5 mW/ °C
Doc ID 14312 Rev 3 5/19
Page 6
Maximum rating STG5223
3.1 Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter Value Unit
V
V
V
T
dt/dv Input rise and fall time control input
Supply voltage 1.65 to 4.3 V
CC
Input voltage 0 to V
V
I
Control input voltage 0 to 4.3 V
IC
Output voltage 0 to V
O
Operating temperature -40 to 85 °C
op
V
= 1.65 V to
CC
2.7 V
V
CC
4.3 V
= 3.0V to
0 to 20
0 to 10
CC
CC
V
V
ns/V
6/19 Doc ID 14312 Rev 3
Page 7
STG5223 Electrical characteristics
4 Electrical characteristics
Table 6. DC specifications
Symbol Parameter
1.65 −1.95
V
High level input
IH
voltage
1.65 −1.95 −−0.25 − 0.25
IL
ON
Low level input
voltage
Switch ON
resistance
V
R
Val ue
V
CC
(V)
Test condition
T
A
=25°C
-40 to 85 °C
Min Typ Max Min Max
0.65
V
CC
−−
0.65
V
CC
−
2.3 −2.5 1.2 −−1.2 −
2.7 −3.0 1.3 −−1.3 −
3.0 −3.6 1.4 −−1.4 −
4.3 1.5 −−1.5 −
2.3 −2.5 −−0.25 − 0.25
2.7 −3.0 −−0.25 − 0.25
3.0 −3.6 −−0.30 − 0.30
4.3 −−0.40 − 0.40
4.3
− 0.45 0.50 − 0.55
3.6 − 0.50 0.55 − 0.65
= 0 V to V
V
3.0 − 0.50 0.55 − 0.65
S
IS= 100 mA
CC
2.3 − 0.60 0.70 − 0.80
Unit
V
V
Ω
1.8 − 0.90 1.0 − 1.1
ΔR
ON resistance
match between
ON
channels
(1)
2.3
4.3
V
= 0 V.to V
S
IS= 100 mA
CC
− 0.1 −−−Ω
0.15 0.20 − 0.20
3.6 0.15 0.20 − 0.20
R
FLAT
ON resistance
flatness
(2)
3.0 0.15 0.20 − 0.20
= 0 V to V
V
S
IS= 100 mA
CC
−
Ω
2.3 0.20 0.25 − 0.25
1.8 0.35 0.45 − 0.45
OFF state leakage
I
OFF
current (nSn),
4.3 VS= 0.3 or 4 V −−±20 −±100 nA
(Dn)
I
I
Input leakage
IN
current
Quiescent supply
CC
current
0 −4.3 V
1.65 −4.3 V
= 0 to 4.3 V −−±0.05 −± 1 μA
SEL
SEL=VCC
or GND −−±0.05 −±0.2 μA
Doc ID 14312 Rev 3 7/19
Page 8
Electrical characteristics STG5223
Table 6. DC specifications (continued)
Val ue
V
Symbol Parameter
CC
(V)
Quiescent supply
I
CCLV
current low
4.3
voltage driving
1. ΔRON=R
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Table 7. AC electrical characteristics (CL= 35 pF, RL= 50 Ω, tr= tf≤ 5 ns)
ON(max)-RON(min)
Symbol Parameter
.
V
CC
(V)
Test condition
V
1IN, V2IN
1IN, V2IN
V
1IN, V2IN
=1.65V −±37 ±50 −±100
= 1.80 V −±33 ±40 −±50
= 2.60 V −±12 ±20 −±30
Test
condition
T
=25°C
A
-40 to 85 °C
Min Typ Max Min Max
Val ue
= 25 °C
T
A
-40 to 85 °C
Min Typ Max Min Max
Unit
μAV
Unit
t
PLH, tPHL
t
ON
t
OFF
t
D
Propagation delay
Turn-ON time
Turn-OFF time
Break-before- make
time delay
1.65 −1.95 − 0.30 −
2.3 −2.7
3.0 −3.3
3.6 −4.3
1.65 −1.95
2.3 −2.7
3.0 −3.3
3.6 −4.3
1.65 −1.95
2.3 −2.7
3.0 −3.3
3.6 −4.3
1.65 −1.95
2.3 −2.7
=0.8V − 120 −− −
V
S
VS=1.5V
=0.8V − 45 −− −
V
S
=1.5V
V
S
C
=35pF
L
− 0.25 −−−
− 0.20 −−−
− 0.20 −−−
− 65 85 − 90
− 42 55 − 65
− 40 55 − 65
− 18 30 − 40
− 16 30 − 40
− 15 30 − 40
217 −−−
210 −−−
RL=50Ω
3.0 −3.3
3.6 −4.3
V
S
=1.5V
28 −− −
27 −− −
−
−
ns
ns
ns
ns
1.65 −−1.95
= 100pF
2.3 −−2.7
Q Charge injection
3.0 −−3.3
C
L
RL=1MΩ
V
GEN
R
GEN
3.6 −−4.3
8/19 Doc ID 14312 Rev 3
=0V
=0Ω
− 43 −− −
− 51 −− −
pC
− 51 −− −
− 49 −− −
Page 9
STG5223 Electrical characteristics
Table 8. Analog switch characteristics (CL= 5 pF, RL=50Ω, TA=25°C)
Val ue
V
Symbol Parameter
OIRR
Off isolation
Xtalk Crosstalk
THD
Total harmonic
distortion
(1)
CC
(V)
1.65 −−4.3
1.65 −−4.3
2.3 −−4.3
Test condition
V
=1V
S
RMS
f=100kHz
V
=1V
S
RMS
f=100kHz
=600Ω
R
L
V
=2V
SEL
PP
f = 20 Hz to
20 kHz
TA=25°C
-40 to 85 °C
Min Typ Max Min Max
− -66 −− −dB
− -72 −−−dB
− 0.02 −−−%
Unit
BW -3dB bandwidth
1.65 −−4.3
=50Ω−55 −−−MHz
R
L
Control pin
C
input
IN
− 7 −−−
capacitance
Sn port
ON
capacitance
when switch is
3.3 f = 1 MHz − 114 −−−
C
enabled
Sn port
OFF
capacitance
when switch is
3.3 f = 1 MHz − 40 −
C
disabled
D port
capacitance
C
D
when the
3.3 f = 1 MHz − 114 −−−
switch is
enabled
1. Off isolation = 20 Log10 (VD/VS), VD= output. VS= input at off switch
pF
−
−
Doc ID 14312 Rev 3 9/19
Page 10
Test circuit STG5223
5 Test circuit
Figure 3. ON resistance
I
DS
V
V
CC
Figure 4. OFF leakage
I
S(OFF)
A
V
SS
S1
VS
S2
IN
GND
GND
V
CC
D
CS14071
I
D(OFF)
D
A
V
D
S2
V
CC
IN
10/19 Doc ID 14312 Rev 3
GND
CS14081
Page 11
STG5223 Test circuit
Figure 5. OFF isolation
V
CC
GND
V
S
Figure 6. Bandwidth
S1
V
OUT
50 Ω
S2
IN
GND
CS00381
V
CC
S1
D
V
OUT
S2
IN
V
CC
GND
CS00371
Doc ID 14312 Rev 3 11/19
Page 12
Test circuit STG5223
Figure 7. Channel-to-channel crosstalk
Figure 8. Test circuit
1. CL= 5/35 pF or equivalent (includes jig and probe capacitance)
=50Ω or equivalent
2. R
L
3. R
T=ZOUT
of pulse generator (typically 50 Ω)
CS14091
12/19 Doc ID 14312 Rev 3
Page 13
STG5223 Test circuit
S1
S2
V
CC
D
R
L
C
L
V
OUT
GND
V
IN
IN
Figure 9. Break-before-make time delay
Figure 10. Charge injection (V
GEN
=0, R
=0 Ω, RL=1MΩ, CL= 100 pF)
GEN
Figure 11. Turn on, turn off delay time
Doc ID 14312 Rev 3 13/19
Page 14
Package mechanical data STG5223
6 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
Figure 12. Package outine for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
14/19 Doc ID 14312 Rev 3
Page 15
STG5223 Package mechanical data
Table 9. Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Millimeters
Symbol
Min Typ Max
A 0.45 0.50 0.55
A1 0 0.02 0.05
A3 0.127
b 0.15 0.20 0.25
D 1.75 1.80 1.85
E 1.35 1.40 1.45
e 0.40
L 0.35 0.40 0.45
L1 0.45 0.50 0.55
Figure 13. Recommended footprint for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Doc ID 14312 Rev 3 15/19
Page 16
Package mechanical data STG5223
Figure 14. Carrier tape for QFN10(1.8x1.4x0.5mm)
Figure 15. Reel information (back view) for QFN10 (1.8 x 1.4 x 0.5 mm)
16/19 Doc ID 14312 Rev 3
Page 17
STG5223 Package mechanical data
Figure 16. Reel information (front side) for QFN10 (1.8 x 1.4 x 0.5 mm)
Doc ID 14312 Rev 3 17/19
Page 18
Revision history STG5223
7 Revision history
Table 10. Document revision history
Date Revision Changes
06-Dec-2007 1 Initial release.
10-Jul-2008 2 Updated RON and RFLAT in Tabl e 6 .
18-May-2009 3
Modified: Ta b l e 6 and ECOPACK text.
Content reworked to improve readability in Section 6.
18/19 Doc ID 14312 Rev 3
Page 19
STG5223
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Doc ID 14312 Rev 3 19/19
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