The STG5682 is a high-speed CMOS low voltage
dual analog S.P.D.T. (Single Pole Dual Throw)
SWITCH or 2:1 Multiplexer /Demultiplexer Switch
fabricated in silicon gate C
2
MOS technology. It is
designed to operate from 1.65V to 4.5V, making
this device ideal for portable applications.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage.
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 3. Absolute maximum ratings
SymbolParameterValueUnit
V
V
V
Supply voltage-0.5 to 5.5V
CC
- 6.0V) to
- (V
V
DC input voltage
I
DC control input voltage-0.5 to 5.5V
IC
DC output voltage
O
CC
V
- (V
CC
VCC + 0.5
+ 0.5
CC
- 6.0V) to
V
V
I
I
I
ICC or
I
GND
P
T
1. Derate above 70ºC by 18.5mW/C
DC input diode current on control pin (V
IKC
I
DC input diode current (V
IK
DC output diode current±20mA
OK
I
DC output current±150mA
O
DC output current peak (pulse at 1ms, 10% duty cycle)±400mA
OP
DC VCC or ground current
Power dissipation at TA = 70°C
D
Storage temperature-65 to 150°C
stg
T
Lead temperature (10 sec)300°C
L
SEL
<0V)
(1)
SEL
<0V)
-50mA
±50mA
±100mA
1120mW
5/16
Page 6
Maximum ratingSTG5682
3.1 Recommended operating conditions
Table 4. Recommended operating conditions
SymbolParameterValueUnit
V
CC
Supply voltage
V
Input voltageVCC -5.5 to V
I
V
V
T
dt/dv
1. Truth Table guaranteed: 1.2V to 4.3V
Control input voltage0 to 4.5V
IC
Output voltageVCC -5.5 to V
O
Operating temperature-40 to 85°C
op
Input rise and fall time control
input
(1)
= 1.65V to 2.7V
V
CC
V
= 3.0 to 4.3V
CC
1.65 to 4.5V
CC
CC
0 to 20
ns/V
0 to 10
V
V
6/16
Page 7
STG5682Electrical characteristics
4 Electrical characteristics
Table 5. DC specifications
Test conditionsValue
= 25°C
SymbolParameter
Vcc (V)
T
A
MinTypMaxMinMax
-40 to 85°C
Unit
R
∆R
V
IH
V
IL
ON
ON
High level
input voltage
Low level
input voltage
Switch ON
resistance
ON
resistance
match
between
channels
(1)
1.65 -1.95
0.65V
CC
0.65V
CC
2.3-2.51.01.4
2.7-3.01.11.5
3.3-4.31.31.6
1.65-1.950.50.5
2.3-2.50.50.4
2.7-3.00.60.5
3.3-4.30.70.6
1.8
3.204.0
2.70.770.90
V
= VCC -5.5V to
3.00.640.80
S
; IS = 100mA
V
CC
3.60.510.65
4.30.450.55
1.8
50
2.720
3.015
VS @ RON Max
= 100mA
I
S
3.615
4.315
1.8
3.0
V
V
Ω
mΩ
R
FLAT
I
OFF
I
ON
ON
resistance
flatness
(2)
Sn OFF
State
Leakage
Current
Sn ON State
Leakage
Current
2.70.50
= VCC -5.5V to
V
3.00.40
S
; IS = 100mA
V
CC
3.60.25
4.30.16
4.3
4.3
S
= 4.3 to -1.2V
V
D
= -1.2 to 4.3V
V
S
= Open
V
D
-0.10.1-11µA
-0.10.1-11µA
= -1.2 to 4.3V
V
7/16
Ω
Page 8
Electrical characteristicsSTG5682
Table 5. DC specifications (continued)
Test conditionsValue
= 25°C
SymbolParameter
Vcc (V)
I
D
D ON State
Leakage
Current
4.3
= Open
V
S
VD = 4.3 to -1.2V
SEL
IIH,I
IL
Leakage
4.3
V
=4.3V or GND
SEL
Current
Quiescent
Supply
I
CCLV
Current Low
4.3
Voltage
Driving
1. Note 1: ∆Ron = max |mSN-nSN|, where m = 1..4 and n = 1..4, N = 1..2
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Table 7. Analog switch characteristics (CL = 5pF, RL = 50Ω, TA = 25°C)
Test conditionsValue
= 25°C
SymbolParameter
Vcc (V)
T
A
MinTypMaxMinMax
OIRR
OFF Isolation
(1)
2.7 - 4.3
XtalkCrosstalk2.7 - 4.3
THD
Total harmonic
distortion
2.7 - 4.3
= 1V
V
S
RMS,
V
= 1V
S
RMS,
= 32Ω
R
L
= 0.5V
V
IN
DC Bias = 0
f = 100kHz
f = 100kHz
PP
-55dB
-60dB
0.01%
f = 20Hz to 20 kHz
BW-3dB bandwidth2.7 - 4.3
Control pin input
C
IN
capacitance
3.36
L
Signal = 0dBm
33MHz
= 50Ω
R
D Port capacitance
C
when switch is
D
3.3f = 1MHz290
enabled
1. Off Isolation = 20Log10 (VD/VS), VD = output. VS = input to off switch.
-40 to 85°C
Unit
pF
10/16
Page 11
STG5682Package mechanical data
5 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/16
Page 12
Package mechanical dataSTG5682
Table 8. QFN16L (2.6x1.8mm) mechanical data
Dim.
MinTypMax
A 0.45 0.55 0.60
A1 0 0.02 0.05
b 0.15 0.20 0.25
D 2.50 2.60 2.70
E 1.70 1.80 1.90
e 0.40
L 0.35 0.40 0.45
mm.
Note:1VFQFPN - Standard for thermally enhanced vey fine pitch quad flat package no leads.
2The leads size is comprehensive of the thickness of the leads finishing material.
3Dimensions do not include mold protusion.
4Package outline exclusive of metal burrs dimensions.
5Shipping media tape and reel units: 3000
Figure 3.Foot print recommendation
12/16
Page 13
STG5682Package mechanical data
Figure 4.Package information
13/16
Page 14
Package mechanical dataSTG5682
Figure 5.QFN16L (2.6mmx1.8mm) tape & reel
14/16
Page 15
STG5682Revision history
6 Revision history
Table 9. Revision history
DateRevisionChanges
15-Mar-20071First release
15/16
Page 16
STG5682
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