Siemens A65 Service Manual

A65R Refresh HIT 6E

Level 2.5e

Repair Documentation

Version Date Department Notes to change

V 1.00 01.08.2005 ICM MP CCQ GRM T New document

Service Repair Documentation
Level 2.5e – A65R

V 1.00

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Release 1.0

Table of Contents:

1 List of available level 2,5e parts A65R 3
2 Required Equipment for Level 2,5e 5
3 Required Software for Level 2,5e A65R 5
4 Radio Part 6

4.1 BLOCK DIAGRAM RF PART 7

4.2 POWER SUPPLY RF-PART 7

4.3 FREQUENCY GENERATION 8

4.4 RECEIVER 11

4.5 TRANSMITTER 12

4.6 BRIGHT IC OVERVIEW 13

4.7 ANTENNA SWITCH (ELECTRICAL/MECHANICAL) 15

4.8 TRANSMITTER: POWER AMPLIFIER 17

5 Logic / Control 18

5.1 OVERVIEW OF HARDWARE STRUCTURE 18

5.2 EGOLD+ 19

6 Power Supply 23

6.1 POWER SUPPLY ASIC 23

6.2 BATTERY 33

6.3 CHARGING CONCEPT 34

7 Interfaces 38

7.1 VIBRA 38

7.2 EARPIECE 38

7.3 MICROPHONE 39

7.4 BATTERY 39

7.5 IO CONNECTOR WITH ESD PROTECTION 40

7.6 SIM 42

7.7 DISPLAY 42

8 Acoustic 43

8.1 MICROPHONE 43

8.2 EARPIECE/LOUDSPEAKER 44

9 Display and Illumination 45

9.1 DISPLAY 45

9.2 ILLUMINATION 46

10 Keyboard 47

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Service Repair Documentation
Level 2.5e – A65R

Release 1.0

1 List of available level 2,5e parts A65R

Product RF Chipset ID Order Number Description CM

A65 HIT 6E C803 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT 6E C809 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT 6E C830 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT 6E C961 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT 6E C965 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT 6E D361 L50645-J4682-Y47 IC ASIC PMU 55-GENERATION
A65 HIT 6E D902 L50645-K280-Y303 IC FEM HITACHI GSM900 1800 1900 (Fem-Type5)
A65 HIT 6E D903 L50620-L6156-D670 IC TRANCEIVER HD155165BP
A65 HIT 6E N901 L50651-Z2002-A82 IC MODUL PA PF0814 (PA-Type2)
A65 HIT 6E R214 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT 6E R215 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT 6E R805 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT 6E R902 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT 6E R910 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT 6E R958 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT VE + 6E C165 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C200 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C201 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C202 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C207 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C209 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C220 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C283 L36377-F6105-K CAPACITOR 1U (Cap-Type6)
A65 HIT VE + 6E C284 L36377-F6105-K CAPACITOR 1U (Cap-Type6)
A65 HIT VE + 6E C285 L36377-F6105-K CAPACITOR 1U (Cap-Type6)
A65 HIT VE + 6E C286 L36377-F6105-K CAPACITOR 1U (Cap-Type6)
A65 HIT VE + 6E C287 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E C288 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E C289 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E C362 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C363 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C364 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C365 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C366 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C367 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C369 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E C370 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E C371 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E C372 L36377-F6105-K CAPACITOR 1U (Cap-Type6)
A65 HIT VE + 6E C373 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)

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Level 2.5e – A65R

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A65 HIT VE + 6E C374 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C377 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E C381 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C382 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C383 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C384 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C385 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C386 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C395 L36392-F1107-M CAPACITOR 100U (Cap-Type8)
A65 HIT VE + 6E C820 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C821 L36853-C9104-M4 CAPACITOR 100N (Cap-Type2)
A65 HIT VE + 6E C916 L36377-F6225-M CAPACITOR 2U2 (Cap-Type4)
A65 HIT VE + 6E D171 L36197-F5019-F415 IC EGOLD+ PMB7850 V3.1F M42
A65 HIT VE + 6E N280 L36810-C6098-D670 IC V-REG LM2794BLX (Vr-Type4)
A65 HIT VE + 6E R141 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT VE + 6E R294 L36852-C-X RESISTOR 0R0 (Res-Type8)
A65 HIT VE + 6E R955 L36120-F422 3-H RESISTOR TEMP 22K (Res-Type7)
A65 HIT VE + 6E V151 L36840-D5062-D670 DIODE RB751S (Di-Type3)
A65 HIT VE + 6E V191 L36197-F5014-F98 DIODE SOT323 (Di-Type1)
A65 HIT VE + 6E V211 L36830-C1097-D670 TRANSISTOR FDG313N (Tra-Type1)
A65 HIT VE + 6E V220 L36851-Z9105-Z981 DIODE 1SS355 (Di-Type6)
A65 HIT VE + 6E V222 L36830-C1112-D670 TRANSISTOR SI1902 (Tra-Type4)
A65 HIT VE + 6E V361 L36830-C1110-D670 TRANSISTOR SI3911 (Tra-Type3)
A65 HIT VE + 6E Z171 L36 145-F102-Y10 QUARZ 32,768KHZ (Q-Type1)
A65 HIT VE + 6E Z211 L36 197-F5000-F116 FILTER EMI (Fi-Type2)
A65 HIT VE + 6E Z950 L36 145-F260-Y17 QUARZ 26MHZ (Q-Type4)

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Level 2.5e – A65R

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2 Required Equipment for Level 2,5e

- GSM-Tester (CMU200 or 4400S incl. Options)

- PC-incl. Monitor, Keyboard and Mouse

- Bootadapter 2000/2002 (L36880-N9241-A200)

- Adapter cable for Bootadapter due to new Lumberg connector (F30032-P226-A1)

- Troubleshooting Frame A65 (F30032-Pxxx-A1)

- Power Supply NGMO1/NGMO2

- Spectrum Analyser

- Active RF-Probe incl. Power Supply

- Oscilloscope incl. Probe

- RF-Connector (N<>SMA(f))

- Power Supply Cables

- Dongle (F30032-P28-A1)

- BGA Soldering equipment

Reference: Equipment recommendation V1.6
(downloadable from the technical support page)

3 Required Software for Level 2,5e A65R

- Windows XP

- X-Focus version XX or higher

- GRT Version 3 or higher

- Internet unblocking solution (JPICS)

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4 Radio Part

The radio part is realizes the conversion of the GMSK-HF-signals from the antenna to the
baseband and vice versa.

In the receiving direction, the signals are split in the I- and Q-component and led to the D/A­converter of the logic part. In the transmission direction, the GMSK-signal is generated in an
Up Conversion Modulation Phase Locked Loop by modulation of the I- and Q-signals which
were generated in the logic part. After that the signals are amplified in the power amplifier.

Transmitter and Receiver are never active at the same time. Simultaneous receiving in the
EGSM900 and GSM1800 band is impossible. Simultaneous transmission in the EGSM900
and GSM1800 band is impossible, too. However the monitoring band (monitoring timeslot) in
the TDMA-frame can be chosen independently of the receiving respectively the transmitting
band (RX- and TX timeslot of the band).

The RF-part is dimensioned for triple band operation (EGSM900, DCS1800, PCS19000)
supporting GPRS functionality up to multiclass 10.

The RF-circuit consists of the following components:

• Hitachi Bright 6E chip set (HD155165BP) with the following functionality:

o PLL for local oscillator LO1 and LO2 and TxVCO
o Integrated local oscillators LO1, LO2
o Integrated TxVCO
o Direct conversion receiver including LNA, DC-mixer, channel filtering and

PGC-amplifier

o 26 MHz reference oscillator

• Transmitter power amplifier with integrated power control circuitry

• Frontend-Module including RX-/TX-switch and EGSM900 / DCS1800 / PCS 1900

receiver SAW-filters

• Quartz and passive circuitry of the 26MHz VCXO reference oscillator

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Level 2.5e – A65R

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4.1 Block diagram RF part

4.2 Power Supply RF-Part

The voltage regulator for the RF-part is located inside the ASIC D361. It generates the
required 2,8V “RF-Voltages” named VCC_2.8V and VCC_SYN. VCC_2.8V is passed via a
0Ω resistor and renamed as VDD_BRIGHT as operating voltage for the BRIGHT The voltage
regulator is activated as well as deactivated via VCXOEN_UC

EGOLD+. The temporary deactivation is used to extend the stand by time.

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Service Repair Documentation
Level 2.5e – A65R

(Miscellaneous R6) provided by the

Release 1.0

4.3 Frequency generation

The A65R mobile is using a reference frequency of 26MHz. The generation of the 26MHz
signal is done via a VCO (Z950). TP (test point) of the 26MHz signal is the TP 820
The oscillator output signal 26MHz_RF is directly connected to the BRIGHT IC
used as reference frequency inside the Bright (PLL). The signal leaves the Bright IC as

BB_SIN26M

Bright 6E

(ball G9) to be further used from the EGOLD+ (D171 (Functional T3)).

VCXO Out

SGOLDlite In

To compensate frequency drifts (e.g. caused by temperature) the oscillator frequency is
controlled by the (AFC) signal, generated through the internal EGOLD+ (D171
PLL. Reference for the “EGOLD-PLL” is the base station frequency received via the
Frequency Correction Burst.

The required voltage VCC_2.8V is provided by the ASCI D361

Waveform of the AFC_PNM signal from EGOLD+ to Oscillator

Signalform

(ball B9) to be

(Functional U5))

SGOL Dlite

RF_AFC

1

R1

C1

Service Repair Documentation
Level 2.5e – A65R

1 2 3

AFC_PNM

GND

2

R2

C2

GND

R3

3

C3

GND

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Synthesizer: LO1
First local oscillator (LO1) consists of a PLL and VCO inside Bright (D903) and an internal

loop filter
RF PLL

The frequency-step is 400 kHz in GSM1800 mode and 800kHz in EGSM900 mode due to the
internal divider by two for GSM1800 and divider by four for EGSM900. To achieve the
required settling-time in GPRS operation, the PLL can operate in fastlock-mode a certain
period after programming to ensure a fast settling. After this the loopfilter and currents are
switched into normal-mode to get the necessary phasenoise-performance. The PLL is
controlled via the tree-wire-bus of Bright VI E.

RFVCO (LO1)
The first local oscillator is needed to generate frequencies which enable the transceiver IC to
demodulate the receiver signal and to perform the channel selection in the TX part. The VCO
module is switched on with the signal PLLON. The full oscillation range is divided into 256
sub-bands To do so, a control voltage for the LO1 is used, gained by a comparator. This
control voltage is a result of the comparison of the divided LO1 and the 26MHz reference
Signal. The division ratio of the dividers is programmed by the EGOLD+, according to the
network channel requirements.

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Level 2.5e – A65R

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Matrix to calculate the TX and RX frequencies A65R:

Band RX / TX Channels RF frequencies LO1 frequency IF freq.

EGSM 900 Receive: 0..124 935,0 - 959,8 MHz LO1 = 4*RF
EGSM 900 Transmit: 0..124 890,0 - 914,8 MHz LO1 = 4*(RF+IF) 80,0 MHz

EGSM 900 Receive: 975..1023 925,2 - 934,8 MHz LO1 = 4*RF
EGSM 900 Transmit: 975..1023 880,2 - 889,8 MHz LO1 = 4*(RF+IF) 82,0 MHz
GSM 1800 Receive: 512..661 1805,2 - 1835,0 MHz LO1 = 2*RF
GSM 1800 Transmit: 512..661 1710,2 - 1740,0 MHz LO1 = 2*(RF+IF) 80,0 MHz

GSM 1800 Receive: 661..885 1835,0 - 1879,8 MHz LO1 = 2*RF
GSM 1800 Transmit: 661..885 1740,0 - 1784,8 MHz LO1 = 2*(RF+IF) 82,0 MHz

GSM 1900 Receive: 512..810 1930,2 - 1989,8 MHz LO1 = 2*RF
GSM 1900 Transmit: 512..810 1850,2 - 1909,8 MHz LO1 = 2*(RF+IF) 80,0 MHz

Synthesizer: LO2
The second local oscillator (LO2) consists of a PLL and VCO inside Bright (D903) and an

internal loop filter. Due to the direct conversion receiver architecture, the LO2 is only used for
transmit-operation. The LO2 covers a frequency range of at least 16 MHz (640MHz –
656MHz).
Before the LO2-signal gets to the modulator it is divided by 8. So the resulting TX-IF
frequencies are 80/82 MHz (dependent on the channel and band). The LO2 PLL and power­up of the VCO is controlled via the tree-wire-bus of Bright (EGOLD+ signals RF_DAT;

RF_CLK; RF_STR). To ensure the frequency stability, the 640MHz VCO signal is compared

by the phase detector of the 2

nd

PLL with the 26Mhz reference signal. The resulting control

signal passes the external loop filter and is used to control the 640/656MHz VCO.
The required voltage VDD_BRIGHT is provided by the ASIC D361

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Level 2.5e – A65R

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4.4 Receiver

Receiver: Filter to Demodulator
The band filters are located inside the frontend module (D902). The filters are centred to the

band frequencies. The symmetrical filter output is matched to the LNA input of the Bright .The
Bright 6E incorporates three RF LNAs for GSM850/EGSM900, GSM1800 and GSM1900
operation. The LNA/mixer can be switched in High- and Low-mode to perform an
amplification of ~ 20dB. For the “High Gain“ state the mixers are optimised to conversion gain
and noise figure, in the “Low Gain“ state the mixers are optimised to large-signal behavior for
operation at a high input level. The Bright performs a direct conversion mixers which are IQ­demodulators. For the demodulation of the received GSM signals the LO1 is required. The
channel depending LO1 frequencies for 1800MHz/1900MHz bands are divided by 2 and by 4
for 850MHG/900MHz band. Furthermore the IC includes a programmable gain baseband
amplifier PGA (90 dB range, 2dB steps) with automatic DC-offset calibration. LNA and PGA
are controlled via EGOLD+ signals RF_DAT; RF_CLK; RF_STR
channel-filtering is realized inside the chip with a three stage baseband filter for both IQ
chains. Only two capacitors which are part of the first passive RC-filters are external. The
second and third filters are active filters and are fully integrated. The IQ receive signals are
fed into the A/D converters in the EGAIM part of EGOLD+. The post-switched logic measures
the level of the demodulated baseband signal and regulates the level to a defined value by
varying the PGA amplification and switching the appropriate LNA gains.

From the antenna switch, up to the demodulator the received signal passes the following
blocks to get the demodulated baseband signals for the EGOLD+:

Filter

LNA

Demodulator

PGC

D903 Bright(D903)

The required voltage VDD_BRIGHT is provided by the ASIC D361

(RF CTRL J15, J16, J17). The

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Level 2.5e – A65R

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4.5 Transmitter

Transmitter: Modulator and Up-conversion Loop
The generation of the GMSK-modulated signal in Bright (D903) is based on the principle of

up conversion modulation phase locked loop. The incoming IQ-signals from the baseband
are mixed with the divided LO2-signal. The modulator is followed by a lowpass filter (corner
frequency ~80 MHz) which is necessary to attenuate RF harmonics generated by the
modulator. A similar filter is used in the feedback-path of the down conversion mixer.
With help of an offset PLL the IF-signal becomes the modulated signal at the final transmit
frequency. Therefore the GMSK modulated rf-signal at the output of the TX-VCOs is mixed
with the divided LO1-signal to a IF-signal and sent to the phase detector. The I/Q modulated
signal with a center frequency of the intermediate frequency is send to the phase detector as
well.
The output signal of the phase detector controls the TxVCO and is processed by a loop filter
whose components are external to the Bright. The TxVCO which is realized inside the Bright
chip generates the GSMK modulated frequency.

Modulator

Filter

PD

Bright(D903)

The required voltage VDD_BRIGHT is provided by the ASIC D361

TxVCO

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4.6 Bright IC Overview

BRIGHT 6E
IC Overview

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IC top view (ball overview)

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4.7 Antenna switch (electrical/mechanical)

Internal/External <> Receiver/Transmitter
The A65R mobile have two antenna switches.
a) The mechanical antenna switch for the differentiation between the internal and

external antenna.

b) The electrical antenna switch, for the differentiation between the receiving and

transmitting signals.
To activate the correct tx pathes of this diplexer, the EGOLD+ signals TXON_GSM and

RF_SW are required.

Internal/External antenna switch

The electrical antenna switch

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