Siemens A38 Service Manual

Service Manual Level 3

for

A38

Release Date Department Notes to change

R 1.0 06.09.2006 BQY CC S CES New document

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Table of Content

1 Introduction ...............................................................................................................................4

1.1 PURPOSE ...............................................................................................................................4

1.2 SCOPE ...................................................................................................................................4

2 List of available level 3 parts....................................................................................................5

3 Required Equipment for Level 3 ..............................................................................................7

4 Required Software for Level 3..................................................................................................7

5 PCB Main Board Overview .......................................................................................................8

6 Radio Part Introduction.............................................................................................................9

6.1 RECEIVER OPERATION..........................................................................................................10

6.2 TRANSMITTER OPERATION ....................................................................................................12

6.3 KEY COMPONENTS ...............................................................................................................14

6.3.1 T/R SWITCH ......................................................................................................................14

6.3.2 POWER AMPLIFIER ............................................................................................................14

6.3.3 TRANSCEIVER HD155165BP.............................................................................................15

6.3.4 SAW FILTER .....................................................................................................................15

7 Logic / Control Introduction...................................................................................................16

7.1 CALYPSO- BLOCK DIAGRAM (HERCROM200G2)..................................................................17

7.1.1 ARM MEGA-CELL (ARM7TDMIE) .....................................................................................20

7.1.2 DSP SUB-CHIP (S28C128) ...............................................................................................20

7.1.3 INTERNAL STATIC RAM .....................................................................................................20

7.1.4 INTERNAL BOOT ROM ........................................................................................................21

7.1.5 MEMORY INTERFACE .........................................................................................................22

7.1.6 MEMORY PROTECTION UNIT (MPU)...................................................................................22

7.1.7 DEBUG UNIT (DU) .............................................................................................................22

7.1.8 INTERRUPT HANDLER (INTH).............................................................................................22

7.1.9 TIMERS .............................................................................................................................23

7.1.10 ARM I/O ...........................................................................................................................23

7.1.11 UART-MODEM & UART-IRDA ..........................................................................................24

7.1.12 MICRO WIRE INTERFACE (U- WIRE) ....................................................................................24

7.1.13 MASTER I2C SERIAL INTERFACE ........................................................................................24

7.1.14 SERIAL PROT INTERFACE (SPI)..........................................................................................24

7.1.15 SUBSCRIBER IDENTITY MODULE (SIM) ...............................................................................25

7.1.16 REAL TIME CLOCK (RTC) ..................................................................................................25

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7.1.17 ULTRA LOW POWER DEVICE (ULPD) .................................................................................26

7.1.18 JOINED TEST ACTION GROUP (JTAG)................................................................................26

7.1.19 CIPHERING PROCESSOR (CRYPT) ....................................................................................26

7.1.20 RADIO INTERFACE (RIF) ....................................................................................................26

7.1.21 MULTI-CHANNEL SERIAL INTERFACE (MCSI) ......................................................................27

7.1.22 PULSE WIDTH TONES (PWT).............................................................................................27

7.1.23 PULSE WIDTH LIGHT (PWL)...............................................................................................27

7.2 IOTA (TWL3025).................................................................................................................28

7.2.1 INTRODUCTION OF IOTA....................................................................................................28

7.2.2 BLOCK SPECIFICATIONS (IOTA) ..................................................................................28

7.2.3 USP (MCU SERIAL PORT).................................................................................................30

7.2.4 BSP (BASE BAND SERIAL PORT)........................................................................................30

7.2.5 BBC (BASE BAND CODEC) ................................................................................................31

7.2.6 BDL (BASE BAND DOWNLINK PATH) ....................................................................................31

7.2.7 AFC & APC ......................................................................................................................32

7.2.8 VREG (VOLTAGE REGULATION).........................................................................................34

7.2.9 VRPC (VOLTAGE REFERENCE POWER CONTROL) ..............................................................34

7.2.10 BCI (BATTERY CHARGER INTERFACE)................................................................................35

7.2.11 VBC (VOICE BAND CODEC)................................................................................................36

7.2.12 TSP (TIME SERIAL PORT)..................................................................................................37

7.2.13 SIM CARD INTERFACE (SIM) .............................................................................................37

7.2.14 AUXILIARY CURRENT DRIVER (ACD) ..................................................................................38

7.2.15 AUXILIARY DAC (ADAC) ...................................................................................................38

7.3 INTRODUCTION TO MEMORY DEVICES ...................................................................................39

7.4 INTRODUCTION TO EXTERNAL PERIPHERY CIRCUITS ...............................................................40

7.4.1 MELODY LSI .....................................................................................................................40

7.4.2 VIBRATING MOTOR ............................................................................................................41

7.4.3 KEYBOARD LED CIRCUIT ...................................................................................................42

7.4.4 KEYBOARD CIRCUIT ...........................................................................................................43

7.4.5 AUDIO CIRCUIT ..................................................................................................................44

7.4.6 AUDIO JACK CIRCUIT .........................................................................................................46

7.4.7 SIM READER CIRCUIT .......................................................................................................47

7.4.8 DISPLAY CIRCUITS .............................................................................................................47

7.4.9 CHARGING CIRCUIT............................................................................................................48

Appendix A: Charging Algorithm................................................................................................50

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1 Introduction

1.1 Purpose

This Service Repair Documentation is intended to carry out repairs on BenQ repair level 3.

1.2 Scope

This document is the reference document for all BenQ authorised Service Partners which are released to repair BenQ Siemens Mobile phones up to level 3.

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2 List of available level 3 parts

Product Chipset ID OrderNumber DescriptionCM

A38 TI ANT1 L50634-Z97-C554 CONN ANT 5.1*3*5 RF05301-PG A38 TI ANT2 L50634-Z97-C554 CONN ANT 5.1*3*5 RF05301-PG A38 TI BQ250 L50640-C2143-D670 XTOR BC807-40W SOT-323 PNP A38 TI BQ350 L50640-C2150-D670 XTOR UMT4403 UMT3 PNP A38 TI C653 L50695-F3157-M1 CHIP CAP T 150UF 10V M7132 A38 TI D250 L50640-D5111-D670 Diode SB CRS03 30V1A PMDU A38 TI D350 L50640-L2180-D670 LED BLUE 0603M BL-HB536G-TRB A38 TI D351 L50640-L2180-D670 LED BLUE 0603M BL-HB536G-TRB A38 TI D352 L50640-L2180-D670 LED BLUE 0603M BL-HB536G-TRB A38 TI D353 L50640-L2180-D670 LED BLUE 0603M BL-HB536G-TRB A38 TI D354 L50640-L2180-D670 LED BLUE 0603M BL-HB536G-TRB A38 TI D355 L50640-L2180-D670 LED BLUE 0603M BL-HB536G-TRB A38 TI D356 L50640-D5110-D670 Diode SB 0.2A30V RB520S-30 A38 TI D357 L50640-D5110-D670 Diode SB 0.2A30V RB520S-30 A38 TI DZ250 L50640-D3142-D670 Diode ZEN 6.06-6.33V 200MW UMD A38 TI EN150 L50645-K280-Y427 FILTER EMI 1GHZ CSPEMI202AG A38 TI F250 L50645-A820-Y47 CHIP FUSE 1A 32V F0603 TR/0603 A38 TI J250 L50634-Z97-C553 JACK DC PWR PA05302-QNJ A38 TI J300 L50634-Z97-C679 CONN SPK3.1N2P 6.2*4.8*1PT/ASP A38 TI J450 L50634-Z97-C558 CONN I/O 10P P0.5 215+916+2941 A38 TI JP250 L50634-Z97-C556 CONN BATT 3P D2.5 AB303Y-C0G1G A38 TI LCD L50651-Z1508-A197 LCDM WD-X0906XE-6CLWB A38 TI Q1 L50640-C4086-D670 XTOR 2SC5658T2LR VMT3 NPN A38 TI R604 L50645-K260-Y110 CHIP ATTENUATOR 3DB PAT1010-X A38 TI RN350 L50653-F4221-J CHIP NTW 220 J 8P 2*1*0.4 A38 TI RN351 L50653-F4221-J CHIP NTW 220 J 8P 2*1*0.4 A38 TI U100 L50645-J4683-Y31 IC ASIC D751749ZHHR BGA 179P A38 TI U150 L50610-U6243-D670 IC INTF TWL3025BZGMR PBGA 100P A38 TI U151 L50634-Z97-C713 CONN SIM CARD 6P BM05306-J7G A38 TI U200 L50610-F6504-D670 IC FLASH S29PL032J70BFI BQ7B.29032.B3U A38 TI U201 L50610-F6505-D670 IC SRAM SV5P4016UFA-70P BQ7B.54016.03U A38 TI U250 L50640-C2168-D670 XTOR DTC144EET1G SC-75 NPN A38 TI U251 L50630-C1187-D670 FET MOS FDC6506P SOT-6 PC A38 TI U252 L50610-C6126-D670 IC DETECTOR XC61CC4402N SSOT24 A38 TI U253 L50640-C2144-D670 XTOR DTC143ZET1G SC-75 NPN A38 TI U325 L50610-U6282-D670 IC DC/DC CONV RT9361APE SOT-26 A38 TI U350 L50640-C2144-D670 XTOR DTC143ZET1G SC-75 NPN A38 TI U400 L50610-C6430-D670 IC POLY AUDIO SPMA120A-EV083 A38 TI U451 L50645-K280-Y423 FILTER 800-2700MHZ CSPEMI204G A38 TI U452 L50640-C2149-D670 XTOR PEMH9 NPN SOT666 6P A38 TI U602 L50610-U6244-D670 IC IR XCVR HD155165BPEB BGA A38 TI U603 L50645-K280-Y428 FILTER RF SAW 942.5MHZ B9017 A38 TI U604 L50645-K280-Y429 FILTER SAW 1842.5/1960M SAWEP1

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A38 TI U606 L50610-U6247-D670 IC PWR AMP RF3166-E6 SMD A38 TI U608 L50610-B6218-D670 IC DUAL BUFFER NC7WZ16 SC70-6P A38 TI U609 L50610-U6248-D670 IC SWITCHPLEXER LMSP54CA-272 A38 TI U610 L50645-F102-Y48 XTAL 26MHZ 10PF 8PPM U-860-1-1 A38 TI U611 L50610-C6289-D670 IC VR MAS9124A2GC06 TSOT-5 A38 TI U72 L50615-Z77-C287 SW RF ANTENNA MS-147 HIROSE A38 TI X100 L50645-F102-Y49 XTAL 32.768K12.5PF20PPM DST520 A38 TI X150 L50634-Z97-C559 CONN MIC 2P TRA21-2K8 56F55

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3 Required Equipment for Level 3

 GSM-Tester (CMU200 or 4400S incl. Options)  PC-incl. Monitor, Keyboard and Mouse  Power Supply  Board Adapter A38  Spectrum Analyser  Active RF-Probe incl. Power Supply  Oscilloscope incl. Probe  Power Supply Cables  BGA Soldering equipment

Reference: Equipment recommendation V1.6

(Downloadable from the technical support page)

4 Required Software for Level 3

 Windows XP  BenQ Troubleshooting Software XCSD Level2

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5 PCB Main Board Overview

PCB Main Board Back Side

LED

Metal Dome Film LCD Module

PCB Main Board Top Side

Microphone

IOT

Loudspeake

Transceiver (under

shieldin

frame)

Power Amplifie

SRAM

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Flash Memor

udio Chi

ntenna Switch

6 Radio Part Introduction

T he following session elaborates the basic functionalities of RF-related chip sets: HD155165BP

（Transceiver, Synthesizer and Universal Baseband Interface）. Those will give readers

fundamental concept about how they work.

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6.1 Receiver Operation

The Aero+ transceiver uses a low-IF receiver architecture that allows for the on-chip integration of

the channel selection filters.

The Si4200 integrates three differential-input LNAs. The LNA amplifies the RF signal after selection

by the T/R switch and RF SAW filter before the signal enters the first mixer section. The LNA inputs

are matched to the 200Ω balanced output SAW filters through external LC matching networks.

A mixer down converts the RF signal to a 100 kHz intermediate frequency (IF) with the RFLO from

the Si4134T frequency synthesizer. The RFLO frequency is between 1737.8 and 1989.9 MHz, and

is divided by two in the Si4200 for GSM850 and EGSM 900 modes. The mixer output is amplified

with an analog programmable gain amplifier (PGA), which dynamic range is 16 dB and gain step is 4

dB.

The quadrature IF signal is digitized with high-resolution A/D converters (ADCs). The Si4201 down

converts the ADC output to base band with a digital 100 kHz quadrature LO signal. The digital

output is scaled with a digital PGA, which dynamic range is 63 dB and gain step is 1 dB. DACs drive

a differential analog signal onto the RXIP, RXIN, RXQP and RXQN pins to interface to standard

analog-input base band ICs.

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Antenna

IOTA

Receiver Path

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6.2 Transmitter Operation

The transmitter chain converts differential IQ base band signals to a suitable format for transmission

by a power amplifier.

The transmit (TX) section consists of an I/Q base band up converter, an offset phase-locked loop

(OPLL) and two 50 Ω output buffers that can drive external power amplifiers (PA), one for the EGSM

and one for the DCS 1800 and PCS 1900 band. A quadrature mixer up converts the differential in-

phase (TXIP, TXIN) and quadrature (TXQP, TXQN) signals with the IFLO to generate an IF signal

which is filtered and used as the reference input to the OPLL. The Si4134T generates the IFLO

frequency between 766 and 896 MHz. The IFLO is divided by two to generate the quadrature LO

signals for the quadrature modulator, resulting in an IF between 383 and 448 MHz.

The OPLL consists of a feedback mixer, a phase detector, a loop filter, and a fully integrated

TXVCO. The TXVCO centres between the DCS 1800 and PCS 1900 bands, and its output is divided

by two for the GSM850 and E-GSM 900 bands. The Si4134T generates the RFLO frequency

between 1272 and 1483 MHz. To allow a single VCO to be used for the RFLO, high-side injection is

used for the E-GSM 900 bands, and low-side injection is used for the DCS 1800 and PCS 1900

bands.

The RF signal is then amplified by PA (RFMD3140) and power control loop to the assigned power

level within the burst.

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Antenna

IOTA

Transmitter Path

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6.3 Key Components

6.3.1 T/R Switch

TRS201 is a front-end switch device for EGSM/DCS/PCS. The following Table 3-1 shows the

required pin-voltage combinations for each operating modes

Table 6-1

Table 6-2

Mode

Frequency Range (MHz)

Insertion Loss @25℃

(dB)

EGSM TX

DCS/PCS TX

897.5±17.5

1747.5±37.5 (DCS)

1.3 max

1.25 max

1880.0±30.0 (PCS)

EGSM RX

DCS RX

PCS RX

942.5±17.5

1842.5±37.5

1960.0±30.0

1.0 max

1.2 max

1.55 max

6.3.2 Power Amplifier

The PA, which integrates the power level control circuit, is controlled by signal BSW, PCLON and

RAMP. The purpose of the BSW is for band- select control. The RAMP signal is for power level

control. The PCLON signal is for power saving control. As the supply requirements, the supply

voltage is 3.6V and the control loop required voltage is 2.8V.

The following formula provides the required ramping voltage at the flat portion of bursts:

Vramp= 0.12+SF*0.002 (V), where SF: Scaling Factor

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6.3.3 Transceiver HD155165BP

The HD155165BP is a highly integrated RF transceiver IC for GSM850, GSM900, DCS1800and

PCS1900 quad-band cellular systems. The HD155165BP incorporates four RF low-noise amplifiers,

direct conversion mixers, a programmable gain amplifier with multistage filtering and DC offset

correction, fully integrated VCOs, RF/IF synthesizers, and a low-noise offset PLL transmitter. The

HD155165BP includes state machine control serial programming. All functions operate down to 2.7V

and are housed in a 57-pin BGA package. Hence the HD155165BP can form a small size

transceiver handset for quad band.

6.3.4 SAW Filter

The BPF201, BPF202 and BPF203 are the front-end filtering device on receiving path, for GSM,

DCS and PCS bands, respectively. They also provide mode conversion mechanism (unbalance to

balance).

Table 3-3 shows the worse case insertion loss for Epcos filters.

Table 6-3

Mode Frequency Range (MHz)

EGSM 925~960 2.1 max

DCS 1805~1880 2.1 max

PCS 1930~1990 2.4 max

Insertion Loss @25℃ (dB)

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7 Logic / Control Introduction

A38 consists of GSM chipsets --ABB, DBB, PA, transceiver, filters and plenty of peripheries. They

can provide wireless communication solutions for any products that have requirements of voice/data

transmission, particularly portable devices or handheld equipments.

In addition, A38 integrates other peripheries such as polyphony chip that plays melodies, display

with 65K-color C-STN LCD, LEDs for keypads, vibrating motor, memory device and charging etc.

The baseband part consists of TI’s GSM digital signal processor (Calypso-) with the micro-controller

unit and TI’s analog device (IOTA) that performs the interface and processing of voice signals,

interface and processing of base band in-phase (I) and quadrature (Q) signals. Moreover, the base

band part includes a flash device used for software program code and a SRAM for software program

execution.

Baseband provides functions like UART, GPIO, voice, SIM, keypads, memory interface, low dropout

regulator and synchronous clock to the peripheral chip for timing reference…etc. These features can

certainly meet most customers’ design requirement and simplify the developing process for a variety

of portable devices

In the following sections, we’ll give the detailed descriptions for each baseband chip component, and

then we’d continue to emphasize the introductions to the specific periphery circuits that interface.

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7.1 Calypso- Block Diagram (HERCROM200G2)

CALYPSO Lite architecture is based on two processor cores ARM7 & LEAD2 using the generic TI

RHEA bus standard as interface with their associated application peripherals.

This CALYPSO lite is composed from the following blocks:

• ARM7TDMIE (32/16 bits RISC processor)

- ARM “Ice Crusher” for emulation purpose.

• LEAD2 DSP core with 28K words of RAM and 128K words of ROM

- Associated with API, SPI, and TIMER.

• Clock squarer cell.

• ARM general-purpose peripherals:

- ARM Memory Interface (MEMIF) for external RAM, Flash or ROM.

- RHEA Bridge.

- 4M bits SRAM with write-buffer.

- Memory Protection Unit (MPU).

- Debug Unit (DU).

- 64k bits ROM for internal boot.

- Die-ID cell.

• ARM application peripherals:

- ARM I/O.

- Micro Wire Interface.

- 3 Timers.

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- UART_IRDA & UART_MODEM.

- SIM Interface.

- Interrupt Handler (INTH).

- Time Processing Unit (TPU).

- Time Serial Port (TSP).

- Direct Memory Access (DMA).

- Real Time Clock (RTC).

- Ultra Low-Power Device (ULPD).

- Clock Management (CLKM).

- Light Pulse Generator (LPG), Pulse Width Tone (PWT), Pulse Width Light (PWL).

- Master I2C serial Interface

- GPRS Encryption Algorithm Module 1 & 2.

• ASIC DSP general-purpose peripherals:

- RHEA Bridge.

• DSP application peripherals.

- Radio Interface (RIF).

- Multi-Channel Serial Port (MCSI).

- Ciphering Processor (CRYPT).

- Direct Memory Access (DMA).

- DSP Interrupt Handler (INTH).

- UART Interface.

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+ 41 hidden pages

Siemens A38 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

6.3.3 Transceiver HD155165BP