Datasheet TEA6415C Datasheet (SGS Thomson Microelectronics)

BUS-CONTROLLED VIDEO MATRIXSWITCH

■

20MHz BANDWIDTH

■

CASCADABLE WITH ANOTHER TEA6415C
(INTERNAL ADDRESS CAN BE CHANGEDBY
PIN 7 VOLTAGE)

■

8 INPUTS(CVBS, RGB, MAC, CHROMA, ...)

■

6 OUTPUTS

■

POSSIBILITY OF MAC OR CHROMA SIGNAL
FOR EACH INPUT BY SWITCHING-OFF THE
CLAMP WITH AN EXTERNAL RESISTOR
BRIDGE

■

BUS CONTROLLED

■

6.5dB GAIN BETWEEN ANY INPUT AND OUT­PUT

■

-55dB CROSSTALK AT5MHz

■

FULLYESD PROTECTED

DESCRIPTION

The main functionof the TEA6415Cis to switch8
videoinput sourceson the 6 outputs.

Each output can be switched to only one of the
inputs whereas but any same input may be con­nectedto several outputs.

Alltheswitchingpossibilitiesarecontrolledthrough

2

the I

C bus.

TEA6415C

DIP20

(Plastic Package)

ORDER CODE : TEA6415C

SO20

(Plastic Micropackage)

ORDER CODE : TEA6415CD

PINCONNECTIONS

January 1996

INPUT

DATA

INPUT

CLOCK

INPUT
INPUT

PROG

INPUT

V

CC

INPUT

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

INPUT
GROUND
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
GROUND
INPUT

6415C-01.EPS

1/10

TEA6415C

BLOCK DIAGRAM

CVBS

(MAC/DEC)

CVBS

(PERI P LUG1)

CVBS

(AMTUNER)

MAC S IGNAL

(AMTUNER)

CVBS

(PERI P LUG2)

CVBS

(FM TUNER)

MAC S IGNAL

(FM TUNER)

SYNCHRO

(TTX/BTX)

PERI

TV2

TTX LUMA

CHROMA

POWER

PERI

TV1

18 17 16 15 1 4 13 12

1

3

5

6

8

10

11

20

PIP MAC

DEC.

GND

274

DATA GNDCLOCK V

GENERALDESCRIPTION

Themainfunctionof theICis toswitch8 videoinput
sources on 6 outputs.

Each output can be switched on only one of each
input. On each input an alignment of the lowest
level ofthesignal ismade (bottom ofsynch.top for
CVBS or blacklevel for RGBsignals).

Each nominal gain between any input and output
is 6.5dB. For D2MAC or Chroma signalthe align­ment is switched off by forcing, with an external
resistor bridge,5 V

onthe input.Each inputcan

DC

be used as a normalinput or as a MAC or Chroma

T
E

BUS

DECODER

A
6
4
1
5
C

919

PROG

CC

input (with external resistorbridge). All the switch­ing possibilitiesare changedthrough the BUS.

Driving 75Ω loadneeds an external transistor.
It is possible to have the same inputconnected to

severaloutputs.
The starting configuration upon power on (power

supply: 0 to 10V) is undetermined.
In this case, 6 words of 16 bits are necessary to

determineone configuration.In othercase,1 word
of 16bits isnecessary to determineone configura­tion.

6415C-02.EPS

2/10

TEA6415C

ABSOLUTEMAXIMUM RATINGS

Symbol Parameter Value Unit

V

CC

T

T

stg

THERMALDATA

Symbol Parameter Value Unit

R

th(j-a)

ELECTRICAL CHARACTERISTICS

=25oC,VCC= 10V , R

T

A

Symbol Parameter Min. Typ. Max. Unit

V

CC

I

CC

INPUTS

OUTPUTS (V

Supply Voltage (Pin 9) 12 V
Operating Ambient Temperature 0, +70

A

Storage Temperature - 20, +150

Junction-Ambient Thermal Resistance DIP20

SO20

LOAD

= 10kΩ ,C

= 3pF (unless otherwise specified)

LOAD

80

100

Supply Voltage(Pin 9) 8 10 11 V
Power Supply Current (withoutload on outputs ; VCC=10V) 20 30 40 mA

Signal Amplitude (CVBS signal) 2 V
Input Current (per output connected, input voltage = 5VDC)

13µA

(this current is X6 when all outputs are connected on the input)
DC Level 3.3 3.6 3.9 V
DC Level Shift (temperature from 0 to 70

=1VPPfor alldynamic tests) Pins 13 - 14 - 15 - 16 - 17 - 18

IN

o

C) 5 100 mV

Dynamic 4.5 5.5 V
Output Impedance 25 50 Ω
Gain 6 6.5 7 dB
Bandwidth

-1dB attenuation

-3dB attenuation

715

20

Crosstalk

f = 5MHz
f = 3.58MHz

-55

-60

DC level 2.4 2.75 3.1 V

o
o

MHz
MHz

-45

-50dBdB

o

C

o

C

C/W
C/W

PP

PP

6415C-01.TBL

6415C-02.TBL

6415C-03.TBL

3/10

TEA6415C

2

C BUSCHARACTERISTICS

I

Symbol Parameter Test Conditions Min. Max. Unit

SCL

V
V

I

f

SCL

t

t

C

SDA

V
V

I
C
t

t

V

t

C

TIMING

t

LOW

t

HIGH

t

SU, DAT

t

HD, DAT

t

SU, STO

t

BUF

t

HD, STA

t

SU, STA

Low Level Input Voltage - 0.3 + 1.5 V

IL

High Level Input Voltage 3.0 VCC+ 0.5 V

IH

Input Leakage Current VI= 0 to V

LI

CC

-10 +10 µA
Clock Frequency 0 100 kHz
Input Rise Time 1.5V to 3V 1000 ns

R

Input Fall Time 1.5V to 3V 300 ns

F

Input Capacitance 10 pF

I

Low Level Input Voltage - 0.3 + 1.5 V

IL

High Level Input Voltage 3.0 VCC+ 0.5 V

IH

Input Leakage Current VI= 0 to V

LI

Input Capacitance 10 pF

I

Input Rise Time 1.5V to 3V 1000 ns

R

Input Fall Time 1.5V to 3V 300 ns

F

Low Level Output Voltage IOL= 3mA 0.4 V

OL

Output Fall Time 3V to 1.5V 250 ns

F

Load Capacitance 400 pF

L

CC

-10 +10 µA

Clock Low Period 4.7 µs
Clock High Period 4.0 µs
Data Set-up Time 250 ns
Data Hold Time 0 340 ns
Set-up Time from Clock High to Stop 4.0 µs
Start Set-up Time following a Stop 4.7 µs
Start Hold Time 4.0 µs
Start Set-up Time following Clock Low-toHigh Transition 4.7 µs

6415C-06.TBL

Figure 1 : I2C Bus Timing

SDA

t

BUF

SCL

SDA

4/10

t

LOW

t

HD,STA t

t

r

t

SU,STA t

HD,DAT

t

HIGH

t

f

t

SU,DAT

SU,STO

6415C-10.EPS

TEA6415C

BUS SELECTIONS (I

2

C-BUS)

2nd byte of transmission

ADDRESS

MSB

00000 XXX Pin 18
00100 XXX Pin 14
00010 XXX Pin 16
00110 - - - Not used
00001 XXX Pin 17
00101 XXX Pin 13
00011 XXX Pin 15
00111 - - - Not used

00XXX 000 Pin 5
00XXX 100 Pin 8
00XXX 010 Pin 3
00XXX 110 Pin 20
00XXX 001 Pin 6
00XXX 101 Pin 10
00XXX 011 Pin 1
00XXX 111 Pin 11

DATA

LSB

Selected Output

Output is selected by

address bits

Selected Input

Input is selected by

data bits

Example :00100101 connects Pin 10 (input) to Pin 14 (output) (equals25 in hexadecimal)
Adressbyte (1st byte of transmission)

6415C-04.TBL

86 1000 0110 When pin PROG is connected to ground
06 0000 0110 When pin PROG is connected to V

IN / OUT PIN CONFIGURATION
Figure2 : Input Configuration

0.36 V

CC

Pins 1-3-5-6

8-10-11-20

6times

CC

6415C-05.TBL

Figure3 : OutputConfiguration

V

V

CC

14k

Ω

x3

7k

Ω

11k

Ω

6415C-03.EPS

8 NPN transistors

Output

CC

Allvideo
outputs
Pins 13-14-15
16-17-18

6415C-04.EPS

5/10

TEA6415C

IN / OUT PIN CONFIGURATION (continued)
Figure4 : Bus I/OConfiguration

V

CC

Pins

2-4-7

Ω

20k

Ω

150

*

ACK

V

REF

to I2L
part

*For Pin 2

(DATA)only

USE WITH AN OTHER TEA6415C

The programmationinput (PROG) permitstooper­ate with two TEA6415C in parallel and to select
them independantly through the I

2

C-BUS without

Figure6

Figure5 : VCCPin Configuration

V

CC

A

µ

250

20kΩ9150Ω

6415C-05.EPS

modifying the adress byte. Consequently, the
switch capabilitiesare doubled orIC1 and IC2 can
be cascaded.

6415C-06.EPS

µP

logical ”0”

Video

Inputs

logical ”1”

Video

Inputs

PROG

IC1

Video
Outputs

PROG

IC2

Video
Outputs

6415C-07.EPS

6/10

TYPICALAPPLICATION

MAC

Ω

75

22µF

Ω

100k

TEA6415C

100k

Ω

75

220nF

11

12

10

100µF

9

220nF

Ω

CBVS

10

Ω

VCC10V

CVBS OUTPUT

CVBS OUTPUT

CVBS OUTPUT

CVBS OUTPUT

CVBS OUTPUT

CVBS OUTPUT

10k

10k

10k

10k

10k

10k

13

Ω

14

Ω

T

E

15

Ω

A

6
4

16

Ω

1
5

8

220nF

7

Ω

22µF

100k

6

Ω

100k

220nF

5

75

Ω

75

Ω

75

Ω

CBVS

PROG (BUS)

MAC

CVBS

C

17

Ω

18

Ω

4

220nF

3

CK (BUS)

CVBS

75

Ω

19

220nF

20

75

Ω

CROSSTALKIMPROVEMENT

1 -When anyinputisnot used,itmust bebypassed
to ground througha 220nF capacitor.

2

220nF

1

DA (BUS)

CVBSCVBS

75

Ω

2 - An important improvement can be achieved
considering the input crosstalk by means of the
application(see technicalnote).

7/10

6415C-08.EPS

TEA6415C

OTHERAPPLICATION DIAGRAMEXAMPLE

CVBS1

CVBS2

CVBS3

Yext

V

CC

/2

CC

V

BUS

DECODER

Yint

Ce xt

Cint

Y+C

V

CC

/2

CC

V

Y, C

ADDER

Y, C

SEPARATOR

Yout1 C out1

T
E

A

6
4
1
5

C

Yout2 Cout2 CVBSout2

CVBSout1

6415C-09.EPS

8/10

PACKAGEMECHANICALDATA

20 PINS – PLASTICDIP

Dimensions

Min. Typ. Max. Min. Typ. Max.

a1 0.254 0.010

B 1.39 1.65 0.055 0.065

b 0.45 0.018

b1 0.25 0.010

D 25.4 1.000
E 8.5 0.335

e 2.54 0.100

e3 22.86 0.900

F 7.1 0.280

I 3.93 0.155

L 3.3 0.130

Z 1.34 0.053

Millimeters Inches

TEA6415C

PM-DIP20.EPS

DIP20.TBL

9/10

TEA6415C

PACKAGEMECHANICALDATA

20 PINS – PLASTICMICROPACKAGE(SO)

PM-SO20.EPS

Dimensions

Min. Typ. Max. Min. Typ. Max.

Millimeters Inches

A 2.65 0.104
a1 0.1 0.3 0.004 0.012
a2 2.45 0.096

b 0.35 0.49 0.014 0.019

b1 0.23 0.32 0.009 0.013

C 0.5 0.020
c1 45

o

(typ.)
D 12.6 13.0 0.496 0.512
E 10 10.65 0.394 0.419

e 1.27 0.050

e3 11.43 0.450

F 7.4 7.6 0.291 0.299

L 0.5 1.27 0.020 0.050

M 0.75 0.030

S8

Information furnished is believed to be accurate and reliable. However,SGS-THOMSON Microelectronics assumes no responsibility
for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result
from its use. No licence is grantedby implication or otherwise under anypatentor patent rights of SGS-THOMSON Microelectronics.
Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied.SGS-THOMSON Microelectronics products are not authorized for use as critical components in life
support devices or systems without express written approval of SGS-THOMSON Microelectronics.

 1996 SGS-THOMSON Microelectronics - All RightsReserved

Purchase of I

2

I

C Patent. Rights to use these components in a I2C system, is granted provided that the system conformsto

Australia - Brazil - China - France - Germany- Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco

The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

2

C Components of SGS-THOMSON Microelectronics, conveys alicense under the Philips

2

the I

C Standard Specifications as defined by Philips.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

o

(Max.)

SO20.TBL

10/10