Datasheet S6A0070, S6A1070 Datasheet (Samsung)

80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
June. 2000.
Ver. 0.0
S6A0070
Contents in this document are subject to change without notice. No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
2
INTRODUCTION
The S6A0070 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology. It is capable of displaying 1 or 2 lines with the 5 × 7 format or 1 line with the 5 × 10 dots format.
The mirror type of S6A0070: S6A1070
FUNCTION
Character type dot matrix LCD driver & controller
Internal driver: 16 common and 80 segment signal output
Easy Interface with a 4-bit or 8-bit MPU
Display character pattern: 5 × 7 dots format (192 kinds), 5 × 10 dots format (32 kinds)
The special character pattern is directly programmable by the Character Generator RAM.
A customer character pattern is programmable by mask option.
It can drive a maximum 80 characters by using the S6A0065 or S6A2067 externally.
Various instruction functions
Built-in automatic power on reset
Driving method is A-type (line inversion)
FEATURES
Internal Memory
- Character Generator ROM: 8320bits (192 cha. X 5 x 7 dots) & (32 cha. X 5 x 10 dots)
- Character Generator RAM: 64 x 8 bits (8 cha. X 5 x 7 dots)
- Display Data RAM: 80 × 8 bits for 80 digits (80 characters max.)
Power Supply Voltage: 2.7 to 5.5 V (VDD)
LCD Driving Voltage: 3.0 to 10.0 V (VDD - V5)
Supply Voltage for display: 0 to -5V (V5)
Programmable duty cycle: 1/8 duty, 1/11 duty or 1/16
Internal oscillator with an external resistor
Bare die or bumped chip available
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
3
BLOCK DIAGRAM
VDD
GND
V1 V2
Parallel/Serial
Data Conversion Circuit
Busy
Flag
Character Generator
ROM
(CGROM)
8320 bits
Character Generator
RAM
(CGRAM)
512 bits
Cursor & Blink
Controller
Circuit
55
Input/
Output
Buffer
Data
Register
(DR)
Instruction
Register
(IR)
Instruction
Decoder
(ID)
Address
Counter (AC)
Display
Data RAM
(DDRAM)
640 bits
Timing
Generator
Circuit
16-bit
Shift
Register
16-bit
Common
Driver
80-bit
Shift
Register
80-bit Latch
Circuit
Seg­ment
Driver
R/W
RS
E
DB0-DB3
DB4-DB7
OSC1 OSC2
CLK1 CLK2 M
D
SEG1­SEG80
COM1­COM16
8
8
8
8
7
8
7
8
8
7
7
16
80
4
4
V3 V4 V5
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
4
PIN CONFIGURATION
S6A0070
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
NC SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10
SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1
VSS OSC2 OSC1
NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
39404142434445464748495051525354555657585960616263
64
NCNCNC
V1V2V3V4V5
CLK1
CLK2
M
D
RS
R/W
E
VDD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
TEST
NC
102 101 100
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 NC
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
5
PAD CONFIGURATION
1) Normal Type PAD Configuration
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
S6A0070
Y
X
(0,0)
CHIP SIZE: 3920 x 5070 PAD SIZE: 100 x 100 UNIT: µm
424344454647484950515253545556575859606162
63
V1V2V3V4V5
CLK1
CLK2
M
D
RS
R/W
E
VDD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
TEST
SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1
2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66
SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79 SEG80 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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2) Mirror Type PAD Configuration
SEG59
SEG58
SEG57
SEG56
SEG55
SEG54
SEG53
SEG52
SEG51
SEG50
SEG49
SEG48
SEG47
SEG46
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
SEG60 SEG61 SEG62 SEG63 SEG64 SEG65 SEG66 SEG67 SEG68 SEG69 SEG70 SEG71 SEG72 SEG73 SEG74 SEG75 SEG76 SEG77 SEG78 SEG79
SEG80 COM16 COM15 COM14 COM13 COM12 COM11 COM10
COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1
2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67
SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1
S6A1070
414243444546474849505152535455565758596061
62
TEST
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
VDD
E
R/W
RS
D
M
CLK2
CLK1
V5V4V3V2V1
Y
X
(0,0)
CHIP SIZE: 3920 x 5070 PAD SIZE: 100 x 100 UNIT: mm
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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PAD CENTER COORDINATES
1) Normal Type PAD Coordinate (S6A0070)
COORDINATE COORDINATE COORDINATEPAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
1 NC 44 V3 -905 -2369 87 SEG75 1794 294 2 SEG33 -1794 2169 45 V4 -780 -2369 88 SEG74 1794 419 3 SEG32 -1794 2044 46 V5 -655 -2369 89 SEG73 1794 544 4 SEG31 -1794 1919 47 CLK1 -530 -2369 90 SEG72 1794 669 5 SEG30 -1794 1794 48 CLK2 -405 -2369 91 SEG71 1794 794 6 SEG29 -1794 1669 49 M -280 -2369 92 SEG70 1794 919 7 SEG28 -1794 1544 50 D -155 -2369 93 SEG69 1794 1044 8 SEG27 -1794 1419 51 RS -30 -2369 94 SEG68 1794 1169
9 SEG26 -1794 1294 52 R/W 95 -2369 95 SEG67 1794 1294 10 SEG25 -1794 1169 53 E 220 -2369 96 SEG66 1794 1419 11 SEG24 -1794 1044 54 VDD 345 -2369 97 SEG65 1794 1544 12 SEG23 -1794 919 55 DB0 470 -2369 98 SEG64 1794 1669 13 SEG22 -1794 794 56 DB1 595 -2369 99 SEG63 1794 1794 14 SEG21 -1794 669 57 DB2 720 -2369 100 SEG62 1794 1919 15 SEG20 -1794 544 58 DB3 845 -2369 101 SEG61 1794 2044 16 SEG19 -1794 419 59 DB4 970 -2369 102 SEG60 1794 2169 17 SEG18 -1794 294 60 DB5 1095 -2369 103 SEG59 1563 2369 18 SEG17 -1794 169 61 DB6 1220 -2369 104 SEG58 1438 2369 19 SEG16 -1794 44 62 DB7 1345 -2369 105 SEG57 1313 2369 20 SEG15 -1794 -81 63 TEST 1470 -2369 106 SEG56 1188 2369 21 SEG14 -1794 -206 64 NC 107 SEG55 1063 2369 22 SEG13 -1794 -331 65 NC 108 SEG54 938 2369 23 SEG12 -1794 -456 66 COM1 1794 -2331 109 SEG53 813 2369 24 SEG11 -1794 -581 67 COM2 1794 -2206 110 SEG52 688 2369 25 SEG10 -1794 -706 68 COM3 1794 -2081 111 SEG51 563 2369 26 SEG9 -1794 -831 69 COM4 1794 -1956 112 SEG50 438 2369 27 SEG8 -1794 -956 70 COM5 1794 -1831 113 SEG49 313 2369 28 SEG7 -1794 -1081 71 COM6 1794 -1706 114 SEG48 188 2369 29 SEG6 -1794 -1206 72 COM7 1794 -1581 115 SEG47 63 2369 30 SEG5 -1794 -1331 73 COM8 1794 -1456 116 SEG46 -62 2369
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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Normal Type Pad Coordinate (Continued)
COORDINATE COORDINATE COORDINATEPAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
31 SEG4 -1794 -1456 74 COM9 1794 -1331 117 SEG45 -187 2369 32 SEG3 -1794 -1581 75 COM10 1794 -1206 118 SEG44 -312 2369 33 SEG2 -1794 -1706 76 COM11 1794 -1081 119 SEG43 -437 2369 34 SEG1 -1794 -1831 77 COM12 1794 -956 120 SEG42 -562 2369 35 VSS -1794 -1956 78 COM13 1794 -831 121 SEG41 -687 2369 36 OSC2 -1794 -2106 79 COM14 1794 -706 122 SEG40 -812 2369 37 OSC1 -1794 -2231 80 COM15 1794 -581 123 SEG39 -937 2369 38 NC 81 COM16 1794 -456 124 SEG38 -1062 2369 39 NC 82 SEG80 1794 -331 125 SEG37 -1187 2369 40 NC 83 SEG79 1794 -206 126 SEG36 -1312 2369 41 NC 84 SEG78 1794 -81 127 SEG35 -1437 2369 42 V1 -1155 -2369 85 SEG77 1794 44 128 SEG34 -1562 2369 43 V2 -1030 -2369 86 SEG76 1794 169
* “S6A0070” Marking: easy to find the PAD No. 98.
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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2) Mirror Type PAD Coordinate (S6A1070)
COORDINATE COORDINATE COORDINATEPAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
1 NC 44 DB5 -1095 -2369 87 SEG18 1794 294
2 SEG60 -1794 2169 45 DB4 -970 -2369 88 SEG19 1794 419
3 SEG61 -1794 2044 46 DB3 -845 -2369 89 SEG20 1794 544
4 SEG62 -1794 1919 47 DB2 -720 -2369 90 SEG21 1794 669
5 SEG63 -1794 1794 48 DB1 -595 -2369 91 SEG22 1794 794
6 SEG64 -1794 1669 49 DB0 -470 -2369 92 SEG23 1794 919
7 SEG65 -1794 1544 50 VDD -345 -2369 93 SEG24 1794 1044
8 SEG66 -1794 1419 51 E -220 -2369 94 SEG25 1794 1169
9 SEG67 -1794 1294 52 RW -95 -2369 95 SEG26 1794 1294 10 SEG68 -1794 1169 53 RS 30 -2369 96 SEG27 1794 1419 11 SEG69 -1794 1044 54 D 155 -2369 97 SEG28 1794 1544 12 SEG70 -1794 919 55 M 280 -2369 98 SEG29 1794 1669 13 SEG71 -1794 794 56 CLK2 405 -2369 99 SEG30 1794 1794 14 SEG72 -1794 669 57 CLK1 530 -2369 100 SEG31 1794 1919 15 SEG73 -1794 544 58 V5 655 -2369 101 SEG32 1794 2044 16 SEG74 -1794 419 59 V4 780 -2369 102 SEG33 1794 2169 17 SEG75 -1794 294 60 V3 905 -2369 103 SEG34 1562 2369 18 SEG76 -1794 169 61 V2 1030 -2369 104 SEG35 1437 2369 19 SEG77 -1794 44 62 V1 1155 -2369 105 SEG36 1312 2369 20 SEG78 -1794 -81 63 NC 106 SEG37 1187 2369 21 SEG79 -1794 -206 64 NC 107 SEG38 1062 2369 22 SEG80 -1794 -331 65 NC 108 SEG39 937 2369 23 C16 -1794 -456 66 NC 109 SEG40 812 2369 24 C15 -1794 -581 67 OSC1 1794 -2231 110 SEG41 687 2369 25 C14 -1794 -706 68 PSC2 1794 -2106 111 SEG42 562 2369 26 C13 -1794 -831 69 VSS 1794 -1956 112 SEG43 437 2369 27 C12 -1794 -956 70 SEG1 1794 -1831 113 SEG44 312 2369 28 C11 -1794 -1081 71 SEG2 1794 -1706 114 SEG45 187 2369 29 C10 -1794 -1206 72 SEG3 1794 -1581 115 SEG46 62 2369 30 C9 -1794 -1331 73 SEG4 1794 -1456 116 SEG47 -63 2369 31 C8 -1794 -1456 74 SEG5 1794 -1331 117 SEG48 -188 2369 32 C7 -1794 -1581 75 SEG6 1794 -1206 118 SEG49 -313 2369 33 C6 -1794 -1706 76 SEG7 1794 -1081 119 SEG50 -438 2369
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
10
Mirror Type Pad Coordinate (Continued)
COORDINATE COORDINATE COORDINATEPAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
PAD
NUM.
PAD
NAME
X Y
34 COM5 -1794 -1831 77 SEG8 1794 -956 120 SEG51 -563 2369 35 COM4 -1794 -1956 78 SEG9 1794 -831 121 SEG52 -688 2369 36 COM3 -1794 -2081 79 SEG10 1794 -706 122 SEG53 -813 2369 37 COM2 -1794 -2206 80 SEG11 1794 -581 123 SEG54 -938 2369 38 COM1 -1794 -2331 81 SEG12 1794 -456 124 SEG55 -1063 2369 39 NC 82 SEG13 1794 -331 125 SEG56 -1188 2369 40 NC 83 SEG14 1794 -206 126 SEG57 -1313 2369 41 TEST -1470 -2369 84 SEG15 1794 -81 127 SEG58 -1438 2369 42 DB7 -1345 -2369 85 SEG16 1794 44 128 SEG59 -1563 2369 43 DB6 -1220 -2369 86 SEG17 1794 169
* “S6A1070” Marking: easy to find the PAD No. 12.
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
11
PIN DESCRIPTION
Pad (No)
(normal/mirror)
I/O Name Description Interface
VDD(54/50)
for logical circuit (+3V, +5V)
VSS(35, 69)
Power supply
0V (GND)
V1-V5
(42-46/62-58)
­Power supply
Bias voltage level for LCD driving
Power supply
SEG1-SEG80 (34-2, 128-82/
70-128, 2-28
Output Segment output Segment signal output for LCD driving LCD
COM1-COM16
(66-81/38-23)
Output Common output Common signal output for LCD driving LCD
OSC1, OSC2
(37, 36/67, 68)
Input
(OSC1)
Output
(OSC2)
Oscillator
When using internal oscillator, connect external Rf resistor. If external clock is used, connect it to OSC1.
Extension
register/
oscillator
(OSC1)
CLK1, CLK2
(47, 48/57, 56)
Output
Extension driver latch (CLK1)/Shift (CLK2) clock
Each outputs extension driver latch clock and extension driver shift clock
Extension
driver
M (49/55) Output
Alternated signal for LCD driver output
Outputs the alternating signal to convert LCD driver waveform to AC.
Extension
driver
D (50/54) Output Display data interface
Output extension driver data (the 41st dot's data)
Extension
driver
RS (51/53) Input Register select
Used s register selection input. When RS = 1, Data register is selected. When RS = 0, Instruction register is selected
MPU
RW (52/52) Input Read/Write
Used as read/write selection input. When RW = 1, read operation. When RW = 0, write operation.
MPU
E (53/51) Input Read/Write Enable Used as read. Write enable signal. MPU
DB0-DB3
(55-58/49-46)
Input/
Output
Data bus 0-3
When 8-bit bus mode, used as low order bidirectional data bus. During 4-bit bus mode open these pins.
MPU
DB4-DB7
(59-62/45-42)
Input/
Output
Data bus 4-7
When 8-bit bus mode, used as high order bidirectional data bus. In case of 4­bit bus mode, used as both high and low order. DB7 used for Busy Flag output.
MPU
TEST(63/41) Input Test pin This pin must be fixed to VDD or open. -
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
12
FUNCTION DESCRIPTION
System Interface
This chip has both kinds of interface type with MPU: 4-bit bus and 8-bits bus. 4-bit bus and 8-bit bus are selected by the DL bit in the instruction register.
During read or write operation, two 8-bit registers are used. One is the data register (DR), and the other is the instruction register (IR).
The data register (DR) is used as a temporary data storage place for being written into or read from DRAM/CGRAM . Target RAM is selected by RAM address setting instruction. Each internal operation, reading from or writing into RAM, is done automatically. After MPU reads DR data, the data in the next DDRAM/CGRAM address is transferred into DR automatically. Also, after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM automatically.
The instruction register (IR) is used only to store instruction codes transferred from MPU. MPU cannot use it to read instruction data.
To select a register, use RS input pin in 4-bit/8-bit bus mode. Table 1. Various Kinds of Operations to RS and R/W bits.
RS R/W Operation
0 0 Instruction Write operation (MPU writes instruction code into IR) 0 1 Read Busy flag (DB7) and address counter (DB0 - DB7) 1 0 Data Write operation (MPU writes data into DR) 1 1 Data Read operation (MPU reads data into DR)
Busy Flag (BF)
When BF = 1, it indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted. BF can be read, when RS = 0, and R/W = 1. (Read Instruction Operation), through DB7 port. Before executing the next instruction, be sure that BF is not 1.
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
13
Address Counter (AC)
The Address Counter (AC) stores DDRAM/CGRAM addresses, transferred from IR. After writing into (reading from) DDRAM/CGRAM. AC is automatically increased (decreased) by 1. When RS = 0 and R/W = 1, AC can be read through ports DB0 - DB6.
Display Data RAM (DDRAM) DDRAM stores display data of maximum 80 x 8 bits (80 characteristics). DDRAM address is set in the address
counter (AC) as a hexadecimal number. (Refer to fig-1).
AC6
MSB LSB
AC5 AC4 AC3 AC2 AC1 AC0
Figure 1. DDRAM Address
1) 1-line Display In the case of a 1-line display, the address range of DDRAM is 00H - 04H. An Extension driver will be used.
Figure 2 shows the example when a 40-segment extension driver is added.
2) 2-line Display In the case of a 2-line display, the address range of DDRAM is 00H - 27H and 40H - 67H. An Extension driver will
be used. Figure 3 shows the example a 40 segment extension driver is added.
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
14
00
1
COM1 COM8
01 02 03 04 05 06 07
2 3 4 5 6 7 8
SEG1 S6A0070
08909 0A 0B 0C 0D 0E 0F
10 11 12 13 14 15 16
101711 12 13 14 15 16 17
18 19 20 21 22 23 24
SEG80 SEG1 Extension driver (40 SEG) SEG40
08
1
COM1 COM8
01 02 03 04 05 06 07
2 3 4 5 6 7 8
SEG1 S6A0070
10
9
09 0A 0B 0C 0D 0E 0F
10 11 12 13 14 15 16
18
17 11 12 13 14 15 16 17
18 19 20 21 22 23 24
SEG80 SEG1 Extension driver (40 SEG) SEG40
00
1
COM1 COM8
01 02 03 04 05 06 07
2 3 4 5 6 7 8
SEG1 S6A0070
08909 0A 0B 0C 0D 0E 0F
10 11 12 13 14 15 16
101711 12 13 14 15 16
18 19 20 21 22 23 24
SEG80 SEG1 Extension driver (40 SEG) SEG40
(After Shift Left)
(After Shift Right)
4F
Figure 2. 1-line x 24ch. Display with 40 SEG. Extension Driver
00
1
COM1 COM8
01 02 03 04 05 06 07
2 3 4 5 6 7 8089
09 0A 0B 0C 0D 0E 0F
10 11 12 13 14 15 16
101711 12 13 14 15 16 17
18 19 20 21 22 23 24
1
COM1 COM8
01 02 03 04 05 06 07
2 3 4 5 6 7 8089
09 0A 0B 0C 0D 0E 0F
10 11 12 13 14 15 16
10
17 11 12 13 14 15 16 17
18 19 20 21 22 23 24
SEG1 S6A0070 SEG80 SEG1 Extension driver (40 SEG) SEG40
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57
COM9
COM16
SEG1 S6A0070 SEG80 SEG1 Extension driver (40 SEG) SEG40
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57
COM9
COM16
(After Shift Left)
00
1
COM1 COM8
01 02 03 04 05 06 07
2 3 4 5 6 7 8089
09 0A 0B 0C 0D 0E 0F
10 11 12 13 14 15 16
101711 12 13 14 15 16
18 19 20 21 22 23 24
SEG1 S6A0070 SEG80 SEG1 Extension driver (40 SEG) SEG40
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56
COM9
COM16
(After Shift Right)
18
58
27
67
Figure 3. 2-line x 24ch. Display with 40 SEG. Extension Driver
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
15
CGROM (Characteristic Generator ROM)
CGROM has a 5 x 7 dots 192 character pattern, and a 5 x 7 10 dots 32 character pattern
CGRAM (Character Generator RAM)
CDRAM has up to 5 x 8 dots 8 characters. By writing font data to CGRAM, user defined characters can be used (Refer to table 3).
Timing Generation Circuit
Timing generation circuit generates clock signals for the internal operations.
LCD Driver Circuit
LCD Driver circuit has 16 common and 80 segment signals for LCD driving. Data from CGRAM/CGROM is transferred to an 80-bit segment latch serially, and then stored to an 80-bit shift latch. When each com is selected by a 16-bit common register, segment data is also output through the segment driver from and 80-bit segment latch. In case of a 1-line display mode, COM - COM8 have 1/8 duty or COM1-COM11 have a 1/11 duty. In a 2­line display mode, COM1 - COM16 have a 1/16 duty ratio.
Cursor/Blink Control Circuit
It controls cursor/blink ON/OFF at cursor position.
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
16
Table 3. Relationship Between Character Code (DDRAM) and Character Pattern (CGROM)
01 10 0
1 1 10
D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0
Character Code (DDRAM data) CGRAM Address CGRAM Data
Pattern
number
0 0 x0 0 0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0
0
1 1 1 1
1 1 1 1 1 1 1 1
. . . . .
. . . . .
0 0 0 x0 1 1 1 0 0 0 0 0 0
0 0 0 0 0
0 0 0
0
1 1 1 1
1 1 1 1 1 1 1 1
x x x 0 0
1 1 1 1 1 1 0
1 1 1 1
1
1
1 1 1
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0
Pattern 1
x x x
1 1 1 1 1 1 0
1 1 1 1
1
1
1 1 1
0 0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
. . . . .
. . . . .
. . . . .
. . . . .
Pattern 8
. . . . .
. . . . .
. . . . .
. . . . .
“x”: Don’t care.
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
17
INSTRUCTION DESCRIPTION
OUTLINE
To overcome the speed difference between internal clock of S6A0070 and MPU clock, S6A0070 performs internal operation by storing control information to IR or DR. The internal operation is determined according to the signal from MPU, composed of read/write and data bus. (refer to Table 5) Instruction can be divided largely four kinds,
(1) S6A0070 function set instructions (set display methods, set data length, etc.)
(2) Address set instructions to internal RAM (3) Data transfer instructions with internal RAM (4) Others The address of internal RAM is automatically increased or decreased by 1.
NOTE: During internal operation, Busy Flag (DB7) is read "1". Busy Flag check must be precede by the next instruction.
When you make an MPU program with checking the Busy Flag (DB7) is made, it must be necessary 1/2 fosc for executing the next instruction by falling E signal after the Busy Flag (DB7) goes to "0".
Contents
1) Clear Display
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 0 1
Clear all the display data by writing "20H" (space code) to all DDRAM address, and set DDRAM address to "00H" in the AC (address counter). Return cursor to the original status, namely, bring the cursor to the left edge on first line of the display. Make entry mode increment (I/D = "1").
2) Return Home
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 0 1 x
Return Home is cursor return home instruction. Set DDRAM address to "00H" in the address counter. Return cursor to its original site and return display to its original status, if shifted. Contents of DDRAM does not change.
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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3) Entry Mode Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 1 I/D SH
Set the moving direction of cursor and display. I/D : Increment / decrement of DDRAM address (cursor or blink) When I/D = "1", cursor/blink moves to right and DDRAM address is increased by 1. When I/D = "0", cursor/blink moves to left and DDRAM address is decreased by 1. * CGRAM operates the same as DDRAM, when reading from or writing to CGRAM.
SH: Shift of Entire Display
When DDRAM read (CGRAM read/write) operation or SH = "0", shift of entire display is not performed. If SH = "1" and DDRAM write operation, shift of entire display is performed according to I/D value (I/D = "1" : shift left, I/D = "0" : shift right).
4) Display ON / OFF Control
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 1 D C B
Control display/cursor/blink ON/OFF 1 bit register.
D : Display ON/OFF Control Bit
When D = "1", entire display is turned on. When D = "0", display is turned off, but display data remained in DDRAM.
C : Cursor ON/OFF Control Bit
When C = "1", cursor is turned on. When C = "0", cursor is disappeared in current display, but I/D register remains its data.
B : Cursor Blink ON/OFF Control Bit
When B = "1", cursor blink is on, which performs alternate between all the "1" data and display character at the cursor position. When B = "0", blink is off.
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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5) Cursor or Display Shift
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 1 S/C R/L x x
Without waiting or reading the display data, shift right/left cursor position or display. This instruction is used to correct or search display data. (Refer to table 4) During 2-line mode display, cursor moves to the 2nd line after the 40th digit of the 1st line. Note that display shift is performed simultaneously in all the lines. When displayed data is shifted repeatedly, each line is shifted individually. When display shift is performed, the contents of the address counter are not changed.
Table 4. Shift Patterns According to S/C and R/L Bits
S/C R/L Operation
0 0 Shift cursor to the left, AC is decreased by 1 0 1 Shift cursor to the right, AC is increased by 1 1 0 Shift all the display to the left, cursor moves according to the display 1 1 Shift all the display to the right, cursor moves according to the display
6) Function Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 DL N F x x
DL : Interface data length control bit
When DL = "1", it means 8-bit bus mode with MPU. When DL = "0", it means 4-bit bus mode with MPU. So to speak, DL is a signal to select 8-bit or 4-bit bus mode. When 4-bit bus mode, it needs to transfer 4-bit data in two times.
N : Display line number control bit
When N = "0", it means 1-line display mode. When N = "1", 2-line display mode is set.
F : Display font type control bit
When F = "0", 5 × 7 dots format display mode When F = "1", 5 × 10 dots format display mode.
7) Set CGRAM Address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0
Set CGRAM address to AC. This instruction makes CGRAM data available from MPU.
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
20
8) Set DDRAM Address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set DDRAM address to AC. This instruction makes DDRAM data available from MPU. When 1-line display mode (N = 0), DDRAM address is from "00H" to "4FH". In 2-line display mode (N = 1), DDRAM address in the 1st line is from "00H" to "27H", and DDRAM address in the 2nd line is from "40H" to "67H".
9) Read Busy Flag & Address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
This instruction shows whether S6A0070 is in internal operation or not. If the resultant BF is "1", it means the internal operation is in progress and you have to wait until BF to be Low, and then the next instruction can be performed. In this instruction you can read also the value of address counter.
10) Write Data to RAM
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 D7 D6 D5 D4 D3 D2 D1 D0
Write binary 8-bit data to DDRAM/CGRAM. The selection of RAM from DDRAM, and CGRAM, is set by the previous address set instruction: DDRAM address set, CGRAM address set). RAM set instruction can also determine the AC direction to RAM. After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
11) Read Data from RAM
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 1 D7 D6 D5 D4 D3 D2 D1 D0
Read binary 8-bit data from DDRAM/CGRAM. The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM is not performed before this instruction, the data that is read first is invalid, because the direction of AC is not determined. If you read RAM data several times without RAM address set instruction before read operation, you can get correct RAM data from the second, but the first data would be incorrect, because there is no time margin to transfer RAM data. In case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address set instruction; it also transfer RAM data to output data register. After read operation address counter is automatically increased/decreased by 1 according to the entry mode. After CGRAM read operation, display shift may not be executed correctly.
NOTE: In case of RAM write operation, after this AC is increased/decreased by 1 like read operation. In this time,
AC indicates the next address position, but you can read only the previous data by read instruction.
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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Table 5. Instruction Table
Instruction Code
Instruction
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description
Instruction Code
Execution
Time
(fsoc=270kHz)
Clear Display 0 0 0 0 0 0 0 0 0 1
Write "20H" to DDRAM. and set DDRAM address to "00H" from AC.
1.53ms
Return Home 0 0 0 0 0 0 0 0 1 X
Set DDRAM address to "00H" from AC and return cursor to its original position if shifted.
1.53ms
Entry Mode
Set
0 0 0 0 0 0 0 1 I/D SH
Assign cursor moving direction and enable the shift of entire display
39µs
Display
ON/OFF
Control
0 0 0 0 0 0 1 D C B
Set display(D), cursor(C), and blinking of cursor(B) on/off control bit.
39µs
Cursor or
Display Shift
0 0 0 0 0 1 S/C R/L X X
Set cursor moving and display shift control bit, and the direction, without changing DDRAM data.
39µs
Function Set 0 0 0 0 1 DL N F X X
Set interface data length (DL : 4­bit/8-bit), numbers of display line (N : 1-line/2-line), display font type(F :0 ..)
39µs
Set CGRAM
Address
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0
Set CGRAM address in address counter.
39µs
Set DDRAM
Address
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set DDRAM address in address counter.
39µs
Read Busy
Flag and
Address
0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
Whether during internal operation or not can be known by reading BF. The contents of address counter can also be read.
0µs
Write Data to
RAM
1 0 D7 D6 D5 D4 D3 D2 D1 D0
Write data into internal RAM (DDRAM/CGRAM).
43µs
Read Data
from RAM
1 1 D7 D6 D5 D4 D3 D2 D1 D0
Read data from internal RAM (DDRAM/CGRAM).
43µs
NOTE: When an MPU program with checking the Busy Flag (DB7) is made, it must be necessary 1/2 fosc is necessary for
executing the next instruction by the falling edge of the 'E' signal after the Busy Flag (DB7) goes to "0".
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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INTERFACE WITH MPU
1) Interface with 8-bit MPU
When interfacing data length are 8-bit, transfer is performed all at once through 8 ports, from DB0 to DB7. Example of timing sequence is shown below.
RS
R/W
E
Internal
signal
DB7
Internal Operation
DATA
Busy Busy
No
Busy
DATA
InstructionBusy Flag CheckInstruction Busy Flag CheckBusy Flag Check
Figure 4. Example of 8-bit Bus Mode Timing Diagram
2) Interface with 4-bit MPU
When interfacing data length is 4-bit, only 4 ports, from DB4 to DB7, are used as data bus. At first higher 4-bit (in case of 8-bit bus mode, the contents of DB4 - DB7) are transferred, and then lower 4-bit (in case of 8-bit bus mode, the contents of DB0 - DB3) are transferred. So transfer is performed by two parts. Busy Flag outputs "1" after the second transfer are ended. Example of timing sequence is shown below.
RS
R/W
E
Internal
signal
DB7
Internal Operation
D7
Busy
AC3
No
Busy
InstructionBusy Flag CheckInstruction Busy Flag Check
D3 AC3 D7 D3
Figure 5. Example of 4-bit Bus Mode Timing Diagram
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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APPLICATION INFORMATION ACCORDING TO LCD PANEL
1) LCD Panel: 16 character ×× 1-line character format: 5 ×× 7 dots + 1 cursor line (1/4 bias, 1/8 duty)
S6A0070
COM1
. . .
COM7 COM8
SEG1
. . .
SEG10 SEG78
SEG79 SEG80
..
2) LCD Panel: 16 character ×× 1-line character format; 5 ×× 10 dots + 1 cursor line (1/4 bias, 1/11 duty)
S6A0070
COM1
. . .
COM10 COM11
SEG1
. . .
SEG10 SEG78
SEG79 SEG80
..
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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3) LCD Panel: 16 character ×× 2-line character format; 5 ×× 7 dots + 1 cursor line (1/5 bias, 1/16 duty)
S6A0070
COM1
. .
. COM7 COM8
SEG1
.
.
.
SEG10
SEG80
..
COM9
.
.
.
COM15 COM16
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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4) LCD Panel: 32 character ×× 1-line Character format; 5 ×× 7 dots + 1 cursor line (1/5 bias, 1/16 duty)
S6A0070
COM1
. . .
COM7 COM8
SEG1
. . .
SEG10
SEG80
..
COM9
. . .
COM16
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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5) LCD Panel: 4 character ×× 2-line character format: 5 ×× 7 dots + 1 cursor line (1/4 bias, 1/8 duty)
S6A0070
COM1
. .
. COM7 COM8
SEG41
.
.
.
SEG50
SEG80
..
SEG40
.
.
.
..
SEG10
SEG1
80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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APPLICATION CIRCUIT
S6A0070
C1-C16
LCD Panel
S1-S80
D OSC1 OSC2
V
SS
M CLK1 CLK2
VDD
V1 V2 V3 V4 V5
DB0-DB7
SC1-S4C0
DL1 FCS SHL1 SHL2 V
SS
V
DD
V6V5V4V3V2V1V
EE
DL2 DL1
DR2
CL1 CL2
M
S6A0065
SC1-S4C0
DL1 FCS SHL1 SHL2 V
SS
V
DD
V6V5V4V3V2V1V
EE
DL2 DL1
DR2
CL1 CL2
M
S6A0065
SC1-S4C0
DL1 FCS SHL1 SHL2 V
SS
V
DD
V6V5V4V3V2V1V
EE
DL2 DL1
DR2
CL1 CL2
M
S6A0065
V1 V2 V3 V4 V5
GND or
Other voltage
V
LCD
(1/5 bias)
To MPU
V
DD
NOTE: When S6A0065 is externally connected to the S6A0070, you can increase the number of display digits up to 80
characteristics.
S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
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BIAS VOLTAGE DIVIDE CIRCUIT
1) 1/4 bias, 1/8 or 1/11 duty
VDD V1 V2 V3 V4 V5
S6A0070
VDD
R R
R R
GND or
Other voltage
2) 1/5 bias, 1/16 duty
VDD V1 V2 V3 V4 V5
S6A0070
VDD
R R
R R
GND or
Other voltage
R
INITIALIZING
When the power is turned on, S6A0070 is initialized automatically by power on reset circuit. During the initialization, the following instructions are executed, and BF(Busy Flag) is kept "High"(busy state) to the end of initialization.
(1) Display Clear instruction: Write "20H" to all DDRAM (2) Set Functions instruction
DL = 1 : 8-bit bus mode N = 0 : 1-line display mode F = 0 : 5 X 7 font type
(3) Control Display ON/OFF instruction
D = 0 : Display OFF C = 0 : Cursor OFF B = 0 : Blink OFF
(4) Set Entry Mode instruction
I/D = 1 : Increment by 1 SH = 0 : No entire display shift
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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FRAME FREQUENCY
1) 1/8 Duty Cycle A) A-Type Waveform
... ...
... ... 87321874321
1-line selection period
VDD
V1
V4 V5
..
COM1
Item Clock/Frequency
Line Selection Period 400 clocks
Frame Frequency 84.4Hz
* f
OSC
= 270kHz (1 clock = 3.7µs)
2) 1/11 Duty Cycle A) A-type Waveform
... ...
... ... 111032111104321
1-line selection period
VDD
V1
V4 V5
..
COM1
Item Clock/Frequency
Line Selection Period 400 clocks
Frame Frequency 61.4Hz
* f
OSC
= 270kHz (1 clock = 3.7µs)
S6A0070 16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
30
3) 1/16 Duty Cycle A) A-type Waveform
... ...
... ... 161532116154321
1-line selection period
VDD
V1
V4 V5
..
COM1
Item Clock/Frequency
Line Selection Period 200 clocks
Frame Frequency 84.4Hz
* f
OSC
= 270kHz (1 clock = 3.7µs)
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
31
INITIALIZING BY INSTRUCTION
1) 8-bit Interface Mode
Power On
Wait for more than 20ms after VDD rises to 4.5 V. Wait for more than 30ms after VDD rises to 2.7 V.
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Function Set
0 0 0 0 1 1 N F x x
Wait for more than 39 us
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Display ON/OFF Control
0 0 0 0 0 0 1 D C B
Wait for more than 39 us
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Display Clear
0 0 0 0 0 0 0 0 0 1
Wait for more than 1.53 ms
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Entry Mode Set
0 0 0 0 0 0 0 1 I/D SH
Initialization End
F
0 1
5 x 7 dots
5 x 10 dots
D
0 1
Display off Display on
C
0 1
Cursor off Cursor on
B
0 1
Blink off Blink on
I/D
01Decrement mode
Increment mode
SH
01Entire shift off
Entire shift on
Condition: fosc = 270kHz
N
0 1
1-line mode 2-line mode
S6A0070 16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
32
2) 4-bit Interface Mode
Power On
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Function Set
0 0 0 0 1 DL X X X X
Wait for more than 39 us
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Display ON/OFF Control
Wait for more than 39 us
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Display Clear
Wait for more than 1.53 ms
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Entry Mode Set
Initialization End
F
0 1
5 x 7 dots
5 x 10 dots
D
0 1
Display off Display on
C
0 1
Cursor off Cursor on
B
0 1
Blink off Blink on
I/D
01Decrement mode
Increment mode
SH
01Entire shift off
Entire shift on
0 0 0 0 1 0 X X X X 0 0 N F X X X X X X
0 0 0 0 0 0 X X X X 0 0 1 D C B X X X X
0 0 0 0 0 0 X X X X 0 0 0 1 I/D SH X X X X
0 0 0 0 0 0 X X X X 0 0 0 0 0 1 X X X X
Condition: fosc = 270kHz
N
0 1
1-line mode 2-line mode
Wait for more than 20ms after VDD rises to 4.5 V. Wait for more than 30ms after VDD rises to 2.7 V.
DL
0 1
4-bit mode 8-bit mode
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
33
EXAMPLE OF INSTRUCTION AND DISPLAY CORRESPONDENCE
1. Power supply on: Initialized by the internal power on reset circuit RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
LCD DISPLAY
2. Function Set: 8-bit, 2-line, 5 x 7 dot RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 1 1 0 X X
3. Display ON/OFF Control: Display/Cursor on/blink off RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 1 1 1 0
_
4. Entry Mode Set: Increment RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0 0 1 1 0
S_
5. Write Data to DDRAM: Write S RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 0 1 0 1 0 0 1 1
_
6. Write Data to DDRAM: Write A RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 0 1 0 0 0 0 0 1
SA_
7. Write Data to DDRAM: Write M RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 0 1 0 0 1 1 0 1
SAM_
8. Write Data to DDRAM: Write S RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 0 1 0 1 0 0 1 1
SAMS_
S6A0070 16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
34
9. Write Data to DDRAM: Write U RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1
LCD DISPLAY
SAMSU_
0 0 1 0 1 0 1 0 1
10. Write Data to DDRAM: Write N RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
11. Write Data to DDRAM: Write G RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
12. Set DDRAM Address: 40H RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
13. Write Data to DDRAM: Write K RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
14. Write Data to DDRAM: Write S RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
15. Write Data to DDRAM: Write 0 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
16. Write Data to DDRAM: Write 0 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 0 1 0 0 1 1 1 0
1 0 0 1 0 0 0 1 1 1
0 0 1 1 0 0 0 0 0 0
1 0 0 1 0 0 1 0 1 1
1 0 0 1 0 1 0 0 1 1
1 0 0 0 1 1 0 0 0 0
1 0 0 0 1 1 0 0 0 0
SAMSUN_
SAMSUNG_
SAMSUNG _
SAMSUNG K_
SAMSUNG KS_
SAMSUNG KS0_
SAMSUNG KS00_
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
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17. Write Data to DDRAM: Write 7 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1
LCD DISPLAY
SAMSUNG KS007_
0 0 0 1 1 0 1 1 1
18. Write Data to DDRAM: Write 2 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
19. Cursor or Display Shift: Cursor shift left RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
20. Write Data to DDRAM: Write 0 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
21. Entry Mode Set: Entire shift Enable RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
22. Write Data to DDRAM: Write B RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
23. Return Hone RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
24. Clear Display RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
SAMSUNG KS0072_
SAMSUNG KS0072
SAMSUNG KS0070_
SAMSUNG KS0070_
SAMSUNG KS0070B_
SAMSUNG KS0070B
_
1 0 0 0 1 1 0 0 1 0
0 0 0 0 0 1 0 0 x x
1 0 0 0 1 1 0 0 0 0
0 0 0 0 0 0 0 1 1 1
1 0 0 1 0 0 0 0 1 0
0 0 0 0 0 0 0 0 1 x
0 0 0 0 0 0 0 0 0 1
S6A0070 16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
36
MAXIMUM ABSOLUTE LIMIT
Item Symbol Unit Value
Power Supply Voltage
V
DD
V -0.3 to +7.0
LCD Drive Voltage
V
LCD
V
VDD-15 to VDD+0.3
Input Voltage
V
IN
V
-0.3 to VDD+0.3
NOTE: Voltage greater than above may damage the circuit (V
DD
V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5)
Temperature Characteristics
Item Symbol Unit Value
Operating Temperature
T
OPR
°C
- 30 to +85
Storage Temperature
T
STG
°C
- 55 to +125
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
37
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD = 4.5V to 5.5V, Ta = - 30 to + 85°C)
Item Symbol Condition Min Typ Max Unit
Operating Voltage
V
DD
- 4.5 - 5.5 V
I
DD1
ceramic resonator f
OSC
= 250kHz
- 0.7 1.0 mA
Supply Current
I
DD2
Resister oscillation external clock operation f
OSC
= 270kHz
- 0.4 0.6 mA
V
IH1
- 2.2 -
V
DD
V
Input Voltage (1) (except OSC1)
V
IL1
- -0.3 - 0.6 V
V
IH2
-
VDD-1.0
-
V
DD
V
Input Voltage (2) (except OSC1)
V
IL2
- -0.2 - 1.0 V
V
OH1IOH
= -0.205mA
2.4 - - V
Output Voltage (1) (DB0 to DB7)
V
OL1
IOL = 1.2mA
- - 0.4 V
V
OH2
IO = -40µA
0.9V
DD
- - V
Output Voltage (2) (except DB0 to DB7)
V
OL2
IO = 40µA
- -
0.1V
DD
V
Vd
COM
IO = ± 0.1mA
- - 1 V
Voltage Drop
Vd
SEG
IO = ± 0.1mA
- - 1 V
Input Leakage Current
I
IL
VIN = 0V to V
DD
-1 - 1
µA
Low Input Current
I
IN
VIN = 0V, VDD = 5V (pull-up)
-50 -125 -250
µA
Internal Clock (external Rf)
f
IC
Rf = 91k ± 2% (VDD = 5V)
190 270 350 KHz
f
EC
150 250 350 KHz
duty 45 50 55 %External Clock
fR, t
F
-
- - 0.2
µs
LCD Driving Voltage
V
LCD
VDD-5V (1/5, 1/4 bias)
4.6 - 10.0 V
S6A0070 16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
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(VDD = 2.7V to 4.5V, Ta = - 30 to + 85°C)
Item Symbol Condition Min Typ Max Unit
Operating Voltage
V
DD
- 2.7 - 4.5 V
I
DD1
ceramic resonator f
OSC
= 250kHz
- 0.3 0.5 mA
Supply Current
I
DD2
Resister oscillation external clock operation f
OSC
= 270kHz
- 0.17 0.3 mA
V
IH1
-
0.7V
DD
V
DD
V
Input Voltage (1) (except OSC1)
V
IL1
- -0.3 - 0.4 V
V
IH2
-
0.7V
DD
-
V
DD
V
Input Voltage (2) (except OSC1)
V
IL2
- - -
0.2V
DD
V
V
OH1IOH
= -0.1mA
2.0 - - V
Output Voltage (1) (DB0 to DB7)
V
OL1
IOL = 0.1mA
- - 0.4 V
V
OH2
IO = -40µA
0.8V
DD
- - V
Output Voltage (2) (except DB0 to DB7)
V
OL2
IO = 40µA
- -
0.2V
DD
V
Vd
COM
IO = ± 0.1mA
- 1 V
Voltage Drop
Vd
SEG
IO = ± 0.1mA
- - 1.5 V
Input Leakage Current
I
IL
VIN = 0V to V
DD
-1 - 1
µA
Low Input Current
I
IN
VIN = 0V, VDD = 5V (pull-up)
-10 -50 -120
µA
Internal Clock (external Rf)
f
IC
Rf = 75k ± 2% (VDD = 3V)
190 250 350 KHz
f
EC
125 270 350 KHz
duty 45 50 55 %External Clock
fR, t
F
-
- - 0.2
µs
*LCD Driving Voltage
V
LCD
VDD-V5 (1/5, 1/4 bias)
3.0 - 10.0 V
NOTE: LCD Driving Voltage
LCD Driving Voltage
DUTY 1/8, 1/11 DUTY 1/16 DUTY
Power
BIAS 1/4 BIAS 1/5 BIAS
V
DD
V
DD
V
DD
V
1
VDD - V
LCD
/4 VDD - V
LCD
/5
V
2
VDD - V
LCD
/2 VDD - 2V
LCD
/5
V
3
VDD - V
LCD
/2 VDD - 3V
LCD
/5
V
4
VDD - 3V
LCD
/4 VDD - 4V
LCD
/5
V
5
VDD - V
LCD
VDD - V
LCD
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
39
AC Characteristics
(V
DD
= 4.5 to 5.5V, Ta = - 30 to + 85°C)
Mode Item Symbol Min Typ Max Unit
E Cycle Time tc 500 - ­E Rise / Fall Time tr, tf - - 25 E Pulse Width (High, Low) tw 220 - ­R/W and RS Setup Time tsu1 40 - ­R/W and RS Hold Time th1 10 - ­Data Setup Time tsu2 60 - -
Write Mode
(Refer to Figure 6)
Data Hold Time th2 10 - ­E Cycle Time tc 500 - ­E Rise / Fall Time tr, tf - - 25 E Pulse Width (High, Low) tw 220 - ­R/W and RS Setup Time tsu 40 - ­R/W and RS Hold Time th 10 - ­Data Output Delay Time
t
D
- - 120
Read mode
(refer to figure 7)
Data Hold Time
t
DH
20
-
-
ns
(V
DD
= 2.7 to 4.5V, Ta = - 30 to + 85°C)
Mode Item Symbol Min Typ Max Unit
E Cycle Time tc 1400 - ­E Rise / Fall Time tr, tf - - 25 E Pulse Width (High, Low) tw 400 - ­R/W and RS Setup Time tsu1 60 - ­R/W and RS Hold Time th1 20 - ­Data Setup Time tsu2 140 - -
Write Mode
(Refer to Figure 6)
Data Hold Time th2 10 - ­E Cycle Time tc 1400 - ­E Rise / Fall Time tr, tf - - 25 E Pulse Width (High, Low) tw 400 - ­R/W and RS Setup Time tsu 60 - ­R/W and RS Hold Time th 20 - ­Data Output Delay Time
t
D
- - 360
Read mode
(refer to figure 7)
Data Hold Time
t
DH
5 - -
ns
S6A0070 16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
40
Mode Item Symbol Min Typ Max Unit
Clock Pulse Width (High, Low) tw 800 - ­Clock Rise/Fall Time tr, tf - - 100 Clock Setup Time tsu1 500 - ­Data Setup Time tsu2 300 - ­Data Hold Time
t
DH
300 - -
Interface Mode
with
Extension Driver
(refer to figure 8)
M Delay Time
t
DW
-1000 - 1000
ns
V
IH1
V
IL1
t
su1
V
IL1
t
h1
V
IL1
t
h1
t
f
t
w
t
h2
V
IH1
V
IL1
t
su2
t
r
V
IH1
V
IL1
Valid Data
V
IH1
V
IL1
t
c
DB0 - DB7
E
R/W
RS
Figure 6. Write Mode Timing Diagram
16COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD S6A0070
41
V
IH1
V
IL1
t
su
V
IH1
t
h
V
IH1
t
h1
t
f
t
w
t
DH
V
IH1
V
IL1
t
r
V
IH1
V
IL1
Valid Data
V
IH1
V
IL1
t
c
DB0 - DB7
E
R/W
RS
t
D
V
IL1
V
IH1
V
IL1
Figure 7. Read Mode Timing Diagram
M
D
CLK2
CLK1
V
OH2
t
r
t
w
V
OH2
V
OL2
t
f
V
OH2
V
OL2
V
OH2
t
w
V
OL2
t
w
t
SU1
V
OH2
V
OL2
t
DH
t
DM
t
SU1
Figure 8. Interface Mode with Extension Driver Timing Diagram
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