S6A0070 80 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
20
8) Set DDRAM Address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set DDRAM address to AC. This instruction makes DDRAM data available from MPU. When 1-line display mode
(N = 0), DDRAM address is from "00H" to "4FH". In 2-line display mode (N = 1), DDRAM address in the 1st line is
from "00H" to "27H", and DDRAM address in the 2nd line is from "40H" to "67H".
9) Read Busy Flag & Address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
This instruction shows whether S6A0070 is in internal operation or not. If the resultant BF is "1", it means the
internal operation is in progress and you have to wait until BF to be Low, and then the next instruction can be
performed. In this instruction you can read also the value of address counter.
10) Write Data to RAM
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 0 D7 D6 D5 D4 D3 D2 D1 D0
Write binary 8-bit data to DDRAM/CGRAM. The selection of RAM from DDRAM, and CGRAM, is set by the
previous address set instruction: DDRAM address set, CGRAM address set). RAM set instruction can also
determine the AC direction to RAM. After write operation, the address is automatically increased/decreased by 1,
according to the entry mode.
11) Read Data from RAM
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
1 1 D7 D6 D5 D4 D3 D2 D1 D0
Read binary 8-bit data from DDRAM/CGRAM. The selection of RAM is set by the previous address set
instruction. If the address set instruction of RAM is not performed before this instruction, the data that is read first
is invalid, because the direction of AC is not determined. If you read RAM data several times without RAM
address set instruction before read operation, you can get correct RAM data from the second, but the first data
would be incorrect, because there is no time margin to transfer RAM data. In case of DDRAM read operation,
cursor shift instruction plays the same role as DDRAM address set instruction; it also transfer RAM data to output
data register. After read operation address counter is automatically increased/decreased by 1 according to the
entry mode. After CGRAM read operation, display shift may not be executed correctly.
NOTE: In case of RAM write operation, after this AC is increased/decreased by 1 like read operation. In this time,
AC indicates the next address position, but you can read only the previous data by read instruction.