Philips TEA1533P, TEA1533AP DATA SHEET

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INTEGRATED CIRCUITS

DATA SHEET

TEA1533P; TEA1533AP

GreenChipTMII SMPS control IC

Product specification

 

2002 Aug 23

Supersedes data of 2002 May 31

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Philips Semiconductors

Product specification

 

 

GreenChipTMII SMPS control IC

TEA1533P; TEA1533AP

 

 

 

 

FEATURES

Distinctive features

Universal mains supply operation (70 to 276 V AC)

High level of integration, giving a very low external component count.

Green features

Valley or zero voltage switching for minimum switching losses

Efficient quasi-resonant operation at high power levels

Frequency reduction at low power standby for improved system efficiency (<3 W)

Cycle skipping mode at very low loads. Pi <300 mW at no-load operation for a typical adapter application

On-chip start-up current source.

Protection features

Safe restart mode for system fault conditions

Continuous mode protection by means of demagnetization detection (zero switch-on current)

Accurate and adjustable overvoltage protection (latched in TEA1533P, safe restart in TEA1533AP)

Short winding protection

Undervoltage protection (foldback during overload)

Overtemperature protection (latched in TEA1533P, safe restart in TEA1533AP)

Low and adjustable overcurrent protection trip level

Soft (re)start

Mains voltage-dependent operation enabling level.

APPLICATIONS

Besides typical application areas, i.e. adapters and chargers, the device can be used in TV and monitor supplies and all applications that demand an efficient and cost-effective solution up to 250 W.

 

1

8

 

2 TEA1533P 7

 

TEA1533AP

6

 

3

 

4

5

 

 

MGU505

Fig.1

Basic application diagram.

2002 Aug 23

2

Philips Semiconductors

Product specification

 

 

GreenChipTMII SMPS control IC

TEA1533P; TEA1533AP

 

 

GENERAL DESCRIPTION

The GreenChipä(1)II is the second generation of green Switched Mode Power Supply (SMPS) control ICs operating directly from the rectified universal mains. A high level of integration leads to a cost effective power supply with a very low number of external components.

The special built-in green functions allow the efficiency to be optimum at all power levels. This holds for quasi-resonant operation at high power levels, as well as fixed frequency operation with valley switching at medium power levels. At low power (standby) levels, the system operates at a reduced frequency and with valley detection.

(1)GreenChip is a trademark of Koninklijke Philips Electronics N.V.

The proprietary high voltage BCD800 process makes direct start-up possible from the rectified mains voltage in an effective and green way. A second low voltage BICMOS IC is used for accurate, high-speed protection functions and control.

Highly efficient and reliable supplies can easily be designed using the GreenChipII control IC.

ORDERING INFORMATION

TYPE NUMBER

 

PACKAGE

 

 

 

 

NAME

DESCRIPTION

VERSION

 

 

 

 

 

TEA1533P

DIP8

plastic dual in-line package; 8 leads (300 mil)

SOT97-1

 

 

 

 

TEA1533AP

 

 

 

 

 

 

 

2002 Aug 23

3

Philips TEA1533P, TEA1533AP DATA SHEET

 

_

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23 Aug 2002

1

SUPPLY

 

 

 

 

START-UP

 

 

8

DRAIN

DIAGRAM BLOCK

GreenChip

Semiconductors Philips

VCC

MANAGEMENT

 

 

 

CURRENT SOURCE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OCP

 

 

Iprot(DEM)

 

 

 

internal UVLO

start

DEMAG

 

VALLEY

 

 

 

 

TM

 

 

 

 

clamp

 

 

 

supply

 

SHORT

 

 

 

 

 

 

 

M-level

 

PROTECTIONpagewidthfullbook,

 

 

 

 

 

7

HVS

II

 

2

S1

 

 

 

 

 

 

 

 

 

n.c.

 

SMPS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

VOLTAGE

 

 

 

 

 

 

 

 

DEM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CONTROLLED

 

LOGIC

 

 

 

 

 

 

 

 

 

 

 

 

 

50

 

 

 

 

 

 

 

 

OSCILLATOR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

mV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

control

 

 

 

 

 

 

 

 

 

100

 

 

 

 

 

 

 

 

 

 

 

 

 

 

mV

 

 

 

 

 

 

 

 

FREQUENCY

 

 

UP/DOWN

 

 

OVER-

 

 

 

 

 

 

 

 

 

 

 

VOLTAGE

 

 

 

 

 

 

 

CONTROL

 

 

COUNTER

 

PROTECTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LOGIC

 

 

DRIVER

 

6

DRIVER

 

 

 

 

 

Iprot(CTRL)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

3

−1

 

 

 

 

 

 

 

 

Iss

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CTRL

 

 

 

 

 

 

LEB

 

 

 

 

 

 

 

 

POWER-ON

 

S

Q

 

 

soft

0.5 V

 

 

 

 

 

 

RESET

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

start

 

 

 

 

 

 

 

 

 

 

 

 

 

 

blank

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.5 V

 

UVLO

R

Q

 

 

 

 

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Isense

 

 

 

 

 

 

 

 

 

 

 

 

OCP

 

 

 

 

 

 

 

burst

 

 

S

Q

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

detect

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TEA1533P;

 

 

 

OVER-

 

VCC < 4.5 V

 

 

 

 

 

 

 

 

 

 

 

 

TEMPERATURE

R

Q

 

 

 

 

 

 

 

 

 

 

PROTECTION

or UVLO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(TEA1533AP)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

short

0.88 V

 

 

 

 

 

 

 

 

MAXIMUM

 

 

 

winding

 

 

 

 

 

 

 

 

 

ON-TIME

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TEA1533AP

specification Product

 

 

TEA1533P

PROTECTION

 

 

 

 

OVERPOWER

 

 

 

 

 

TEA1533AP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PROTECTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MGU506

 

 

 

 

 

 

Fig.2 Block diagram.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Philips Semiconductors

Product specification

 

 

GreenChipTMII SMPS control IC

TEA1533P; TEA1533AP

 

 

PINNING

SYMBOL

PIN

DESCRIPTION

 

 

 

VCC

1

supply voltage

GND

2

ground

 

 

 

CTRL

3

control input

 

 

 

DEM

4

input from auxiliary winding for

 

 

demagnetization timing, overvoltage

 

 

and overpower protection

 

 

 

Isense

5

programmable current sense input

DRIVER

6

gate driver output

 

 

 

HVS

7

high voltage safety spacer, not

 

 

connected

 

 

 

DRAIN

8

drain of external MOS switch, input for

 

 

start-up current and valley sensing

 

 

 

handbook, halfpage

VCC

1

 

 

8

DRAIN

GND

 

 

 

 

HVS

2

TEA1533P

 

7

 

 

 

 

 

CTRL

 

TEA1533AP

 

DRIVER

3

6

 

 

 

 

 

 

DEM

4

 

 

5

Isense

 

 

 

 

 

 

 

 

MGU507

 

 

Fig.3 Pin configuration.

FUNCTIONAL DESCRIPTION

The TEA1533 is the controller of a compact flyback converter, and is situated at the primary side. An auxiliary winding of the transformer provides demagnetization detection and powers the IC after start-up.

The TEA1533 can operate in multi modes (see Fig.4).

f

 

MGU508

handbook, halfpage(kHz)

 

 

 

VCO

fixed

quasi resonant

175

 

 

25

P (W)

Fig.4 Multi modes operation.

The next converter stroke is started only after demagnetization of the transformer current (zero current switching), while the drain voltage has reached the lowest voltage to prevent switching losses (green function). The primary resonant circuit of the primary inductance and drain capacitor ensures this quasi-resonant operation. The design can be optimized in such a way that zero voltage switching can be reached over almost the universal mains range.

To prevent very high frequency operation at lower loads, the quasi-resonant operation changes smoothly in fixed frequency PWM control.

At very low power (standby) levels, the frequency is controlled down, via the VCO, to a minimum frequency of approximately 25 kHz.

Start-up, mains enabling operation level and undervoltage lock-out

Initially, the IC is self supplying from the rectified mains voltage via pin DRAIN (see Figs 11 and 12). Supply capacitor CVCC is charged by the internal start-up current source to approximately 4 V or higher, depending on the voltage on pin DRAIN.

2002 Aug 23

5

Philips Semiconductors

Product specification

 

 

GreenChipTMII SMPS control IC

TEA1533P; TEA1533AP

 

 

Once the drain voltage exceeds the M-level (mains-dependent operation-enabling level), the start-up current source will continue charging capacitor CVCC (switch S1 will be opened); see Fig.2. The IC will activate the converter as soon as the voltage on pin VCC passes the VCC(start) level.

The IC supply is taken over by the auxiliary winding as soon as the output voltage reaches its intended level and the IC supply from the mains voltage is subsequently stopped for high efficiency operation (green function).

The moment the voltage on pin VCC drops below the undervoltage lock-out level, the IC stops switching and enters a safe restart from the rectified mains voltage. Inhibiting the auxiliary supply by external means causes the converter to operate in a stable, well defined burst mode.

Supply management

All (internal) reference voltages are derived from a temperature compensated, on-chip band gap circuit.

Current mode control

Current mode control is used for its good line regulation behaviour.

The ‘on-time’ is controlled by the internally inverted control voltage, which is compared with the primary current information. The primary current is sensed across an external resistor. The driver output is latched in the logic, preventing multiple switch-on.

The internal control voltage is inversely proportional to the external control pin voltage, with an offset of 1.5 V. This means that a voltage range from 1 to 1.5 V on pin CTRL will result in an internal control voltage range from

0.5 to 0 V (a high external control voltage results in a low duty cycle).

Oscillator

The maximum fixed frequency of the oscillator is set by an internal current source and capacitor. The maximum frequency is reduced once the control voltage enters the VCO control window. Then, the maximum frequency changes linearly with the control voltage until the minimum frequency is reached (see Figs 5 and 6).

MGU233

Vsense(max) handbook, halfpage

0.52 V

1 V

1.5 V

 

VCTRL

 

(typ)

(typ)

 

 

Fig.5 Vsense(max) voltage as function of VCTRL.

MGU509

f

handbook, halfpage

(kHz)

175 kHz

175

25

VCO2

VCO1 Vsense(max) (V)

level

level

Fig.6 VCO frequency as function of Vsense(max)

Cycle skipping

At very low power levels, a cycle skipping mode will be activated. A high control voltage will reduce the switching frequency to a minimum of 25 kHz. If the voltage on the control pin is raised even more, switch-on of the external power MOSFET will be inhibited until the voltage on the control pin has dropped to a lower value again (see Fig.7).

For system accuracy, it is not the absolute voltage on the control pin that will trigger the cycle skipping mode, but a signal derived from the internal VCO will be used.

Remark 1: If the no-load requirement of the system is such that the output voltage can be regulated to its intended level at a switching frequency of 25 kHz or above, the cycle skipping mode will not be activated.

Remark 2: As switching will stop when the voltage on the control pin is raised above a certain level, the burst mode has to be activated by a microcontroller or any other circuit sending a 30 μs, 16 mA pulse to the control input

(pin CTRL) of the IC.

2002 Aug 23

6

Philips Semiconductors

Product specification

 

 

GreenChipTMII SMPS control IC

TEA1533P; TEA1533AP

 

 

 

 

 

fosc

 

 

1.5 V − VCTRL

current

 

fmax

 

 

 

comparator

 

 

 

CTRL

 

DRIVER

DRIVER

 

 

 

 

 

 

 

 

 

 

fmin

 

 

X2

 

 

Isense

 

 

 

 

 

 

 

 

 

 

dV2

dV1

Vx (mV)

Vx

 

 

 

 

 

 

cycle

 

150

 

V

 

skipping

 

 

 

OSCILLATOR

 

 

 

 

I

 

 

 

 

 

 

 

 

150 mV

 

 

1

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

Vx (mV)

 

 

 

 

 

MGU510

The voltage levels dV1 and dV2 are fixed in the IC to 50 mV (typical) and 18 mV (typical) respectively.

Fig.7 The cycle skipping circuitry.

Demagnetization

Minimum and maximum ‘on-time’

The system will be in discontinuous conduction mode all the time. The oscillator will not start a new primary stroke until the secondary stroke has ended.

Demagnetization features a cycle-by-cycle output short-circuit protection by immediately lowering the frequency (longer off-time), thereby reducing the power level.

Demagnetization recognition is suppressed during the first

tsuppr time. This suppression may be necessary in applications where the transformer has a large leakage

inductance, at low output voltages and at start-up.

If pin DEM is open-circuit or not connected, a fault condition is assumed and the converter will stop operating immediately. Operation will recommence as soon as the fault condition is removed.

If pin DEM is shorted to ground, again a fault condition is assumed and the converter will stop operating after the first stroke. The converter will subsequently enter the safe restart mode. This situation will persist until the short-circuit is removed.

The minimum ‘on-time’ of the SMPS is determined by the Leading Edge Blanking (LEB) time. The IC limits the ‘on-time’ to 50 μs. When the system desires an ‘on-time’ longer than 50 μs, a fault condition is assumed (e.g. removed Ci in Fig.11), the IC will stop switching and enter the safe restart mode.

2002 Aug 23

7

Philips Semiconductors

Product specification

 

 

GreenChipTMII SMPS control IC

TEA1533P; TEA1533AP

 

 

OverVoltage Protection (OVP)

An OVP mode is implemented in the GreenChip series. This works for the TEA1533 by sensing the auxiliary voltage via the current flowing into pin DEM during the secondary stroke. The auxiliary winding voltage is a well-defined replica of the output voltage. Any voltage spikes are averaged by an internal filter.

If the output voltage exceeds the OVP trip level, an internal counter starts counting subsequent OVP events. The counter has been added to prevent incorrect OVP detections which might occur during ESD or lightning events. If the output voltage exceeds the OVP trip level a few times and not again in a subsequent cycle, the internal counter will count down with twice the speed compared with counting-up. However, when typical 10 cycles of subsequent OVP events are detected, the IC assumes a true OVP and the OVP circuit switches the power MOSFET off. Next, the controller waits until the UVLO level is reached on pin VCC. When VCC drops to UVLO, capacitor CVCC will be recharged to the Vstart level.

Regarding the TEA1533P, this IC will not start switching again. Subsequently, VCC will drop again to the UVLO level, etc. Operation only recommences when the VCC voltage drops below a level of approximately 4.5 V

(practically when Vmains has been disconnected for a short period).

Regarding the TEA1533AP, switching starts again (safe

restart mode) when the Vstart level is reached. This process is repeated as long as the OVP condition exists.

The output voltage Vo(OVP) at which the OVP function trips, can be set by the demagnetization resistor, RDEM:

Vo(OVP) =

Ns {I ´ R V }

----------- (OVP)(DEM) DEM + clamp(DEM)(pos) Naux

where Ns is the number of secondary turns and Naux is the number of auxiliary turns of the transformer.

Current I(OVP)(DEM) is internally trimmed.

The value of RDEM can be adjusted to the turns ratio of the transformer, thus making an accurate OVP possible.

Valley switching

A new cycle starts when the power MOSFET is switched on (see Fig.8). After the ‘on-time’ (which is determined by the ‘sense’ voltage and the internal control voltage), the switch is opened and the secondary stroke starts. After the secondary stroke, the drain voltage shows an oscillation

1

with a frequency of approximately -----------------------------------------------

2 ´ p ´ (Lp ´ Cd)

where Lp is the primary self inductance of the transformer and Cd is the capacitance on the drain node.

As soon as the oscillator voltage is high again and the secondary stroke has ended, the circuit waits for the lowest drain voltage before starting a new primary stroke. This method is called valley detection. Figure 8 shows the drain voltage together with the valley signal, the signal indicating the secondary stroke and the oscillator signal.

In an optimum design, the reflected secondary voltage on the primary side will force the drain voltage to zero. Thus, zero voltage switching is very possible, preventing large

 

1

´ C ´ V

2

´ fö

and

capacitive switching losses æP = --

 

è

2

 

 

ø

 

allowing high frequency operation, which results in small and cost effective inductors.

2002 Aug 23

8

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