Datasheet TEA1202TS Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TEA1202TS

Battery power unit

Objective specification
File under Integrated Circuits, IC03

2000 Jun 08

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

FEATURES

• Fully integrated battery power unit, including complete
DC/DC converter circuit, two Low DropOut voltage
regulators (LDOs) and a battery low detector

• Configurable for 1, 2 or 3-cell Nickel-Cadmium (NiCd)
or Nickel Metal Hybrid (NiMH) batteries and 1 Lithium
Ion (Li-Ion) battery

• Guaranteed DC/DC converter start-up from 1-cell NiCd
or NiMH battery, even with an load current

• Upconversion or downconversion

• Internal power MOSFETs featuring a low R
approximately 0.1 Ω

• Synchronous rectification for high efficiency

• Soft start

• PWM-only operating option

• Dropout voltage of 75 mV at 50 mA

• Both LDOs are also applicable as low-ohmic power

switches

• Stable LDO performance with ceramic capacitors

• Stand-alone low battery detector requires no additional

supply voltage

• Low battery detection level at 0.90 V, externally
adjustable to a higher level

• Adjustable output voltages

• Shut-down function

• Small outline package

• Advanced 0.6 µm BICMOS process.

APPLICATIONS

• Cellular phones

• Cordless phones

• Personal Digital Assistants (PDAs)

• Portable Audio Players

• Pagers

• Mobile equipment.

DSon

of

GENERAL DESCRIPTION

The TEA1202TS is a fully integrated battery power unit
including a high-efficiency DC/DC converter which runs
from a 1-cell NiCd or NiMH battery, two low dropout
voltage regulators and a low battery detector. The circuit
can be arrangedinmany ways to optimize the application
circuit of a power supply system. Therefore, most inputs
and outputs are separated, the DC/DC converter can be
arranged for upconversion or downconversion and the
regulators can also be used as power switches. One
regulator can be used completely independent of the rest
of the system, and the low battery detector can be
configured for several types of batteries. Accurate low
battery detection is possible while all other blocks are
switched off.

The DC/DC converter features efficient, compact and
dynamic power conversion using a digital control concept
comparable with Pulse Width Modulation (PWM) and
Pulse Frequency Modulation (PFM), integrated CMOS
power switches with a very low R
synchronous rectification.

The device operates at a switching frequency of 600 kHz
which enables the use of external components with
minimum size. The switching frequency can be
synchronized to an external high frequency clock signal.
Optionally, the device can be kept in PWM control mode
only. Deadlock is prevented by an on-chip undervoltage
lockout circuit.

Active current limiting enables efficient conversion in
pulsed-load systems such as Global System for Mobile
communication (GSM) and Digital Enhanced Cordless
Telecommunications (DECT).

Both LDOs show a low dropout voltage and are inherently
stable, even when ceramic capacitors with a low ESR
value are applied at the outputs. Usage of the LDOs as
low-ohmic switches is also possible.

The low battery detector has a built-in detection level
which is optimum for a 1-cell NiCd or NiMH battery.Higher
battery voltages can be translated to this 1-cell level by an
additional built-in LDO circuit.

DSon

and fully

ORDERING INFORMATION

TYPE

NUMBER

TEA1202TS SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1

2000 Jun 08 2

NAME DESCRIPTION VERSION

PACKAGE

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DC/DC converter

UPCONVERSION
V

I(up)

V

O(up)

V

I(start)

DOWNCONVERSION
V

I(dwn)

V

O(dwn)

CURRENT LEVELS
I

q

I

shdwn

I

LX(max)

∆I

lim

P

OWER MOSFETS

R

DSon(N)

R

DSon(P)

EFFICIENCY
η efficiency upconversion VI= 1.2 V; VOup to 3.3 V

TIMING
f

sw

f

i(sync)

t

start

Low dropout voltage regulators

V

LDO

V

dropout

I

LDO(max)

R

DSon

General characteristics

V

ref

input voltage V
output voltage V

I(start)
O(uvlo)

− 5.50 V

− 5.50 V

start-up input voltage IL< 10 mA 0.93 0.96 1.00 V

input voltage V

O(uvlo)

− 5.50 V

output voltage 1.30 − 5.50 V

quiescent current − 110 −µA
current in shut-down mode 0 2 10 µA
maximum continuous current at

T

=80°C −−1.0 A

amb

pins LX1 and LX2
current limit deviation I

set to 1.0 A

lim

upconversion −12 − +12 %
downconversion −12 − +12 %

drain-to-source on-state

Tj=27°C − 110 − mΩ

resistance NFET
drain-to-source on-state

Tj=27°C − 125 − mΩ

resistance PFET

I

=1mA − 66 − %

L

I

=10mA − 81 − %

L

I

= 100 mA − 85 − %

L

switching frequency PWM mode 480 600 720 kHz
synchronization clock input

6 1320MHz

frequency
start-up time − 10 − ms

output voltage range V
dropout voltage I

LDO<V4

LDO

+ 0.4 V 1.30 − 5.50 V

=50mA −−75 mV
maximum output current in regulation − 50 − mA
drain-to-source on-state

V

>2V; Tj=27°C − 200 − mΩ

FB1,2

resistance

reference voltage 1.165 1.190 1.215 V

2000 Jun 08 3

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2000 Jun 08 4

3

SHDWN2

11

LBI2

LBI1

12

13

TEA1202TS

V

ref

LDO2

IN2

10

OUT2

9

FB2

BLOCK DIAGRAM

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

LBO

LX1

LX2

ILIM

14

1

20

5

N-type

POWER

FET

LOW BATTERY

DETECTOR

V

sense

FET

ref

TEMPERATURE

PROTECTION

OSCILLATOR

CURRENT LIMIT

COMPARATOR

13 MHz

P-type POWER FET

sense FET

SYNC
GATE

V

START-UP

CIRCUIT

CONTROL LOGIC

AND

MODE GEARBOX

TIME

COUNTER

DIGITAL CONTROLLER

ref

SHDWN0

INTERNAL

LDO1

SUPPLY

REFERENCE

VOLT AGE

6

OUT1

7

FB1

4

UPOUT/DNIN

8

GND

16

FB0

V

ref

15

V

ref

GND0

1817 2 19

SYNC/PWM U/D

SHDWN0

Fig.1 Block diagram.

handbook, full pagewidth

MGU062

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

PINNING

SYMBOL PIN DESCRIPTION

LX1 1 inductor connection 1
SHDWN0 2 DC/DC shut-down input
SHDWN2 3 LDO2 shut-down input
UPOUT/DNIN 4 up mode: DC/DC output;

down mode DC/DC input

ILIM 5 current limiting resistor

connection
OUT1 6 LDO1 output
FB1 7 LDO1 feedback input
GND 8 internal supply ground
FB2 9 LDO2 feedback input
OUT2 10 LDO2 output
IN2 11 LDO2 input
LBI2 12 low battery detector input 2
LBI1 13 low battery detector input 1
LBO 14 low battery detector output
V

ref

15 reference voltage
FB0 16 DC/DC feedback input
GND0 17 DC/DC converter ground
SYNC/PWM 18 synchronization clock input or

PWM-only selection input
U/D 19 conversion mode selection input
LX2 20 inductor connection 2

handbook, halfpage

UPOUT/DNIN

1

LX1

ILIM

OUT1

FB1

GND

FB2

OUT2

2
3
4
5

TEA1202TS

6
7
8
9

10

SHDWN0
SHDWN2

Fig.2 Pin configuration.

MGU060

20

LX2

19

U/D

18

SYNC/PWM

17

GND0

16

FB0

15

V

14

LBO

13

LBI1

12

LBI2

11

IN2

ref

FUNCTIONAL DESCRIPTION
Control mechanism

The TEA1202TS DC/DC converter is able to operate in
PFM (discontinuous conduction) or PWM (continuous
conduction) operating mode. All switching actions are
completely determined by a digital control circuit which
usestheoutput voltage level as its control input. Thisnovel
digital approach enables the use of a new pulse width and
frequency modulation scheme, which ensures optimum
power efficiency over the complete range of operation of
the converter.

When high output power is requested, the device will
operate in PWM (continuous conduction) operating mode.
This results in minimum AC currents in the circuit
components and hence optimum efficiency, minimum
costs and low EMC. In this operating mode, the output
voltage is allowed to vary between two predefined voltage
levels. As long as the output voltage stays within this
so-called window, switching continues in a fixed pattern.

2000 Jun 08 5

When the output voltage reaches one of the window
borders, the digital controller immediately reacts by
adjusting the pulse width and inserting a current step in
such a way that the output voltagestays within thewindow
with higher or lower current capability. This approach
enables very fast reaction to load variations. Figure 3
shows the response of the converter to a sudden load
increase. The upper trace shows the output voltage.

The ripple on top of the DC level is a result of the current
in the output capacitor, which changes in sign twice per
cycle, times the internal Equivalent Series Resistance
(ESR) of the capacitor. After each ramp-down of the
inductor current, i.e. when the ESR effect increases the
output voltage, the converter determines what to do in the
next cycle. As soon as more load current is taken from the
output the output voltage starts to decay.

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

handbook, full pagewidth

load increase

V

o

I

L

start corrective action

time

time

high window limit

low window limit

MGK925

Fig.3 Response to load increase.

handbook, full pagewidth

V

h

V

2%

O

V

typical

situation

+2%

l

maximum

positive spread

Fig.4 Output voltage window spread.

2000 Jun 08 6

V

h

2%

V

l

−2%

V

h

2%

V

l

maximum

negative spread

MGU061

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

When the output voltage becomes lower than the low limit
of the window, a corrective action is taken by a ramp-up of
theinductor current during amuchlonger time. As aresult,
the DC current level is increased and normal PWM control
can continue. The output voltage (including ESR effect) is
again within the predefined window.

Figure 4 shows the spread of the output voltage window.
The absolute value is mostly dependent on spread, while
the actual window size (Vh− Vl) is not affected. For one
specific device, the output voltage will not vary more
than 2% (typical value).

In low output power situations, the TEA1202TS will switch
over to PFM (discontinuous conduction) operating mode.
In this mode, regulation information from an earlier PWM
operating mode is used. This results in optimum inductor
peak current levels in the PFM mode, which are slightly
larger than the inductor ripple current in the PWM mode.
As a result, the transition between PFMand PWM modeis
optimum under all circumstances. In the PFM mode the
TEA1202TS regulates the output voltage to the high
window limit as shown in Fig.3.

Synchronous rectification

For optimum efficiency over the whole load range,
synchronous rectifiers inside the TEA1202TS ensure that
during the whole second switching phase, all inductor
current will flow through the low-ohmic power MOSFETs.
Special circuitry is included which detects when the
inductorcurrentreacheszero.Following this detection, the
digital controller switches off the power MOSFET and
proceeds with regulation.

Undervoltage lockout

As a result of too high a load or disconnection of the input
power source, the output voltage can drop so low that
normal regulation cannot be guaranteed. In this event, the
device switches back to start-up mode. If the output
voltage drops even further, switching is stopped
completely.

Shut-down

When the shut-down input is set HIGH, the DC/DC
converter disables both switches and power consumption
is reduced to a few microamperes.

Power switches

The power switches in the IC are one N-type and one
P-type power MOSFET, both having a typical
drain-to-source resistance of 100 mΩ. The maximum
average current in the power switches is 1.0 A at
T

=80°C.

amb

Temperature protection

When the DC/DC converter operates in the PWM mode,
and the die temperature gets too high (typical value is
160 °C), the converter and both LDOs stop operating.
They resume operation when the die temperature falls
below 90 °C again. As a result, low frequent cycling
between the on and off state will occur. It should be noted
that in the event of device temperatures at the cut-off limit,
the application differs strongly from maximum
specifications.

Start-up

Start-up from low input voltage in the boost mode is
realized by an independentstart-up oscillator, which starts
switching the N-type power MOSFET as soon as the
low-battery detector detects a sufficiently high voltage.
The inductor current is limited internally to ensure
soft-starting. The switch actions of the start-up oscillator
will increase the output voltage. As soon as the output
voltage is high enough for normal regulation, the digital
control system takes control over the power MOSFETs.

2000 Jun 08 7

Current limiters

If the current in one of the power switches exceeds the
programmed limit in the PWM mode, the current ramp is
stopped immediately and the next switching phase is
entered. Current limiting is required to keep power
conversion efficient during temporary high loads.
Furthermore, current limiting protects the IC against
overload conditions, inductor saturation, etc.

The current limiting level is set by an external resistor
whichmustbe connected between pin ILIM and ground for
downconversion, or between pins ILIM and UPOUT/DNIN
for upconversion.

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

External synchronization and PWM-only mode

If an external high-frequency clock or a HIGH level is
applied to pin SYNC/PWM, the TEA1202TS will use PWM
regulation independent of the load applied.

In the event a high-frequency clock is applied, the
switching frequency in the PWM mode will be exactly that
frequency divided by 22. In the PWM mode the quiescent
current of the device increases.

In the event that no external synchronization or PWM
mode selection is necessary, pin SYNC/PWM must be
connected to ground.

Behaviour at input voltage exceeding the specified
range

In general, an input voltage exceeding the specified range
isnot recommended since instabilitymay occur. There are
two exceptions:

1. Upconversion: at an input voltage higher than the
targetoutput voltage, but up to 5.5 V,theconverter will
stop switching and the external Schottky diode will
take over. The output voltage will equal the input
voltageminus the diodevoltage drop. Since allcurrent
flows through the external diode in this situation, the
current limiting function is not active.

In the PWM mode, the P-type power MOSFET is
always on when the input voltage exceeds the target
output voltage. The internal synchronous rectifier
ensures that the inductor current does not fall below
zero. As a result, the achieved efficiency is higher in
this situation than standard PWM-controlled
converters achieve.

2. Downconversion: when the input voltage is lower than
the target output voltage, but higher than 2.2 V, the
P-type power MOSFET will stay conducting resulting
in an output voltage being equal to the input voltage
minussomeresistivevoltagedrop.Thecurrentlimiting
function remains active.

Both LDOs are protected from overload conditions by a
current limiting circuit and high temperature
(see Section “Temperature protection”).

Next to normal LDO functions, both regulators can be
switched off or can be used as switches. Each regulator
will act as a low-ohmic switch in the on-state when its
feedback input is connected to ground. When the
feedback input is higher than 2 V, the regulator will make
its power FET high-ohmic. So the feedback inputs of the
regulators can be used as digital inputs which make the
LDOs behave as switches.

Low battery detector

The low battery detector is an autonomous circuit which
can work at an input voltage down to 0.90 V. It is always
on, even when all other blocks are in the shut-down mode.

The detector has two inputs: the input on pin LBI1 is tuned
to accept a 1-cell NiCd or NiMH battery voltage directly,
while the input on pin LBI2 can detect a 2-cell NiCd or
NiMHbatteryvoltageorhighervoltage.Thedetectionlevel
of the input on pin LBI2 can be set by using a voltage
divider between the battery voltage, pin LBI2 and ground.
Hysteresisisincludedforproper operating. Furthermore, a
capacitor of 10 µF (typical value) must be connected
between pin LBI1 and ground when the input on pin LBI2
is used.

The output of the low battery detector on pin LBO is an
open-collector output. The output is high (i.e. no current is
sunk by the collector) when the input voltage of the
detector is below the lower detection level.

Low dropout voltage regulators

The low dropout voltage regulators are functionally equal
apart from the shut-down mechanism: LDO2 can be
controlled separately by pin SHDWN2, while LDO1 is
controlled by pin SHDWN0 like the DC/DC converter.

The input voltage of each LDO must be 250 mV higher
than its output voltage to achieve full specification on e.g.
ripple rejection. However, the parts will function like an
LDOdown to a margin of 75 mVbetweeninput and output:
the so-called dropout voltage. At a lower margin between
input and output, the LDOs will behave like a resistor.

2000 Jun 08 8

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

n

T

j

T

amb

T

stg

V

es

Note

1. ESD specification is in accordance with the JEDEC standard:
a) Human Body Model (HBM) tests are carried out by discharging a 100 pF capacitor through a 1.5 kΩ series

b) Machine Model (MM) tests are carried out by discharging a 200 pF capacitor via a 0.75 µH series inductor.

2. Exception is pin ILIM: 1000 V HBM and 100 V MM.

voltage on any pin shut-down mode −0.2 +6.5 V

operating mode −0.2 +5.5 V
junction temperature −40 +150 °C
ambient temperature −20 +80 °C
storage temperature −40 +125 °C
electrostatic handling voltage notes 1 and 2 Class II V

resistor.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air 140 K/W

QUALITY SPECIFICATION

In accordance with

“SNW-FQ-611 part E”

.

2000 Jun 08 9

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

CHARACTERISTICS

T

= −20 to +80 °C; all voltages are measured with respect to ground; positive currents flow into theIC; unless

amb

otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DC/DC converter

PCONVERSION; pin U/D = LOW

U
V

I(up)

V

O(up)

V

I(start)

V

O(uvlo)

OWNCONVERSION; pin U/D = HIGH

D
V

I(dwn)

V

O(dwn)

input voltage V
output voltage V
start-up input voltage IL< 10 mA 0.93 0.96 1.00 V
undervoltage lockout voltage note 1 2.0 2.2 2.4 V

input voltage note 2 V
output voltage 1.30 − 5.50 V

REGULATION
∆V

O(wdw)

output voltage window size as

PWM mode 1.5 2.0 2.5 %

a function of output voltage

CURRENT LEVELS
I

q(DCDC)

I

shdwn

I

lim(max)

∆I

lim

quiescent current note 3 − 110 −µA
current in shut-down mode 0 2 10 µA
maximum current limit − 5 − A
current limit deviation I

set to 1.0 A; note 4

lim

upconversion −12 − +12 %
downconversion −12 − +12 %

I

LX(max)

maximum continuous current

T

=80°C −−1.0 A

amb

at pins LX1 and LX2

POWER MOSFETS
R

DSon(N)

drain-to-source on-state

Tj=27°C − 110 − mΩ

resistance NFET

R

DSon(P)

drain-to-source on-state

Tj=27°C − 125 − mΩ

resistance PFET

EFFICIENCY
η efficiency upconversion VI= 1.2 V; VOup to 3.3 V;

note 5

I

=1mA − 66 − %

L

I

=10mA − 81 − %

L

I

= 100 mA − 85 − %

L

TIMING
f

sw

f

i(sync)

switching frequency PWM mode 480 600 720 kHz
synchronization clock input

frequency

t

start

start-up time note 6 − 10 − ms

I(start)
O(uvlo)

O(uvlo)

6 1320MHz

− 5.50 V

− 5.50 V

− 5.50 V

2000 Jun 08 10

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

DIGITAL INPUT LEVELS
V

lL(n)

V

IH(n)

Low dropout voltage regulators; note 8
V

LDO

V

dropout

V

drop

I

LDO(max)

∆V

LDO

∆V

line

∆V

load

PSRR power supply ripple rejection note 10 25 −−dB
t

res

I

q(LDO)

I

shdwn(LDO)

SWITCH CIRCUIT
R

DSon

I

O(max)

Low battery detector

I

LBD

t

t(HL)

DETECTION INPUT PIN LBI1
V

det

V

hys

TC

Vdet

TC

Vhys

DETECTION OUTPUT PIN LB0
I

O(sink)

LOW-level input voltage on all

0 − 0.4 V

digital pins
HIGH-level input voltage note 7

on pins SYNC/PWM,

0.55V

− V4+ 0.3 V

4

SHDWN0 and SHDWN2
all other digital input pins V

output voltage range V
dropout voltage I
minimum drop voltage for

LDO<V4

LDO

I

LDO

+ 0.4 V 1.30 − 5.50 V
= 50 mA; note 9 −−75 mV
= 50 mA 250 −−mV

− 0.4 − V4+ 0.3 V

4

functionality within
specification

maximum output current in regulation − 50 − mA
output voltage accuracy VI− V
line voltage regulation VI− V
load voltage regulation 10 µA<I

response time after load step from no load to

I

LDO(max)

=2V; I

LDO
LDO>Vdrop

<50mA −−1mV

LDO

=10µA −2.0 − +2.0 %

LDO

−−1mV

− 200 −µs

quiescent current − 50 −µA
shut-down current −−1µA

drain-to-source resistance in

V

>2V; Tj=27°C − 200 − mΩ

FB1,2

switched-on state
maximum output current in

V

> 2 V 0.40 0.45 0.50 A

FB1,2

switched-on state

supply current of detector VI= 0.9 V − 20 −µA
transition time falling V

low battery detection level falling V
low battery detection

bat

bat

− 2 −µs

0.88 0.90 0.92 V
36 40 44 mV

hysteresis
temperature coefficient of

− 0 − mV/K

detection level
temperature coefficient of

− 0.175 − mV/K

detection hysteresis

output sink current 15 −−µA

2000 Jun 08 11

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

General characteristics

V

ref

I

q

T

amb

T

max

Notes

1. The undervoltage lockout level shows wide specification limits since it decreases at increasing temperature. When
the temperature increases, the minimum supply voltage of the digital control part of the IC decreases and therefore
thecorrect operation of thisfunction is guaranteed overthe whole temperature range.The undervoltage lockout level
is measured at pin UPOUT/DNIN.

2. When VI is lower than the target output voltage but higher than 2.2 V, the P-type power MOSFET will remain
conducting (duty factor is 100%), resulting in VO following VI.

3. The quiescent current is specified as the input current in the upconversion configuration at VI= 1.20 V and
VO= 3.30 V, using L1 = 6.8 µH, R1 = 150 kΩ and R2 = 91 kΩ.

4. The current limit is defined by resistor R10. This resistor must be 1% accurate.

5. The specified efficiency is valid when using an output capacitor having an ESR of 0.1 Ω and an inductor of 6.8 µH
with an ESR of 0.05 Ω and a sufficient saturation current level.

6. The specified start-up time is the time between the connection of a 1.20 V input voltage source and the moment the
output reaches 3.30 V. The output capacitance equals 100 µF, the inductance equals 6.8 µH and no load is present.

7. V4is the voltage at pin UPOUT/DNIN. If the applied HIGH-level voltage is less than V4− 1 V, the quiescent current
of the device will increase.

8. Specifications have been verified in the PFM mode.

9. The dropout voltage is defined as the voltage between the input and the output of the LDO when the output voltage
has dropped 100 mV below its nominal value. The dropout voltage is measured while the LDO input voltage is
decreasing and at maximum current.

10. Measured with a sine wave at fi= 100 Hz to 1 MHz, Vi= 100 mV (RMS) and I

reference voltage 1.165 1.190 1.215 V
quiescent current at

all blocks operating − 270 −µA

pin UPOUT/DNIN
ambient temperature −20 +25 +80 °C
internal temperature for cut-off 150 160 170 °C

= 10 mA.

LDO

2000 Jun 08 12

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

APPLICATION INFORMATION

handbook, full pagewidth

C1

low battery

detection

external

clock

DC/DC

shut-down

regulator 2

shut-down

L1

R7

SYNC/PWM

SHDWN0

SHDWN2

C5

UPCONVERTER

TEA1202TS

LOW BATTERY

LX1

1

LX2

20

IN2

11

LBI1

13

LBI2

12

LBO

14

U/D

19

TEA1202TS

18

2

3

Vref

15

DC/DC

DETECTOR

equivalent block diagram

D1

ILIM

5

UPOUT/DNIN

4

R1

FB0

16

R2

OUT1

6

R3

FB1

7

R4

OUT2

10

R5

FB2

9

8

GND

17

GND0

R6

LDO1

LDO2

R10

DC/DC
output

regulator 1
output

regulator 2
output

low battery
detection

DC/DC
output

C2

regulator 1
output

C3

regulator 2
output

C4

Fig.5 Application in 1-cell NiCd or NiMH battery powered equipment.

2000 Jun 08 13

MGU063

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

handbook, full pagewidth

C1

low battery

detection

external

clock

DC/DC

shut-down

regulator 2

shut-down

R7

R8

R9

L1

C6

SYNC/PWM

SHDWN0

SHDWN2

C5

UPCONVERTER

TEA1202TS

LOW BATTERY

LX1

1

LX2

20

IN2

11

LBI1

13

LBI2

12

U/D

19

TEA1202TS

LBO

14

18

2

3

Vref

15

DC/DC

DETECTOR

equivalent block diagram

D1

ILIM

5

UPOUT/DNIN

4

FB0

16

OUT1

6

FB1

7

OUT2

10

FB2

9

8

GND

17

GND0

R1

R2

R3

R4

R5

R6

LDO1

LDO2

R10

DC/DC
output

regulator 1
output

regulator 2
output

low battery
detection

DC/DC
output

C2

regulator 1
output

C3

regulator 2
output

C4

Fig.6 Application in 2-cell NiCd or NiMH battery powered equipment.

2000 Jun 08 14

MGU064

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

handbook, full pagewidth

C1

low battery

detection

external

clock

R7

R8

R9

L1

C6

SYNC/PWM

SHDWN0

SHDWN2

C5

UPCONVERTER

TEA1202TS

LOW BATTERY

LX1

1

LX2

20

IN2

11

LBI1

13

LBI2

12

TEA1202TS

U/D

19

LBO

14

18

2

3

Vref

15

regulator 1 switch

DC/DC

DETECTOR

equivalent block diagram

D1

ILIM

5

UPOUT/DNIN

4

FB0

16

OUT1

6

FB1

7

OUT2

10

FB2

9

8

GND

17

GND0

SWITCH

LDO1

R10

R1

R2

R5

R6

control

LDO2

DC/DC
output

output
regulator 1
switch

regulator 2
output

low battery
detection

DC/DC
output

C2

output
regulator 1
switch

control
regulator 1
switch

regulator 2
output

C4

MGU065

Fig.7 Application in 2-cell NiCd or NiMH battery powered equipment with autonomous shut-down at low battery

voltage and using LDO1 as a switch.

2000 Jun 08 15

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

handbook, full pagewidth

DC/DC
output

DC/DC

DOWNCONVERTER

LDO1

TEA1202TS

LDO2

LOW BATTERY

DETECTOR

regulator 1
output

regulator 2
output

low battery
detection

C1

low battery

detection

external

clock

DC/DC

shut-down

regulator 2

shut-down

R7

R8

R9

UPOUT/DNIN

IN2

LBI1

C6

LBI2

U/D

LBO

SYNC/PWM

SHDWN0

SHDWN2

Vref

C5

equivalent block diagram

4
11

13

12

19

TEA1202TS

14

18

2

3
15

8

17

GND

5

20

1

16

6

7

10

9

GND0

ILIM
LX2
LX1

FB0

OUT1

FB1

OUT2

FB2

R10

D1

L1

R1

R2

R3

R4

R5

R6

DC/DC
output

C2

regulator 1
output

C3

regulator 2
output

C4

Fig.8 Application in 3-cell NiCd or NiMH and 1-cell Li-Ion battery powered equipment.

2000 Jun 08 16

MGU066

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

External component selection

INDUCTOR L1
The performance of the TEA1202TS is not very sensitive

to inductance value. The best efficiency performance over
a wide load current range is achieved by using an
inductance of 6.8 µH e.g. TDK SLF7032 or Coilcraft
DO1608 range.

DC/DC INPUT CAPACITOR C1
The value of C1 strongly depends on the type of input

source. In general, a 100 µF tantalum capacitor is
sufficient.

DC/DC OUTPUT CAPACITOR C2
Thevalueand type of C2 depends on themaximumoutput

current and the ripple voltage which is allowed in the
application. Low-ESR tantalum capacitors show good
results. The most important specification of C2 is its ESR,
which mainly determines output voltage ripple.

DIODE D1
The Schottky diode is only used for short time during

takeover from N-type power MOSFET and P-type power
MOSFET and vice versa. Therefore, a medium-power
diode is sufficient in most applications e.g. Philips
PRLL5819.

FEEDBACK RESISTORS R1 AND R2
The output voltage of the DC/DC converter is determined

by the resistors R1 and R2. The following conditions
apply:

• Use a 1% accurate SMD type resistors only. If larger

body resistors are used, the capacitanceon pin FB0 will
be too large, causing inaccurate operation.

• Resistors R1 and R2 should have a maximum value of

50 kΩ when connected in parallel. A higher value will
result in inaccurate operation.

CURRENT LIMITING RESISTOR R10
The maximum instantaneous current is set by the external

resistor R10. The preferred type is SMD, 1% accurate.
The connection of resistor R10 differs for each mode:

• At upconversion: resistor R10 must be connected
between pins ILIM and UPOUT/DNIN; the current

320

I

limiting level is defined by:

Iim

=

----------­R10

• At downconversion: resistor R10 must be connected
between pins ILIM and GND0; the current limiting level

300

I

is defined by:

Iim

=

----------­R10

The average inductor current during limited current
operation also depends on the inductance value, input
voltage, output voltage and resistive losses in all
components in the power path. Ensure that
I

lim<Isat

(saturation current) of the inductor.

REFERENCE VOLTAGE DECOUPLING CAPACITOR C5
Optionally, a decoupling capacitor can be connected

between pin V

and ground in order to achieve a lower

ref

noise level of the output voltages of the LDO. The best
choice for C5 is a ceramic multilayer capacitor of
approximately 100 nF.

LDO OUTPUT CAPACITORS C3 AND C4
A typical LDO output capacitor is a ceramic multilayer

capacitor of 2.2 µF, e.g. GRM40X5R225K6.3 of Murata.
The ESR of the output capacitor must be between
10 and 100 mΩ to achieve stability and the specified
transient response.

Under these conditions, the output voltage can be
calculated by the formula:

R1



V

×

=

V

O

ref





1

+

------- -



R2

2000 Jun 08 17

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

LDO FEEDBACK RESISTORS R3, R4, R5 AND R6
The output voltage of each LDOcan be set by the external

feedback resistors. Their values can be derived from the
formulae:

R3

V

=

O

V

=

O



V

×

ref





V

×

ref





1

+

------- -



R4

R5



1

+

------- -



R6

The maximum value for each of the LDO feedback
resistors is 500 kΩ.

LOW BATTERY DETECTOR COMPONENTS R7, R8, R9 AND C6
Resistor R7 is connected between pin LBO and the input

or output pin and must be 330 kΩ or higher.
A 1-cell NiCd or NiMH battery can be connected directly to

pin LBI1.
A higher battery voltage must be applied to pin LBI2 using

a divider circuit with resistor R8 and R9. In that situation,
capacitor C6(10 µF)mustbeconnectedbetweenpin LBI1
and ground. The low-battery detection level for a higher
battery voltage can be set by the resistors at pin LBI2
using the formula:

R8



V

LBI2

0.90 1

+

×=

------- -



R9

2000 Jun 08 18

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

PACKAGE OUTLINE

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm

SOT266-1

D

c

y

Z

20

pin 1 index

11

A

2

A

1

110

w M

b

e

p

E

H

E

detail X

A

X

v M

A

Q

(A )

L

p

L

A

3

θ

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT A1A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

A

max.

1.5

0.1501.4

mm

OUTLINE
VERSION

SOT266-1 MO-152

A

0.25

b

3

p

0.32

0.20

2

1.2

IEC JEDEC EIAJ

0.20

0.13

(1)E(1)

cD

6.6

6.4

REFERENCES

4.5

0.65 1.0 0.2

4.3

2000 Jun 08 19

eHELLpQZywv θ

6.6

6.2

0.75

0.45

0.65

0.45

PROJECTION

0.13 0.1

EUROPEAN

(1)

0.48

0.18

ISSUE DATE

95-02-22
99-12-27

o

10

o

0

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

SOLDERING
Introduction to soldering surface mount packages

Thistextgives a very brief insight to a complextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wavesoldering is notalways suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screenprinting,stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling)vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemountdevices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleadson four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, thepackage must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2000 Jun 08 20

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

WAVE REFLOW

(1)

BGA, LFBGA, SQFP, TFBGA not suitable suitable

SOLDERING METHOD

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC

, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

(2)

(3)(4)
(5)

suitable

suitable
suitable

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2000 Jun 08 21

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

DATA SHEET STATUS

DATA SHEET STATUS

Objective specification Development This data sheet contains the design target or goal specifications for

Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be

Product specification Production This data sheet contains final specifications. Philips Semiconductors

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at any other conditions above thosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.

PRODUCT

STATUS

DEFINITIONS

product development. Specification may change in any manner without
notice.

published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.

reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected toresult in personalinjury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyof these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products,and makes no representations or warrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

(1)

2000 Jun 08 22

Philips Semiconductors Objective specification

Battery power unit TEA1202TS

NOTES

2000 Jun 08 23

Philips Semiconductors – a w orldwide compan y

Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips DevelopmentCorporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Via Casati,23 - 20052 MONZA (MI),
Tel. [phone], Fax [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
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South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
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Spain: Balmes 22, 08007 BARCELONA,
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Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

2000

Internet: http://www.semiconductors.philips.com

69

Printed in The Netherlands 403502/25/01/pp24 Date of release: 2000 Jun 08 Document order number: 9397 750 06773