Philips TEA1211HN Technical data

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TEA1211HN

High efficiency auto-up/down
DC/DC converter

Preliminary specification
Supersedes data of 2003 Aug 06

2003 Oct 13

Philips Semiconductors Preliminary specification

High efficiency auto-up/down
DC/DC converter

CONTENTS

1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 ORDERING INFORMATION
5 BLOCK DIAGRAM
6 PINNING
7 FUNCTIONAL DESCRIPTION

7.1 Introduction

7.2 Control mechanism

7.2.1 PWM

7.2.2 PFM

7.2.3 Switching sequence

7.3 Adjustable output voltage

7.4 Start-up

7.5 Under voltage lockout

7.6 Shut-down

7.7 Power switches

7.8 Synchronous rectification

7.9 PWM-only mode

7.10 External synchronisation

7.11 Current limiter

7.12 I2C-bus serial interface

7.12.1 Characteristics of the I2C-bus

7.12.2 START and STOP conditions

7.12.3 Bit transfer

7.12.4 Acknowledge

7.13 I2C-bus protocol

7.13.1 Addressing

7.13.2 Data

7.13.3 Write Cycle

TEA1211HN

8 LIMITING VALUES
9 THERMAL CHARACTERISTICS
10 CHARACTERISTICS
11 APPLICATION INFORMATION

11.1 Typical Li-Ion, 2- or 3-cell application with
I2C-bus programming

11.2 Component selection

11.2.1 Inductor

11.2.2 Capacitors

11.2.3 Schottky diodes

11.2.4 Feedback resistors

11.2.5 Current Limiter

12 PACKAGE OUTLINE
13 SOLDERING

13.1 Introduction to soldering surface mount
packages

13.2 Reflow soldering

13.3 Wave soldering

13.4 Manual soldering

13.5 Suitability of surface mount IC packages for
wave and reflow soldering methods

14 DATA SHEET STATUS
15 DEFINITIONS
16 DISCLAIMERS
17 PURCHASE OF PHILIPS I2C COMPONENTS

2003 Oct 13 2

Philips Semiconductors Preliminary specification

High efficiency auto-up/down
DC/DC converter

1 FEATURES

• I2C-bus programmable output voltage range of

1.5 V to 5.5 V

• Single inductor topology

• High efficiency up to 94 % over wide load range

• Wide input range; functional from 2.55 V up to 5.5 V

• 1.7 A maximum input and output current

• Low quiescent power consumption

• 600 kHz switching frequency

• Four integrated very low R

• Synchronizable to external clock

• Externally adjustable current limit for protection and

efficient battery use in case of dynamic loads

• Under voltage lockout

• PWM-only option

• Shut-down current less than 1 µA

• 32-pin small body HVQFN package.

2 APPLICATIONS

power MOSFETs

DS(on)

TEA1211HN

3 GENERAL DESCRIPTION

The TEA1211HN is a fully integrated auto-up/down
DC/DC converter circuit with I2C-bus interface. Efficient,
compactanddynamicpower conversionis achievedusing
adigitally controlledpulse widthand frequencymodulation
like control concept, four integrated low R
switches with low parasitic capacitances and fully
synchronous rectification.

Thecombination ofauto-up/downDC/DC conversion,high
efficiency andlow switchingnoise makesthe TEA1211HN
well suited to supply a power amplifier in a cellular phone.

The output voltage can be I2C-bus programmed to the
exact voltage needed to achieve a certain output power
level withoptimal systemefficiency, thus enlargingbattery
lifetime.

DS(on)

power

• Stable output voltage from Lithium-Ion batteries

• Variable voltage source for PAs (Power Amplifiers) in

cellular phones

• Wireless handsets

• Hand-held instruments

• Portable computers.

4 ORDERING INFORMATION

TYPE

NUMBER

TEA1211HN HVQFN32 plastic thermal enhanced very thin quad flat package; no leads;

NAME DESCRIPTION VERSION

32 terminals; body 5 × 5 × 0.85 mm

TheTEA1211HN operatesat600 kHz switchingfrequency
which enables theuse of small sizeexternal components.
The switchingfrequency can belocked toan external high
frequency clock. Deadlock is prevented by an on-chip
under voltage lockout circuit. An adjustable current limit
enables efficient battery use even at high dynamic loads.
Optionally, the device can be kept in pulse width
modulation mode regardless of the load applied.

PACKAGE

SOT617-3

2003 Oct 13 3

Philips Semiconductors Preliminary specification

High efficiency auto-up/down
DC/DC converter

5 BLOCK DIAGRAM

handbook, full pagewidth

IN

n.c.

2, 31, 32

INTERNAL

SUPPLY

TEMPERATURE

PROTECTION

13 MHz

OSCILLATOR

CLOCK

SELECTOR

6, 8, 17, 19

TEA1211HN

I2C-BUS INTERFACE

P-type power FET

sense FET

DIGITAL

CONTROLLER

P-down

Current limit

comparator

N-down

10, 11

N-type

power FETs

LXBLXA

14, 15, 21, 22, 241, 3, 4,

N-up

P-type power FET

P-up

Window
comparator

BANDGAP

REFERENCE

TEA1211HN

23, 25, 26

OUT

27

FB

29

SYNC/PWM SHDWN SCL SDA ILIM GND

28 12 13 30

6 PINNING

SYMBOL PIN DESCRIPTION

LXA 1 inductor connection 1
IN 2 input voltage
LXA 3 inductor connection 1
LXA 4 inductor connection 1
GND 5 ground
n.c. 6 not connected
GND 7 ground
n.c. 8 not connected
GND 9 ground
LXA 10 inductor connection 1
LXA 11 inductor connection 1

2

SCL 12 serial clock input line I

C-bus

SDA 13 serial data input/output line

2

C-bus

I
LXB 14 inductor connection 2
LXB 15 inductor connection 2
GND 16 ground

5, 7, 9, 16, 18, 20

MDB001

Fig.1 Block diagram.

SYMBOL PIN DESCRIPTION

n.c. 17 not connected
GND 18 ground
n.c. 19 not connected
GND 20 ground
LXB 21 inductor connection 2
LXB 22 inductor connection 2
OUT 23 output voltage
LXB 24 inductor connection 2
OUT 25 output voltage
OUT 26 output voltage
FB 27 feedback input
SHDWN 28 shut-down input
SYNC/PWM 29 synchronization clock input,

PWM-only input
ILIM 30 current limit resistor connection
IN 31 input voltage
IN 32 input voltage

2003 Oct 13 4

Philips Semiconductors Preliminary specification

High efficiency auto-up/down
DC/DC converter

handbook, halfpage

8

n.c.

7

GND

6

n.c.

5

GND

4

LXA

3

LXA

2

IN

1

LXA

This diagram is a bottom side view.
Pin 1 is indicated with a dot on the top side of the package.
For mechanical details of HVQFN32 package, see Chapter 12.

GND

9

32
IN

LXA

10

31
IN

SDA

LXA

SCL

11

13

TEA1211HN

282627

30

29

ILIM

SHDWN

SYNC/PWM

LXB
141215

FB

LXB

OUT

GND
16

17
18
19
20
21
22
23
24

25

MDB002

OUT

TEA1211HN

n.c.
GND
n.c.
GND
LXB
LXB
OUT
LXB

Fig.2 Pin configuration.

7 FUNCTIONAL DESCRIPTION

7.1 Introduction

The TEA1211HN is able to operate in Pulse Frequency
Modulation (PFM) or discontinuous conduction mode as
well as in Pulse Width Modulation (PWM) or continuous
conduction mode. All switching actions are completely
determined by a digital control circuit which uses the
output voltage levelas control input. This digital approach
enables the use of a new pulse width and frequency
modulation scheme, which ensures optimum power
efficiency over the complete range of operation of the
converter.

7.2 Control mechanism

Depending on load current I

and VIN to V

load

ratio, the

OUT

controller choosesa mode ofoperation. Whenhigh output
power is requested, the device will operate in PWM
(continuousconduction)mode, whichis a2-phase cyclein
up- as well as in down mode. For small load currents the
controller will switch over to PFM (discontinuous mode),
which is either a 3- or 4-phase cycle depending on the
input to output ratio, see Fig.3.

handbook, halfpage

I

coil

0

VIN > V

OUT

down mode

VIN = V

OUT

stationary mode

Fig.3 Waveform of coilcurrentas function of I

and VIN to V

OUT

ratio.

VIN < V

up mode

PWM
PFM

OUT

MDB003

load

2003 Oct 13 5

Philips Semiconductors Preliminary specification

High efficiency auto-up/down
DC/DC converter

7.2.1 PWM
PWM results in minimum AC currents in the circuit

components and hence optimum efficiency, cost and
EMC. In this mode the output voltage is allowed to vary
between two predefined voltage levels. When the output
voltage stays within this so called window, switching
continues in a fixed pattern. When the output voltage
reaches one of the window borders, the digital controller
immediately reacts by adjusting the duty cycle and
inserting a current step in such a way that the output
voltage stays within the window with higher or lower
current capability. This approach enables very fast
reaction to load variations.

Figure 4 shows the TEA1211HN’s response to a sudden
load increase in case of up conversion. The upper trace
showstheoutput voltage.The rippleon topof theDC level
is a result of the current in the output capacitor, which
changes in sign twice per cycle, multiplied by the
capacitor’s internal Equivalent Series Resistance (ESR).
After eachramp-down of the inductorcurrent, or whenthe
ESR effect increases theoutput voltage, the TEA1211HN
determines what to do in the next cycle.As soon as more
load current is taken from the output the output voltage
starts to decay. When the output voltage becomes lower
than the low limit ofthe window, corrective action is taken
by a ramp-upof the inductor currentduring a much longer
time. As a result, the DC current level is increased and

TEA1211HN

normal PWM control can continue. The output voltage
(including ESR effect) is again within the predefined
window.

Figure 5 depicts the spread of theoutput voltage window.
Theabsolute valueismost dependentonspread,whilethe
actualwindowsize isnot affected.For onespecific device,
the output voltage will not vary more than 2 % typically.

7.2.2 PFM
In low output power situations, TEA1211HN will switch

over to PFM mode operation in case PWM-only mode is
not activated. In this mode charge is transferred from
battery to output in single pulses with a wait phase in
between. Regulation information from earlier PWM mode
operation is used. This results in optimum inductor peak
current levels in PFMmode,which are slightly larger than
the inductor ripple current in PWM mode. As a result, the
transition between PFM and PWM mode is optimal under
all circumstances. In PFM mode, the TEA1211HN
regulates the output voltage to the limits shown in Fig.5.
Depending on the VIN to V
decides for a 3- or 4-phase cycle, where the last phase is
the wait phase. When the inputvoltagealmost equals the
output voltage, one of the slopes of a 3-phase cycle
becomes weak. Then the charge, or the integral of its
pulse, is near to zero and no charge is transferred. In this
region the 4-phase cycle is used, (see Fig.3).

ratio the TEA1211HN

OUT

handbook, full pagewidth

V

OUT

I

load

load increase

start corrective action

Fig.4 Response to load increase in up-mode.

2003 Oct 13 6

time

time

high window limit

low window limit

MDB004

Philips Semiconductors Preliminary specification

High efficiency auto-up/down
DC/DC converter

handbook, full pagewidth

V

Vh= High window limit
Vl= Low window limit

OUT

(typ.)

2%

maximum positive spread of V

V

h

V

l

+4%

V

h

2%

V

l

−4%

maximum negative spread of V

FB

V

h

2%

V

l

upper specification limit

typical situation

lower specification limit

FB

TEA1211HN

MDB005

Fig.5 Spread of location of output voltage window.

7.2.3 SWITCHING SEQUENCE
Refer to Figures 1 and 3. In up-mode the cycle starts by

making P-down and N-up conducting in the first phase.
The second phase N-up opens and P-up starts
conducting. In down-mode the cycle startswithin the first
phase P-up and P-down conducting. The second phase
P-down opens and N-down starts conducting. In PFM
these twophases arefollowed bya thirdor waitphase that
opens all switches except for N-down, which is closed to
prevent the coil from floating.

The stationary mode or 4-phase cycle, which only occurs
in PFM, starts with in the first phase P-down and N-up
conducting. In the second phase P-down and P-up
conduct forming a short-cut from battery to output
capacitor. In the third phase P-up and N-down conduct.
The fourth or wait-phase again opens all switches except
for N-downwhich isclosed toprevent thecoil from floating.

7.3 Adjustable output voltage

Theoutput voltageof theTEA1211HN canbeset toa fixed
value by means of an external resistive divider. After
start-up through thisdivider, dynamic control ofthe output
voltage ismade possible by useof an I2C-bus. Theoutput
voltage can be programmed from 1.5 V to 5.5 V in
40 steps of 0.1 V each.Incase of Power Amplifiers (PAs)
for example the outputvoltage of the TEA1211HN can be
adjusted to the output power to be transmitted by the PA,
in order to obtain maximum system efficiency.

7.4 Start-up

If the input voltage exceeds the start voltage, the
TEA1211HN starts ramping up the voltage at the output
capacitor. Rampingstops when thetarget level, setby the
external resistors, is reached.

7.5 Under voltage lockout

As a result of too high load or disconnection of the input
power source, the input voltage can drop too low to
guarantee normal regulation. In that case, the device
switches to a shut-down mode stopping the switching
completely. Start-up is possible by crossing the start-up
level again.

7.6 Shut-down

When pin SHDWN is made HIGH, the converter disables
all switches except for N-down (see Fig.1) and power
consumption is reduced to a few µA. N-down is kept
conducting to prevent the coil from floating.

7.7 Power switches

The power switches in the IC are two N-type and two
P-type MOSFETs,having atypical pin-to-pin resistanceof
85 mΩ. The maximum continuous input/output current in
the switches is 1.7 A at 70 °C ambient temperature.

2003 Oct 13 7