Philips 74HCT21U, 74HCT21NB, 74HCT21N, 74HCT21DB, 74HCT21D Datasheet

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DATA SH EET
Product specification File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT21
Dual 4-input AND gate
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990 2
Philips Semiconductors Product specification
Dual 4-input AND gate 74HC/HCT21
FEATURES
Output capability: standard
ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT21 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT21 provide the 4-input AND function.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; tr=tf= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PD in µW):
PD=CPD× V
CC
2
× fi +(CL× V
CC
2
× fO) where: fi= input frequency in MHz fo= output frequency in MHz CL= output load capacitance in pF VCC= supply voltage in V (CV
CC
2
× fo) = sum of outputs
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/ t
PLH
propagation delay nA, nB, nC, nD to nY CL= 15 pF; VCC= 5 V 10 12 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per package notes 1 and 2 15 16 pF
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