ON Semiconductor 2N6497 Datasheet

1

Motorola Bipolar Power Transistor Device Data

     


. . . designed for high voltage inverters, switching regulators and line–operated
amplifier applications. Especially well suited for switching power supply applications.

• High Collector–Emitter Sustaining Voltage —
V

CEO(sus)

= 250 Vdc (Min) — 2N6497

V

CEO(sus)

= 300 Vdc (Min) — 2N6498

• Excellent DC Current Gain
hFE = 10–75 @ IC = 2.5 Adc

• Low Collector–Emitter Saturation Voltage @ IC = 2.5 Adc —
V

CE(sat)

= 1.0 Vdc (Max) — 2N6497

V

CE(sat)

= 1.25 Vdc (Max) — 2N6498

MAXIMUM RATINGS (1)

Rating

Symbol

2N6497

2N6498

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Unit

Collector–Emitter Voltage

V

CEO

250

300

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Vdc

Collector–Base Voltage

V

CB

350

400

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Vdc

Emitter–Base Voltage

V

EB

6.0

6.0

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Vdc

Collector Current — Continuous

— Peak

I

C

5.0
10

5.0
10

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Adc

Base Current

I

B

2.0

2.0

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Adc

Total Power Dissipation @ TC = 25_C

Derate above 25_C

P

D

80

0.64

80

0.64

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Watts
W/_C

Operating and Storage Junction Temperature Range

TJ,T

stg

–65 to +150

–65 to +150

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

_

C

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Unit

Thermal Resistance, Junction to Case

R

θJC

1.56

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

_

C/W

(1) Indicates JEDEC Registered Data.

Preferred devices are Motorola recommended choices for future use and best overall value.



SEMICONDUCTOR TECHNICAL DATA

Order this document

by 2N6497/D

 Motorola, Inc. 1995




*Motorola Preferred Device

5 AMPERE

POWER TRANSISTORS

NPN SILICON

250 & 300 VOLTS

80 WATTS



CASE 221A–06

TO–220AB

REV 7

 

2

Motorola Bipolar Power Transistor Device Data

*ELECTRICAL CHARACTERISTICS (T

C

= 25_C unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

ÎÎÎ

ÎÎÎ

ÎÎÎ

Unit

OFF CHARACTERISTICS

Collector–Emitter Sustaining Voltage (1)

(IC = 25 mAdc, IB = 0) 2N6497

2N6498

V

CEO(sus)

250
300

—
—

—
—

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

Vdc

Collector Cutoff Current

(VCE = 350 Vdc, V

BE(off)

= 1.5 Vdc) 2N6497

(VCE = 400 Vdc, V

BE(off)

= 1.5 Vdc) 2N6498

(VCE = 175 Vdc, V

BE(off)

= 1.5 Vdc, TC = 100_C) 2N6497

(VCE = 200 Vdc, V

BE(off)

= 1.5 Vdc, TC = 100_C) 2N6498

I

CEX

—
—
—
—

—
—
—
—

1.0

1.0
10
10

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

mAdc

Emitter Cutoff Current

(VBE = 6.0 Vdc, IC = 0)

I

EBO

—

—

1.0

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

mAdc

ON CHARACTERISTICS (1)

DC Current Gain

(IC = 2.5 Adc, VCE = 10 Vdc)
(IC = 5.0 Adc, VCE = 10 Vdc)

h

FE

10

3.0

—
—

75
—

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

—

Collector–Emitter Saturation Voltage

(IC = 2.5 Adc, IB = 500 mAdc) 2N6497

2N6498

(IC = 5.0 Adc, IB = 2.0 Adc) All Devices

V

CE(sat)

—
—
—

—
—
—

1.0

1.25

5.0

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

Vdc

Base–Emitter Saturation Voltage

(IC = 2.5 Adc, IB = 500 mAdc)
(IC = 5.0 Adc, IB = 2.0 Adc)

V

BE(sat)

—
—

—
—

1.5

2.5

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

Vdc

DYNAMIC CHARACTERISTICS

Current–Gain — Bandwidth Product

(IC = 250 mAdc, VCE = 10 Vdc, f = 1.0 MHz)

f

T

5.0

—

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

MHz

Output Capacitance

(VCB = 10 Vdc, IE = 0, f = 100 kHz)

C

ob

—

—

150

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

pF

SWITCHING CHARACTERISTICS

Rise Time

(VCC = 125 Vdc, IC = 2.5 Adc, IB1 = 0.5 Adc)

t

r

—

0.4

1.0

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

µs

Storage Time

(VCC = 125 Vdc, IC = 2.5 Adc, VBE = 5.0 Vdc, IB1 = IB2 = 0.5 Adc)

t

s

—

1.4

2.5

ÎÎÎ

ÎÎÎ

ÎÎÎ

µs

Fall Time

(VCC = 125 Vdc, IC = 2.5 Adc, IB1 = IB2 = 0.5 Adc)

t

f

—

0.45

1.0

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

µs

*Indicates JEDEC Registered Data.
(1) Pulse Test: Pulse Width v 300 µs, Duty Cycle v 2.0%.

Figure 1. Switching Time Test Circuit

1.0

Figure 2. Turn–On Time

IC, COLLECTOR CURRENT (AMP)

0.05 5.0

VCC = 125 V
IC/IB = 5.0
TJ = 25

°

C

1.00.1 2.0

+ 11 V

0

SCOPE

RB

[

20

– 5.0 V

tr, tf

v

10 ns

DUTY CYCLE = 1.0%

D1 MUST BE FAST RECOVERY TYPE, e.g.:

1N5825 USED ABOVE IB

[

100 mA

MSD6100 USED BELOW IB

[

100 mA

25 µs

– 9.0 V

D

1

RB AND RC VARIED TO OBTAIN DESIRED CURRENT LEVELS

V

CC

+ 125 V

RC

[

50

t

r

td @ V

BE(off)

= 5.0 V

t, TIME ( s)

µ

0.01

0.7

0.5

0.3

0.2

0.1

0.07

0.05

0.03

0.02

0.07 3.00.30.2 0.5 0.7

 

3

Motorola Bipolar Power Transistor Device Data

Figure 3. Thermal Response

t, TIME OR PULSE WIDTH (ms)

1.0

0.01

0.01

0.7

0.5

0.3

0.2

0.1

0.07

0.05

0.03

0.02

0.02

r(t) EFFECTIVE TRANSIENT

THERMAL RESISTANCE (NORMALIZED)

0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 1000500

R

θ

JC(max)

= 1.56

°

C/W

D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t

1

T

J(pk)

– TC = P

(pk)

R

θ

JC(t)

P

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

2

D = 0.5

SINGLE PULSE

0.2

0.05

0.1

0.02

0.01

SINGLE

PULSE

0.03 0.3 3.0 30 300

BONDING WIRE LIMITED
THERMAL LIMIT (SINGLE PULSE)
SECOND BREAKDOWN LIMIT

20

Figure 4. Active–Region Safe Operating Area

2.0

10 20 500

TC = 25°C

0.2

5.0

0.5

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

10

70

1.0

0.02

dc

5.0 1007.0

2N6497
2N6498

CURVES APPLY BELOW RATED V

CEO

5.0 ms 1.0 ms 100 µs

I

C

, COLLECTOR CURRENT (AMP)

0.1

0.05

30 50 300200

There are two limitations on the power handling ability of a
transistor: average junction temperature and second break­down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa­tion than the curves indicate.

The data of Figure 4 is based on TC = 25_C; T

J(pk)

is
variable depending on power level. Second breakdown pulse
limits a re valid f or duty cycles to 1 0% provided T

J(pk)

v

150_C. T

J(pk)

may be calculated from the data in Figure 3.
At high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown. Second breakdown limita­tions do not derate the same as thermal limitations. Allow­able current at the voltage shown on Figure 4 may be found
at any case temperature by using the appropriate curve on
Figure 6.

Figure 5. Turn–Off Time

IC, COLLECTOR CURRENT (AMP)

VCC = 125 V
IC/IB = 5.0
TJ = 25°C

t

s

t

f

t, TIME ( s)

µ

10

7.0

5.0

3.0

2.0

1.0

0.7

0.5

0.1

0.3

0.2

0.05 5.01.00.1 2.00.07 3.00.30.2 0.5 0.7

100

80

60

20

0

0 20 40 60 80 100 120 140 160

Figure 6. Power Derating

TC, CASE TEMPERATURE (°C)

POWER DERATING FACTOR (%)

THERMAL DERATING

SECOND BREAKDOWN DERATING

40

 

4

Motorola Bipolar Power Transistor Device Data

TS)

100

Figure 7. DC Current Gain

IC, COLLECTOR CURRENT (AMP)

5.0

50

30

20

1.4

Figure 8. Collector Saturation Region

IC, COLLECTOR CURRENT (AMP)

1.0

0.6

0.4

0.2
0

TJ = 25°C

V

BE(sat)

@ IC/IB = 5.0

4.0

Figure 9. “On” Voltages

IB, BASE CURRENT (mA)

0

0.01 0.05 0.1 0.2 1.0 10

3.2

VBE, BASE–EMITTER VOLTAGE (VOLTS)

70

h

FE

, DC CURRENT GAIN

TJ = 150°C

25°C

–55°C

, COLLECTOR CURRENT ( A)

µ

I

C

–0.2–0.1

REVERSE FORWARD

TJ = 25°C

IC = 1.0 A

2.0 A

V, VOLTAGE (VOLTS)

+4.0

Figure 10. Temperature Coefficients

IC, COLLECTOR CURRENT (AMP)

V

, TEMPERATURE COEFFICIENTS (mV/ C)

°θ

+3.0

+1.0

0

–3.0

θ

VB

for V

BE

*

θ

VC

for V

CE(sat)

*APPLIES FOR IC/IB

v

h

FE

@ V

CE

+

10 V

3

Figure 11. Collector Cutoff Region

VBE @ VCE = 10 V

1.2

0.8

0.02 0.5

2.4

1.6

0.8

+2.0

–1.0

–2.0

10

4

10

3

10

0

10

–1

10

–2

VCE = 10 V

10

7.0

0.05 0.1 0.2 0.3 1.00.07 0.70.5 2.0 3.0 5.0

3.0 A 5.0 A

2.0 5.0

V

CE(sat)

@ IC/IB = 5.0

IC/IB = 2.5

0.05 0.1 0.2 0.3 1.00.07 0.70.5 2.0 3.0 5.0 0.05 0.1 0.2 0.3 1.00.07 0.70.5 2.0 3.0 5.0

–55 to 25°C

–55°C to 25°C

25°C to 150°C

25°C to 150°C

25°C

100°C

VCE = 200 V

TJ = 150°C

10

2

10

1

0 +0.6+0.4+0.2

1000

0.4
VR, REVERSE VOLTAGE (VOLTS)

10

4.0 6.0 10 20 60 200 400400.6 1.0 2.0

C, CAPACITANCE (pF)

500

100

70
50

TJ = 25°C

C

ib

C

ob

Figure 12. Capacitance

700

200

300

30
20

100

, COLLECTOR–EMITTER VOLTAGE (VOL

CE

V

 

5

Motorola Bipolar Power Transistor Device Data

PACKAGE DIMENSIONS

CASE 221A–06

TO–220AB

ISSUE Y

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.570 0.620 14.48 15.75
B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
D 0.025 0.035 0.64 0.88
F 0.142 0.147 3.61 3.73

G 0.095 0.105 2.42 2.66

H 0.110 0.155 2.80 3.93
J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33

Q 0.100 0.120 2.54 3.04

R 0.080 0.110 2.04 2.79
S 0.045 0.055 1.15 1.39
T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27
V 0.045 ––– 1.15 –––
Z ––– 0.080 ––– 2.04

B

Q

H

Z

L

V

G

N

A

K

F

1 2 3

4

D

SEATING
PLANE

–T–

C

S

T

U

R
J

 

6

Motorola Bipolar Power Transistor Device Data

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2N6497/D

*2N6497/D*

◊