OLYMPUS C-8080W Zoom DESCRIPTION OF MECHANISM

H. DESCRIPTION OF MECHANISM
C-8080Wide Zoom
H. DESCRIPTION OF MECHANISM
[1] CA1 CIRCUIT DESCRIPTION ................................................................................ H-2
[2] CP1 CIRCUIT DESCRIPTION ................................................................................ H-4
[3] PW1 POWER CIRCUIT DESCRIPTION ................................................................. H-5
[4] ST1 STROBE CIRCUIT DESCRIPTION................................................................. H-6
H-1 Ver.1
H. DESCRIPTION OF MECHANISM C-8080Wide Zoom
2
8
1
D
[1] CA1 CIRCUIT DESCRIPTION
1. IC Configuration
IC903 (ICX456AQ) CCD imager IC904 (AD9945) CDS, AGC, A/D converter IC905 (CXD3622GA) TG
2. IC903 (CCD)
[Structure]
Interline type CCD image sensor
Optical size Diagonal 11 mm (2/3 type) Effective pixels 3280 (H) x 2454 (V) Pixels in total 3350 (H) x 2482 (V) Optical black
Horizontal (H) direction: Front 12 pixels, Rear 50 pixels Vertical (V) direction: Front 8 pixels, Rear 2 pixels
Pin 1
V
14
GND
OUT
V
13
GND
1615
Ø1B
V
Ø1
LH
V
10
19
Ø1C
H
Ø2
V
V
8
9
Gb
R
Gb
R
Gb
R
Gb
Vertical register
R
Gb
R
Horizontal register
20
21
Ø2C
GND
H
7
6
B
Gr
B
Gr
B
Gr
B
Gr
B
Gr
23
22
Ø1B
H
(Note) : Photo sensor
Ø1A
V
12
11
1817
DD
RG
V
Ø
V
Ø2B
H
Ø5B
Ø5A
V
V
3
4
5
B
Gb
Gr
R
B
Gb
Gr
R
B
Gb
Gr
R
B
Gb
Gr
R
B
Gb
Gr
R
(Note)
25
26
24
SUB
SUB
C
Ø
Ø4
Ø3AVØ3B
Ø1C
ØHL
Ø6
ØST
V
V
V
1
2
28
27
L
V
Ø2A
Ø1A
H
H
2
Pin 15
H
Fig. 1-1.Optical Black Location (Top View)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Symbol
Vφ
HLD
VφST
Vφ6
Vφ5B
Vφ5A
Vφ4
Vφ3B
Vφ3A
Vφ2
Vφ1C
Vφ
1B
1A
Vφ
GND
GND
Horizontal addition control clock
Horizontal addition control clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
GND
Pin Description
50
Pin No.
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Fig. 1-2. CCD Block Diagram
Symbol
OUT
V
VDD
φRG
LHφ
1
Hφ1C
Hφ2C
GND
Hφ
1B Horizontal register transfer clock
2B
Hφ
φSUB
C
SUB
V
L
1A
Hφ
Hφ2A
Signal output
Circuit power
Reset gate clock
Horizontal register last step transfer clock
Horizontal register transfer clock
Horizontal register transfer clock
GND
Horizontal register transfer clock
Substrate clock
Substrate bias
Protection transistor bias
Horizontal register transfer clock
Horizontal register transfer clock
Pin Description
Table 1-1. CCD Pin Description
H-2 Ver. 1
H. DESCRIPTION OF MECHANISMC-8080Wide Zoom
C
B
D S
3. IC905 (TG)
IC905 is timing generator for image sensor. This is equipped with H driver and V driver.
4. IC904 (CDS, AGC and A/D converter)
IC904 contains the functions of CDS, AGC and A/D con­verter. The video signal which is output from the CCD is input to pins (22) of IC904. There are sample hold blocks inside IC904 generated from the SHP and SHD pulses, and it is here that CDS (correlated double sampling) is carried out. After passing through the CDS circuit, the signal passes through the AGC amplifier (PGA: Programmable Gain Am­plifier). It is A/D converted internally into a 12-bit signal, and is then input to ASIC (IC102). The gain of the AGC amplifier is controlled by pin (25)-(27) serial signal which is output from ASIC (IC102).
PBLK
VRB
VRT
DRVD DRVS
12
DOUT
CDIN
AD9945
CDS
6~40 dB
VGA
BANDGAP
REFERENCE
12-BIT
ADC
+
AVDD AVSS
8
CLP
BLK LEVEL
OFFSET
INTERNAL
TIMING
SHP
SHD
10
CONTROL
REGISTERS
DIGITAL
INTERFACE
SL
SCK
SDATA
Fig. 1-3. IC904 Block Diagram
DATACLK
CLPO
DVDD DVSS
H-3 Ver. 1
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