E2E1018-27-Y3
¡ Semiconductor
This version: Jan. 1998
Previous version: Nov. 1996
MSM65344A¡ Semiconductor
MSM65344A
8-Bit Microcontroller with A/D Converter (with LCD Driver)
GENERAL DESCRIPTION
The MSM65344A is a high performance 8-bit microcontroller that employs OKI original CPU
core nX-8/50. The MSM65344A includes 12K-byte program memory, 384-byte data memory,
LCD driver, timer, PWM, serial I/O, and 8-bit A/D converter. Also available is the MSM65P344,
which replace the on-chip program memory with one-time PROM.
FEATURES
• Operating range
Operating voltage : 2.7V to 5.5V
Operating temperature : –20°C to +70°C
Operating frequency : 0 to 10MHz (@V
0 to 5MHz (@VDD=2.7V to 5.5V)
Current consumption (TYP.) : 5mA (@5MHz, VDD=3V)
: 20mA (@10MHz, VDD=5V)
1.5mA (@5MHz, VDD=3V, HALT MODE)
4mA (VDD=3V, STOP MODE)
• Minimum instruction execution time : 400ns (@10MHz), 800ns (5MHz)
• CPU core : 8-bit CPU core nX-8/50
• General memory space : Internal 12K-byte program memory
• Local memory space : Internal 384-byte data memory + SFR
• LCD driver : 16 ¥ 4 (selectable duty cycle from 1/4, 1/3 or
1/2 with software)
• I/O port : 7 ports, 48 bits
Input-output port : 3 ports ¥ 8 bits, 1 port ¥ 7 bits, 1 port ¥ 6 bits,
1 port ¥ 3 bits
Input port : 1 port ¥ 6 bits, 1 port ¥ 1 bit
Output-port : 1 port ¥ 1 bit
• Timer : 8-bit auto-reload timer ¥ 2
• Counter : Time base counter ¥ 1 (14 bits)
• Serial I/O : 1ch, clock sync ¥ 1
• PWM : 2ch, 8-bit duty, cycle from 1Hz to 80kHz
(@10MHz)
• Buzzer output circuit : 1 circuit, selectable from 1kHz to 16kHz
• A/D converter : 8-bit ¥ 6-ch
• External interrupt : 2 lines, selectable from rising edge/falling
edge/both edges
• External interrupt for remote control : With sampling circuit for noise prevention
• Interrupt source : 11 sources
• Package:
80-pin plastic QFP (QFP80-P-1420-0.80-BK) (Product name: MSM65344A-¥¥¥GS-BK)
¥¥¥ indicates the code number.
• Others : CPU clock can be an OSC or half-OSC clock.
Time base counter can be selected with 1/4n
of a CPU clock (n=1 to 8).
=5V±10%)
DD
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MSM65344A¡ Semiconductor
BLOCK DIAGRAM
RAM
(384 bytes)
TBC
BUZZER OUTPUT
CIRCUIT
PWM
8-bit TIMER¥2
SIO (SYNC MODE)
INTERRUPT
CONT.
BZ*
PWM0*
PWM1*
INT0*
INT1*
T1OUT*
T0CK*
GATE*
SFTO2*
SFTI2*
SFTCK2*
SAMPLING
CIRCUIT
INTRMC*
BUS
CONT.
ROM
(12K bytes)
GMAR
PC
LMARSPPSWBRAR
ALU
IR
INST.
DEC.
T/C
OSC.
CONT.
OSC0
OSC1
RESET
HSTOP*
CLKOUT*
V
DD
GND
LCD DRIVER
V
DD1VDD2VDD3
C1
C2
COM1
COM4
SEG0
SEG15
I/O PORT
P7
P6
P5
P4
P3
P1
P0
8-bit A/D C
¥ 6ch
AGND
AVDDAI0-5*
* Secondary function of each port
CPU CORE
PIN CONFIGURATION (TOP VIEW)
DD2
DD3
V
V
C1
C2
COM1
COM2
COM3
74
75
76
77
78
79
80
DD1
V
73
P6.7
72
P6.6
71
P6.5
70
P6.4
69
P6.3
68
P6.1(OUT)
P6.2
66
67
MSM65344A¡ Semiconductor
P6.0(IN)
65
COM4
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
AGND
P3.0/AI0
P3.1/AI1
P3.2/AI2
P3.3/AI3
P3.4/AI4
P3.5/AI5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
64
RESET
63
GND
62
OSC0
61
OSC1
60
P0.0/INT0
59
P0.1/HSTOP
P0.2/T1OUT58
57
P0.3/T0CK
56
P0.4/INT1
55
P0.5/CLKOUT
54
P0.6
53
P0.7/BZ
V
52
DD
51
P1.2/PWM1
50
P1.3/PWM0
49
P1.4/INTRMC
48
P7.7/SFTO2
47
P7.6/SFTI2
P7.5/SFTCK246
45
P7.4
44
P7.3
43
P7.2
42
P7.1
41
P7.0
25
DD
AV
26
P5.6
27
P5.5
28
P5.4
34
33
32
31
30
29
P4.6
P4.7
P5.0
P5.1
P5.2
P5.3
80-Pin Plastic QFP
35
P4.5
36
P4.4
37
P4.3
38
P4.2
39
P4.1
40
P4.0
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PIN DESCRIPTION
Basic Function
MSM65344A¡ Semiconductor
Function Pin Type Description
52 — Digital supply voltage (5V)
63 — Digital ground (0V)
25 — Analog supply voltage (5V)
Power Supply
18 — Analog ground (0V)
73 — Bias output for LCD driver
74 — Bias output for LCD driver
75 — Bias output for LCD driver
76 — Pins for connecting capacitors that generate bias
77 —
Symbol
V
DD
GND
AV
DD
AGND
V
DD1
V
DD2
V
DD3
C1
C2
for the LCD driver.
Oscillation input pin on the OSC side:
62 Input
OSC0
Connect to a quartz oscillator (ceramic resonator),
or input external clock.
Oscillation
61 Output
OSC1
Oscillation output pin on the OSC side:
Connect to a quartz oscillator (ceramic resonator).
When external clock is input to the OSC0 pin, the
OSC1 pin should be kept open.
System reset input:
When this pin is set to the "L" level, the internal
Control
64 Input
RESET
status is initialized to start execution of
instructions from address 0040H. The input is
pulled up to V
with an internal pull-up resistor.
DD
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Basic Function (Continued)
MSM65344A¡ Semiconductor
Function Pin Type Description
60
to
53
51
to
49
19
to
24
40
to
33
Port
32
to
26
Symbol
P0.0
to
P0.7
P1.2
to
P1.4
P3.0
to
P3.5
P4.0
to
P4.7
P5.0
to
P5.6
I/O
I/O
I/O
I/O
8-bit input-output port (port 0):
Each of bits 0 to 7 can be configured to be an input
or an output by the direction register of port 0
(P0DIR).
In addition to the basic function as an input-output
port, a secondary function is allocated to each of
P0.0 through P0.7. Refer to the next table.
3-bit input-output port (port 1):
Each of bits 1.2 to 1.4 is configured to be input or
output by the direction register of port 1 (P1DIR).
In addition to the basic function as an input-output
port, a secondary function is allocated to each of
P1.2 through P1.4. Refer to "PIN DESCRIPTION
(Secondary Function)".
6-bit input port (port 3):
I
Each of P3.0 to P3.5 functions as analog input
channel of A/D converter.
8-bit input-output port (port 4):
8-bit input-output port.
7-bit input-output port (port 5):
Each of bits 5.0 to 5.6 can be configured to be an
input or an output by the direction register of
port 5 (P5DI).
LCD Driver
65 I
66 O
67
to
72
41
to
48
78
to
1
2
to
17
P6.0
(IN)
P6.1
(OUT)
P6.2
to
P6.7
P7.0
to
P7.7
COM1
to
COM4
SEG0
to
SEG15
I/O
I/O
1-bit input port (port 6.0):
1-bit input port.
1-bit output port (port 6.1):
Pulled high when reset is done. If this pin is set to
the "0" level during reset, this IC goes into a test
mode, disabling execution of the user program.
6-bit input-output port (port 6):
6-bit input-output port.
8-bit input-output port (port 7):
Each of bits 7.0 to 7.7 can be configured to be an
input or an output by the direction register of
port 7 (P7DIR).
In addition to the basic function as the input-output
port, a secondary function is allocated to each of
P7.4 through P7.7. Refer to the next table.
LCD common signal output pinsO
LCD segment signal output pinsO
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