The baseband module of the RM-11 transceiver is a trimode, CDMA, dual-band engine
and consists of three main Application Specific Integrated Circuits (ASICs):
•Universal Energy Management (UEM)
•Universal Phone Processor (UPP)
•A 128-Megabit FLASH
The baseband architecture is based on the DCT4 Apollo engine and supports a
power-saving function called sleep mode. Sleep mode shuts off the VCTCXO, which is
used as a system clock source for both the RF and the baseband. The phone awakens by a
timer running from this 32 kHz clock. The sleep time is determined by network
parameters. During the sleep mode, the system runs from a 32 kHz crystal. Sleep mode is
entered when both the MCU and the DSP are in standby mode, and the 19.2 MHz Clk
(VCTCXO) is switched off.
The RM-11 supports both two and three DCT3 type wire chargers. However, the 3-wire
chargers are treated as two-type wire chargers. Charging is controlled by the UEM ASIC
and EM SW.
A BLD-3 Li-ion battery is used as the main power source. The BLD-3 has a nominal
capacity of 780 mAh.
Power up and reset are controlled by the UEM ASIC. The RM-11 baseband can be
powered up in the following ways:
•By the Power button, which means grounding the PWRONX pin of the UEM
•By connecting the charger to the charger input
•By the RTC alarm, when the RTC logic has been programmed to give an alarm
After receiving one of the above signals, the UEM counts a 20ms delay and enters into
reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+,
a 200ms delay starts to allow references (etc.) to settle. After this delay elapses, the
VFLASH1 regulator is enabled. Then, 500us later the VR3, VANA, VIO, and VCORE are
enabled. Finally, the power-up reset (PURX) line is held low for 20 ms. The PURX reset is
fed to the baseband UPP ASIC. Resets are generated for the MCU and the DSP. During
this reset phase, the UEM forces the VCTCXO regulator on — regardless of the status of
the sleep control input signal — to the UEM. The FLSRSTx from the ASIC is used to reset
the flash during power up and to put the flash in power down during sleep. All baseband
regulators are switched on when the UEM powers on. The UEM internal watchdogs are
running during the UEM reset state, with the longest watchdog time selected. If the
watchdog expires, the UEM returns to the power-off state. The UEM watchdogs are
internally acknowledged at the rising edge of the PURX signal in order to always give the
same watchdog response time to the MCU.
Figure 2 represents the UEM start-up sequence from reset to power-on modes.
When the Power key is pressed, the UEM enters the power up sequence. Pressing the
Power key causes the PWRONX pin on the UEM to be grounded. The UEM PWRONX
signal is not part of the keypad matrix. The Power key is only connected to the UEM. This
means that when pressing the power key, an interrupt is generated to the UPP that starts
the MCU. The MCU then reads the UEM interrupt register and notices that it is a
PWRONX interrupt. Then the MCU reads the status of the PWRONX signal using the UEM
control bus (CBUS). If the PWRONX signal stays low for a specific duration, the MCU
accepts this as a valid power on state and continues with the SW initialization of the
baseband. If the power on key does not indicate a valid power on situation, the MCU
powers off the baseband.
Power Up - Charger
In order to be able to detect and start charging in the case where the main battery is
fully discharged (empty) and hence the UEM has no supply (NO_SUPPLY or BACKUP
mode of UEM), charging is controlled by START-UP CHARGING circuitry.
Whenever a VBAT level is detected to be below the master reset threshold (VMSTR-),
charging starts and is controlled by START_UP charge circuitry. Connecting a charger
forces the VCHAR input to rise above the charger detection threshold (VCHDET+) and by
detection charging is started. The UEM generates 100 mA constant output current from
the connected charger's output voltage. The battery’s voltage rises as it charges, and
when the VBAT voltage level is detected to be higher than the master reset threshold
limit (VMSTR+), the START_UP charge is terminated.
CC Technical DocumentationTroubleshooting - Baseband
Monitoring the VBAT voltage level is done by the charge control block (CHACON). A
MSTRX='1' output reset signal (internal to the UEM) is given to the UEM's RESET block
when the VBAT>VMSTR+ and UEM enter into the reset sequence.
If VBAT is detected to fall below VMSTR- during start-up charging, charging is cancelled.
It will restart if new rising edge on the VCHAR input is detected (VCHAR rising above
VCH-ET+).
Power Up - RTC Alarm
If phone is in POWER_OFF mode when an RTC alarm occurs, a wake-up procedure begins.
After the baseband is powered ON, an interrupt is given to the MCU. When an RTC alarm
occurs during ACTIVE mode, an interrupt is generated to the MCU.
Power Off
The baseband switches into power off mode if any of following occurs:
•Power key is pressed
•Battery voltage is too low (VBATT < 3.2 V)
•Watchdog timer register expires
The UEM controls the power down procedure.
Power Consumption and Operation Modes
During power off mode, power (VBAT) is supplied to the UEM, BUZZER, VIBRA, LED, PA,
and PA drivers (Tomcat and Hornet). During this mode, the current consumption is
approximately 35 uA, which is the UEM leakage current.
In sleep mode, both processors (MCU and DSP) are in stand-by mode. The phone enters
sleep mode only when both processors make this request. When the SLEEPX signal is
detected low by the UEM, the phone enters SLEEP mode. The VIO and VFLASH1
regulators are put into low quiescent current mode, VCORE enters LDO mode, and the
VANA and VFLASH2 regulators are disabled. All RF regulators are disabled during SLEEP
mode. When the UEM detects a high SLEEPX signal, the phone enters ACTIVE mode and
all functions are activated.
The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or
by some external interrupt (a charger connection, key press, headset connection, etc.).
In sleep mode, the VCTCXO (19.2 MHz Clk) is shut down and the 32 kHz sleep clock
oscillator is used as a reference clock for the baseband.
The average current consumption of the phone can vary depending mainly on the SW
state (e.g., slot cycle 0, 1, or 2) and if the phone is working on IS95 or IS2000 for CDMA.
However, the average consumption is about 6 mA in slot cycle 0 on IS95.
In the ACTIVE mode, the phone is in normal operation; scanning for channels, listening to
a base station, and transmitting and processing information. There are several sub-states
in the active mode depending on the phone’s present state, such as burst reception, burst
transmission, if DSP is working, etc.
In active mode, SW controls the UEM RF regulators: VR1A and VR1B can be enabled or
disabled. These regulators work of the UEM charge pump. VSIM can be enabled or
disabled and its output voltage can be programmed to be 1.8 V or 3.3 V. VR2 and
VR4–VR7 can be enabled, disabled, or forced into low quiescent current mode. VR3 is
always enabled in active mode and disabled during sleep mode and cannot be controlled
by SW in the same way as the other regulators. VR3 will only turn off if both processors
(DSP and MCU) request to be in sleep mode.
CHARGING mode can be performed in parallel with any other operating mode. A BSI
resistor inside the battery indicates the battery type/size. The resistor value corresponds
to a specific battery type and capacity. This capacity value is related to the battery
technology.
Power
The battery voltage, temperature, size and charging current are measured by the UEM,
and the EM charging algorithm controls it.
The charging control circuitry (CHACON) inside the UEM controls the charging current
delivered from the charger to the battery. The battery voltage rise is limited by turning
the UEM switch off when the battery voltage reaches 4.2 V. The charging current is
monitored by measuring the voltage drop across a 220 mOhm resistor.
In normal operation, the baseband is powered from the phone's battery. The battery
consists of one Lithium-Ion cell. In the case of RM-11, the battery capacity is 780 mAh.
The UEM ASIC controls the power distribution to the whole phone through the BB and RF
regulators excluding the power amplifier (PA) and the DC/DC, which have a continuous
power rail directly from the battery. The battery feeds power directly to the following
parts of the system:
•UEM
•PA
•DC/DC
•Buzzer
•Vibra
•Display and keyboard lights
The UEM is the heart of the power distribution to the phone, which includes all the
voltage regulators. The UEM handles power-up hardware functions so the regulators are
not powered and the power-up reset (PURX) is not released if the battery voltage is less
than 2.8 V.
CC Technical DocumentationTroubleshooting - Baseband
The RM-11 baseband is powered from five different UEM regulators:
Table 1: RM-11 Baseband Regulators
Regulator
VCORE
DD/DC
VIO1501.8Enabled always except during power-off mode
VFLASH1702.78Enabled always except during power-off mode
VFLASH2402.78Enabled only when data cable is connected
VANA802.78Enabled only when the system is awake (off during sleep
VSIM253.0Not used
Maximum
current (mA)
3001.5Output voltage selectable 1.0V/1.3V/1.5V/1.8V
Vout (V)Notes
Default power at power-up is 1.5V
and power-off modes)
Table 2 includes the UEM voltage regulators used by the RF.
Table 2: RM-11 RF Regulators
Regulator
VR1A104.75Enabled when the receiver is on
Maximum
current (mA)
Vout (V)Notes
VR1B104.75Enabled when the transmitter is on
VR21002.78Enabled when the transmitter is on
VR3202.78Enabled when SleepX is high
VR4502.78Enabled when the receiver is on
VR5502.78Enabled when the receiver is on
VR6502.78Enabled when the transmitter is on
VR7452.78Enabled when the receiver is on
A charge pump used by VR1A is constructed around the UEM. The charge pump works
with Cbus (1.2 MHz Clk) and gives a 4.75 V regulated output voltage to the RF.
Clock Distribution
RFClk (19.2 MHz Analog)
The baseband’s main clock signal is generated from the VCTCXO (G503). This 19.2 MHz
clock signal is generated at the RF and fed to the UPP’s RFCLK pin.
The UPP distributes the 19.2 MHz Clk to the internal processors, DSP, and MCU, where
SW multiplies this clock by seven for the DSP and by two for the MCU.
The system clock can be stopped during sleep mode by disabling the VCTCXO power
supply from the UEM regulator output (VR3) by turning off the controlled output signal
SLEEPX from the UPP.
SleepCLK (Digital)
The UEM provides a 32 kHz sleep clock for internal use and to the UPP, where it is used
for the sleep mode timing.
CC Technical DocumentationTroubleshooting - Baseband
SleepCLK (Analog)
When the system enters sleep mode or power off mode, the external 32 KHz crystal
provides a reference to the UEM RTC circuit to turn on the phone during power off or
sleep mode.
Figure 9: 32 KHz analog sleep clock signal
Flash Programming
Connections to Baseband
The flash programming equipment is connected to the baseband using test pads for
galvanic connection. The test pads are allocated in such a way that they can be accessed
when the phone is assembled. The flash programming interface consists of the VPP,
FBUSTX, FBUSRX, MBUS, and BSI signals and is used by the FPS-8 to flash. The
connection is through the UEM, which means that the logic voltage levels correspond to
2.78 V. Power is supplied to the phone using the battery contacts.
Baseband Power Up
The baseband power is controlled by the flash prommer in production and in
re-programming situations. Applying supply voltage to the battery terminals causes the
baseband to power up. Once the baseband is powered, flash programming indication
begins (see the following "Flash Programming Indication" section).
Flash Programming Indication
Flash programming is indicated to the UPP using the MBUSRX signal between the UPP
and UEM. The MBUS signal from the baseband to the flash prommer is used as a clock
for the synchronous communication. The flash prommer keeps the MBUS line low during
UPP boot to indicate that the flash prommer is connected. If the UPP MBUSRX signal is
low on the UPP, the MCU enters flash-programming mode. In order to avoid accidental
entry to the flash-programming mode, the MCU only waits for a specified time to get
input data from the flash prommer. If the timer expires without any data being received,
the MCU continues the boot sequence. The MBUS signal from the UEM to the external
connection is used as a clock during flash programming. This means that the
flash-programming clock is supplied to the UPP on the MBUSRX signal.
The flash prommer indicates flash programming/reprogramming to the UEM by writing
an 8-bit password to the UEM. The data is transmitted on the FBUSRX line and the UEM
clocks the data on the FBUSRX line into a shift register. When the 8 bits have been
shifted in the register, the flash prommer generates a falling edge on the BSI line. This
loads the shift register content in the UEM into a compare register. Programming starts if
the 8-bits in the compare register match with the default value preset in the UEM. At
this point the flash prommer pulls the MBUS signal to UEM low in order to indicate to
the MCU that the flash prommer is connected. The UEM reset state machine performs a
reset to the system, PURX low for 20 ms. The UEM flash programming mode is valid until
the MCU sets a bit in the UEM register that indicates the end of flash programming.
Setting this bit also clears the compare register in the UEM, which was loaded at the
falling edge of the BSI signal. The UEM watchdogs are disabled during the flash
programming mode. Setting the bit indicating the end of flash programming enables and
resets the UEM watchdog timer to its default value. Clearing the flash programming bit
also causes the UEM to generate a reset to the UPP.
Flashing
The BSI signal is used to load the value into the compare register. In order to avoid
spurious loading of the register, the BSI signal is gated during the UEM master reset and
during power on when PURX is active. The BSI signal should not change states during
normal operation unless the battery is extracted. In this case the BSI signal will be pulled
high. Note that a falling edge is required to load the compare register.
Flash programming is done through the VPP, FBUSTX, FBUSRX, MBUS, and BSI signals.
When the phone enters flash programming mode, the prommer indicates to the UEM
that flash programming will take place by writing an 8-bit password to the UEM. A
prommer first sets the BSI to "1", uses FBUSRX for writing, and uses the MBUS for
clocking. The BSI is then set back to "0".
The MCU uses the FBUSTX signal to indicate to the prommer that it has been noticed.
Then the MCU reports the UPP type ID and is ready to receive the secondary boot code in
its internal SRAM.
CC Technical DocumentationTroubleshooting - Baseband
FLASH_1
CH1 = BSI
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSRX
Measure points
Production test pattern
(J396)
Figure 10: Flashing start
This boot code asks the MCU to report the prommer phone’s configuration information,
including the flash device type. Now the prommer can select and send the algorithm
code to the MCU SRAM (and SRAM/Flash self-tests can be executed).
FLASH_2
CH1 = PURX
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSRX
Measure points
Production test pattern
(J396)
Figure 11: Flashing, continued 1
•Ch1-> PURX
•Ch2-> MBUS toggled three times for MCU initialization
•Ch3-> FBUS_TX low, MCU indicates that prommer has been noticed
Measure points
Produ c tio n te s t pattern
(J396)
Data transfer has
started (Fbus_Rx)
Figure 12: Flashing, continued 2
Flash Programming Error Codes
The following characteristics apply to the information in Table 3.
•Error codes can be seen from the test results or from Phoenix's flash-tool.
•Underlined information means that the connection under consideration is being
used for the first time.
Table 3: Flash programming error codes
ErrorDescriptionNot Working Properly
C101"The Phone does not set FbusTx line high after
the startup."
C102"The Phone does not set FbusTx line low after
the line has been high. The Prommer generates
this error also when the Phone is not connected to the Prommer."
C103" Boot serial line fail."Mbus from Prommer->UEM->UPP(MbusRx)(SA1)
Vflash1
VBatt
BSI and FbusRX from prommer to UEM.
FbusTx from UPP->UEM->Prommer(SA0)
PURX(also to Safari)
VR3
Rfclock(VCTCXO->Safari->UPP)
Mbus from Prommer->UEM->UPP(MbusRx)(SA0)
FbusTx from UPP->UEM->Prommer(SA1)
BSI and FbusRX from prommer to UEM.
FbusRx from Prommer->UEM->UPP
FbusTx from UPP->UEM->Prommer
C104"MCU ID message sending failed in the Phone."FbusTx from UPP->UEM->Prommer
C105"The Phone has not received Secondary boot
codes length bytes correctly."
Mbus from Prommer->UEM->UPP(MbusRx)
FbusRx from Prommer->UEM->UPP
FbusTx from UPP->UEM->Prommer
in the message, which it has received from the
Phone."
Cx82"The Prommer has detected a wrong ID byte in
the message, which it has received from the
Phone."
A204
Cx83
Cx84
"The flash manufacturer and device IDs in the
existing algorithm files do not match with the
IDs received from the target phone."
"The Prommer has not received phone
acknowledge to the message."
"The phone has generated NAK signal during
data block transfer."
Mbus from Prommer->UEM->UPP(MbusRx)
FbusRx from Prommer->UEM->UPP
FbusTx from UPP->UEM->Prommer
UPP
Flash
Flash
FbusTx from UPP->UEM->Prommer
FbusTx from UPP->UEM->Prommer
Flash
UPP
VIO/VANA
Signals between UPP-Flash
Mbus from Prommer->UEM->UPP(MbusRx)
FbusRx from Prommer->UEM->UPP
FbusTx from UPP->UEM->Prommer
Cx85
Cx87"Wrong MCU ID."RFClock
Startup
for
flashing
"Data block handling timeout"
UPP(Vcore)
Required startup for flashingVflash1
VBatt
Charging Operation
Battery
The RM-11 uses a Lithium-Ion cell battery (BLD-3) with a capacity of 780 mAh. Reading
a resistor inside the battery pack on the BSI line indicates the battery size. An NTC
resistor inside the battery measures the battery temperature on the BTEMP line.