NEC UPA1812 Datasheet

DATA SHEET

MOS FIELD EFFECT TRANSISTOR

P-CHANNEL MOS FIELD EFFECT TRANSISTOR

FOR SWITCHING

PA1812

µµµµ

DESCRIPTION

The µPA1812 is a switching device which can be
driven directly by a 4.0-V power source.
The µPA1812 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.

FEATURES

Can be driven by a 4.0-V power source

•

Low on-state resistance

•

•

DS(on)1

R

= 39 mΩ MAX. (VGS = –10 V, ID = –2.5 A)

DS(on)2

R

= 63 mΩ MAX. (VGS = –4.5 V, ID = –2.5 A)

DS(on)3

R

= 69 mΩ MAX. (VGS = –4.0 V, ID = –2.5 A)

ORDERING INFORMATION

PART NUMBER PACKAGE

PA1812GR-9JG Power TSSOP8

µ

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)

Drain to Source Voltage V
Gate to Source Voltage V
Drain Current (DC) I
Drain Current (pulse)
Total Power Dissipation
Channel Temperature T
Storage Temperature T

Note1

Note2

DSS

GSS

D(DC)

D(pulse)

I

P

ch

stg

–20/+5 V

T

–55 to +150 °C

PACKAGE DRAWING (Unit : mm)

85

14

3.15 ±0.15

3.0 ±0.1

0.8 MAX.

0.65

+0.03

0.27

–0.08

–30 V

±5.0 A

±20 A

2.0 W

150 °C

1, 5, 8 :Drain
2, 3, 6, 7:Source
4 :Gate

±0.055

0.145

0.10 M

EQUIVALENT CIRCUIT

Gate

Gate
Protection
Diode

1.2 MAX.

1.0±0.05

3°

0.1±0.05

6.4 ±0.2

4.4 ±0.1

Drain

Source

0.25

+5°
–3°

Body
Diode

0.5

+0.15

0.6

–0.1

1.0 ±0.2

0.1

Notes 1.

Remark

PW ≤ 10 µs, Duty Cycle ≤ 1 %

2.

Mounted on ceramic substrate of 5000 mm2 x 1.1 mm

The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.

The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.

Document No. D12967EJ1V0DS00 (1st edition)
Date Published October 1999 NS CP(K)
Printed in Japan

The mark

★★★★

shows major revised points.

©

1997, 1999

•

ELECTRICAL CHARACTERISTICS (TA = 25 °C)

CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

µµµµ

PA1812

Zero Gate Voltage Drain Current I
Gate Leakage Current I
Gate Cut-off Voltage V

DSS

VDS = –30 V, VGS = 0 V –10

GSS

VGS = ±20 V, VDS = 0 V±10

GS(off)VDS

= –10 V, ID = –1 mA –1.0 –1.6 –2.5 V

A

µ

A

µ

Forward Transfer Admittance | yfs |VDS = –10 V, ID = –2.5 A18S
Drain to Source On-state Resi stance R

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Turn-on Delay Time t
Rise Time t
Turn-off Delay Time t
Fall Time t
Total Gate Charge Q
Gate to Source Charge Q
Gate to Drain Charge Q
Diode Forward Voltage V

DS(on)1VGS

DS(on)2VGS

R

DS(on)3VGS

R

iss

oss

rss

d(on)

r

d(off)

f

G

GS

GD

F(S-D)IF

= –10 V, ID = –2.5 A2939m
= –4.5 V, ID = –2.5 A4663m
= –4.0 V, ID = –2.5 A5269m

Ω
Ω
Ω

VDS = –10 V 1500 pF
VGS = 0 V 550 pF
f = 1 MHz 270 pF
VDD = –10 V30ns
ID = –2.5 A 160 ns

GS(on)

V

= –10 V 110 ns

RG = 10

Ω

80 ns
VDS = –24 V31nC
ID = –5.0 A4nC
VGS = –10 V 8 nC

= 5.0 A, VGS = 0 V0.76V

TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE

IG = 2 mA

50 Ω

D.U.T.

R

L

V

DD

PG.

V

GS

RG = 10 Ω

0

τ

τ = 1 s

µ

Duty Cycle ≤ 1 %

R

G

D.U.T.

V

L

R

V

Wave Form

V

DD

I

D

Wave Form

GS

GS

0

10 %

V

GS(on)

90 %

PG.

0

10 %

t

d(on)

90 %

t

on

90 %

I

D

t

r

t

d(off)

10 %

t

f

t

off

D

I

2

Data Sheet D12967EJ1V0DS00

30

150

60

90

20

60

80

40

0

100

120

DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA

dT - Derating Factor - %

TA - Ambient Temperature -

˚C

GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE

T

ch

- Channel Temperature - ˚C

V

GS(off)

- Gate to Source Cut-off Voltage - V

V

DS =

−10 V

I

D = −1

mA

−50

0

150

50

100

−1.0

−2.0

−1.2

−1.4

−1.6

−1.8

•

TYPICAL CHARACTERISTICS (TA = 25 °C)

FORWARD BIAS SAFE OPERATING AREA

−100

−10

ID(pulse)

V)

Limited

4.5

-

DS(on)

=

R

GS

(@V

I

D

(DC)

10

100 ms

PW

ms

µµµµ

PA1812

=

1 ms

DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE

−20

Pulsed

V

GS

= −10 V

−15

−10

- Drain Current - A

D

I

−5

0

−0.2
V

−4.5 V

−4.0 V

−0.4

DS

- Drain to Source Voltage - V

−0.6

−0.8 −1.0

−1

- Drain Current - A

D

I

−0.1

TA = 25˚C
Single Pulse
Mounted on Ceramic
Substrate of 5000 mm x 1.1 mm

−0.01

−0.1

FORWARD TRANSFER CHARACTERISTICS

−100
VDS = −10 V

−10

−1

TA = 125˚C

−0.1

−0.01

- Drain Current - A

D

I

−0.001

−0.0001

0 −1.0 −2.0 −3.0

DC

2

−1.0

DS

- Drain to Source Voltage - V

V

−10.0 −100.0

75˚C

GS

- Gate to Source Voltage - V

V

TA = 25˚C

−25˚C

−4.0

100

10

1

| - Forward Transfer Admittance - S

fs

| y

0.1

−0.1

Data Sheet D12967EJ1V0DS00

FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT

VDS = −10 V

TA = −25 ˚C

25 ˚C
75 ˚C

125 ˚C

−1 −10

ID - Drain Current - A

−100

3