NEC UPA1552BH Datasheet

DATA SHEET

3

2

1

4

5

6

7

8

9

10

2, 4, 6, 8 3, 5, 7, 9 1, 10

: Gate : Drain : Source

ELECTRODE CONNECTION

COMPOUND FIELD EFFECT POWER TRANSISTOR

µ

PA1552B

N-CHANNEL POWER MOS FET ARRAY

SWITCHING USE

DESCRIPTION

The µPA1552B is N-channel Power MOS FET Array that built in 4 circuits designed, for solenoid, motor and lamp driver.

FEATURES

• 4 V driving is possible

• Large Current and Low On-state Resistance

ID(DC) = ±5.0 A

DS(on)1 ≤ 0.18 Ω MAX. (VGS = 10 V, ID = 3 A)

R

RDS(on)2 ≤ 0.24 Ω MAX. (VGS = 4 V, ID = 3 A)

• Low Input Capacitance Ciss = 200 pF TYP.

ORDERING INFORMATION

Type Number Package

µ

PA1552BH 10 Pin SIP

ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)

Drain to Source Voltage VDSS Gate to Source Voltage V Drain Current (DC) ID(DC) ±5.0 A/unit Drain Current (pulse) ID(pulse) Total Power Dissipation P Total Power Dissipation PT2 Channel Temperature TCH 150 ˚C Storage Temperature T Single Avalanche Current IAS Single Avalanche Energy EAS

Note 1 Note 2

GSS

Note 3

Note 4

T1

Note 5

stg –55 to +150 ˚C

Note 6

60 V

±20 V

±20 A/unit

28 W

3.5 W

5.0 A

2.5 mJ

PACKAGE DIMENSIONS

in millimeters

26.8 MAX.

10

2.5

1.4 0.6±0.1

1 1023456789

CONNECTION DIAGRAM

2.54

4.0

10 MIN.

1.4

0.5±0.1

Notes 1. VGS = 0 2. VDS = 0

3. PW ≤ 10

5. 4 Circuits, TA = 25 ˚C 6. Starting TCH = 25 ˚C, V DD = 30 V, VGS = 20 V → 0,

Document No. G10599EJ2V0DS00 (2nd edition) Date Published December 1995 P Printed in Japan

device is actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.

The diode connected between the gate and source of the transistor serves as a protector against ESD. When this

µ

s, Duty Cycle ≤ 1 % 4.

4 Circuits, TC = 25 ˚C

RG = 25 Ω, L = 100 µH

©

1995

µ

PA1552B

ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)

CHARACTERISTIC SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain Leakage Current IDSS VDS = 60 V, VGS = 0 10 Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 ±10 Gate Cutoff Voltage VGS(off) VDS = 10 V, ID = 1.0 mA 1.0 2.0 V Forward Transfer Admittance | Yfs |VDS = 10 V, ID = 3.0 A 2.4 S Drain to Source On-State RDS(on)1 VGS = 10 V, ID = 3.0 A 0.09 0.18 Ω

Resistance

RDS(on)2 VGS = 4.0 V, ID = 3.0 A 0.12 0.24 Ω Input Capacitance Ciss VDS = 10 V, VGS = 0, f = 1.0 MHz 200 pF Output Capacitance Coss 150 pF Reverse Transfer Capacitance Crss 55 pF Turn-on Delay Time td(on) ID = 3.0 A, VGS = 10 V, VDD = 30 V, 20 ns Rise Time tr

RL = 10 Ω

·

100 ns Turn-off Delay Time td(off) 670 ns Fall Time tf 310 ns Total Gate Charge QG VGS = 10 V, ID = 5.0 A, VDD = 48 V 13 nC Gate to Source Charge QGS 2nC Gate to Drain Charge QGD 4.7 nC Body Diode Forward Voltage VF(S-D) IF = 5.0 A, VGS = 0 1.0 V Reverse Recovery Time trr IF = 5.0 A, VGS = 0, di/dt = 50 A/µs 280 ns Reverse Recovery Charge Qrr 820 nC

µ

A

µ

A

Test Circuit 1 Avalanche Capability

VGS = 20 V → 0

PG

G

R

V

DD

= 25 Ω

50 Ω

I

D

D.U.T.

I

AS

BV

DSS

L

V

DS

Starting T

DD

Test Circuit 3 Gate Charge

D.U.T.

G

= 2 mA

PG.

I

50 Ω

L

R

V

DD

Test Circuit 2 Switching Time

PG.

V

GS

0

t

t = 1 s

µ

CH

Duty Cycle ≤ 1 %

R

G

R

= 10 Ω

D.U.T.

G

V

R

L

GS

V

Wave Form

V

DD

I

D

Wave Form

GS

10 %

0

I

D

10 %

0

t

d (on)

90 %

t

on

V

I

t

r

GS (on)

D

t

d (off)

t

off

90 %

10 % t

f

2

CHARACTERISTICS (TA = 25 ˚C)

µ

PA1552B

TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE

6

NEC

µ

PA1552BH

5

4

Lead

Print Circuit Boad

4 Circuits operation 3 Circuits operation

2 Circuits operation

3

1 Circuit operation

2

- Total Power Dissipation - W

1

T

P

0

50 100 150

TA - Ambient Temperature - ˚C

FORWARD BIAS SAFE OPERATING AREA

100

I

D(pulse)

10

Limited(V

DS(on)

R

1

- Drain Current - A

D

I

= 10 V)

GS

I

D(DC)

100 ms

DC

TC = 25 ˚C Single Pulse

0.1

1 10 100

DS

- Drain to Source Voltage - V

V

Under same dissipation in each circuit

P

W

= 1 ms

10 ms

50 ms

TOTAL POWER DISSIPATION vs. CASE TEMPERATURE

30

4 Circuits operation

20

3 Circuits operation 2 Circuits operation

1 Circuit operation

10

- Total Power Dissipation - W

T

P

TC is grease Temperature on back surface

0

50 100 150

TC - Case Temperature - ˚C

DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA

100

80

60

40

20

dT - Percentage of Rated Power - %

0

20 40 60 80 100 120 140 160

T

C

- Case Temperature - ˚C

Under same dissipation in each circuit

FORWARD TRANSFER CHARACTERISTICS

100

10

1.0

TA = 125 ˚C

75 ˚C 25 ˚C

- Drain Current - A

D

I

-25 ˚C

0.1

0

246

V

GS

- Gate to Source Voltage - V

Pulsed VGS = 10 V

DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE

20

VGS = 20 V

10 V

10

- Drain Current - A

D

I

0

V

DS

- Drain to Source Voltage - V

Pulsed

V

GS

= 4 V

1

2

3

4

3