1
Cover Sheet, Block diagram, Revision history
Intel £gPGA478B CPU - Signal
Intel £gPGA478B CPU - Powe
Intel Springdale - Host Signals
Intel Springdale - Memory Signals
Intel Springdale - AGP & LDT Signals
Intel ICH5 - PCI & IDE & AC97 Signals
Intel ICH5 - Other Signals
Clock - Cypress CY28405 & FWH & Manual
LPC I/O - W83627HF & KB/MS
COM1, LPT, Floppy & VGA Connectors
AC97 Audio - ALC650
LAN - Realtek RTL8101L
A A
SATA & IDE Connectors
DDR System Memory 1 , 2 , 3 & 4 17-18
AGP 4X/8X Slot & PCI Riser Card
PCI Slots 1 & 2 & 3
ACPI (MS-5)
ATX & Front Panel
USB Connectors
1394 - NEC PD72874
VTT, VCC_DAC, MEMORY Regulator Controller 25
VRM 10 - Intersil HIP 6556A + HIP 6602B
PULL UP/ DOWN RESISTORS
GPIO & JUMPER SETTING
Manual Parts & Power Delivery 29
1-3
10
11
12
13
14
15
16
19
20
21
22
23
24
26
27
28
4
5
6
7
8
9
MS-6733
Intel (R) Springdale (GMCH) + ICH5 Chipset
Intel Northwood & Prescott mPGA478B Processor
CPU:
Intel Northwood/Prescott - 3.0G & Above
Version 0C
System Chipset:
Intel Springdale - GMCH (North Bridge)
Intel ICH5 (South Bridge)
On Board Chipset:
BIOS -- FWH FLASH 4Mb
AC'97 Codec -- ALC650
LPC Super I/O -- W83627HF-AW
LAN - Realtek RTL8101L
1394 -- NEC PD72874
CLOCK -- Cypress CY28405
Main Memory:
DDR * 4 (Max 4GB)
Expansion Slots:
PCI2.3 SLOT * 3
AGP4X/8X SLOT * 1
Intersil PWM:
Controller: HIP6556A
Driver: HIP6602B +HIP6601B
MSI
Title
Size Document Number Rev
1
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
COVER SHEET
(MS-6733)
1 29Tuesday, January 28, 2003
0C
1
VRM 10
Intersil 6556
3-Phase PWM
AGP 1.5V
Connector
IDE Primary
IDE Secondary
SERIAL ATA1
A A
SERIAL ATA2
USB2.0
USB Port0~ 7
ALC650
AC'97 Codec
LAN
RTL8101L
1394
NEC PD72874
Analog
Video
Out
P.26
P.19
P.13
P.16
P.16
P.16
P.16
P.23
P.14
P.15
P.24
4X/8X w/Fast Write
UltraDMA
33/66/100
USB
AC'97 Link
PCI
Intel mPAG478B Processor
FSB
Springdale
P.6~8
HUB
Link
ICH5
P.9~10
Flash
P.11
LPC Bus
P.4~5
CHANNEL A
CHANNEL B
LPC SIO
W83627HF
Keyboard
Mouse
Block Diagram
2 DDR
DIMM
Modules
P.17
2 DDR
DIMM
Modules
P.18
PCI Slot 1
PCI Slot 2
PCI
P.12
Floopy Parallel Serial
P.12
P.12
P.13 P.13 P.13
P.20 P.20 P.20
PCI Slot 3
MSI
MICRO-STAR INt'L CO., LTD.
Title
Size Document Number Rev
1
Date: Sheet of
BLOCK DIAGRAM
(MS-6733)
2 29Tuesday, January 28, 2003
0C
5
Revision Initial ver: 0A on 10/16/2002
Schematic Initial on October 16.
Revision change list from ver: 0A to ver: 0B on 12/02/2002
Sheet 1: Modify some txts.
Sheet 21: Move VCC_2.0 voltage circuit.
D D
Sheet 22: Modify VCC_AGP voltage circuit ,change to switching converter.
Sheet 25: Modify some circuit , detail list on below:
(1) Change R175 value to 180 ohm.
(2) R415 Connect with VRM_GD.
Sheet 26: Modify VRM Module,change to 3 phases.
Note: Support DDR400 (Modify layout).
Revision change list from ver: 0B to ver: 0C on 1/13/2003
Sheet 7: Move L12.
Sheet 21: Q59 Drain pole connect from VCC3 to VCC_DDR.
Sheet 22: Modify some circuit , detail list on below:
(1) Apply 4410 MOSFET to VCC_DDR circuit.
(2) Move R719,C407,C408.
(3) U40 pin21 connect with SLP_S3#.
C C
B B
4
3
2
1
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
REVISION HISTORY - 1
(MS-6733)
3 29Tuesday, January 28, 2003
1
0C
8
D D
HDBI#[0..3]6
FERR#10,27
STPCLK#10
HINIT#10,11
HDBSY#6
HDRDY#6
HTRDY#6
HADS#6
C C
10:10:10< 8"
5:7<10 "
5:7<17 "
B B
5:13<12 "
5:13<10 "
A A
HLOCK#6
HBNR#6
HIT#6
HITM#6
HBPRI#6
HDEFER#6
ITP_TDI27
ITP_TDO27
ITP_TMS27
ITP_TRST#27
ITP_TCK27
THERMDA_CPU12
THERMDC_CPU12
TRMTRIP#10,27
PROCHOT#6,27
IGNNE#10
SMI#10
A20M#10
SLP#10
BOOT25
BSEL06,11
BSEL16,11
CPU_GD10,27
CPURST#6,27
HD#[0..63]6
HDBI#0
HDBI#1
HDBI#2
HDBI#3
5:5<17 "
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
PROCHOT#
BOOT
R188 X_0
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
7
HA#[3..31]6
CPU1A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AE21
RESERVED2
AF24
RESERVED3
AF25
RESERVED4
AD1
BOOTSELECT
AE26
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
V22
HD#53
6
5
CPU SIGNAL BLOCK
HA#29
HA#26
HA#30
HA#31
HA#28
HA#27
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
U24
HD#49
U26
HD#48
T23
HD#47
D42#
T22
T25
T26
R24
R25
P24
HD#43
HD#41
HD#42
HD#44
HD#46
HD#45
U21
HD#52
V25
HD#51
U23
HD#50
HA#17
HA#24
HA#25
HA#23
HA#20
HA#13
HA#15
HA#18
HA#14
HA#16
HA#22
HA#21
HA#19
HA#11
HA#10
HA#12
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
A12#
A11#
A10#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
M23
HD#32
H25
HD#31
D25#
K23
J24
L22
M21
H24
G26
HD#26
HD#28
HD#25
HD#30
HD#27
HD#29
R21
N25
N26
M26
N23
M24
P21
N22
HD#35
HD#40
HD#36
HD#39
HD#38
HD#33
HD#34
HD#37
HA#9
L21
HD#24
4
VCC_SENSE 26
VSS_SENSE 26
VID_GD 11,21,26
VID[0..5] 12,26
HA#5
HA#3
HA#8
HA#7
HA#6
HA#4
AE25A5A4
A9#
A8#
A7#
A6#
A5#
A4#
A3#
DBR#
VCC_SENSE
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D26
F26
E25
HD#22
HD#21
HD#23
D13#
F24
F23
G23
E24
H22
D25
J21
D23
C26
HD#20
HD#12
HD#17
HD#14
HD#19
HD#18
HD#15
HD#16
HD#13
AD26
AC26
ITP_CLK1
VSS_SENSE
D12#
D11#
D10#
H21
G22
B25
HD#9
HD#11
HD#10
AD2
ITP_CLK0
D9#
D8#
C24
C23
HD#8
HD#7
VID5
VID4
AE1
AD3
VID4#
VID5#
VIDPWRGD
D7#
D6#
D5#
B24
D22
HD#6
HD#5
VID3
AE2
C21
HD#4
VID3#
D4#
VID2
VID1
AE3
AE4
VID2#
VID1#
D3#
D2#
A25
A23
HD#3
HD#2
VID0
AE5
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D1#
D0#
NORTHWOOD/PRESCOTT
B22
B21
HD#1
HD#0
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
3
PLACE CLOSE TO CPU
GTLREF
C160 220p
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
R191 62
TESTHI11
R245 62
TESTHI10
R208 62
TESTHI9
R213 62
TESTHI8
R216 62
TESTHI2
R176 62
TESTHI0
R207 62
HRS#2
HRS#1
HRS#0
HBR#0
COMP1
R509 61.9_1%(S/S)
COMP0
R211 61.9_1%
12:15<1. 5"
GTLREF 6
BPM#5 27
BPM#4 27
BPM#3 27
BPM#2 27
BPM#1 27
BPM#0 27
HREQ#[0..4] 6
CPU_CLK# 11
CPU_CLK 11
HRS#[0..2] 6
5:7<8"
HBR#0 6,27
HADSTB#1 6
HADSTB#0 6
HDSTBP#3 6
HDSTBP#2 6
HDSTBP#1 6
HDSTBP#0 6
HDSTBN#3 6
HDSTBN#2 6
HDSTBN#1 6
HDSTBN#0 6
NMI 10
INTR 10
2
CPU GTL REFERNCE VOLTAGE BLOCK
3"
10:7
GTLREF
0.63*VCC_AVG
VCCP
C390
0.1u
5:7<1"
200_1%
VTT
R178
3"
C145
220p
5:13<1. 5"
1
VCCP
R243
200_1%
C156
R244
0.1u
169_1%
PLACE CLOSE TO CPUPLACE CLOSE TO GMCH
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Signals
(MS-6733)
2
4 29Tuesday, January 28, 2003
0C
1
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
D D
C C
B B
VCCP
CPU1B
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
D16
D18
VSS
VSS
VSS
VSS
D20
D21D3D24D6D8E1E11
VCC
VSS
VSS
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA23
VSS
AA26
VSS
AA4
VSS
AA7
VSS
AA9
VSS
AB10
VSS
AB12
VSS
AB14
VSS
AB16
VSS
AB18
VSS
AB20
VSS
AB21
VSS
AB24
VSS
AB3
VSS
AB6
VSS
AB8
VSS
AC11
VSS
AC13
VSS
AC15
VSS
AC17
VSS
AC19
VSS
AC2
VSS
AC22
VSS
AC25
VSS
AC5
VSS
AC7
VSS
AC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
VSS
D14
VCC_VID21
4.7u_0805
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
F18F2F22
E4
E26
1.2V 150mA
C137
E14
VCC
VSS
C140
0.1u
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G21G6G24
G3H1H23
H26H4J2
VSS
F25F5F8
AD20
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
J22
J25J5K21
CPU_IOPLL
AE23
XX12
XX13
XX14
XX15
XX16
HVSS
HVSS
HVSS
HVSS
VCCA
VSS
HVSS
HVSS
HVSS
HVSS
HVSS
XX1
XX2
XX3
XX4
XX5
XX6
NORTHWOOD/PRESCOTT
X_10u/1206
XX17
XX18
XX19
XX20
XX21
XX22
XX23
XX24
XX25
XX26
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
VSSAVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HVSS
HVSS
HVSS
XX7
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
XX8
XX9
XX10
XX11
XX27
XX28
XX29
XX30
EC12
AD22D10
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
XX32
XX31
It must close bulk caps.
It support DC current if 100mA.
L8 10uH_0805_100mA
L7 10uH_0805_100mA
EC22
10u/1206
VSS A
DC voltage drop should
be less than 70mV.
VCCP
CPU DECOUPLING CAPACITORS
VCCP
A A
Place these caps within socket cavity Place these caps within south side of processor
VCCP VCCP VCCP
EC24
10u/1206
EC27
10u/1206
EC33
10u/1206
EC32
10u/1206
EC29
10u/1206
EC31
10u/1206
EC34
10u/1206
EC26
10u/1206
EC30
10u/1206
EC25
10u/1206
EC23
10u/1206
EC28
10u/1206
EC21
10u/1206
EC20
10u/1206
EC18
10u/1206
EC15
10u/1206
EC14
10u/1206
EC13
10u/1206
EC6
X_10u/1206
EC5
X_10u/1206
EC11
X_10u/1206
EC9
X_10u/1206
EC8
X_10u/1206
EC7
X_10u/1206
EC19
10u/1206
EC4
X_10u/1206
EC17
10u/1206
EC10
X_10u/1206
EC16
10u/1206
EC3
X_10u/1206
12pcs 19pcs 9pcs
Place these caps within north side of processor
8
7
6
5
VCCPVCCP
3
+
+
Solder side
EC48
X_150u_2.5V(S/S)
EC49
X_150u_2.5V(S/S)
Title
Size Document Number Rev
Date: Sheet of
VCCP
EC38
X_10u/0805
EC37
X_10u/0805
EC36
X_10u/0805
EC2
X_10u/1206
4
VCCP
+
+
Component
side
MSI
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Power
2
EC68
X_150u_2.5V(S/S)
EC69
X_150u_2.5V(S/S)
(MS-6733)
5 29Tuesday, January 28, 2003
0C
1
8
HBR#04,27
HBPRI#4
HBNR#4
HLOCK#4
HADS#4
HIT#4
HITM#4
HTRDY#4
HDBSY#4
HDRDY#4
PWR_GD21,27
R174 2.49K_1%
R165 2K_1%
R164 2K_1%
R173 2.49K_1%
R215 20_1%
10:7<0. 5"
HSWING27
GTLREF4
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
SEL0
SEL1
HRCOMP
12:10<3 "
12:15
C127
0.1u
HA#[3..31]4
D D
C C
B B
A A
BSEL0
BSEL1
HADSTB#04
HADSTB#14
HREQ#[0..4]4
HDEFER#4
HRS#[0..2]4
MCH_CLK11
MCH_CLK#11
CPURST#4,27
PCIRST_ICH5#9,11,21
ICH_SYNC#27
PROCHOT#4,27
HEAT SINK
U14_X
HEATSINK
8
D26
D30
L23
E29
B32
K23
C30
C31
B31
E30
B33
F25
D34
C32
F28
C34
G27
F29
E28
H27
K24
E32
F31
G30
G26
B30
D28
B24
B26
B28
E25
F27
B29
L22
C29
K21
E23
L21
D24
E27
G24
G22
C27
B27
AE14
AK4
AJ8
L20
L13
L12
E24
C25
F23
VCCA_FSB
VCCA_DPLL
J25
J24
J27
J26
J23
J21
B7
C7
E8
C148 0.1u
U14A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
PROCHOT#
BSEL0
BSEL1
HDRCOMP
HDSWING
HDVREF
VCCA_FSB
7
I=30mA
7
B3
A31
VCCA_DPLL
VSS
C10
C8
B4
VCCA_FSB
VCCA_FSB
VSS
VSS
C12
C126
0.1u
J6J7J8J9K6K7K8K9L6L7L9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C14
C16
C18
C20
C22
C24
C26
C28D1D11
L9 0.82uH_35mA
CT33
4.7u_0805
VCC
VSS
D9
VCC
VCC
VSS
VSS
D13
6
L10
L11
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D15
D17
D19
D21
CLOSE TO PINA31
6
5
VCC_AGP
N11N9P10
P11
R11
T16
T17
T18
T19
U16
U17
U20
V16
V18
V20
W16
N10
M10
M11M8M9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D23
D25
D27
D29
D31
D33
D35
F3F5F8
E3
F1
VCC_AGP VCC_AGP
W19
W20
Y16
Y17
Y18
Y19
T20
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
F18
F14
F16E1F10
F12
5
Y20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
F20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G31
G35
H5
F22
F24
F26
G28
H8
I=35mA
VCCA_DPLL
4
A3
A33
A35B2B25
B34C1C23
C35
E26
M31
AF13
AF23
AJ12
AN1
AP2
AR3
VSS
VSS
VSS
VSS
VSS
H16H2H20
H22
H24
H18
ESR is 0.1mohm to GMCH
C131
0.1u
R25
VSS
VSS
VSS
VSS
H26
H30
H33
J10
L10 100nH_300mA
+
CT35
100u_6.3V_6X
4
NC
VSS
VSS
VSS
J12
J14
VSS
VSS
VSS
J16
J18
J20
J22
CLOSE TO PINB3
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
VSS
VSS
H12
H14
H9
3
VTT
C136
4.7u_0805
AR33
AR35
A7A9A11
A13
A16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J28
J32
J35
K11
K12
K14
K16
K18
D5D6D7E6E7
A20
A23
A25
A27
A29
A32
C4
VTT
VTT
VTT
VSS
VSS
VSS
VSS
K27
K29
VSS
VSS
VSS
VSS
VSS
VSS
K33
L24M3M6
L25
L26
VTT
VSS
VSS
VSS
L35
L31
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K20
K22
K25
3
2
C132
VTT_FSB1
1u_0805
VTT_FSB2
F7
VTT
VSS
M26
Title
Size Document Number Rev
Date: Sheet of
A4A5A6B5B6C5C6
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
M27
M28
M30
M33N1N4
MSI
A15
A21
B23
HD0#
VTT
VTT
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
VSS
Intel Springdale
VTT_FSB
VTT_FSB
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
E22
HD1#
B21
HD2#
D20
HD3#
B22
HD4#
D22
HD5#
B20
HD6#
C21
HD7#
E18
HD8#
E20
HD9#
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8
C17
L17
L14
C15
B19
C19
L19
K19
G9
F9
D12
E12
VTT
VSS
MICRO-STAR INt'L CO., LTD.
Intel Springdale - CPU Signals
(MS-6733)
2
CB73 0.47u
CB76 0.47u
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDBI#0
HDBI#1
HDBI#2
HDBI#3
1
HD#[0..63] 4
HDBI#[0..3] 4
HDSTBP#0 4
HDSTBN#0 4
HDSTBP#1 4
HDSTBN#1 4
HDSTBP#2 4
HDSTBN#2 4
HDSTBP#3 4
HDSTBN#3 4
6 29Tuesday, January 28, 2003
1
0C
8
MCS_A#017
MCS_A#117
MA_A[0..12]17
MAB_A[1..5]17
MDQM_A[0..7]17
MDQS_A[0..7]17
MCS_A#217
MCS_A#317
MRAS_A#17
MCAS_A#17
MWE_A#17
MBA_A017
MBA_A117
MCLK_A017
MCLK_A#017
MCLK_A117
MCLK_A#117
MCLK_A217
MCLK_A#217
MCLK_A317
MCLK_A#317
MCLK_A417
MCLK_A#417
MCLK_A517
MCLK_A#517
C150 0.1u
C149 2.2u
PLACE CLOSE TO GMCH
8
0.01uC186
0.01uC159
0.01uC179
12:12<1 "
CB86 0.47u
CB93 0.22u
CB94 0.1u
CB92 0.22u
CB91 0.1u
XRCOMP27
XCOMPH27
XCOMPL27
MA_A0
MA_A1
MA_A2
MA_A3
MA_A4
MA_A5
MA_A6
MA_A7
MA_A8
MA_A9
MA_A10
MA_A11
MA_A12
MAB_A1
MAB_A2
MAB_A3
MAB_A4
MAB_A5
MDQM_A0
MDQM_A1
MDQM_A2
MDQM_A3
MDQM_A4
MDQM_A5
MDQM_A6
MDQM_A7
MDQS_A0
MDQS_A1
MDQS_A2
MDQS_A3
MDQS_A4
MDQS_A5
MDQS_A6
MDQS_A7
XRCOMP
XCOMPH
XCOMPL
XVREF
VCC_DDR_C227
VCC_DDR_C327
D D
C C
B B
A A
7
MDQ_A[0..63]17 MCKE_A[0..3] 17
MDQ_A7
MDQ_A0
MDQ_A3
MDQ_A4
MDQ_A2
MDQ_A1
MDQ_A5
MDQ_A6
U14B
AP10
AP11
AM12
AN13
AM10
AL10
AL12
SDQ_A0
SDQ_A1
VCC_DDR
E35
SDQ_A2
VCC_DDR
AA35
R35
SDQ_A3
SDQ_A4
SDQ_A5
VCC_DDR
VCC_DDR
VCC_DDR
AR15
AR21
AP13
SDQ_A6
VCC_DDR
AL7
AL6
AA34
Y31
Y32
W34
AC33
Y34
AB34
AJ34
AL33
AK29
AN31
AL30
AL26
AL28
AN25
AP26
AP24
AJ33
AN23
AN21
AL34
AM34
AP32
AP31
AM26
AE33
AH34
AP12
AP16
AM24
AP30
AF31
W33
M34
H32
AN11
AP15
AP23
AM30
AF34
V34
M32
H31
AK32
AK31
AP17
AN17
N33
N34
AK33
AK34
AM16
AL16
P31
P32
AK9
AN9
AL9
E34
VCC_DDR_C1
VCC_DDR_C3
VCC_DDR_C4
VCC_DDR_C5
XRCOMP
XCOMPH
XCOMPL
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12
SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5
SBA_A0
SBA_A1
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7
SMDCLK_A0
SMDCLK_A0#
SMDCLK_A1
SMDCLK_A1#
SMDCLK_A2
SMDCLK_A2#
SMDCLK_A3
SMDCLK_A3#
SMDCLK_A4
SMDCLK_A4#
SMDCLK_A5
SMDCLK_A5#
SMXRCOMP
SMXCOMPVOH
SMXCOMPVOL
SMVREF_A
7
MDQ_A9
MDQ_A8
AP14
AM14
SDQ_A7
SDQ_A8
VCC_DDR
VCC_DDR
AM1
AM2
MDQ_A10
MDQ_A11
AL18
AP19
SDQ_A9
SDQ_A10
SDQ_A11
VCC_DDR
VCC_DDR
VCC_DDR
AN8
AP3
VCC_DDR
MDQ_B[0..63]18
MDQ_A12
MDQ_A13
AL14
AN15
SDQ_A12
SDQ_A13
VCC_DDR
VCC_DDR
AP4
AP5
MDQ_A14
MDQ_A15
AP18
AM18
SDQ_A14
VCC_DDR
AP6
AP7
6
MDQ_A16
MDQ_A17
AP22
AM22
SDQ_A15
SDQ_A16
SDQ_A17
VCC_DDR
VCC_DDR
VCC_DDR
AR4
AR5
6
MDQ_A19
MDQ_A18
AL24
AN27
SDQ_A18
SDQ_A19
VCC_DDR
VCC_DDR
AR7
AR31
MDQ_A21
MDQ_A20
AP21
AL22
SDQ_A20
AJ10
MDQ_B0
MDQ_A23
MDQ_A22
AP25
AP27
SDQ_A21
SDQ_A22
SDQ_B0
SDQ_B1
AE15
AL11
MDQ_B2
MDQ_B1
MDQ_A25
MDQ_A24
AP28
AP29
SDQ_A23
SDQ_A24
SDQ_B2
SDQ_B3
AE16
AL8
MDQ_B3
MDQ_B4
MDQ_A27
MDQ_A26
AP33
AM33
SDQ_A25
SDQ_A26
SDQ_B4
SDQ_B5
AF12
AK11
MDQ_B6
MDQ_B5
MDQ_A28
MDQ_A29
AM28
AN29
SDQ_A27
SDQ_A28
SDQ_B6
SDQ_B7
AG12
AE17
MDQ_B8
MDQ_B7
MDQ_A30
MDQ_A31
AM31
AN34
SDQ_A29
SDQ_A30
SDQ_B8
SDQ_B9
AL13
AK17
MDQ_B9
MDQ_B10
MDQ_A32
MDQ_A33
AH32
AG34
SDQ_A31
SDQ_A32
SDQ_B10
SDQ_B11
AL17
AK13
MDQ_B12
MDQ_B11
5
MDQ_A35
MDQ_A34
AF32
AD32
SDQ_A33
SDQ_A34
SDQ_B12
SDQ_B13
AJ14
AJ16
MDQ_B14
MDQ_B13
5
MDQ_A36
MDQ_A37
AH31
AG33
SDQ_A35
SDQ_A36
SDQ_B14
SDQ_B15
AJ18
AE19
MDQ_B15
MDQ_B16
MDQ_A38
MDQ_A39
AE34
AD34
SDQ_A37
SDQ_A38
SDQ_B16
SDQ_B17
AE20
AG23
MDQ_B18
MDQ_B17
MDQ_A41
MDQ_A40
AC34
AB31
SDQ_A39
SDQ_A40
SDQ_B18
SDQ_B19
AK23
AL19
MDQ_B20
MDQ_B19
MDQ_A42
MDQ_A43
V32
V31
SDQ_A41
SDQ_A42
SDQ_B20
SDQ_B21
AK21
AJ24
MDQ_B22
MDQ_B21
MDQ_A45
MDQ_A44
AD31
AB32
SDQ_A43
SDQ_A44
SDQ_B22
SDQ_B23
AE22
AK25
MDQ_B24
MDQ_B23
MDQ_A47
MDQ_A46
U34
U33
SDQ_A45
SDQ_A46
SDQ_B24
SDQ_B25
AH26
AG27
MDQ_B26
MDQ_B25
MDQ_A48
MDQ_A49
T34
T32
SDQ_A47
SDQ_A48
SDQ_B26
SDQ_B27
AF27
AJ26
MDQ_B27
MDQ_B28
MDQ_A50
MDQ_A51
K34
K32
SDQ_A49
SDQ_A50
SDQ_B28
SDQ_B29
AJ27
AD25
MDQ_B30
MDQ_B29
MDQ_A53
MDQ_A52
T31
P34
SDQ_A51
SDQ_A52
SDQ_B30
SDQ_B31
AF28
AE30
MDQ_B32
MDQ_B31
4
MDQ_A55
MDQ_A54
L34
L33
SDQ_A53
SDQ_A54
SDQ_B32
SDQ_B33
AC27
AC30
MDQ_B33
MDQ_B34
4
MDQ_A57
MDQ_A56
J33
H34
SDQ_A55
SDQ_A56
SDQ_B34
SDQ_B35
Y29
AE31
MDQ_B35
MDQ_B36
MDQ_A59
MDQ_A58
E33
F33
SDQ_A57
SDQ_A58
SDQ_B36
SDQ_B37
AB29
AA26
MDQ_B37
MDQ_B38
MDQ_A61
MDQ_A60
K31
SDQ_A59
SDQ_A60
SDQ_B38
SDQ_B39
AA27
MDQ_B40
MDQ_B39
MDQ_A62
J34
G34
SDQ_A61
SDQ_B40
AA30
W30
MDQ_B41
MDQ_A63
F34
SDQ_A62
SDQ_A63
SDQ_B41
SDQ_B42
U27
MDQ_B42
MCKE_A0
AL20
SDQ_B43
T25
AA31
MDQ_B43
MDQ_B44
MCKE _A2
MCKE_A1
AN19
AM20
SCKE_A0
SCKE_A1
SDQ_B44
SDQ_B45
V29
U25
MDQ_B46
MDQ_B45
MCKE_A3
AP20
SCKE_A2
SCKE_A3
SDQ_B46
SDQ_B47
R27
P29
MDQ_B48
MDQ_B47
AB25
AC25
VCCA_DDR
SDQ_B48
SDQ_B49
R30
K28
MDQ_B49
MDQ_B50
3
C173 0.1u
AC26
AL35
VCCA_DDR
VCCA_DDR
VCCA_DDR
SDQ_B50
SDQ_B51
SDQ_B52
L30
R31
MDQ_B51
MDQ_B52
3
AN4
SDQ_B53
R26
P25
MDQ_B53
MDQ_B54
AM3
AN5
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B54
SDQ_B55
SDQ_B56
L32
K30
MDQ_B56
MDQ_B55
AM5
H29
MDQ_B57
2
CLOSE TO NB
VCC_DDR
AM6
AM7
AM8
AN2
AN6
AN7
P3P6P8
N35
N32
VSS
VSS
VSS
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B57
SDQ_B58
SDQ_B59
SDQ_B60
SDQ_B61
SDQ_B62
SDQ_B63
SCKE_B0
SCKE_B1
G33
MDQ_B59
N25
M25
MDQ_B61
MDQ_B60
J29
G32
MDQ_B62
MDQ_B63
Title
AK19
AF19
MCKE_B0
MCKE _B1
MSI
SCKE_B2
AG19
MCKE_B2
F32
MDQ_B58
Size Document Number Rev
Date: Sheet of
+
C130
C133
100u_6.3V_6X
0.1u
Its current is 5.1A.
U26
SCS_B0#
T29
VSS
VSS
SCS_B1#
V25
SCS_B2#
W25
SCS_B3#
W26
SRAS_B#
W31
SCAS_B#
W27
SWE_B#
MA_B0
AG31
SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12
SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
SCMDCLK_B0
SCMDCLK_B0#
SCMDCLK_B1
SCMDCLK_B1#
SCMDCLK_B2
SCMDCLK_B2#
SCMDCLK_B3
SCMDCLK_B3#
SCMDCLK_B4
SCMDCLK_B4#
SCMDCLK_B5
SCMDCLK_B5#
SMYRCOMP
SMYCOMPVOH
SMYCOMPVOL
SMVREF_B
SCKE_B3
Intel Springdale
AE18
MCKE_B3
SBA_B0
SBA_B1
SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7
MCKE_B[0..3] 18
MA_B1
AJ31
MA_B2
AD27
MA_B3
AE24
MA_B4
AK27
MA_B5
AG25
MA_B6
AL25
MA_B7
AF21
MA_B8
AL23
MA_B9
AJ22
MA_B10
AF29
MA_B11
AL21
MA_B12
AJ20
MAB_B1
AE27
MAB_B2
AD26
MAB_B3
AL29
MAB_B4
AL27
MAB_B5
AE23
Y25
AA25
MDQM_B0
AG11
MDQM_B1
AG15
MDQM_B2
AE21
MDQM_B3
AJ28
MDQM_B4
AC31
MDQM_B5
U31
MDQM_B6
M29
MDQM_B7
J31
MDQS_B0
AF15
MDQS_B1
AG13
MDQS_B2
AG21
MDQS_B3
AH27
MDQS_B4
AD29
MDQS_B5
U30
MDQS_B6
L27
MDQS_B7
J30
AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30
YRCOMP
AA33
YCOMPH
R34
YCOMPL
R33
YVREF
AP9
YRCOMP
YCOMPH
YCOMPL
YVREFVCC_DDR_C2
MICRO-STAR INt'L CO., LTD.
Intel Springdale - Memory Signals
(MS-6733)
2
PLACE CLOSE TO GMCH
MCS_B#0 18
MCS_B#1 18
MCS_B#2 18
MCS_B#3 18
MRAS_B# 18
MCAS_B# 18
MWE_B# 18
MBA_B0 18
MBA_B1 18
MCLK_B0 18
MCLK_B#0 18
MCLK_B1 18
MCLK_B#1 18
MCLK_B2 18
MCLK_B#2 18
MCLK_B3 18
MCLK_B#3 18
MCLK_B4 18
MCLK_B#4 18
MCLK_B5 18
MCLK_B#5 18
C153 0.1u
1
VCC_AGP
MA_B[0..12] 18
MAB_B[1..5] 18
MDQM_B[0..7] 18
MDQS_B[0..7] 18
0.01uC170
0.01uC157
0.01uC161
YRCOMP 27
YCOMPH 27
YCOMPL 27
YVREF 27
7 29Tuesday, January 28, 2003
1
0C
8
GAD[0..31]19
D D
C C
GC_BE#[0..3]19
AD_STB#019
AD_STB#119
ST[0..2]19
GFRAME#19
GDEVSEL#19
B B
SBA[0..7]19
R214 43.2_1%
VCC_AGP
C143 0.1u
C144 0.1u
AGP_REF19
A A
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
AD_STB019
AD_STB119
GREQ#19
GGNT#19
ST0
ST1
ST2
RBF#
RBF#19
WBF#
WBF#19
GIRDY#19
GTRDY#19
GSTOP#19
GPAR19
MCH_6611
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB19
SB_STB#19
PIPE#19
DBI_LO19
GRCOMP
GSWING
GSWING19
8
AE6
GAD0/DVOB_HSYNC
AC11
GAD1/DVOB_VSYNC
AD5
GAD2/DVOB_D1
AE5
GAD3/DVOB_D0
AA10
GAD4/DVOB_D3
AC9
GAD5/DVOB_D2
AB11
GAD6/DVOB_D5
AB7
GAD7/DVOB_D4
AA9
GAD8/DVOB_D6
AA6
GAD9/DVOB_D9
AA5
GAD10/DVOB_D8
W10
GAD11/DVOB_D11
AA11
GAD12/DVOB_D10
W6
GAD13/DVOBC_CLKINT
W9
GAD14/DVOB_FLDSTL
V7
GAD15/MDDC_DATA
AA2
GAD16/DVOC_VSYNC
Y4
GAD17/DVOC_HSYNC
Y2
GAD18/DVOC_BLANK#
W2
GAD19/DVOC_D0
Y5
GAD20/DVOC_D1
V2
GAD21/DVOC_D2
W3
GAD22/DVOC_D3
U3
GAD23/DVOC_D4
T2
GAD24/DVOC_D7
T4
GAD25/DVOC_D6
T5
GAD26/DVOC_D9
R2
GAD27/DVOC_D8
P2
GAD28/DVOC_D11
P5
GAD29/DVOC_D10
P4
GAD30/DVOBC_INTR#
M2
GAD31/DVOC_FLDSTL
Y7
GCBE0/DVOB_D7
W5
GCBE1/DVOB_BLANK#
AA3
GCBE2
U2
GCBE3/DVOC_D5
AC6
GADSTBF0/DVOB_CLK
AC5
GADSTBS0/DVOB_CLK#
V4
GADSTBF1/DVOC_CLK
V5
GADSTBS1/DVOC_CLK#
N6
GREQ
M7
GGNT
N3
GST0
N5
GST1
N2
GST2
R10
GRBF
R9
GWBF
U6
GFRAME/MDVI_DATA
V11
GIRDY/MI2CCLK
AB5
GTRDY/MDVI_CLK
AB4
GDEVSEL/MI2CDATA
W11
GSTOP/MDDC_CLK
AB2
GPAR/ADD_DETECT
H4
GCLKIN
R6
GSBA0#/ADD_ID0
P7
GSBA1#/ADD_ID1
R3
GSBA2#/ADD_ID2
R5
GSBA3#/ADD_ID3
U9
GSBA4#/ADD_ID4
U10
GSBA5#/ADD_ID5
U5
GSBA6#/ADD_ID6
T7
GSBA7#/ADD_ID7
U11
GSBSTBF
T11
GSBSTBS
M4
DBI_HI
M5
DBI_LO
AC2
GRCOMP/DVOBC_RCOMP
AC3
GVSWING
AD2
GVREF
7
U14C
P26
P27
P28
P30
P33R1R4
P9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE1
AE10
AE11
AE12
AE13
AE25
AE26
AE32
AE4
AD30
AD33
AD28
7
6
R32T1T3
T6T8T9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE35
AF16
AF3
AF11
AF14
AF6
AF9
U4
U18
U19
U32V3V8V9V10
T30
T33
T35
T10
T26
T27
T28
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF18
AF20
AF22
6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF24
AF25
AF30
AF33
AG4
AG8
AG14
AG16
AG18
V6
VSS
VSS
VSS
VSS
VSS
VSS
AG20
AG22
AG24
5
V27
V17
V19
V26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG26
AG28
AG32
AG35
AH3
AH6
CI_SWING
CI_VREF
CLOSE TO NORTH BRIDGE
5
V28
VSS
VSS
VSS
VSS
AH10
V33
V30W4W17
VSS
VSS
VSS
VSS
AH12
AH14
AH16
W18
W32Y6Y8Y9Y26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH18
AH20
AH22
R217 226_1%
R219
147_1%
R220 113_1%
4
Y3
Y28
Y30
Y33
Y35
Y27
AA1
AA4
AA32
AB10
AB26
AB27
AB28
AB3
AB6
AB8
Y10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK3
AJ1
AJ4
AJ9
AJ32
AJ35
AH24
AH30
AH33
AB9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK8
AK10
VSS
VSS
VSS
VSS
AK16
AK12
AK14
VSS
AK18
AK20
AK22
AK24
AK26
AK28
AL1
AL32
VCC_AGP
4
3
VCC_AGP
VCC_AGP_C
C142 0.1u C146 0.1u
AC1
AC4
AC32
AC35
AD3
AD6
AD8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM19
AM21
AM23
AM25
L1L5Y1J1J2J3K2K3K4K5J4J5L4L2L3
AD9
AD10
VSS
VSS
VSS
VCC_AGP
VCC_AGP
VCC_AGP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM27
AM29
AM35
AN10
AN12
AN14
AN16
3
VCC_AGP
VCC_AGP
VSS
VSS
AN18
AN20
VCC_AGP
VSS
AN22
AB30
AB33
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM13
AM15
AM17
AM11
AM9
2
USE TRACE CONNECT TO VCC_AGP
VCCA_AGP_C
AG1
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCCA_AGP
HI_RCOMP
HI_SWING
CI_RCOMP
CI_SWING
DREFCLK
DDCA_CLK
DDCA_DATA
VCC_DAC
VCC_DAC
VCCA_DAC
VSSA_DAC
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AR9
AN24
AN26
AN28
AN30
AN32
AR11
AR13
AR16
AR20
MSI
Title
Intel Springdale - AGP & HLink & LAN Signals
Size Document Number Rev
Date: Sheet of
2
C138
0.1u
Y11
HL0
AF5
HI0
HL1
AG3
HI1
HL2
AK2
HI2
HL3
AG5
HI3
VCCA_AGP
HL4
AK5
HI4
HL5
AL3
HI5
HL6
AL2
HI6
HL7
AL4
HI7
HL8
AJ2
HI8
HL9
AH2
HI9
HL10
AJ3
HI10
AH5
HI_STRF
AH4
HI_STRS
HL_COMP
AD4
AE3
C151 0.1u
AE2
HI_VREF
C152 0.1u
AK7
CI0
AH7
CI1
AD11
CI2
AF7
CI3
AD7
CI4
AC10
CI5
AF8
CI6
AG7
CI7
AE9
CI8
AH9
CI9
AG6
CI10
AJ6
CISTRF
AJ5
CISTRS
CI_RCOMP
AG2
CI_SWING
AF2
CI_VREF
AF4
CI_VREF
G4
F2
H3
E2
VSYNC
G3
HSYNC
H7
BLUE
G6
BLUE#
H6
GREEN
G5
GREEN#
F4
RED
E4
RED#
GSET
D2
REFSET
G1
G2
CB70
C2
D3
CB65 C134
0.01u
AP8
EXTTS#
AG9
AG10
AN35
AP34
AR1
AR25
VSS
AR27
VSS
AR29
VSS
AR32
VSS
VSS
AR23
Intel Springdale
MICRO-STAR INt'L CO., LTD.
(MS-6733)
VCC_AGP
HL_STRF 10
HL_STRS 10
R212 52.3_1%
R222 52.3_1%
DOT_48 11
3VDDCCL 13
3VDDCDA 13
CRT_VSYNC 13
CRT_HSYNC 13
CRT_B 13
CRT_G 13
CRT_R 13
PLACE CLOSE TO PIN D2
R197 137_1%
CB69
0.1u 0.01u
L11
100nH_300mA
CT34
470u_10V
0.1u
It is able to support 250mA.
8 29Tuesday, January 28, 2003
1
HL[0..10] 10
HL_SWING 27
HL_VREF 27
VCC3
1
VCC_AGP
VCC_AGP
VCC_DAC
0C
8
D D
C C
B B
A A
AD[0..31]15,20,24
C_BE#[0..3]15,20,24
PCI_PME#15,19,20,24
PREQ#[0..4]15,20,24
PGNT#[0..4]15,20,24
GPI027
GPI127
ICH_PCLK11
PCIRST_ICH5#6,11,21
8
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
FRAME#15,20,24
IRDY#15,20,24
TRDY#15,20,24
DEVSEL#15,20,24
STOP#15,20,24
PAR15,20,24
PERR#15,20,24
SERR#15,20,24
LOCK#20
PIRQ#A19,20
PIRQ#B19,20
PIRQ#C20
PIRQ#D20
PIRQ#E15,20
PIRQ#F15,20
PIRQ#G20
PIRQ#H20,24
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
C391
100p
7
VCC3 VCC_AGP VCC1_5SB VCC3_SBVCC1_5SBVCC3_SB
B5F6G1H6K6L6M10
G19
G21
U20A
J4
AD0
J5
AD1
G3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
AD2
K4
AD3
H5
AD4
H2
AD5
J3
AD6
J2
AD7
K5
AD8
F2
AD9
M4
AD10
H4
AD11
L5
AD12
G2
AD13
K1
AD14
G5
AD15
G4
AD16
L1
AD17
B2
AD18
P5
AD19
H3
AD20
N5
AD21
C4
AD22
N4
AD23
E6
AD24
P3
AD25
D3
AD26
N2
AD27
F5
AD28
P4
AD29
F4
AD30
P2
AD31
E3
C/BE0#
J1
C/BE1#
N3
C/BE2#
M2
C/BE3#
D2
FRAME#
M3
IRDY#
E4
TRDY#
L3
DEVSEL#
E5
STOP#
F1
PAR
K2
PERR#
L4
SERR#
L2
PLOCK#
V2
PME#
B3
PIRQA#
E1
PIRQB#
A2
PIRQC#
C2
PIRQD#
D7
PIRQE#/GPI2
A6
PIRQF#/GPI3
E2
PIRQG#/GPI4
B1
PIRQH#/GPI5
D5
REQ0#
C1
REQ1#
C5
REQ2#
B6
REQ3#
C6
REQ4#/GPI40
D4
GNT0#
A3
GNT1#
B7
GNT2#
C7
GNT3#
A4
GNT4#/GPO48
A5
REQA#/GPI0
E7
REQB#REQ5#/GPI1
E8
GNTA#/GPO16
B4
GNTB#/GNT5#/GPO17
N1
PCICLK
V4
PCIRST#
Intel ICH5
GND
GND
GND
A1A7A10
A15
7
N10P6R13
VCC3_3
VCC3_3
GND
GND
A17
A19
VCC3_3
VCC3_3
GND
GND
A21
V19
A23
W15
VCC3_3
VCC3_3
GND
GND
AA5
W17
AA7
W24
VCC3_3
VCC3_3
GND
GND
AA9
AD13
AA11
6
AD20
VCC3_3
VCC3_3
GND
GND
AA13
6
K10
K12
K13
L19
P19
R10R6H24
J19
K19
M15
N15
N23
E15
F15
F14
W19
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
AA21
AA24
AB5
AB7
AB9
AB11
AB15
AB18
AC2
GND
AC4
AC6
AC8
AC10
AC13
AC23
AD4
AD6
AD8
5
R12W9W10
VCC1_5
VCC1_5
GND
GND
AD17
5
AD21
VCC1_5
GND
AD12
W11W6W7W8E22
VCC1_5
VCC1_5
VCC1_5
GND
GND
GND
B13
B17
B19
VCC1_5
VCC1_5
GND
GND
B21
VCC1_5
GND
B23C3C8
B15
E13
VCCSUS3_3
GND
GND
C16
E14
E18
F16
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GND
GND
GND
C18
C20
C22D1D6
F17
F18
K15U6V6
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GND
GND
GND
D11
4
SEPARATE
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
GND
GND
GND
D16
D18
D20
4
VCC1_5SB
F19Y5AA4
VCCSUS1_5A
VCCSUS1_5B
GND
GND
GND
D22
D24
AB4F7F8
VCCSUS1_5B
VCCSUS1_5B
GND
GND
GND
E17
E19
E20
GND
E21
E11
F10
F11
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCLAN3_3/VCCSUS3_3
VCCLAN1_5/VCCSUS1_5C
VCCLAN1_5/VCCSUS1_5C
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDA0
PDA1
PDA2
PDCS1#
PDCS3#
PDIOR#
PDIOW#
PIORDY
PDDREQ
PDDACK#
IRQ14
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDA0
SDA1
SDA2
SDCS1#
SDCS3#
SDIOR#
SDIOW#
SIORDY
SDDREQ
SDDACK#
IRQ15
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SDOUT
AC_SYNC
AC_BIT_CLK
AC_RST#
GND
GND
GND
E23F3F9
3
2
1
ICH5 Pull-Up / Down Resistors
AC_SDIN1
R303 X_10K
AC_SDIN2
R305 X_10K
PDD0
AB16
PDD1
Y13
PDD2
Y14
PDD3
AC14
PDD4
AA14
PDD5
AC15
PDD6
AD14
PDD7
AB14
PDD8
AD15
PDD9
Y15
PDD10
AD16
PDD11
AA15
PDD12
AC16
PDD13
Y16
PDD14
AA16
PDD15
AB17
AA19
AD19
AC19
AB19
Y18
AD18
AA17
AA18
AC17
AC18
Y17
SDD0
AA22
SDD1
AB23
SDD2
AD23
SDD3
AD24
SDD4
AB21
SDD5
AC21
SDD6
AB20
SDD7
AC20
SDD8
Y19
SDD9
AD22
SDD10
AC22
SDD11
AA20
SDD12
AB22
SDD13
AC24
SDD14
AB24
SDD15
AA23
W22
W23
W21
V22
V20
Y23
Y22
Y21
Y20
W20
Y24
E12
AC_SDIN1
D12
AC_SDIN2
A13
SDOUT
R302 33
A9
SYNC
R294 33
B8
D8
C12
3
PDD[0..15] 16
ICH5 Decoupling Capacitors
All caps be placed less than 100mils.
PD_A0 16
PD_A1 16
PD_A2 16
PD_CS#1 16
PD_CS#3 16
PD_IOR# 16
PD_IOW# 16
PD_IORDY 16
PD_DREQ 16
PD_DACK# 16
IRQ14 16
SDD[0..15] 16
SD_A0 16
SD_A1 16
SD_A2 16
SD_CS#1 16
SD_CS#3 16
SD_IOR# 16
SD_IOW# 16
SD_IORDY 16
SD_DREQ 16
SD_DACK# 16
IRQ15 16
AC_SDIN0 14
AC_SDOUT 14
AC_SYNC 14
AC_BITCLK 14
AC_RST# 14
MSI
Title
Size Document Number Rev
Date: Sheet of
VCC3 VCC3
CB105
0.1u
CB117
0.1u
CB125
0.1u
Close A1,A7,H1,P1,AD12 and AD21 of ICH5.
VCC3_SB
VCC1_5SB
VCC3_SB
CB101
0.1u
CB100
1u_0805
0.1uF close A15,A23, and V1 of ICH5.
Another close A17,A19 and A21 of ICH5.
Close L24,C24,D8,G24,M24 and AD18 of ICH5.
VCC_AGP
CB116
0.1u
CB121
0.1u
CB120
0.1u
CB163 0.01u
Close AD18 of ICH5.
Close to PinF19 of ICH5.
CB106
0.1u
Close PinAA4,AB4 of ICH5.
CB161
0.1u
Close PinF7,F8 of ICH5.
CB103
0.1u
VCC_AGPVCC_AGP
MICRO-STAR INt'L CO., LTD.
Intel ICH5 - PCI & IDE & AC97 Signals
(MS-6733)
2
9 29Tuesday, January 28, 2003
CB216
X_0.1u(S/S)
CB215
X_0.01u_(S/S)
Solder
CB124
0.22u
1
CB164
0.1u
CB165
0.1u
CB122
0.1u
CB107
0.1u
CB162
0.1u
CB115
0.1u
0C
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