MSI MS-6732 Schematics

8

7

6

5

4

3

2

1

Cover Sheet
Block Diagram

D D

Clock CY28349 & ATA100 IDE Connector

1
2
3

MS-6732

INTEL (R) Brookdale-G Chipset

Version 0A

Willamette/Northwood 478pin mPGA-B Processor Schematics

mPGA478-B INTEL CPU Sockets
INTEL Brookdale-G GMCH -- North Bridge

4 - 5
6 - 8

CPU:

Willamette/Northwood mPGA-478B Processor

INTEL ICH4 -- South Bridge

AC'97 Codec and Audio Connector & Internal Speaker
FWH

C C

DDR DIMMM1,2
DDR Damping & DDR Termination
AGP 4X SLOT (1.5V) 16
PCI SLOT 1 & 2 & 3
PCI SLOT 4 & 5 18
IO Connector

USB Connector

B B

Front Panel & Connectors & FAN
ACPI Controller (MS-5)
L6719B CPU Power ( PWM )-VRM9.0

9 - 10

11LPC I/O W83627HF-AW
12
13
14
15

17

19
20
21
22
23

System Brookdale-G Chipset:

INTEL GMCH (North Bridge) +
INTEL ICH4 (South Bridge)

On Board Chipset:

BIOS -- FWH
LPC Super I/O -- W83627HF-AW
Clock Generator -- CY28349
AC'97 Codec -- RealTek AC202A/650
Onboard Lan Chipset -- RealTek RTL8101L
Onboard 1394 -- NEC PD72874

Expansion Slots:

AGP2.0 SLOT * 1
PCI2.2 SLOT * 5

Realtek RTL8101L LAN

24
VGA Connector
NEC 1394
GPIO Definition

A A

Jumper Setting & Manual Parts
Power Delivery Map
PCI Routing and Clock Branch 31

8

7

6

25

26

27-28

29

30

5

Platform:

ATX

4

MSI

Title

Size Document Number Rev

3

Date: Sheet of

2

MICRO-STAR

COVER SHEET

MS-6732

1 27Monday, October 14, 2002

1

0A

8

D D

AGP
4X(1.5V)
AGP CONN

7

Power
Supply
CONN

AGP 4X
(1.5V)

VGA CONN

6

VRM

9.0

4X (66MHz) AGP

(593PINS/FCBGA)

5

(478PINS)

Willamette/Northwood
Socket (mPGA478-B)

(400/533MHz)

Scalable Bus

MCH: Memory

Controller HUB

4

3

2

1

(100/133MHz)

(100/133MHz)

CK408 Clock

Scalable Bus/2

(200/266MHz)

DDR DIMM 1:2

( 66MHz X 4 )

HUB Interface

(14.318MHz)

C C

ICH4: I/O

IDE CONN 1&2

USB Port 0:5

(360PINS/EBGA)

(48MHz)

LPC Bus AC Link

Controller HUB

(33MHz)

(33MHz)

FWH

NEC PD72874

LPC SIO

PCI (33MHz)

PCI Lan /
RealTek
8101L

AC '97 Audio

Codec

PCI Slots 1:5

RJ-45
Connector

Line Out

MIC In

B B

PS2 Mouse &
Keyboard

Parallel (1)
Serial (1)

Floppy Disk
Drive CONN

Front 1394

Rear 1394

Audio In

Line In

CD-ROM

A A

MSI

Title

Size Document Number Rev

8

7

6

5

4

3

Date: Sheet of

2

MICRO-STAR

BLOCK DIAGRAM

MS-6732

2 27Friday, October 11, 2002

1

0A

8

VCC3

CB140

104P

D D

* Put GND copper under Clock Gen.
connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around it

FB20 80_0805
CB189 X_10pC174

104P

filtering from 10K~1M

CB146
106P/0805

* put close to every power pin
* Trace Width 7mils.
* Same Group spacing 15mils
* Different Group spacing 30mils
* Differentical mode spacing 7mils

on itself

VCC3

C C

FB22 X_80_0805

CP12 X_COPPER

CB147
104P

VDDA3V

CB151
106P/0805

VCCP

SMBCLK_ISO{11,14,22}

SMBDATA_ISO{11,14,22}

VCC3

7

R295 10K

R285 220

CLOCK GENERATOR BLOCK

VCC3V

SMBCLK_ISO
SMBDATA_ISO

U12

39

CPU_VDD

CB163
104P

36

CPU_GND

46

MREF_VDD

CB165
104P

43

MREF_GND

CB145
104P

29

3V66_GND

9

PCI_VDD

CB144
104P

5

PCI_GND

18

PCI_VDD

CB148
104P

13

PCI_GND

24

48_VDD

C181

21

48_GND

2

REF_VDD

C195
103P

47

REF_GND

34

CORE_VDD

C189
103P

33

CORE_GND

26

SCLK

25

SDATA

19

VTT_GD#

CY28349

Q29

2'nd : I11-2834912-C23

2N3904S

CYPRESS/CY28349BOC

6

CPUCLK0

CPUCLK0#

CPUCLK1

CPUCLK1#

CPUCLK2

CPUCLK2#

3V66_48/SEL66_48#

FS2/PCI0
FS3/PCI1

SEL48_24#/PCI2

FS4/PCI3

FS0/48MHz

FS1/24_48MHz

MUL0/REF0
MUL1/REF1

RESET#

PWR_DN#

3V66_03V66_VDD
3V66_1
3V66_2

PCI4
PCI5
PCI6
PCI7
PCI8
PCI9

IREF

5

*Trace < 0.5"

CPU0

41
40

38
37

45
44

3132
30
28
27

6
7
8

10
11
12
14
15
16
17

22
23

48
1

3

X1

4

X2

35
20

42

R240 27.4RST

CPU0#

R241 27.4RST

CPU1

R242 27.4RST

CPU1#

R243 27.4RST

R503 33
R504 33
R505 33
R506 33

DOT_48

FS2

R520 33

FS3
SEL48_1

R273 33

FS4

FS0
FS1

MUL0
MUL1

X1

X2

PWR_DN#

7 8

RN57

5 6

8P4R-33

3 4
1 2
7 8

RN58

5 6

8P4R-33

3 4
1 2

R264 33
R254 33103P

R238 33

R265 33

X1 14M-32pf-HC49S-D

R244 475RST

R239 1K

VCC3 VCC3 VCC3 VCC3

CB166
104P

CPUCLK
CPUCLK#

MCHCLK
MCHCLK#

MCH_66
ICH_66
AGPCLK
DOT_CLK

1394_P
MS1_PCLK
PCICLK0

PCICLK1
PCICLK2
SIO_PCLK

FWH_P
ICH_PCLK

ICH_48
SIO_24

ICH_14
CODEC_14

22PC191

22PC188

Iref = 2.32mA

VCC3V

CB158

CB141

104P

104P

4

CPUCLK {4}
CPUCLK# {4}

MCHCLK {6}
MCHCLK# {6}

MCH_66 {6}
ICH_66 {10}
AGPCLK {16}
DOT_CLK {6}

MS1_PCLK {18}
PCICLK0 {17}

PCICLK1 {17}
PCICLK2 {17}
SIO_PCLK {11}
LAN_PCLK {24}

ICH_PCLK {9}

ICH_48 {10}
SIO_24 {11}

ICH_14 {10}
CODEC_14 {12}

CB142
104P

3

Shut Source Termination Resistors

CPUCLK

R227 49.9RST

CPUCLK#

R233 49.9RST

MCHCLK

R234 49.9RST

MCHCLK#

R232 49.9RST

Trace less 0.2"

49.9ohm for 50ohm M/B impedance

CLOCK STRAPPING RESISTORS

FS0
FS3
FS2
FS4
FS1

R252 10K

R263 10K
R266 10K
R272 10K
R277 10K
R25 1.5K

BSEL0 0 100 ; 1 133

1 1 1 1 1

SEL48_1 VCC3V

DOT_48

MUL0

MUL1

SMBCLK_ISO
SMBDATA_ISO

R267 X_10K

R276 10K

0 Set Pin 27 48MHz

R237 X_10K
R230 10K

R255 10K

R245 4.7K
R246 4.7K

VCC3V

BSEL0 {4,6}

FSB (MHz)FS4 FS3 FS2 FS1 FS0
100 MHz1 1 1 0 1
133 MHz

VCC3V

VCC3V

MUL 1:0

0 0 4X
0 1 5X
1 0 6X
1 1 7X

VCC3

2

Pull-Down Capacitors

CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
AGPCLK

ICH_66
MCH_66

MS1_PCLK

M1_PCLK5
ICH_14
SIO_24
ICH_48
CODEC_14LAN_PCLK
DOT_CLK

Ioh=6*Iref
Voh=0.71V

used only for EMI issue

Trace less 0.2"

Backup for MS1 clock

FWH_P

R613 0

FWH_P M1_PCLK4

R614 X_0

1394_P 1394_PCLK

R615 0

1394_P M1_PCLK5

R616 X_0

FWH_PCLK

1

X_10pC173

X_10pC177
X_10pC178
X_10pC291

X_10pC292
X_10pC293

X_10PC624

X_10PC626
10PC172
X_10PC180
X_10PC194
X_10PC196
X_10PC251

FWH_PCLK {13}
M1_PCLK4 {18}

1394_PCLK {26}
M1_PCLK5 {18}

For EMI

B B

HD_RST#

HD_RST#{22}

PDD[0..7]{10} SDD[0..7]{10}

PD_DREQ{10}

PD_IORDY{10}
PD_DACK#{10}

IRQ14{9}

PD_A1{10}

PD_CS#1{10}

PD_LED{21}

A A

8

R189 33 R187 33

PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

R518 33 R519 33

R97

C106

4.7K

X_220P

7

1
3 4
5 6
7 8

91110
13 14
17 18

19
21
23
25
27
29
31
33
35
37

R114
10K

PRIMAR1
YJ220-CB-1

2

12
1615

22
24
26
28
30
32
34
36
38
4039

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

C98
X_473P

PDD[8..15] {10}

PD_DET {10} SD_DET {10}
PD_A2 {10} SD_A0{10}PD_A0{10}
PD_CS#3 {10}

ATA100 IDE CONNECTORS

6

5

SECON1

R113
10K

YJ220-CW-1

1

2
3 4
5 6
7 8
91110

13 14
17 18

19
21
23
25
27
29
31
33
35
37

VCC3VCC5 VCC5VCC3

SDD8
SDD9
SDD10
SDD11
SDD12

12

SDD13
SDD14

1615

SDD15

22

24

26

28

30

32

34

36

38

4039

C97
X_473P

MSI

Title

Size Document Number Rev

Date: Sheet of

CLOCK GEN & ATA100 IDE

2

HD_RST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

SD_DREQ{10}

SD_IOW#{10}PD_IOW#{10}

SD_IOR#{10}PD_IOR#{10}
SD_IORDY{10}
SD_DACK#{10}

IRQ15{9}

SD_A1{10}

SD_CS#1{10}

SD_LED{21}

C107

R93

X_220P

4.7K

* Trace Width : 5mils
* Trace Spacing : 7mils
* Length(longest)-Length(shortest)<0.5"
* Trace Length less than 5"

4

3

SDD[8..15] {10}

SD_A2 {10}
SD_CS#3 {10}

MICRO-STAR

MS-6732

3 27Monday, October 14, 2002

1

0A

PRIMARY IDE BLOCK SECONDARY IDE BLOCK

8

D D

HINV#[0..3]{6}

HDEFER#{6}

C PU_TMPA;VTIN_GND

C C

Trace : 10 mil
width 10mil space

B B

CPU_TMPA{11}

VTIN_GND{11}

THERMTRIP#{9}

PROCHOT#{10}

CPURST#{6}

HD#[0..63]{6}

HINV#0
HINV#1
HINV#2
HINV#3

FERR#{9}

STPCLK#{9}

HINIT#{9,13}

HDBSY#{6}

HDRDY#{6}

HTRDY#{6}

HADS#{6}

HLOCK#{6}

HBNR#{6}

HIT#{6}

HITM#{6}

HBPRI#{6}

ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK

IGNNE#{9}

HSMI#{9}
A20M#{9}

SLP#{9}

BSEL0

BSEL0{3,6}

CPU_GD

CPU_GD{10}

CPURST#
HD#63

HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54

HA#[3..31]{6}

AF26

AB26

AE21
AF24
AF25

AB23
AB25
AA24

AA22
AA25

E21

G25

P26
V21

AC3

AA3

W5

AB2

G1
G4
G2

A22

AD2
AD3

AD6
AD5

Y21
Y24
Y23

W25

Y26

W26

V24

U3A

V6
B6
Y4

H5
H2

J6

F3
E3
D2
E2

C1
D5
F7
E6
D4
B3
C4
A2

C3
B2
B5
C6

A7

7

DBI0#
DBI1#
DBI2#
DBI3#

IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#

RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6

BSEL0
BSEL1

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D53#

V22

U21

6

HA#8

HA#22

HA#25

HA#23

HA#26

HA#27

HA#28

HA#30

HA#29

HA#31

AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2

A35#

A34#

A33#

A32#

A31#

A30#

A29#

A28#

A27#

A26#

A25#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

D40#

V25

U23

U24

U26

T23

T22

T25

T26

R24

R25

P24

R21

N25

HA#24

A24#

D39#

N26

A23#

D38#

M26

HA#21

A22#

D37#

N23

HA#20

A21#

D36#

M24

HA#19

A20#

D35#

P21

HA#18

A19#

D34#

N22

HA#17

A18#

D33#

M23

HA#16

A17#

D32#

H25

A16#

D31#

HA#15

K23

HA#14

A15#

D30#

J24

HA#13

A14#

D29#

L22

HA#12

A13#

D28#

M21

HA#11

A12#

D27#

H24

HA#10

A11#

D26#

G26

HA#9

A10#

D25#

L21

A9#

D24#

D26

HA#7

A8#

D23#

F26

A7#

D22#

HA#6

E25

HA#5

A6#

D21#

F24

HA#4

A5#

D20#

F23

HA#3

A4#

D19#

G23

A3#

D18#

5

CPU SIGNAL BLOCK

AE25A5A4

AD26

DBR#

VCC_SENSE

VSS_SENSE

Differential
Host Data
Strobes

D17#

D16#

D15#

D14#

D13#

D12#

D11#

E24

H22

D25

J21

D23

C26

H21

G22

AC26

ITP_CLK1

ITP_CLK0

D10#

D9#

D8#

B25

C24

C23

D7#

VID4

AE1

B24

VID3

AE2

VID4#

VID3#

D6#

D5#

D22

VID2

AE3

C21

VID1

AE4

VID2#

VID1#

D4#

D3#

A25

VID0

AE5

A23

VID[0..4] {11,23}

VID0#

GTLREF3
GTLREF2
GTLREF1
GTLREF0

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI12
TESTHI11
TESTHI10

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

BCLK1#
BCLK0#

RS2#
RS1#
RS0#

AP1#
AP0#
BR0#

COMP1
COMP0

DP3#
DP2#
DP1#
DP0#

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

D2#

D1#

D0#

PGA-S478-F02

B22

B21

4

AA21
AA6
F20
F6

AB4
AA5
Y6
AC4
AB5
AC6

H3
J3
J4
K5
J1

AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24

AF23
AF22

F4
G5
F1

V5
AC1
H6

P1
L24

L25
K26
K25
J26

R5
L5
W23
P23
J23
F21
W22
R22
K22
E22

E5
D1

GTLREF1

BPM#5
BPM#4

BPM#1
BPM#0

HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0

R28 51

R24 51
R67 51

R72 51
R61 51

R13 51

HRS#2
HRS#1
HRS#0

R23 51.1RST
R66 51.1RST

HREQ#[0..4] {6}

VCCP

CPUCLK# {3}
CPUCLK {3}

HRS#[0..2] {6}

HBR#0 {6}

* Short trace

HADSTB#1 {6}
HADSTB#0 {6}
HDSTBP#3 {6}
HDSTBP#2 {6}
HDSTBP#1 {6}
HDSTBP#0 {6}
HDSTBN#3 {6}
HDSTBN#2 {6}
HDSTBN#1 {6}
HDSTBN#0 {6}

NMI {9}
INTR {9}

3

2

1

CPU GTL REFERNCE VOLTAGE BLOCK

VCCP

GTLREF1

C47
220P

2/3*Vccp

CB56
104P

C62
105P

R63

49.9RST

R62
100RST

Every pin put one 220pF cap near it.
Trace Width 10mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin

CPU ITP BLOCK

ITP_TMS
ITP_TDO
ITP_TDI
ITP_TRST#
ITP_TCK

R14 39
R15 75
R17 150
R30 680
R16 27

VCCP

ALL COMPONENTS CLOSE TO CPU

CPU STRAPPING RESISTORS

PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#

BPM#0
BPM#1
BPM#4
BPM#5

R6 62
R71 300
R42 150
R70 51
R43 62

R26 51
R27 51
R29 51
R12 51

VCCP

VCCP

HD#53

HD#48

HD#51

HD#50

HD#49

HD#52

A A

8

7

HD#41

HD#45

HD#39

HD#42

HD#44

HD#43

HD#40

HD#47

HD#46

HD#38

HD#32

HD#29

HD#31

HD#26

HD#30

HD#28

HD#27

HD#34

HD#37

HD#35

HD#33

HD#36

6

HD#25

HD#19

HD#23

HD#22

HD#24

HD#20

HD#18

HD#21

HD#17

HD#10

HD#14

HD#16

HD#15

HD#12

HD#13

5

HD#11

HD#5

HD#8

HD#7

HD#9

HD#0

HD#2

HD#4

HD#3

HD#1

HD#6

MSI

Title

Size Document Number Rev

4

3

Date: Sheet of

2

MICRO-STAR

INTEL mPG478 CPU1

MS-6732

4 27Monday, October 14, 2002

1

0A

8

VCCP

A10

A12

A14

A16

A18

A20A8AA10

AA12

AA14

VCC

VSS

AD18

VCC

VSS

AD21

VCC

VSS

AD23

VCC

VSS

AD4

VCC

VSS

AD8

VCC

VSS

AE11

AA16

VCC

VSS

AE13

U3B

VCC

VCC

D D

D10
A11
A13
A15
A17
A19
A21
A24
A26

A3
A9

AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26

AA4

AA7

AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21

C C

AB24

AB3

AB6

AB8
AC11
AC13
AC15
AC17
AC19

AC2
AC22
AC25

AC5

AC7

AC9

AD1

VCC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS

VSS

AD10

AD12

AD14

AD16

AA18

VCC

VSS

AE15

AA8

VCC

VSS

AE17

VCC

VSS

AB11

VCC

VSS

AE19

AB13

VCC

VSS

AE22

AB15

VCC

VSS

AE24

7

AB17

VCC

VSS

AE26

AB19

VCC

VSS

AE7

AB7

AE9

AB9

VCC

VSS

AF1

VCC

VSS

AC10

VCC

VSS

AF10

AC12

VCC

VSS

AF12

AC14

VCC

VSS

AF14

AC16

VCC

VSS

AF16

AC18

VCC

VSS

AF18

AC8

VCC

VSS

AF20

CPU VOLTAGE BLOCK

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AF6

AF8

B10

B12

B14

B16

B18

B23

B20

6

AE14

AE16

VCC

VCC

VSS

VSS

B26B4B8

AE18

VCC

VSS

AE20

VCC

VSS

C11

AE6

C13

VCC

VSS

AE8

C15

AF11

VCC

VSS

C17C2C19

AF13

VCC

VSS

VCC

VSS

AF15

VCC

VSS

AF17

C22

AF19

AF2

AF21

AF5

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

C25C5C7C9D12

AF7

VCC

VSS

VCC

VSS

AF9

D14

B11

VCC

VSS

D16

5

B13

B15

B17

B19B7B9

VCC

VCC

VCC

VCC

VSS

VSS

VSS

VSS

D18

D20

D21D3D24D6D8E1E11

VCC

VSS

VCC

VSS

C10

VCC

VSS

C12

VCC

VSS

VCC

VSS

C14

C16

VCC

VSS

E13

C18

VCC

VSS

E15

C20C8D11

VCC

VCC

VSS

VSS

E17

E19

VCC

VSS

E23

D13

VCC

VSS

E26

D15

VCC

VSS

E4

D17

D19D7D9

VCC

VCC

VSS

VSS

E7E9F10

VCC

VSS

VCC

VSS

F12

E10

VCC

VSS

F14

VCC

VSS

E12

VCC

VSS

F16

4

E14

E16

VCC

VCC

VSS

VSS

F18F2F22

E18

VCC

VSS

E20E8F11

VCC

VCC

VSS

VSS

F25F5F8

104P

F13

VCC

VSS

G21G6G24

C25

F15

F17

VCC

VCC

VSS

VSS

G3H1H23

VCC

VSS

3

2

1

VCC_VID {22}

L6 4.7u-10%
L5 4.7u-10%

AF4

VCC-VID

VSS

VSS

H26H4J2

AE23

AF3

VCC-IOPLL

VCC-VIDPRG

VSS

VSS

VSS

VSS

J22

J25J5K21

AD20

VSS

VCCA

VSS

VSSA

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

PGA-S478-F02

AD22

Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24

C54
226P/1206

C59
X_106P/1206

C60
226P/1206

Keep the 22uF cap within 0.6"
of the CPU pin.
Trace Width 12mils, Space 10mils.

XX17
XX18
XX19
XX20
XX21
XX22
XX23
XX24

XX25
XX26
XX27
XX28
XX29
XX30
XX31
XX32

X3

X4

C55
X_106P/1206

U3C

X3
XX17
XX18
XX19
XX20
XX21
XX22
XX23
XX24

X4
XX25
XX26
XX27
XX28
XX29
XX30
XX31
XX32

PGA-S478-F02

F19

F9

VCC

VCC

VSS

VSS

XX10
XX11
XX12
XX13
XX14
XX15
XX16

VCCP

X1

X1

XX1

XX1

XX2

XX2

XX3

XX3

XX4

XX4

XX5

XX5

XX6

XX6

XX7

XX7

XX8

XX8

X2

X2

XX9

XX9

XX10
XX11
XX12
XX13
XX14
XX15
XX16

B B

CPU DECOUPLING CAPACITORS

VCCP

CB52
226P/1206
CB35
226P/1206
CB53
106P/1206

A A

8

CB39
X_106P/1206
CB40
226P/1206
CB24
226P/1206
CB51
106P/0805

106P/0805

CB28
106P/1206
CB37
226P/1206
CB20
226P/1206
CB44
106P/0805
CB46
226P/1206
CB38
226P/1206

7

X_106P/1206
CB43
226P/1206
CB16
106P/1206
CB36
106P/0805 CB25
CB41
226P/1206
CB32
226P/1206

6

VCCP VCCPVCCP

CB47
226P/1206CB23
CB45
226P/1206
CB17
106P/1206
CB27
226P/1206

106P/0805CB22
CB31
226P/1206
CB26
226P/1206

5

VCCPVCCP

C27
X_106P/1206
C49
X_106P/1206
C45
106P/1206
CB266
106P/0805

MSI

Title

Size Document Number Rev

4

3

Date: Sheet of

2

MICRO-STAR

INTEL mPGA478-B CPU2

MS-6732

5 27Monday, October 14, 2002

0A

1

5

HA#[3..31]{4}

* Length must be matched
within +/-0.1"of the Strobe
Signals

D D

HBR#0{4}
HBNR#{4}
HBPRI#{4}
HLOCK#{4}

HADS#{4}

HREQ#[0..4]{4}

C C

B B

HRS#[0..2]{4}

HINV#[0..3]{4}

HIT#{4}
HITM#{4}
HDEFER#{4}

HTRDY#{4}

HDBSY#{4}
HDRDY#{4}

HADSTB#0{4}
HADSTB#1{4}

HDSTBN#0{4}
HDSTBP#0{4}
HDSTBN#1{4}
HDSTBP#1{4}
HDSTBN#2{4}
HDSTBP#2{4}
HDSTBN#3{4}
HDSTBP#3{4}

MCHCLK{3}
MCHCLK#{3}

R431 24.9_1%
R433 24.9_1%

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HRS#0
HRS#1
HRS#2

HINV#0
HINV#1
HINV#2
HINV#3

HY_RCOMP
HX_RCOMP

U6A

W31

HA3#

AA33

HA4#

AB30

HA5#

V34

HA6#

Y36

HA7#

AC33

HA8#

Y35

HA9#

AA36

HA10#

AC34

HA11#

AB34

HA12#

Y34

HA13#

AB36

HA14#

AC36

HA15#

AC31

HA16#

AF35

HA17#

AD36

HA18#

AD35

HA19#

AE34

HA20#

AD34

HA21#

AE36

HA22#

AF36

HA23#

AE33

HA24#

AF34

HA25#

AG34

HA26#

AG36

HA27#

AE31

HA28#

AH35

HA29#

AG33

HA30#

AG31

HA31#

U33

BREQ0#

T34

BNR#

M34

BPRI#

T35

HLOCK#

T36

ADS#

V36

HREQ0#

AA31

HREQ1#

W33

HREQ2#

AA34

HREQ3#

W35

HREQ4#

P36

HIT#

M36

HITM#

N36

DEFER#

V30

HTRDY#

R36

RS0#

U34

RS1#

P34

RS2#

U31

DBSY#

U36

DRDY#

AB35

HAD_STB0#

AF30

HAD_STB1#

N31

HD_STBN0#

L31

HD_STBP0#

G33

HD_STBN1#

J34

HD_STBP1#

C30

HD_STBN2#

E29

HD_STBP2#

D25

HD_STBN3#

E25

HD_STBP3#

N33

DINV_0#

C35

DINV_1#

B33

DINV_2#

C26 H30

DINV_3# HD_VREF0

K30

HCLKP

J31

HCLKN

V35

HY_RCOMP

B28

HX_RCOMP

HOST

Trace 10 mils & 7mils space < 0.5"

BAV99

HL0
HL1
HL2
HL3
HL4
HL5

2

3

D19

1

AA7

HI0

AB8
AC7
AC5
AD8
AF4 AD3

AD4
AC4

G15

H16
E15

F16
C15

D16

2

2

3

3

D20
BAV99

1

1

HUB LINK

HI1
HI2
HI3
HI4
HI5 HI_REF

HI_STBS
HI_STBF

BLUE
BLUE#

GREEN
GREEN#

RED
RED#

VGA

HL[0..5]{9}

HL_STB{9}
HL_STB#{9}

A A

CRT_B{25}

CRT_B#{25}

CRT_G{25}

CRT_G#{25}

CRT_R{25}

CRT_R#{25}

VCC_AGP

BAV99

D18

5

4

GCLKIN

RSTIN#

CPURST#

PWROK

HD_VREF1
HD_VREF2

HA_VREF

HCC_VREF

HY_SWNG
HX_SWNG

HI_SWING

HL_RCOMP

DDCA_DATA

DDCA_CLK

HSYNC
VSYNC

DREFCLK

REFSET

4

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HI6
HI7
HI8
HI9

HI10

HD#0

T30

HD#1

R33

HD#2

R34

HD#3

N34

HD#4

R31

HD#5

L33

HD#6

L36

HD#7

P35

HD#8

J36

HD#9

K34

HD#10

K36

HD#11

M30

HD#12

M35

HD#13

L34

HD#14

K35

HD#15

H36

HD#16

G34

HD#17

G36

HD#18

J33

HD#19

D35

HD#20

F36

HD#21

F34

HD#22

E36

HD#23

H34

HD#24

F35

HD#25

D36

HD#26

H35

HD#27

E33

HD#28

E34

HD#29

B35

HD#30

G31

HD#31

C36

HD#32

D33

HD#33

D30

HD#34

D29

HD#35

E31

HD#36

D32

HD#37

C34

HD#38

B34

HD#39

D31

HD#40

G29

HD#41

C32

HD#42

B31

HD#43

B32

HD#44

B30

HD#45

B29

HD#46

E27

HD#47

C28

HD#48

B27

HD#49

D26

HD#50

D28

HD#51

B26

HD#52

G27

HD#53

H26

HD#54

B25

HD#55

C24

HD#56

B23

HD#57

B24

HD#58

E23

HD#59

C22

HD#60

G25

HD#61

B22

HD#62

D24

HD#63

G23
AE7

AJ31
D22

PWROK

E7

H24
D27
AD30

HVREF

P30

HSWNG

Y30
H28

HL6

AE4

HL7

AE5

HL8

AF3

HL9

AE2

HL10

AF2

HUB_MREF
HI_SWING

AD2

HL_RCOMP

AC2

R436 68.1_1%
R437 2.7K
R438 2.7K

C7
D7

HSYNC

B7

VSYNC

C6

DOT_CLK

D14

REFSET

B16

Brookdale_GMCH

R430 33
10pC260

3VDDCDA
3VDDCCL

R441 47
R442 47

R443 137_1%

HD#[0..63] {4}

MCH_66 {3}
PCIRST#1 {18,22}

CPURST# {4}
PWR_GD {10,22}

HL[6..10] {9}

Trace 10 mils &
7mils space <

0.5"

VCC_AGP
VCC3

3VDDCDA {25}
3VDDCCL {25}

3V_HSYNC {25}
3V_VSYNC {25}

DOT_CLK {3}

3

VCC_AGP MEM_STR

VCCA_SM

VCC_AGP

VCCA_DPLL

VCC3

CB231 0.1u

R439 8.2K

BSEL0{3,4}

R440

8.2K

3

PSBSEL

AB10
AD10

AA19

AA21

AA17

U6C

A3

VCC_AGP

A7
C1
D4
D6

G1

K6

L1

L9
P6
R1
R9

W9

V6

K10
K12
K14
K16
P10
V10

AD6
AC9
AC1
AE3

W19

Y19

W20

U21

W21

A9
B9
C9
D9
E9

B10
C10
D10
F10
H10
A11
B11
C11
D11
E11

G11

J11
B12
C12
D12
F12
H12

G13

J13
H14

J15

W18
W17

V19
U19

U17

AG2
AG1

A15
B14
A13

C14
B15

Y3

Y2
AA2
AA4
AA3
AA5

W7

Y4

Y8

A37
AB2
AB3

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

VCC_HI
VCC_HI
VCC_HI
VCC_HI

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC
VCC

VCC
VCC

VCC
VCC

VCCA_SM
VCCA_SM

VCCA_DAC
VCCA_DAC
VCCA_DPLL

VSSA_DAC
VSSA_DAC

PSBSEL
RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

POWER

Other

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB

VCCA_FSB

VCCQ_SM
VCCQ_SM
VCCQ_SM

VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAPVCC_GPIO

2

AH8
AK8
AG9
AJ9
AL9
AM22
AJ23
AL37
AU9
AK10
AJ11
AL11
AU25
AM26
AU13
AM14
AJ27
AJ1
AL1
AJ15
AP15
AU29
AH2
AJ2
AK2
AL2
AM30
AH3
AJ3
AK3
AL3
AH4
AJ4
AK4
AL4
AU17
AJ5
AL5
AU5
AM18
AJ19
AK32
AU33
AH6
AK6
AP20
AG7
AJ7
AL7
AP7
AH10
AH12
AH14
AH18
AH22
AH26

B18
C18
D18
H18
B19
C19
D19
E19
G19
J19
B20
C20
D20
F20
H20
Y28
T28
M28
K26
K22
K20
F18
K18
AD28

A17
AT21

AU21
AT20

G37
L37
R37
AC37
A31B6

A2

NC

A36

NC

AH34

NC

AJ35

NC

AT1

NC

AT37

NC

AU1

NC

AU2

NC

AU36

NC

AU37

NC

B1

NC

B37

NC

Brookdale_GMCH

2

1

GMCH REFERENCE BLOCK

VCCA_FSB

VCCA_DPLL

+

C253
680uF

VCCA_SM

CB224

0.1u_X7R

VCCQ_SM

CB225

0.1u_X7R

VCCP

Place Cap. as Close as possible to

, Trace width 12 mils & 10mils space

GMCH

Keep the voltage divider within 3" of the
GMCH pin.

VCCA_FSB
VCCQ_SM

VTT_CAP1
VTT_CAP2
VTT_CAP3
VTT_CAP4
VTT_CAP5

Place <0.1"

CB226 0.1u
CB227 0.1u
CB228 0.1u
CB229 0.1u
CB230 0.1u

Place 0.01uF Cap. as Close as possible to
GMCH< 0.25"

Trace width 12 mils & 10mils space

MSI

MSI

Title

Size Document Number Rev

Date: Sheet of

L17 0.82uH_0603
C252

CB222

22u-1206

0.1u_X7R

L18 10uH-0805
CB223

X_0.1u_X7R

L19 1uH-1206

CT44

+

100u_6.3V

L20 0.68uH-0805
C254

4.7u-0805

R424
1_1%

VCCP

C255

0.1u
R425

301_1%

HSWNG

C257

0.01u

VCCP

R427

49.9_1%

HVREF

C259

0.1u

HI_SWING

C262

0.01u

HUB_MREF

C264

0.01u

MICRO-STAR

BROOKDALE-G GMCH1

MS-6732

1

I=30mA

R423 1_1%

I=35mA

I=500mA

I=150mA

C256

0.01u

R426
150_1%

R428
100_1%

C261

0.1u

C263

0.1u

C265

0.1u

6 27Monday, October 14, 2002

VCC_AGP

VCC_AGP

VCC_AGP

VCC_AGP

MEM_STR

R432
226_1%

R434
100_1%

R435
100_1%

0A

5

MDQ0
MDQ1
MDQ2
MDQ3
MDQ4
MDQ5
MDQ6
MDQ7
MDQ8
MDQ9
MDQ10

X_0_Solder

DDR_VREF

R444

MDQ11
MDQ12
MDQ13
MDQ14
MDQ15
MDQ16
MDQ17
MDQ18
MDQ19
MDQ20
MDQ21
MDQ22
MDQ23
MDQ24
MDQ25
MDQ26
MDQ27
MDQ28
MDQ29
MDQ30
MDQ31
MDQ32
MDQ33
MDQ34
MDQ35
MDQ36
MDQ37
MDQ38
MDQ39
MDQ40
MDQ41
MDQ42
MDQ43
MDQ44
MDQ45
MDQ46
MDQ47
MDQ48
MDQ49
MDQ50
MDQ51
MDQ52
MDQ53
MDQ54
MDQ55
MDQ56
MDQ57
MDQ58
MDQ59
MDQ60
MDQ61
MDQ62
MDQ63

SRC_O#
SRC_I#

C266 0.1u

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3

5

D D

C C

Trace lengh
must as short
as possible
for SRCVEN

Trace width 12
mil with 12 mil
space for
SM_VREF.

B B

GAD[0..31]{16}

A A

GC_BE#[0..3]{16}

AR10

AP10
AT11
AT13
AT14
AT10
AR12
AR14
AP14
AT15
AP16
AT18
AT19
AR16
AT16
AP18
AR20
AR22
AP22
AP24
AT26
AT22
AT23
AT25
AR26
AP26
AT28
AR30
AP30
AT27
AR28
AT30
AT31
AR32
AT32
AR36
AP35
AP32
AT33
AP34
AT35
AN36

AM36

AK36

AJ36

AP36

AM35

AK35
AK34

AK24

AL23

AN4
AP2
AT3
AP5
AN2
AP3
AR4
AT4
AT5
AR6
AT9

AT6
AP6
AT8
AP8

W4
W5

U6B

V4
V2

U5
U4
U2
V3
T2
T3
T4
R2
R5
R7
T8
P3
P8
K4
K2

J2

M3

L5
L4

H4

G2

K3

J4
J5

J7
H3
K8

G4

R4
N4

M2

H2

SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63

SRCVEN_OUT#
SRCVEN_IN#

G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31

G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#

DDR

AGP

SCMDCL_K0

SCMDCLK_0#

SCMDCLK_1

SCMDCLK_1#

SCMDCLK_2

SCMDCLK_2#

SCMDCLK_3

SCMDCLK_3#

SCMDCLK_4

SCMDCLK_4#

SCMDCLK_5

SCMDCLK_5#

SMX_RCOMP0

SMY_RCOMPSM_VREF

G_FRAME#

G_TRDY#

G_DEVSEL#

G_STOP#

AD_STB0#
AD_STB1#

AGP_VREF

AGP_RCOMP

Brookdale_GMCH

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8

SMA9
SMA10
SMA11
SMA12

SMAB1
SMAB2
SMAB4
SMAB5

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7

SDM0

SDM1

SDM2

SDM3

SDM4

SDM5

SDM6

SDM7
SCKE0

SCKE1
SCKE2
SCKE3

SCS0#
SCS1#
SCS2#
SCS3#

SBA_0

SBA_1
SRAS#
SCAS#

SWE#

G_IRDY#

G_PAR

G_REQ#
G_GNT#

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

SB_STB

SB_STB#

AD_STB0
AD_STB1

PIPE#

RBF#

WBF#

4

MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7

MSDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7

MSCKE0
MSCKE1
MSCKE2
MSCKE3

MSCS0#
MSCS1#
MSCS2#
MSCS3#

DCLK0
DCLK0#
DCLK1
DCLK1#
DCLK2
DCLK2#
DCLK3
DCLK3#
DCLK4
DCLK4#
DCLK5
DCLK#5

MSBS0
MSBS1
MRAS#
MCAS#
MWE#

R445 60.4_1%

SMX_RCOMP
SMY_RCOMP

R448 60.4_1%

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

ST0
ST1
ST2

CB232 0.1u

R465 40.2_1%

DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12

DDRMAB1
DDRMAB2
DDRMAB4
DDRMAB5

MSCS0# {14,15}
MSCS1# {14,15}
MSCS2# {14,15}
MSCS3# {14,15}

DCLK0 {14}
DCLK0# {14}
DCLK1 {14}
DCLK1# {14}
DCLK2 {14}
DCLK2# {14}
DCLK3 {14}
DCLK3# {14}
DCLK4 {14}
DCLK4# {14}
DCLK5 {14}
DCLK5# {14}

MSBS0 {14,15}
MSBS1 {14,15}
MRAS# {14,15}
MCAS# {14,15}
MWE# {14,15}

R446 60.4_1%
R447 60.4_1%

GFRAME# {16}
GIRDY# {16}
GTRDY# {16}
GDEVSEL# {16}
GSTOP# {16}
GPAR {16}

GREQ# {16}
GGNT# {16}

SB_STB {16}
SB_STB# {16}

GAD_STB0 {16}
GAD_STB#0 {16}
GAD_STB1 {16}
GAD_STB#1 {16}

PIPE# {16}
RBF# {16}
WBF# {16}

AGPREF {16}

DDRMAB1 {14,15}
DDRMAB2 {14,15}
DDRMAB4 {14,15}
DDRMAB5 {14,15}

MSCKE[0..3] {14,15}

MEM_STR

C267 0.1u
C268 0.1u

SBA[0..7] {16}

ST[0..2] {16}

DDRMAA[0..12] {14,15}

Trace width 12 mil

Trace width 12 mil
with 10 mil space.

with 10 mil space.

Place 0.1uF <1" to GMCH

Place 0.1uF <1" to GMCH

AL25
AN25
AP23
AK20
AL19
AL17
AP19
AP17
AN17
AK16
AK26
AL15
AN15

AP25
AN23
AN19
AK18

AR2
AT7
AT12
AT17
AR24
AT29
AT34
AL36

AP4
AR8
AP12
AR18
AT24
AP28
AR34
AL34

AP13
AN13
AK14
AL13

AL29
AP31
AK30
AN31

AL21
AK22
AN11
AP11
AM34
AL33
AP21
AN21
AP9
AN9
AP33
AN34

AN27
AP27
AK28
AN29
AP29

AF10
AJ34AM2
M4

N7
N5
N2
P2
P4

D5
B5

C3
C2
D3
D2
E4
E2
F3
F2

F4
E5

C4

ST0

B4

ST1

B3

ST2

V8
U7
M8
L7

H8
G7
G5

W2

AGP_RCOMP

L2

4

3

2

1

DDR SERIAL RESISTORS

DDRMD1

RN99 10

DDRMD[0..63]{14,15}

3

DDRMD5
DDRMD4
DDRMD0
DDRMD3
DDRMD7
DDRMD6
DDRMD2
DDRMD13
DDRMD12
DDRMD9
DDRMD8
DDRMD11
DDRMD10
DDRMD15
DDRMD14
DDRMD21
DDRMD17
DDRMD16
DDRMD20
DDRMD23
DDRMD19
DDRMD22
DDRMD18

DDRMD29
DDRMD28
DDRMD24
DDRMD31
DDRMD27
DDRMD30
DDRMD26
DDRMD37
DDRMD33
DDRMD36
DDRMD32
DDRMD35
DDRMD39
DDRMD38
DDRMD34
DDRMD41
DDRMD45
DDRMD44
DDRMD40
DDRMD47
DDRMD43
DDRMD46
DDRMD42
DDRMD53
DDRMD52
DDRMD49
DDRMD48
DDRMD51
DDRMD50
DDRMD55
DDRMD54
DDRMD57
DDRMD61
DDRMD56
DDRMD60
DDRMD59
DDRMD63
DDRMD58
DDRMD62

MSDM0 SDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7

MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7

7 8
5 6
3 4
1 2

RN98 10

7 8
5 6
3 4
1 2

RN100 10

7 8
5 6
3 4
1 2

RN62 10

7 8
5 6
3 4
1 2

RN63 10

7 8
5 6
3 4
1 2

RN64 10

7 8
5 6
3 4
1 2

RN65 10

7 8
5 6
3 4
1 2

RN66 10

7 8
5 6
3 4
1 2

RN67 10

7 8
5 6
3 4
1 2

RN68 10

7 8
5 6
3 4
1 2

RN69 10

7 8
5 6
3 4
1 2

RN70 10

7 8
5 6
3 4
1 2

RN71 10

7 8
5 6
3 4
1 2

RN72 10

7 8
5 6
3 4
1 2

RN73 10

7 8
5 6
3 4
1 2

RN74 10

7 8
5 6
3 4
1 2

R449 10
R450 10
R451 10
R452 10
R453 10
R454 10
R455 10
R456 10

R457 10
R458 10
R459 10
R460 10
R461 10
R462 10
R463 10
R464 10

2

MDQ1
MDQ5
MDQ4
MDQ0
MDQ3
MDQ7
MDQ6
MDQ2
MDQ13
MDQ12
MDQ9
MDQ8
MDQ11
MDQ10
MDQ15
MDQ14
MDQ21
MDQ17
MDQ16
MDQ20
MDQ23
MDQ19
MDQ22
MDQ18
MDQ25DDRMD25
MDQ29
MDQ28
MDQ24
MDQ31
MDQ27
MDQ30
MDQ26
MDQ37
MDQ33
MDQ36
MDQ32
MDQ35
MDQ39
MDQ38
MDQ34
MDQ41
MDQ45
MDQ44
MDQ40
MDQ47
MDQ43
MDQ46
MDQ42
MDQ53
MDQ52
MDQ49
MDQ48
MDQ51
MDQ50
MDQ55
MDQ54
MDQ57
MDQ61
MDQ56
MDQ60
MDQ59
MDQ63
MDQ58
MDQ62

SDM0 {14,15}

SDM1

SDM1 {14,15}

SDM2

SDM2 {14,15}

SDM3

SDM3 {14,15}

SDM4

SDM4 {14,15}

SDM5

SDM5 {14,15}

SDM6

SDM6 {14,15}

SDM7

SDM7 {14,15}

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7

Title

Size Document Number Rev

Date: Sheet of

MSI

SDQS[0..7] {14,15}

MICRO-STAR

BROOKDALE-G GMCH2

MS-6732

1

7 27Monday, October 14, 2002

0A

5

4

3

2

1

GMCH DECOUPLING CAPACITOR

C17

D17

E17

G17

J17

V17

AH30

C31

AC3

AG3

AM3

AN3

AR3

AU3

AB4

AG4

Y17

AJ17

AR17

AR9

AM10

AR23

AU23

F24

AM24

VSS

VSS

AM16

B17

VSS

VSS

VSS

M10

GND

T10

GND

Y10

VSS

GND

A25

VSS

GND

AH16

GND

AH20

GND

AH24

GND

AH28

GND

AF28

GND

AB28

V28

GND

P28

GND

K24

GND

GND

Brookdale_GMCH

K28

N35

VSS

R35

VSS

U35

VSS

AA35

VSS

AC35

VSS

AE35

VSS

AG35

VSS

AL35

VSS

AN35

VSS

AR35

VSS

AU35

VSS

B36

VSS

W36

VSS

AF8

VSS

AM8

VSS

G9

VSS

J9

VSS

N9

VSS

U9

VSS

AA9

VSS

AE9

VSS

A23

VSS

C23

VSS

D23

VSS

J23

VSS

AH36

VSS

AT36

VSS

C37

VSS

E37

VSS

J37

VSS

U37

VSS

AA37

VSS

AE37

VSS

AG37

VSS

AJ37

VSS

C25

VSS

AN37

VSS

AR37

VSS

AR11

VSS

AU11

VSS

J25

VSS

AJ25

VSS

AR25

VSS

F26

VSS

AK12

VSS

AM12

VSS

B13

VSS

C13

VSS

D13

VSS

E13

VSS

A27

VSS

C27

VSS

J27

VSS

AJ13

VSS

AR13

VSS

F14

VSS

AL27

VSS

AR27

VSS

AU27

VSS

F28

VSS

AM28

VSS

E1

VSS

J1

VSS

N1

VSS

U1

VSS

AA1

VSS

AE1

VSS

AN1

VSS

AR1

VSS

B2

VSS

D15

VSS

AR15

VSS

AU15

VSS

N37

VSS

C16

VSS

VCC_AGP

C269

Pin A5

0.1u
CB233

Pin J1

0.1u
CB234

Pin E1

0.1u
CB236

Pin N1

0.1u
CB239

Pin U1

0.1u

Place decoupling cap
close to GMCH AGP
Interface < 0.1"

VCC_AGP

CB245

0.1u
C271

0.01u

Place decoupling cap
close to GMCH Core
Logic Interface <

0.1"

VCC_AGP

CB235

Pin AA1

0.1u 0.01u
CB237

Pin AE1

0.1u

Place decoupling cap
close to GMCH
Hub-Link Interface<

0.1"

VCCP

CB243

0.1u
CB246

0.1u
CB248

0.1u
CB250

0.1u
CB252

0.1u

Place decoupling cap
close to GMCH CPU
Interface < 250mil
in the Vtt corridor

VCC_AGP VCCP

+

CT25
1000u_6.3V

Place Bulk cap for Core Logic,
AGP & Hub Link Interface

+

CT47

1000u_6.3V

Place Bulk cap between
GMCH & DIMM slot

MEM_STR

+

CT45
X_470u

MEM_STR

Place decoupling cap
close to GMCH Memory
Interface < 0.1", with
18 mil trach width

+

CT46
X_470u

VCC_AGP

C270

Pin B14

CB238

Pin A15

0.1u

Place decoupling cap
close to GMCH DAC
Interface< 0.1"

CB240

Pin AL37

0.1u
CB241

Pin AU33

0.1u
CB242

Pin AU29

0.1u
CB244

Pin AU25

0.1u
CB247

0.1u

Pin AU17

CB249

Pin AU13

0.1u
CB251

0.1u

Pin AU9

CB253

0.1u

Pin AU5

+

CT48
1000u_6.3V

CB254

10u-1206

CB255
10u-1206

U6D

U18

VSS

V18

VSS

Y18

AA18

D D

C C

B B

A A

AL31
AR31
AU31

AB32
AD32
AF32
AH32

AR19

AM32

AJ33
AN33
AR33

AA20

AM20

AJ21
AR21

F32
H32
K32

M32

P32
T32
V32
Y32

AM4

AG5

AN5
AR5

A33
C33

M6

AB6
AF6

AM6

U20
V20
Y20

A21
B21
C21
D21
E21

G21

J21

D34

W34

A35
E35

G35

J35

L35
AN7
AR7
AU7

V21
Y21

F22
H22

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A5

VSS

C5

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS

F6

VSS

H6

VSS
VSS

T6

VSS

Y6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

B8

VSS

C8

VSS

D8

VSS

F8

VSS

VSS
VSS

VSS
VSS
VSS
VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

A29

C29

J29

L29

N29

U29

R29

W29

AA29

AC29

AE29

AG29

AJ29

AR29

F30

AT2E3G3J3L3N3R3U3W3

MSI

Title

Size Document Number Rev

5

4

3

2

Date: Sheet of

MICRO-STAR

Broodale-G GMCH3

MS-6732

8 27Monday, October 14, 2002

1

0A

ICH4 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS

ICH4 PULL-UP/DOWN RESISTORS

AD[31..0]{17,18,24,26}

C_BE#[3..0]

DEVSEL#{17,18,24,26}

FRAME#{17,18,24,26}

IRDY#{17,18,24,26}

TRDY#{17,18,24,26}

STOP#{17,18,24,26}

PAR{17,18,24,26}

PLOCK#{17,18}

SERR#{17,18,24,26}
PERR#{17,18,24,26}

PME#{16,17,18,24,26}

ICH_PCLK{3}

PCIRST#{13,22}

Reserved pull-down
resistor for ICH4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C_BE#0
C_BE#1
C_BE#2
C_BE#3

PREQ#A

R309 1K

R269 X_2.7K

H5

J3
H3
K1

G5

J4
H4

J5
K2

G2

L1

G4

L2
H2

L3
F5
F4
N1
E5
N2
E3
N3
E4

M5

E2
P1
E1
P2
D3
R1
D2
P4

J2
K4

M4

N4

M3

F1

L5
F2
F3

G1
M2

K5

L4

W2

B5
E8

P5
U5
Y5

D10
D11

A8

C12

V10

V16

VCC3_3

VCC3_3

VCC3_3

GND24

GND25

GND26

V18

VCC3_3

GND27

C17

C19

VCC1_5SB

E20

E13

E12

VCCSUS1_5

VCCSUS1_5

GND28

GND29

GND30

C21

C23C6D1

VCC_AGP VCC3_SB

K12

K18

K22

P10

T18

U19

VCC1_5

VCC1_5

VCC1_5

GND3

GND4

GND5

A20

A22A4AA12

VCC1_5

VCC1_5

VCC1_5

GND6

GND7

GND8

AA16

V14A5AC17

VCC1_5

VCC1_5

GND9

GND10

GND11

AA22

AA3

AA9

AB20

K10

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#

GPIO0/REQA#
GPIO16/GNTA#

PCICLK
PCIRST#
LAN_RST#
EE_CS

EE_DIN
EE_DOUT
EE_SHCLK

GND1

GND2

A1

A16

A18

AC8B2H18H6J1

VCC3_3

VCC3_3

VCC3_3

GND12

GND13

GND14

AB7

AC1

VCC3_3

GND15

AC10

AC14

VCC3_3

VCC3_3

VCC3_3

GND16

GND17

GND18

AC18

AC23

VCC3

J18K6M10

VCC3_3

VCC3_3

GND19

GND20

AC5

B12

P12P6U1

VCC3_3

GND21

B16

B18

VCC3_3

VCC3_3

GND22

GND23

B20

B22B9C15

F14

G18R6T6

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

GND31

GND32

GND33

GND34

GND35

D12

D15

D17

U6

E11

F10

VCCSUS1_5

VCCSUS3_3

GND36

GND37

GND38

D19

D21

D23D4D8

F15

F16

F17

F18

K14V7V8

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

GPIO1/REQB#/REQ5#

GPIO17/GNTB#/GNT5#

GND43

GND39

GND40

GND41

GND42

E14

D22

E10

E16

V9

CPUSLP#

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

STPCLK#

A20GATE

THRMTRIP#

HL_STB#
HLCOMP

HI_SWING

APICCLK

LAN_CLK

LAN_RSTSYNC

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

GND44

GND45

GND46

GND47

E17

E18

E19

A20M#

FERR#

IGNNE#

INIT#

RCIN#

HI_STB

HIREF

PIRQA#
PIRQB#
PIRQC#
PIRQD#

IRQ14
IRQ15

APICD0
APICD1

SERIRQ

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#

82801DB

INTR
SMI#

HI10
HI11

FERR#

R201 62

SERIRQ

U13A

AB23
U21

FERR#

AA21
W21
V22
AB22
V21

NMI

SMI#

W23
V23

KB_RST#

U22

A20GATE#

Y22
U23

NC

W20

HL0

L19

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9

L20
M19
M21
P19
R19
T20
R20
P23
L22
N22
K21
P21
N20
R23
R22
M23

D5
C2
B4
A3

AC13
AA19
J19
H19
K20
J22

B1
A2
B3
C7
B6
A6

C1
E6
A7
B7
D6
C5

C11
B11
A10
A9
A11
B10
C10
A12

HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10

R210 X_62

R225 68.1_1%

HI_ISWING
HUB_IREF

APICCLK
APIC_D0
APIC_D1
SERIRQ

PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5

PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5

THERMTRIP#

A20M# {4}
SLP# {4}
FERR# {4}
IGNNE# {4}
HINIT# {4,13}
INTR {4}
NMI {4}
HSMI# {4}
STPCLK# {4}
KB_RST# {11}
A20GATE# {11}

THERMTRIP# {4}

HL[0..10] {6}

This resistor less than 0.5"
from ICH use 15 mils trace

HL_STB {6}
HL_STB# {6}

VCC_AGP

INTA# {16,17}
INTB# {16,17,18}
INTC# {17,18}
INTD# {17}

IRQ14 {3}
IRQ15 {3}

SERIRQ {11}

PREQ#0 {17}
PREQ#1 {17}
PREQ#2 {17}
PREQ#3 {17,24}
PREQ#4 {17,18}
PREQ#5 {26}

PGNT#0 {17}
PGNT#1 {17}
PGNT#2 {17}
PGNT#3 {24}
PGNT#4 {18}
PGNT#5 {26}

ICH4 REFERENCE VOLTAGE

HI_ISWING

HUB_IREF

Place Cap. as Close as possible to ICH4 < 0.25"
Trace width use 12 mils and 10mils space

KB_RST#
A20GATE#
PREQ#A
PREQ#5

APIC_D0
APIC_D1

C276

C171

0.01u

R203 8.2K
R226 8.2K
R222 8.2K
R294 8.2K
R286 8.2K

R224 10K
R216 10K

C275

0.1u

C277

0.1u0.01u

C176

0.1u

VCC_AGP

R466
226_1%

R215
100_1%

R214
100_1%

VCCP

VCC3

Pin A1 Pin H1

VCC3

Pin A4

CB139
104P

104P

ICH4 DECOUPLING CAPACITORS

Pin AC10

CB178
104P

Pin T1

104P

Pin AC18

CB167
104P

104P

470U/10V

Place one 0.1u close to ICH4 <100 mil

Pin K23 Pin C23 Pin A16 Pin AC1Pin T23 Pin N23Pin C22 Pin C22

VCC_AGP VCC_AGP

+

EC4

CB137
104PCB181

CB135
104P

FOR Core Logic FOR Hub InterfaceFOR PLL

CB136
103P

VCC_AGP

CB138
104PCB150

VCC1_5SB

CB180
104PCB173

CB159
104P

MSI

Title

Size Document Number Rev

Date: Sheet of

MICRO-STAR

ICH4 PCI/HI/LAN

MS-6732

9 27Monday, October 14, 2002

0A

R306 1K

VCC5

D14

VCC3

AA2
AB6

Y23
V19

AA1

AA6
AB3
AA4

AB2
AA5

AC3
AB1

AB4
AC4
AC7
AC6

V20
T21
F19
C13

D13
A13
B13
H23

Y20

C20
D20
A21
B21
C18
D18
A19
B19
C16
D16
A17
B17
A23
B23
B15
C14
A15
B14
A14
D14

V1
Y4
Y2

Y1

Y3
R2

W6
W7

Y6

J23

C9
B8
D9

V5

W3

T3

J21
W1
W4

T2
R4
T4
U2
T5
U3
U4

1N5817S

THRM#{11}
SLP_S3#{11,22}
SLP_S4#{22}

PWR_GD{6,22}

CPU_GD{4}

PWRBTN#{11}

SUSCLK{11}

SMBDATA{11,17,18}

SMBCLK{11,17,18}

ICH_66{3}

ICH_14{3}

ICH_48{3}

AC_RST#{12}

AC_SYNC{12}

AC_BCLK{12}

AC_SDOUT{12}

AC_SDIN0{12}

SPKR{21}

SIO_PME#{11}

LAD0/FWH0{11,13}
LAD1/FWH1{11,13}
LAD2/FWH2{11,13}
LAD3/FWH3{11,13}

LFRAME#/FWH4{11,13}

LDRQ#{11}

USBP0+{20}

USBP0-{20}

USBP1+{20}

USBP1-{20}

USBP2+{20}

USBP2-{20}

USBP3+{20}

USBP3-{20}

USBP4+{20}

USBP4-{20}

USBP5+{20}

USBP5-{20}

Place < 0.5"

OC#1{20}
OC#2{20}
OC#3{20}

Place Cap close
to Pin E7

THRM#
SLP_S4#
PWR_GD
VRM_GD1
RING#
R_RSMRST#

SYS_RST#
BATLOW#
GPI6
SMBALERT#

INTRUDER#
RTCRST#
VBIAS

RTCX1
RTCX2

R275 33
R279 33

GPI12
SIO_PME#

GPI28

R236 22.6RST

ICH4 DECOUPLING CAPACITOR

VCC3_SB VCCP

CB193

CB149

104P

104P

CB134
104P

V5REF

CB179

104P

VCC5_SB

VCC_AGP

CB157

104P

V5REF

E15E7V6

V5REF1

GND49

GND50

V5REF2

V5REF_SUS

GND51

GND52

GND53

GND54

G21G3G6H1J6

C22

GND55

THRM#
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
CPUPWRGD
VRMPWRGD
PWRBTN#
RI#

RSMRST#
SUSSTAT#
SUSCLK
SYS_RESET#
BATLOW#/TP0
AGPBUSY#/GPIO6
GPIO11/SMBALERT#
SMLINK0
SMLINK1
INTRUDER#
RTCRST#
VBIAS
SMBDATA
SMBCLK
RTCX1
RTCX2
NC

CLK66
CLK14
CLK48

AC_RST#
AC_SYNC
AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
SPKR
GPIO12
GPIO13
C3_STAT#/GPIO21
CPUPERF#/GPIO22
SSMUXSEL/GPIO23
GPIO27
GPIO28

LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LFRAME#/FWH4
LDRQ0#
LDRQ1#

USBP0+
USBP0­USBP1+
USBP1­USBP2+
USBP2­USBP3+
USBP3­USBP4+
USBP4­USBP5+
USBP5­USBRBIAS
USBRBIAS#
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#

E21

GND48

E22F8G19

Place one 0.1u close to ICH4 <100 mil

VCC_AGP

CB132

104P

RTC_VCC

105P

CB170

VCCPLL

GND56

GND57

GND58

K11

K13

AB5

VCCRTC

GND59

GND60

K19

K23K3L10

VCC_AGP

L23

M14

P18

VCC_HI

VCC_HI

GND61

GND62

L11

VCC1_5SB

T22F6F7E9F9

VCC_HI

VCC_HI

GND63

GND64

L12

L13

VCCP

VCC3_SB

AA23

P14

U18

VCPU_IO0

VCPU_IO1

VCPU_IO2

VCCLAN1_5/VCCSUS1_5

VCCLAN1_5/VCCSUS1_5

VCCLAN3_3/VCCSUS3_3

VCCLAN3_3/VCCSUS3_3

GND65

GND66

GND67

GND68

GND69

GND70

GND71

GND72

GND73

GND74

L14

L21M1M11

M12

M13

M20

M22

N10

VCC1_5SB

C175
104P

V15

V17V3W22W5W8

Y19

Y7

GND96

GND97

GND98

GND99

GND100

GND101

GND102

GND75

GND76

GND77

GND78

GND79

GND80

GND81

GND82

N11

N12

N13

N14

N19

N21

N23N5P11

SYSTEM RESET

FP_RST#{21,22}

T19

T23

U20

GND91

GND92

GND93

GND94

GND95

GPIO2/PIRQE#
GPIO3/PIRQF#

GPIO4/PIRQG#

GPIO5/PIRQH#

STP_PCI#/GPIO18

SLP_S1#/GPIO19

STP_CPU#/GPIO20

CLKRUN#/GPIO24

GND83

GND84

GND85

GND86

GND87

P13

P20

P22P3R18

R328

0

R21R5T1

PDCS1#
SDCS1#
PDCS3#

GND89

GND90

SDCS3#

PDDREQ

SDDREQ
PDDACK#
SDDACK#

PDIOR#

SDIOR#
PDIOW#
SDIOW#

PIORDY
SIORDY

PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

GPIO7
GPIO8

GPIO25

GPIO32

GPIO33

GPIO34

GPIO35

GPIO36

GPIO37

GPIO38

GPIO39

GPIO40

GPIO41

GPIO42

GPIO43

GND88

82801DB

SYS_RST#

U13B

Y13
AB21
AB14
AC22

AA13

PDA0

AB13

PDA1

W13

PDA2

AA20

SDA0

AC20

SDA1

AC21

SDA2

AA11
AB18
Y12
AB19
AC12
Y18
W12
AA18
AB12
AC19

PDD0

AB11

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9

AC11
Y10
AA10
AA7
AB8
Y8
AA8
AB9
Y9
AC9
W9
AB10
W10
W11
Y11

W17
AB17
W16
AC16
W15
AB15
W14
AA14
Y14
AC15
AA15
Y15
AB16
Y16
AA17
Y17

C8
D7
C3
C4
R3
V4
Y21
W18
W19
AC2
V2
J20
G22
F20
G20
F21
H20
F23
H22
G23
H21
F22
E23

PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

GPI7

MB_ID0
MB_ID1
MB_ID2

MB_ID3

M/B Revision ID

MB_ID0
MB_ID1
MB_ID2
MB_ID3

VER:2.0 1 0 0 0

PD_CS#1 {3}
SD_CS#1 {3}
PD_CS#3 {3}
SD_CS#3 {3}

PD_A0 {3}
PD_A1 {3}
PD_A2 {3}
SD_A0 {3}
SD_A1 {3}
SD_A2 {3}

PD_DREQ {3}
SD_DREQ {3}
PD_DACK# {3}
SD_DACK# {3}
PD_IOR# {3}
SD_IOR# {3}
PD_IOW# {3}
SD_IOW# {3}
PD_IORDY {3}
SD_IORDY {3}

PDD[0..15] {3}

SDD[0..15] {3}

INTE# {17,24}
INTF# {17,18}
INTG# {17,18}
INTH# {17,24,26}

PD_DET {3}
SD_DET {3}

R394 X_10K
R395 10K
R396 X_10K
R397 10K
R398 X_10K
R399 10K
R400 10K
R401 X_10K

ID3 ID2 ID1 ID0

VCC3_SB VCC5_SB

R261
X_0

ICH4 STRAPPING RESISTORS

AC_SDOUT
SPKR

AC_SDOUT
HIGH

FSB Safe mode

LOW

FSB Auto mode

SPKR
HIGH

No TCO Timer Reboot mode
TCO Timer Reboot mode

LOW

ICH4 PULL-UP/DOWN RESISTORS

INTRUDER#

PD_IORDY
SD_IORDY
THRM# RING#
VRM_GD1
GPI6
GPI7

RSMRST#
PWR_GD
PD_DET
SD_DET
SLP_S3#

R317 330K

PASSWORD CLEAR JUMPER

VCC3_SB

GPI28

VCC3
VCC3
VCC3
VCC3

Short

OPEN

JPWD1

Normal
CLEAR

PASSWORD

RTC BLOCK

*Put a GND Plane under X'TAL

R259

*Please put this block close ICH4

1K

R256
3K

R258

BAT1

D12

1N4148S

D13

1N5817S

1K

R280

180K

473PC197

The RC delay time should

RTC_VCC

be in 18~25ms.

RTCRST#

C204
104P_X7R

R270
10M

R282 10M
32K-12.5pf-CSA-309-D

X3
C199
15P

+-30PPM

X2

32pF

PROCHOT BLOCK

R284 X_8.2K
R209 X_1K

R250 4.7K
R247 4.7K R304 4.7K
R311 8.2K
R229 10K
R308 10K
R307 10K

R257 10K
R46 10K
R103 10K
R102 10K
R404 X_100K R418 X_0

VCC3

R5 X_4.7K

*

VCCP

PROCHOT#{4}

*

RTC_VCC VCC3_SB

VCC3

RSMRST#{21,22}

SMBDATA
SMBCLK
BATLOW#
SIO_PME#
SMBALERT#

SYS_RST#
GPI12GPI8
GPI8
RSMRST#

X_2.2u-0805

RSMRST# R_RSMRST#

CB162

R337 4.7K

R318 4.7K

R336 4.7K

R313 4.7K

R330 8.2K

R329 22K

R312 10K

R325 8.2K

R262 X_1K

R419 X_100K

CMOS CLEAR JUMPER

R338 1K JPWD1

PIN1*2

R316
10K

MSI

Title

Size Document Number Rev

Date: Sheet of

GPI7

JBAT1 Clear CMOS
1 - 2

Normal

2 - 3

Clear CMOS

MICRO-STAR

ICH4 OTHER

MS-6732

*

VBIAS

RTCX1
RTCX2

C201
15P

X_32K-12.5pf-CSA-309-D

+-30PPM
32pF

THRM#

Q4

X_2N3904S

YJ103

1
2
3

JBAT1
CB219
X_104P

10 27Monday, October 14, 2002

0A