![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg1.png)
Cover Sheet
Block Diagram
MAIN CLOCK GEN &
DDR CLOCK BUFFER
1
MS6724
2
3
SIS 650GL CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics
VERSION:0A
mPGA478-B INTEL CPU Sockets
SIS 650GL NORTH BRIDGE
DDR SLOT
DDR TERMINATOR
SIS 962L SOUTH BRIDGE
PCI SLOTS ( PCI 1-3 )
LAN CONTROLLER (RTL8201BL MII PHY)
KB/MS Connector & FAN Connector
IDE Connectors
USB Connector
AC'97 CODEC ( ALC101 ) & AUDIO Connector
LPC I/O(W83697HF)
PARALLEL & SERIAL PORTS
VRM 9.0 (INTERSIL HIP6302)
MS-5 ACPI CONTROLLER
4 - 5
6 - 9
10
11
12 - 14
15
16
17
18
19
20
21
22
23
24
CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale Chipset:
SIS 650GL (North Bridge) + 962L (South Bridge)
On Board Chipset:
LPC Super I/O -- W83697HF
RTL8201BL MII PHY
Expansion Slots:
PCI2.2 SLOT* 3
AC'97 Codec :
Realtek ALC101
ATX POWER Connector & VGA Connector
FRONT PANEL
Decoupling Capacitor
25
26
27
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Micro Star Restricted Secret
BLOCK DIAGRAM
MS-6724
Last Revision Date:
Sheet
Rev
0A
Sunday, September 29, 2002
128
of
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg2.png)
VGA CON.
PCI slot 3 PCI slot 2 PCI slot 1
IDE 2 IDE 1
KEYBOARD
/MOUSE
LEGACY
ROM
System Block Diagram
VGA CONNECTOR
PS/2
SOCKET 478
Host Bus
SIS 650GL
Hyper ZIP
SIS 962L
LPC BUS
LPC SUPER I/O
DDR DIMM
AC'97
AUDIO CODEC
H/W MONITOR
USB 0
USB 1
GPIO_0
GPIO_1
GPIO_2
GPIO_3 EXTSMI#
GPIO_4 CLKRUN# ( Pull-Down )
GPIO_5 PREQ#5(Pull-Up)
GPIO_6
GPIO_7 AUX
GPIO_8 RING
GPIO_9
GPIO_10
GPIO_11
GPIO_12 I/O
GPIO_13
DDR2DDR1
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24 I
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
MAIN
I/O
AUX
I/O
AUX
I/O
AUX
I/O
AUX
I/O
AUX
AUX
I/O
AUX
I/O
AUX
I/O
AUX
I/O
AUX
I/O
AUX
I/O
AUX
I/O
AUX
I/O
AUX EESK
I
AUX
I
AUX
I
AUX
PCI Routing
Lan
USB 3
USB 4
DEVICES
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
INT#
INT#D
INT#A
INT#B
INT#C
INT#B
INT#C
INT#D
INT#A
INT#C
INT#D
INT#A
INT#B
Flash Rom protection H: Disable, L: Enable
LDRQ1 ( Pull-Down )
THERM#
PGNT#5(Pull-Up)
LAN_WAKE#
RESERVED
RESERVED
Pull-Up
Pull-Up
RESERVED
Pull-Down
KBDAT
KBCLK
MSDAT
MSCLK
SMBCLK
SMBDAT
EEDI
DDEO
EECS
IDSEL
AD19
AD17
AD18
REQ#/GNT#
PREQ#2
PGNT#2
PREQ#0
PGNT#0
PREQ#1
PGNT#1
CLOCK
PCICLK2
PCICLK0
PCICLK1
GPIO Table on SIS962L
FLOPPYPRINTERCOMGAME/MIDIGPIOS
Title
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
Micro Star Restricted Secret
BLOCK DIAGRAM
MS-6724
Last Revision Date:
Friday, October 04, 2002
Sheet
228
of
Rev
0A
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg3.png)
VCC3
L40
X_80_0805
C156
4.7U/0805
NPN-MBT3904LT1-S-SOT23
VCCP
R160
10K
D12
X-1N4148-S-LL34-75V
VCC2_5
CB61
0.1u
VCC2_5
CP35
X_COPPER
CB153
0.1u
C139
AC
10p
CP6 X_COPPER
CB74
X_0.01u
CP11 X_COPPER
L19
X_80_0805
VCC3
C136
4.7U/0805
CB146
0.1u
CB59
0.1u
C70
X_4.7U/0805
FWDSDCLKO7
CB137
0.1u
R167
10K
Q24
NPN-MBT3904LT1-S-SOT23
VCC3
C66
X_4.7U/0805
CB66
0.1u
CB136
0.1u
VCC3 VCC3
R159
10K
Q25
L16
X_80_0805
U7 pin 9 pull down : DDR
CB132
0.1u
CB135
CB140
0.1u
0.1u
R174
CP36 X_COPPER
L41
X_80_0805
CB143
0.1u
CB71
0.1u
CB72
X_0.01u
SMBCLK
SMBDAT
FWDSDCLKO
R285
2.7K
CB139
0.1u
CB142
0.1u
CBVDD
CB73
0.1u
CB154
0.1u
475
CBVDD
R286
X_2.7K
VCC2_5
Main Clock Generator
U14
REALTEK/RTM360-645R
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
PCI_STOP#
45
CPU_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
CB138
102P
37
VSSA
XIN
6
14M-16pf-HC49S-D
C164
16p
U7
REALTEK/RTM 680-627,SMT/SSOP28
3
VDD
12
VDD
23
VDD
10
AVDD
7
SCLK
22
SDATA
8
CLK_IN
20
FB_IN
9
NC
18
NC
21
NC
GND
6
Y2
GND
111528
GND
GND
40
CPUCLK0
39
CPUCLK#0
44
CPUCLK1
43
CPUCLK#1
47
SDCLK
31
AGPCLK0
30
AGPCLK1
9
ZCLK0
10
ZCLK1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
SCLK
SDATA
48M
14
15
16
17
20
21
22
23
2
3
4
27
26
35
34
PCICLK_F0/FS3
PCICLK_F1/FS4
24_48M/MULTISEL
XOUT
7
C160
16p
Clock Buffer (DDR)
DDRCLK0
2
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
FB_OUT
DDRCLK3
4
DDRCLK2
13
DDRCLK1
17
DDRCLK8
24
DDRCLK7
26
DDRCLK-0
1
DDRCLK-3
5
DDRCLK-2
14
DDRCLK-1
16
DDRCLK-8
25
DDRCLK-7
27
R68
19
R190
R186
R188
R189
R187
R191
R226
FS3 96XPCLK
FS4 SIOPCLK
FS0
FS1
FS2
R227
RN72 8P4R-33
7 8
5 6
3 4
1 2
R225
RN73 8P4R-33
7 8
5 6
3 4
1 2
R192
R193
DDRCLK0 10
DDRCLK3 10
DDRCLK2 10
DDRCLK1 10
DDRCLK8 10
DDRCLK7 10
DDRCLK-0 10
DDRCLK-3 10
DDRCLK-2 10
DDRCLK-1 10
DDRCLK-8 10
DDRCLK-7 10
FB_OUT
22
C52
10p
CPUCLK1
33
CPUCLK-1
33
CPUCLK0
33
CPUCLK-0
33
SDCLK
22
AGPCLK0
33
ZCLK0
22
ZCLK1
22
PCICLK1
PCICLK2
33
UCLK48M
22
SIO48MMULTISEL
22
SMBCLK
SMBDAT
VCC3
R230 2.7K
R234
R233
FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
0000
CPUCLK1 6
CPUCLK-1 6
CPUCLK0 4
CPUCLK-0 4
SDCLK 7
AGPCLK0 6
ZCLK0 8
ZCLK1 12
96XPCLK 12
SIOPCLK 21
PCICLK1 15
PCICLK2 15
PCICLK3 15
REFCLK0
REFCLK1
APICCLK
REFCLK2
UCLK48M 14
SIO48M 21
SMBCLK 10,13,24
SMBDAT 10,13,24
F0~F4 intern a l P ul l- Down 120K
FS0
2.7K
2.7K
001111
REFCLK0 8
REFCLK1 13
APICCLK 13
REFCLK2 20
R229
R235
100 100
100133
MULTISEL inter na l Pu ll -U p 120K
MULTISEL
R194 X_4.7K
BSEL0 4
FS2
10K
FS4
10K
6666666633
Title
33
Micro Star Restricted Secret
CLOCK GEN & DDR CLOCK BUFFER
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SDCLK
AGPCLK0
ZCLK0
ZCLK1
PCICLK3
PCICLK2
PCICLK1
SIOPCLK
96XPCLK
REFCLK2
APICCLK
REFCLK1
REFCLK0
UCLK48M
SIO48M
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK8
DDRCLK7
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-8
DDRCLK-7
MS-6724
Last Revision Date:
Sheet
R175
R176
R177
R178
CN9
CN10 X_8P4C_10p
1 2
3 4
5 6
7 8
49.9
49.9
49.9
49.9
C153 X_10p_0603
C151 X_10p_0603
C188 X_10p_0603
C189 X_10p_0603
C169 X_10p
8P4C_10p
1 2
3 4
5 6
7 8
C152 10p
C155 10p
C72 10p
C58 10p
C73 10p
C75 10p
C56 10p
C54 10p
C71 10p
C59 10p
C74 10p
C76 10p
C55 10p
C53 10p
Rev
0A
Saturday, October 05, 2002
328
of
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg4.png)
Trace : 10
mil width
10mil
space
BSEL0
0
1
HDBI#[0..3]6
BSEL03
HD#[0..63]6
HDEFER#6
CPU_TMPA21
VTIN_GND21
FSB
100 MHz
133 MHz
CPURST#6
STPCLK#13
HDBSY#6
HDRDY#6
HTRDY#6
HLOCK#6
CPUSLP#13
CPU_GD6
FERR#13
HINIT#13
HADS#6
HBNR#6
HITM#6
HBPRI#6
IGNNE#13
A20M#13
HIT#6
SMI#13
R228 0
HDBI#0
HDBI#1
HDBI#2
HDBI#3
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
CPU_TMPA
THERMTRIP#
PROCHOT#
IGNNE#
SMI#
A20M#
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
HA#[3..31]6
G25
AC3
AA3
AB2
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
A22
Y21
Y24
Y23
Y26
V24
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A7
U4A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
V22
HD#53
CPU SIGNAL BLOCK
HA#26
HA#27
HA#28
HA#31
HA#30
HA#29
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
U21
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
HD#49
HD#50
HD#46
HD#48
HD#47
HD#44
HD#45
HD#43
HD#42
HD#41
HD#51
HD#52
P24
HA#25
A26#
D41#
R21
HD#40
HA#24
A25#
D40#
N25
HD#39
HA#23
A24#
D39#
N26
HD#38
HA#22
A23#
D38#
M26
HD#37
HA#21
A22#
A21#
D37#
D36#
N23
HD#36
HA#20
HA#19
A20#
D35#
M24
P21
HD#35
HD#34
HA#18
A19#
D34#
N22
HD#33
HA#17
A18#
D33#
M23
HD#32
HA#16
A17#
D32#
H25
HD#31
HA#15
A16#
D31#
K23
HD#30
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
HA#12
A13#
D28#
M21
HD#27
HA#11
A12#
D27#
H24
HD#26
HA#10
A11#
D26#
G26
HD#25
HA#9
A10#
D25#
L21
HD#24
HA#8
A9#
D24#
D26
HD#23
HA#7
A8#
A7#
D23#
D22#
F26
HD#22
HA#6
HA#5
A6#
D21#
E25
HD#21
HD#20
A5#
D20#
F24
HA#4
F23
HD#19
HA#3
A4#
D19#
G23
HD#18
A3#
D18#
E24
HD#17
D17#
H22
HD#16
AE25A5A4
AD26
DBR#
VSS_SENSE
VCC_SENSE
Differential
Host Data
Strobes
D16#
D15#
D14#
D13#
D12#
D11#
D25
J21
D23
C26
H21
G22
HD#15
HD#11
HD#13
HD#12
HD#14
HD#10
AC26
ITP_CLK1
D10#
B25
HD#9
ITP_CLK0
D9#
D8#
C24
HD#8
D7#
C23
HD#7
VID4
AE1
VID4#
D6#
B24
HD#6
VID3
AE2
VID3#
D5#
D22
HD#5
VID2
AE3
VID2#
D4#
C21
HD#4
VID1
AE4
VID1#
D3#
A25
HD#3
VID0
AE5
A23
HD#2
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
B22
B21
PGA-S478-F02
HD#0
HD#1
VID[0..4] 23
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
TESTHI11
A6
TESTHI10
Y3
TESTHI9
W4
TESTHI8
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
GTLREF1
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R28 1K
RS#2
RS#1
RS#0CPUSLP#
R53 49.9
R56 49.9
R51 56
CPUCLK-0 3
CPUCLK0 3
HBR#0 6
* Short trace
HADSTB#1 6
HADSTB#0 6
HDSTBP#3 6
HDSTBP#2 6
HDSTBP#1 6
HDSTBP#0 6
HDSTBN#3 6
HDSTBN#2 6
HDSTBN#1 6
HDSTBN#0 6
NMI 13
INTR 13
HREQ#[0..4] 6
RS#[0..2] 6
VCCP
CPU GTL REFERNCE VOLTAGE BLOCK
VCCP
Length < 1.5inch.
C34
220p
2/3*Vccp
C42
220p
GTLREF1
1u
C28
R35
49.9RST
R37
100RST
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU ITP BLOCK
ITP_TMS
ITP_TDO
ITP_TCK
R41 39
R43 75
R49 27
VCCP
CPU STRAPPING RESISTORS
CLOSED TO SO CK E T478
PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#
BPM#4
BPM#5
BPM#1
BPM#0
ITP_TDI
ITP_TRST#
CPU_GD
CPURST#
CPUSLP#
CLOSED TO SO CK E T478
STPCLK#
CPUSLP#
SMI#
HINIT#
FERR#
IGNNE#
NMI
INTR
A20M#
R44 62
R26 62
R67 49.9
R30 49.9
R65 62
RN7 8P4R-56
7 8
5 6
3 4
1 2
R66 150
R46 680
X_102pC21
X_102pC24
X_0.022uC22
R42 X_56
R27 X_56
R29 X_56
R47 56
R38 X_62
RN17
7 8
5 6
3 4
1 2
X_8P4R-56
VCCP
VCCP
VCCP
VCCP
VCCP
TESTHI9
TESTHI8
TESTHI10
RN10
7 8
5 6
3 4
1 2
8P4R-56
VCCP
Title
Micro Star Restricted Secret
mPGA478-B Intel CPU Socket Part 1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-6724
Last Revision Date:
Sheet
Rev
0A
Saturday, October 05, 2002
428
of
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg5.png)
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AE11
AE13
D10
A11
A13
A15
A17
A19
A21
A24
A26
AA1
AA4
AA7
AA9
AB3
AB6
AB8
AC2
AC5
AC7
AC9
AD1
AD4
AD8
CPU VOLTAGE BLOCK
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
VCC
VSS
VCC
VSS
VCC
VSS
H26H4J2
VCC
VSS
VCC
VSS
E20E8F11
VCC
VCC
VSS
VSS
J22
VCC
VSS
J25J5K21
U4B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
F25F5F8
VSS
VSS
VSS
G21G6G24
VCC
VSS
VSS
G3H1H23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
E23
E7E9F10
E4
E26
VSS
F12
F14
F16
F18F2F22
VCC
VSS
VCC_VID
L7 4.7u-10%
L8 4.7u-10%
VCC-VID
HVSS
XX6
HVSS
AF3
XX7
VCC-VIDPRG
HVSS
XX8
HVSS
AE23
XX9
VCC-IOPLL
HVSS
AD20
HVSS
XX20
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
XX21
XX22
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
XX32
XX31
XX30
XX29
XX28
XX27
XX26
XX25
XX24
HVSS
XX23
PGA-S478-F02
VCCA
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
XX10
XX11
XX12
XX13
XX14
XX15
XX16
XX17
XX18
XX19
C19
22u-1206
C20
22u-1206
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VSS
HVSS
HVSS
HVSS
HVSS
XX1
XX2
XX3
XX4
XX5
VCCP
CPU DECOUPLING CAPACITORS
VCCP VCCPVCCP
CB58
10u-0805
CB57
10u-0805
CB56
10u-0805
CB55
10u-0805
CB54
10u-0805
CB53
10u-0805
PLACE CAPS WITHIN CPU CAVITY
CB13
10u-1206
CB30
10u-1206
CB12
10u-1206
CB21
10u-1206
CB11
10u-1206
CB27
10u-1206
CB26
10u-1206
CB25
10u-1206
CB39
10u-1206
CB38
10u-1206
CB37
10u-1206
CB36
10u-1206
CB28
10u-1206
Title
Micro Star Restricted Secret
mPGA478-B Intel CPU Socket Part 2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-6724
Last Revision Date:
Sheet
Rev
0A
Saturday, October 05, 2002
528
of
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg6.png)
C1XAVSS
C1XAVDD
C4XAVSS
C4XAVDD
HVREF
HPCOMP
HNCOMP
HNCVREF
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
RBF#
WBF#
PIPE#
AGP8XDET
ADBIH
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
AGPCLK
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
DBI#2
DBI#1
DBI#0
A27
H27
R25
HDBI#2
HDBI#1
HDBI#0
CT17
X_10u_0805
U8A
F6
F3
H4
K5
C9
A6
G2
G1
G3
G4
H5
H1
H3
E8
F8
D9
D10
B3
C4
B5
A4
K1
L1
C1
D1
AGPCLK0
B10
AGPRCOMP
M1
A1XAVDD
B9
A1XAVSS
A9
A4XAVDD
B8
A4XAVSS
A8
M3
M2
HDSTBN#3
F20
HDSTBN#2
F23
HDSTBN#1
K24
HDSTBN#0
P24
HDSTBP#3
F21
HDSTBP#2
F24
HDSTBP#1
L24
HDSTBP#0
N25
SIS-SIS650GL-VA0
HDBI#[0..3] 4
Title
AGPCLK0 3
HDSTBN#3 4
HDSTBN#2 4
HDSTBN#1 4
HDSTBN#0 4
HDSTBP#3 4
HDSTBP#2 4
HDSTBP#1 4
HDSTBP#0 4
Micro Star Restricted Secret
SIS 650 PART1
R142
60.4
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VDDQ
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
MS-6724
Last Revision Date:
Sheet
VCC3
CP24
1 2
X_COPPER_0
L32
X_0
CB107
0.1u
CB109
0.1u
CB106
0.01u
1 2
X_COPPER_0
1 2
X_COPPER_0
CB111
0.01u
1 2
X_COPPER_0
CT23
X_10u_0805
CP23
VCC3
CP26
L33
X_80
CT24
X_10u_0805
CP25
Rev
0A
Friday, October 04, 2002
628
of
AH25
AJ25
AH27
AJ27
U21
T21
P21
N21
J17
B20
B19
A19A7F9B7M6M5M4L3L6L4K6L2K3J3K4J2J6J4J1H6F4F1G6E3F5E2E4E1D3D4C2F7C3E6B2D5D6A3D7C5A5C6D8
HBR#04
RS#[0..2]
HITM#
HDRDY#
HDBSY#
HADSTB#14
HADSTB#04
R84
20
R76
110
place this capacitor
under 650 solder side
CPUCLK1
CPUCLK-1
HDEFER#
HLOCK#
HTRDY#
CPURST#
CPU_GD
HBPRI#
HBR#0
HADS#
HIT#
HBNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HADSTB#1
HADSTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HNCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
HPCOMP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
HD#[0..63]4
CB92
0.01u
CPUCLK13
CPUCLK-13
HDEFER#4
HLOCK#4
HTRDY#4
CPURST#4
CPU_GD4
HBPRI#4
RS#[0..2]4
HADS#4
HITM#4
HIT#4
HDRDY#4
HDBSY#4
HBNR#4
HREQ#[0..4]4
HA#[3..31]4
HREQ#[0..4]
HA#[3..31]
VCCP
VCCP VCCP
R98
75
R96
150
RS#2
RS#1
RS#0
HD#[0..63]
HVREF
CB89
0.1u
AJ26
AH26
AD24
AA24
AF26
AE25
AH28
AD26
AG29
AE26
AF28
AC24
AG28
AE29
AD28
AC25
AD27
AE28
AF27
AB24
AB26
AC28
AC26
AC29
AA26
AB28
AB27
AA25
AA29
AA28
U26
U24
V26
C20
D19
U25
U29
V28
U28
W26
V24
V27
W28
W29
W24
W25
Y27
Y26
Y24
Y28
T27
T24
T26
T28
CPUCLK
CPUCLK#
DEFER#
HLOCK#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS#2
RS#1
RS#0
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HASTB#1
HASTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HD#63
C1XAVSS
C4XAVSS
C1XAVDD
HOST
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
B21
F19
A21
E19
D22
D20
B22
C22
HD#59
HD#58
HD#57
HD#62
HD#61
HD#60
HD#56
R80
150
R82
75
C4XAVDD
HD#55
HD#54
B23
A23
D21
HD#54
HD#55
HD#53
CB82
0.1u
HNCVREF
CB79
0.1u
HVREF0
HVREF1
HD#53
HD#52
F22
D24
HD#51
HD#52
ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8
AAD9
AAD10
AAD11
AAD12
AAD13
HVREF2
HVREF3
HVREF4
HPCOMP
HNCOMP
HNCOMPVREF
AAD14
650GL-1
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
D23
C24
B24
E25
E23
D25
A25
C26
B26
B27
D26
B28
E26
F28
G25
F27
F26
G24
H24
G29
J26
G26
J25
H26
G28
H28
HD#32
HD#31
HD#30
HD#50
HD#49
HD#48
HD#47
HD#46
HD#44
HD#45
C1XAVDD
C1XAVSS
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
CB69
0.01u
HD#33
HD#35
HD#34
CP9
1 2
X_COPPER_0
L18
X_0
CP12
1 2
X_COPPER_0
HD#29
HD#28
HD#27
HD#26
HD#25
CT16
X_10u_0805
AAD15
HD#25
J24
HD#24
AAD16
AAD17
HD#24
HD#23
K28
HD#23
AAD18
HD#22
J29
HD#22
HD#21
AAD19
HD#21
K27
AAD20
HD#20
J28
HD#20
HD#19
AAD21
HD#19
M24
HD#18
AAD22
HD#18
L26
AAD23
HD#17
K26
L25
HD#17
HD#16
C4XAVDD
C4XAVSS
AAD24
HD#16
AAD25
HD#15
L28
HD#15
AAD26
HD#14
M26
HD#14
HD#13
AAD27
HD#13
P26
AAD28
HD#12
L29
HD#12
AAD29
AAD30
AAD31
AGP
HD#11
HD#10
HD#9
HD#8
N24
N26
M27
N28
P27
HD#9
HD#8
HD#7
HD#11
HD#10
SBA7
HD#7
N29
HD#6
SBA6
HD#6
R24
HD#5
CB70
0.01u
SBA5
SBA4
SBA3
SBA2
HD#5
HD#4
HD#3
HD#2
R28
M28
P28
HD#3
HD#2
HD#4
HD#1
CP8
1 2
X_COPPER_0
L17
X_80
CP10
1 2
X_COPPER_0
R26
C7
SBA1
HD#1
R29
HD#0
SBA0
AGPRCOMP
AGPVSSREF
HD#0
DBI#3
E21
HDBI#3
VCC3VCC3
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg7.png)
Rs place close to DIMM1
RMD1 MD1
RMD5 MD5
RMD4 MD4
RMD0 MD0
RMD6 MD6
RMD2 MD2
RDQM0 DQM0
RDQS0 DQS0
RMD9 MD9
RMD8 MD8
RMD7 MD7
RMD3 MD3
RMD11 MD11
RMD10 MD10
RMD15 MD15
RMD14 MD14
RDQM1 DQM1
RMD13 MD13
RDQS1 DQS1
RMD12 MD12 RMA10
RMD21 MD21 RMA11
RMD17 MD17 RMA12
RMD16 MD16
RMD20 MD20
RMD22 MD22
RMD18 MD18 RSRAS#
RDQM2 DQM2 RSCAS#
RDQS2 DQS2 RSWE#
RMD28 MD28
RMD24 MD24
RMD23 MD23
RMD19 MD19
RMD31 MD31
RMD27 MD27
RMD30 MD30
RMD26 MD26
RDQM3 DQM3
RDQS3 DQS3
RMD25 MD25
RMD29 MD29
RMD37 MD37
RMD33 MD33
RMD36 MD36
RMD32 MD32
RMD38 MD38
RMD34 MD34
RDQM4 DQM4
RDQS4 DQS4
RMD44 MD44
RMD40 MD40
RMD35 MD35
RMD39 MD39
RDQS5 DQS5 FWDSDCLKO
RDQM5 DQM5
RMD41 MD41
RMD45 MD45
RMD47 MD47
RMD46 MD46
RMD43 MD43
RMD42 MD42
RMD55 MD55
RDQS6 DQS6
RMD54 MD54
RDQM6 DQM6
RMD53 MD53
RMD52 MD52
RMD49 MD49
RMD48 MD48
RMD56 MD56
RMD60 MD60
RMD51 MD51
RMD50 MD50
RMD62 MD62
RDQM7 DQM7
RMD57 MD57
RMD61 MD61
RMD59 MD59
RMD63 MD63
RMD58 MD58
RDQS7 DQS7
RN3
8P4R-10
RN6
8P4R-10
RN9
8P4R-10
RN14
8P4R-10
RN11
8P4R-10
RN21
8P4R-10
RN23
8P4R-10
RN29
8P4R-10
RN33
8P4R-10
RN31
8P4R-10
RN42
8P4R-10
RN46
8P4R-10
RN49
8P4R-10
RN52
8P4R-10
RN55
8P4R-10
RN59
8P4R-10
RN57
8P4R-10
RN62
8P4R-10
RN66
8P4R-10
RN68
8P4R-10
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7
AJ23
AG22
AH21
AJ21
AD23
AE23
AF22
AF21
AD22
AH22
AD21
AG20
AE19
AF19
AE21
AD20
AD19
AH19
AF20
AH20
AF18
AG18
AH17
AD16
AD18
AD17
AF17
AJ17
AE17
AH18
AD14
AG14
AJ13
AE13
AJ15
AF14
AD13
AF13
AH13
AH14
AD10
AH10
AE9
AD8
AG10
AF10
AH9
AF9
AD9
AJ9
AH5
AG4
AE5
AH3
AG6
AF6
AF5
AF4
AH4
AJ3
AE4
AD6
AE2
AC5
AG2
AG1
AF3
AC6
AD4
AF2
AB6
AD3
AA6
AB3
AC4
AE1
AD2
AC1
AB4
AC2
U8B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB#0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB#2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB#3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB#4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7
SIS-SIS650GL-VA0
RMA7
RMA8
RMA5
RMA6
RMA14
RMA13
RMA9
650GL-2
RN28
78
56
34
12
RN25
X_8P4R-0
78
56
34
12
X_8P4R-0
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
SRAS#
SCAS#
SWE#
CS#0
CS#1
CS#2
CS#3
CS#4
CS#5
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
SDCLK
FWDSDCLKO
SDRCLKI
SDAVDD
SDAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
RMA7
RMA8
RMA5
RMA6
RMA14
RMA13
RMA9
RMA0
AH11
RMA1
AF12
RMA2
AH12
RMA3
AG12
RMA4
AD12
RMA5
AH15
RMA6
AF15
RMA7
AH16
RMA8
AE15
RMA9
AD15
RMA10
AF11
RMA11
AG8
RMA12
AJ11
RMA13
AG16
RMA14
AF16
RSRAS#
AH8
RSCAS#
AJ7
RSWE#
AH7
RCS-0
AE7
RCS-1
AF7
RCS-2
AH6
RCS-3
AJ5
AF8
AD7
AB2
AA4
AB1
Y6
AA5
Y5
Y4
AA3
R111 22
AD11
AE11
SDAVDD
Y1
Y2
DDRAVDD
AA1
DDRAVSS
AA2
DDRVREFA
AJ19
DDRVREFB
AH2
R149 4.7K
W3
Rs place close to DIMM1
R72 X_0
R73
R79 X_0
R74 X_0
R88 X_0
R95 X_0
R91 X_0
12
34
56
78
RN36X_8P4R-0
X_0
RN53 X_8P4R-0
CKE: Open Drain
S3AUXSW#
R145 4.7K
C98
10p_0603
VCC3SBY
HI: DDR
CKE0
CKE1
CKE2
CKE3
SDCLK
78
56
34
12
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..3]
CKE[0..3]
RMA0
RMA1
RMA2
RMA3
RMA4
RSRAS# 10,11
RSCAS# 10,11
RSWE# 10,11
RCS-0
RCS-2
RCS-1
RCS-3
S3AUXSW# 24
VCC3SBY
SDCLK 3
FWDSDCLKO 3
Title
RMD[0..63] 10,11
RDQM[0..7] 10,11
RDQS[0..7] 10,11
RMA[0..14] 10,11
RCS-[0..3] 10,11
Micro Star Restricted Secret
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
CKE[0..3] 10
DDRVREFA
DDRVREFB
SDAVDD
CB125
0.1u
SDAVSSSDAVSS
DDRAVDD
CB123
0.01u
DDRAVSS
CB115
0.1u
SIS 645DX / 651 PART2
MS-6724
Last Revision Date:
Sheet
VCCM
R89
150
R94
VCCM
150
R135
150
R134
150
CP33
1 2
X_COPPER_0
L38
X_80
CB114
0.01u
CP32
1 2
X_COPPER_0
CP30
1 2
X_COPPER_0
L36
X_80
CP29
1 2
X_COPPER_0
CB90
0.1u
CB110
0.1u
VCC3
VCC3
Rev
0A
Friday, October 04, 2002
728
of
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg8.png)
VCC1_8
ZAD[0..15]12
VCC1_8
150
VCC3
VCC3
CP27
1 2
X_COPPER_0
L34
X_80
R151
R153
150
CB126
0.1u
CP28
1 2
X_COPPER_0
L35
X_80
CP31
1 2
X_COPPER_0
L37
X_80
C121
0.1u
ZAD[0..15]
ZVREF
C115
0.1u
0.1u
Z1XAVDD
Z1XAVSS
Z4XAVDD
C122
Z4XAVSS
R144 56
R143 56
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
NB Hardware Trap Table
0
enable PLL disable PLL
SDR DDR
normal NB debug mode
TV selection, NTSC/PAL(0/1) 0
enable VB
enable VGA interface
enable panel link
U8C
SIS-SIS650GL-VA0
V3
ZCLK
U6
ZUREQ
U1
ZDREQ
T3
ZSTB0
T1
ZSTB#0
P1
ZSTB1
P3
ZSTB#1
T4
ZAD0
R3
ZAD1
T5
ZAD2
T6
ZAD3
R2
ZAD4
R6
ZAD5
R1
ZAD6
R4
ZAD7
P4
ZAD8
N3
PCIRST1#21,24
PWRGD13,23,24
RSMRST#13,16,24
ENTEST
PWRGD
RSMRST#
P5
P6
N1
N6
N2
N4
U3
V5
U4
U2
V6
W1
W2
V2
V1
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
PCIRST1#
PWRGD
RSMRST#
R129 4.7K
C128 0.1u
C124 0.1u
HyperZip
650GL-3
PCIRST#
PWROK
Y3W4W6
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
DLLEN#
DRAM_SEL
TRAP0
TRAP1
CSYNC
RSYNC
LSYNC
ZCLK03
ZUREQ12
ZDREQ12
ZSTB012
ZSTB-012
ZSTB112
ZSTB-112
ZCLK0
ZUREQ
ZDREQ
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13 VCOMP
ZAD14 VRSET
ZAD15
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
1
AUXOK
VGA
Stereo
Glass
TRAP1
D11
for 650 only
RSYNC
Title
R124 4.7K
REFCLK0 3
HSYNC 25
VSYNC 25
DDC1CLK 25
DDC1DATA 25
INTA# 12,15
VVBWN
VCOMP
DACAVDD1
DACAVSS1
CB86
CB83
C101
X_47p
Micro Star Restricted Secret
SIS 650 PART3
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VCC3
C97
C100
X_47p
X_47p
0.1u
0.1u
CB101
0.1u
MS-6724
Last Revision Date:
Sheet
ROUT
GOUT
BOUT
L29
80_0603
CP22
1 2
X_COPPER_0
L31X_80_0603
ROUT 25
GOUT 25
BOUT 25
VRSET
VCC1_8
C104
X_10u_0805
R99
130
Rev
0A
Friday, October 04, 2002
828
of
0
0
0
1
0
DLLEN#
ENTEST
F10
ENTEST
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
embedded pull-low
(30~50K Ohm)
yes
yes
yes
C15
VOSCI
A12
ROUT
B13
GOUT
A13
BOUT
F13
HSYNC
E13
VSYNC
D13
VGPIO0
D12
VGPIO1
B11
INT#A
E12
CSYNC
A11
RSYNC
F12
LSYNC
E14
VCOMP
D14
VRSET
F14
VVBWN
ECLKAVSS
CB95
0.1u
CB97
0.1u
B12
C12
C13
C14
B15
A15
B14
A14
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
R113
R112
R105
R104 33
R100 33
R101 100
R103
CP15
1 2
X_COPPER_0
L23
X_603
CP16
1 2
X_COPPER_0
CP17
1 2
X_COPPER_0
L27 X_603
CP18
1 2
X_COPPER_0
VCC3
VCC3
0
0
0
100
C86
X_10u_0805
C92
X_10u_0805
REFCLK0
HSYNC
VSYNC
DDC1CLK
DDC1DATA
INTA#
RSYNC
VVBWN
DACAVDD1
DACAVSS1
DACAVDD1
DACAVSS1
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
Default
1(DDR)
TRAP0
TESTMODE2
TESTMODE1
TESTMODE0
E10
A10
F11
C11
E11
![](/html/3f/3f72/3f72ea5403c4ec240fed3a78a643c67c8d8766cb6452764bcc7c643775f6bb80/bg9.png)
VCCM
VDDQ
VCC1_8
VCCP
VCCP VCC1_8 VCC3
H21
H22
J16
J20
J21
J22
K16
K17
K18
K19
K20
K21
L20
M20
N20
P20
R20
R21
T20
U20
V20
W20
Y20
Y21
AA20
AA21
AA22
AB21
AB22
L12
L14
L15
L16
L18
M11
M19
N11
A16
A17
A18
B16
B17
B18
C16
C17
C18
D15
D16
D17
D18
E15
E16
E17
E18
F15
F16
F17
F18
AB5
AD5
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE22
V10
V11
W18
Y10
Y12
Y14
Y16
Y18
Y19
AA8
AA9
AA10
AA13
AA14
AA15
AA16
AA17
AB8
AB9
AB13
AB17
K11
K13
L10
N10
P10
R10
T10
T11
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
Y9
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
E5
VDDQ
E7
VDDQ
E9
VDDQ
G5
VDDQ
J5
VDDQ
L5
VDDQ
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
J10
VDDQ
J13
VDDQ
K9
VDDQ
VDDQ
VDDQ
VDDQ
N9
VDDQ
VDDQ
N5
VDDZ
R5
VDDZ
U5
VDDZ
W5
VDDZ
P9
VDDZ
VDDZ
R9
VDDZ
VDDZ
T9
VDDZ
VDDZ
VDDZ
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L17
L19
N19
R19
U19
W19
M12
M13
M14
M15
M16
M17
M18
N12
N13
N14
N15
N16
N17
N18
P12
P13
P14
P15
P16
VCC1_8
VTT
IVDD
IVDD
650GL-4
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P17
P18
R12
R13
R14
R15
R16
R17
R18
T12
IVDD
VSS
P19
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VSS
VSS
VSS
VSS
VSS
VSS
T13
T14
T15
T16
T17
T18
R11
U12
IVDD
VSS
T19
U13
IVDD
VSS
U11
U14
IVDD
VSS
V19
U15
IVDD
VSS
W11
U16
IVDD
VSS
W13
U17
IVDD
VSS
W15
U18
IVDD
VSS
W17
V12
IVDD
VSS
VCC3SBY
VCC3
VCC3SBY
10u_0805
10u_0805
CB93
1u
CB157
0.1u
VCC1_8SBY
CT21
CT22
CB175
X_0.1u
CB177
X_0.1u
CB182
X_0.1u
CB179
X_0.1u
CB133
1u
CB120
0.1u
CB127
0.1u
CB98
0.1u
VCC3
CB180
X_0.1u
CB176
X_0.1u
SIS 650 PART4
MS-6724
Last Revision Date:
Sheet
VCC1_8
CB122
0.1u
CB116
0.1u
CB149
0.1u
CB134
0.1u
CB150
0.1u
CB77
1u
CB104
0.1u
VCC3SBY
CB178
X_0.1u
CB186
X_0.1u
VDDQ
CB185
X_0.1u
CB183
X_0.1u
Rev
0A
Friday, October 04, 2002
928
of
AF25
VSS
AG24
AUX1.8
AUX3.3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG26
AH23
U8D
U10
U9
A20
A22
A24
A26
C19
C21
C23
C25
C27
E20
E22
E24
F25
H25
K25
M25
P25
T25
V25
Y25
AB25
AD25
E27
G27
J27
L27
N27
R27
U27
W27
AA27
AC27
AE27
D29
F29
H29
K29
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2
P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27
VSS
VSS
SIS-SIS650GL-VA0
AH24
VCC1_8SBY
VCC3SBY
VCCP
VDDQ
VCCP
CB81
1u
CB87
1u
CB5
1u
CB15
1u
CB124
0.1u
CB117
0.1u
CB171
X_0.1u
CB172
X_0.1u
CB174
X_0.1u
CB170
X_0.1u
CB94
0.1u
CB22
0.1u
CB88
0.1u
CB31
0.1u
VCCM
CB119
0.1u
CB118
0.1u
Place these capacitors under 645 solder side
VCC1_8
CB187
VCCM
X_0.1u
CB184
X_0.1u
CB181
X_1u-0805
CB173
X_1u-0805
Title
Micro Star Restricted Secret
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
P11
J14
J15
K15
K10
K12
K14
M10
W10
Y11
Y13
Y15
Y17
PVDD
PVDD
PVDD
OVDD
PVDDZ
VSS
VSS
VSS
VSS
V13
V14
V15
V16
PVDD
OVDD
OVDD
VSS
VSS
V17
V18
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B25
C28
C29
D27
D28
E28
E29
AF23
AF24