![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg1.png)
5
4
3
2
1
MSI
MS-6719 Ver:0A
Pentium4 socket-478 Processor
System Chipset:
CPU:
D D
MEDION ****** Ver:0A
VRM 9.x
INTEL
Socket 478
CPU Clock
SIS650(NB) + SIS962(SB)
On Board Function Chip:
LPC I/O-W83697HF
IEEE1394 AGERE-FW803
LAN-Realtek RTL8201BL
Command
DDR DIMM
Terminator
Audio Codec-Realtek ALC650
Expansion Slot:
Data BUS
Address BUS
AGP2.0 Slot*1
PCI2.2 Slot*3
NB Clock
C C
AGP 4X/8X AGP BUS
USB Port 2
USB Port 4
USB Port 0
FRONT
USB
B B
A A
USB Port 1
USB Port 3
USB Port 5
IEEE1394
PHY
AC97 Codec
6 CHANNEL
+ SPDIF
Keyboard
Mouse
Floopy
Parallel
Serial
5
NB Clock66
USB Clock
USB 2.0 BUS
AC97 Link BUS
I/O Clock
ISA Flash ROM
W83697HF
LPC I/O
SIS650
VER:A1
HyperZip
SIS962
VER:A2
LPC Interface
IDE connector 1
IDE connector 2
Data BUS
Address BUS
Command
PCI Clock
SB 14MHz
SB Clock66
PCI Clock
UltraDMA
33/66/100/133
4
2 DDR
Modules
DDR DIMM
Buffer
PCI Conn 1
PCI Conn 2
PCI Conn 3
PCI BUS
Realtek
RT8100BL
H/W LAN
3
Clock Gen
CPU Clock
NB Clock
NB Clock66
SB Clock66
AGP Clock66
PCI Clock
USB Clock
I/O Clock
SB 14MHz
CPU Clock
NB Clock
NB Clock66
SB Clock66
AGP Clock66
PCI Clock
USB Clock
I/O Clock
SB 14MHz
09-17-2002
2
01-Block drigrame & Cover sheet
CONTENT
02-Power Div & Specification
03-Intel socket 478 CPU part 1
04-Intel socket 478 CPU part 2
05-Main Clock Gen & Clock buffer.
06-SIS650-1 Host & AGP
07-SIS650-2 Memory
08-SIS650-3HyperZip
09-SIS650-4 Power
10-SIS962-1 PCI & IDE & HyperZip
11-SIS962-2 MISC.
12-SIS962-3/4 USB & Power
14-AGP slot & Pull-UP/DN resistor
14-DIMM 1 & 2
15-DDR Terminator
16-PCI slot 1 & 2 & 3
17-W83697HF I/O & BIOS
18-AC97 Codec
19-Audio connector
20-USB port & BIOS
21-IEEE1394/RTL8801
22-RT8201BL LAN
23-MS5 ACPI Controller
24-VRM 9.0
25-ATX & F-Panel & Game port
26-IDE1/2 & PS2
27-Com/Parallel port
28-Manual & GPIO define
Title
Size Document Number Rev
Custom
Date: Sheet of
MICRO-STAR INT'L LO.,LTD.
Cover Sheet & Block Diagram
MS-6719
1
1 28Tuesday, September 17, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg2.png)
5
ATX 12V POWER Supply
3.3V 5V 5VSB1A12V
D D
4
Power Delivery Map
3
2
1
VRM 9.0 Center Processer Unit
5VDU VREG
3VSB VREG
NB-SIS650
Core Power
1.8V VREG
Z-Link BUS
Memory Interface
VDIMM VREG
AGP Interface
C C
VDDQ VREG
2.5V VREG DDR Memory
SB-SIS963
Core Power
Z-Link BUS
Clock Generator
B B
Clock Buffer
AGP slot
PCI slot
RT8100BL H/W LAN
IDE Raid
A A
Title
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
MICRO-STAR INT'L LO.,LTD.
Power Delivery
MS-6701
1
2 28Tuesday, September 17, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg3.png)
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCK
VID4 24
VID3
AE2
VID4#
D6#
D22
VID2
AE3
VID3#
D5#
C21
VID1
AE4
VID2#
D4#
A25
VID0
AE5
VID1#
D3#
A23
VID3 24
VID2 24
VID1 24
VID0 24
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1
LINT0
D2#
D1#
D0#
BSEL0
B22
B21
AD6
Open-D
BSEL1
AD5
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
GTLREF1
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R88 56
R37 56
R87 56
R86 56
HRS#2
HRS#1
HRS#0
BREQ#0
R45 49.9RST
R97 49.9RST
HADSTB#1
HADSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDSTB#3
HDSTB#2
HDSTB#1HD#60
HDSTB#0
NMI
INTR
HREQ#4 6
HREQ#3 6
HREQ#2 6
HREQ#1 6
HREQ#0 6
VCCP
CPUCLK-0 5
CPUCLK0 5
HRS#2 6
HRS#1 6
HRS#0 6
BREQ#0 6
* Short trace
HADSTB#1 6
HADSTB#0 6
HDSTB3 6
HDSTB2 6
HDSTB1 6
HDSTB0 6
HDSTB#3 6
HDSTB#2 6
HDSTB#1 6
HDSTB#0 6
NMI 11
INTR 11
FERR#, STPCLK#, SMI#,
CPUSLP#, A20M#, INTR, NMI,
IGNNE#, INIT#
-----REGISTER CONTROLLER
NEED SETTING
G25
AC3
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
AA3
W5
AB2
A22
Y21
Y24
Y23
Y26
V24
U5A
V6
B6
Y4
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A7
HA#[3..31]
HA#27
HA#26
HA#25
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M
SLP#
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
A32#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
V22
U21
V25
U23
U24
U26
T23
T22
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
A24#
A23#
A22#
A21#
A20#
A19#
HA#17
A18#
HA#30
A31#
HA#29
A30#
HA#28
A29#
A28#
A27#
A26#
A25#
Socket478-1
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
T25
T26
R24
R25
P24
R21
N25
N26
M26
N23
M24
P21
N22
M23
HA#16
A17#
D32#
H25
HA#15
A16#
D31#
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
L22
HA#12
A13#
D28#
M21
HA#11
A12#
D27#
H24
HA#10
A11#
D26#
G26
HA#9
A10#
D25#
L21
HA#8
A9#
D24#
D26
HA#7
A8#
D23#
F26
HA#6
A7#
D22#
E25
HA#5
A6#
D21#
F24
HA#4
A5#
D20#
F23
HA#3
A4#
D19#
G23
A3#
D18#
E24
D17#
H22
AE25A5A4
DBR
D16#
D15#
D25
J21
VCC_SENSE
VSS_SENSE
D14#
D13#
D12#
D23
C26
H21
AD26
ITP_CLK1
D11#
D10#
G22
AC26
ITP_CLK0
D9#
B25
C24
VID4
AE1
D8#
D7#
C23
B24
HA#[3..31]6
D D
HDBI#[0..3]6
STPCLK#11
HDBSY#6
HDRDY#6
HTRDY#6
HLOCK#6
C C
B B
HDEFER#6
CPU_TMPA17
VTIN_GND17
THERMTRIP#11,17
SKTOCC#5
PROCHOT#11
CPUSLP#11
PWRGD_CPU6
CPURST#6
HDBI#0
HDBI#1
HDBI#2
HDBI#3
FERR#
FERR#11
STPCLK#
INIT#
INIT#11
HDBSY#
HDRDY#
HTRDY#
HADS#
HADS#6
HLOCK#
HBNR#
HBNR#6
HIT#
HIT#6
HITM#
HITM#6
HBPRI#
HBPRI#6
HDEFER#
TDI_CPU
TDO_CPU
TMS_CPU
TRST#_CPU
TCK_CPU
CPU_TMPA
VTIN_GND
THERMTRIP#
SKTOCC#
PROCHOT#
IGNNE#
IGNNE#11
SMI#
SMI#11
A20M#
A20M#11
CPUSLP#
PWRGD_CPU
CPURST#
HD#63
HD#62
HD#61
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
Length < 1.5inch.
GTLREF1
2/3*Vccp
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU STRAPPING RESISTORS
CLOSED TO SOCKET478
THERMTRIP#
FERR#
PROCHOT#
BREQ#0
CPURST#
PWRGD_CPU
STPCLK#
INIT#
SMI#
CPUSLP#
A20M#
INTR
NMI
IGNNE#
BPM#0
BPM#1
BPM#4
BPM#5
PWRGD_CPU
CPURST#
CPUSLP#
VCCP
R89
49.9RST
C56
C50 R90
105P/0805220P
100RST
R67 62
R38 X_62
R22 62
R58 49.9RST
R95 49.9RST
R94 49.9RST
R21 X_56
R23 X_56
R24 X_56
R25 X_56
RN2
7 8
5 6
3 4
1 2
X_8P4R-56
R33 49.9RST
R34 49.9RST
R36 49.9RST
R35 49.9RST
X_150PC60
X_150PC61
X_150PC12
VCCP
HD#7
HD#6
HD#5
R44
0
HD#4
HD#3
HD#2
HD#1
HD#0
CPU ITP BLOCK
CLOSED TO SOCKET478
TDO_CPU
TMS_CPU
TDI_CPU
TCK_CPU
TRST#_CPU
R40 75
R39 39
R66 150
R42 27
R41 680
VCCP
HD#9
HD#52
HD#51
HD#53
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#[0..63]
HD#[0..63]6
SOCKET478-15U
A A
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
HD#15
HD#14
HD#13
HD#12
BSEL05
HD#11
HD#10
HD#8
MICRO-STAR INT'L LO.,LTD.
Title
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
FCPGA478-1
MS-6701
1
3 28Tuesday, September 24, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg4.png)
5
D D
D10
A11
A13
A15
A17
A19
A21
A24
A26
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
C C
B B
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AD4
AD8
AE11
P22
P25
R23
R26
T21
T24
U22
U25
V23
SOCKET478-15U
VCCP
U5B
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P2
VSS
VSS
VSS
P5
VSS
R1
VSS
VSS
VSS
R4
VSS
VSS
VSS
T3
VSS
T6
VSS
U2
VSS
VSS
VSS
U5
VSS
V1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
VCC
VSS
AC12
B14
AC14
VCC
VSS
B16
VCC
VSS
AC16
B18
VCC
VSS
AC18
B20
4
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B23
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
3
FOR NORTHWOOD
CPU ONLY
VCC_VID
C10
C12
AF4
AF3
VCC
VCC
VCC
VCC
VCCVID
VCCVIDPRG
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E23
V26V4W21
W24W3W6Y2Y22
C36
104P
VCC-IOPLL
VSS
VSS
Y25
Y5
2
VCCP
F19
VCC
F9
VCC
C14
VCC
C16
VCC
C18
VCC
C20
VCC
C8
VCC
D11
VCC
D13
VCC
D15
VCC
D17
VCC
D19
VCC
D7
VCC
D9
VCC
E10
VCC
E12
VCC
E14
VCC
E16
VCC
E18
VCC
E20
VCC
E8
VCC
F11
VCC
F13
VCC
F15
VCC
F17
VCC
E26
VSS
E4
VSS
E7
VSS
E9
VSS
F10
VSS
F12
VSS
F14
VSS
F16
VSS
F18
VSS
F2
VSS
F22
VSS
F25
VSS
F5
VSS
F8
VSS
G21
VSS
G24
VSS
G3
VSS
G6
VSS
H1
VSS
H23
VSS
H26
VSS
H4
VSS
J2
VSS
J22
VSS
J25
VSS
J5
VSS
K21
VSS
K24
VSS
K3
VSS
K6
VSS
L1
VSS
L23
VSS
L26
VSS
L4
VSS
M2
VSS
M22
VSS
M25
VSS
M5
VSS
N21
VSS
N24
VSS
N3
VSS
N6
VSS
AE23
AD20
VCCA
VSSA
VSS
AD22
C52
105P
C58
106P/1206
VCCP VCCPVCCP
C54
C57
106P/1206
X_226P/1206
CB14
X_106P/1206
CB18
X_106P/1206
CB22
106P/1206
CB28
X_106P/1206
CB33
106P/1206
CB36
X_106P/1206
CB40
106P/1206
CB43
X_106P/1206
CB44
X_106P/1206
CB16
106P/1206
CB27
106P/1206
CB35
106P/1206
CB46
106P/1206
CB41
106P/1206
CB31
106P/1206
CB32
106P/1206
PLACE CAPS WITHIN CPU CAVITY
L9 4.7UH/100MA
L7 4.7UH/100MA
C53
X_226P/1206
VCCP
1
CB39
106P/1206
CB38
106P/1206
CB23
106P/1206
CB24
106P/1206
A A
MICRO-STAR INT'L LO.,LTD.
Title
FCPGA478-2
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
MS-6701
1
4 28Tuesday, September 24, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg5.png)
5
VCC3
D D
VCC3
C C
CB110
104P
PLANE CAP
C249
102P
L46 X_80_0805
CP35
X_COPPER
CB145
102P
CE3
ELS10U/16V-B
VCCP
SKTOCC#3
VCC3
R237
10K
R251
X_1K
R250
X_10K
CB149
104P
VCC3
2N3904S
CVCC3
R278
10K
CVCC3
2N3904S
Q26
X_2N3904S
CB164
104P
VCC3
CB146
104P
VCC3
CVCC3
R275
10K
Q27
VCC3
CB167
CB144
104P
104P
R315 10K
R284
R269 475RSTQ24
CP40 X_COPPER
L50
X_80_0805
CB159
104P
10K
CB148
104P
CB154
104P
CB166
104P
4
CB147
102P
U15
ICS952005
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
PCI_STOP#
45
CPU_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
37
VSSA
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK_F0/FS3
PCICLK_F1/FS4
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
48M
24_48M/MULTISEL
SCLK
SDATA
3
Main Clock Generato r
40
39
44
43
47
31
30
9
10
FS3
14
FS4 LPCPCLK
15
16
17
20
21
22
23
FS0
2
FS1
3
FS2
4
MODE1
27
MULTISEL
26
35
34
R287 22
R288 22
R285
R286
R295 X_22
R289
R290
R327 33
R328
R342 33
R330 33
R291 22
R292 22
R283 22
R282
7 8
5 6
3 4
1 2
R329 33
R324 33
R337
22
22
22
22
33
33
22
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK4MODE0
SBPCLK
SB14MHZ
USBCLK
SIO48M
PCICLK1
PCICLK2
PCICLK3
RN74
8P4R-33
2
CPUCLK0 3
CPUCLK-0 3
CPUCLK1 6
CPUCLK-1 6
SDCLK 7
AGPCLK0 6
AGPCLK1 13
ZCLK0 8
ZCLK1 10
LPCPCLK 17
PCICLK4 16
PCICLK1 16
PCICLK2 16
PCICLK3 16
SBPCLK 10
SB14MHZ 11
REFCLK0 8
USBCLK 12
SIO48M 17
SMBCLK 11,14,17,23
SMBDAT 11,14,17,23
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
SBPCLK
LPCPCLK
PCICLK4
PCICLK3
PCICLK2
PCICLK1REFCLK0
SB14MHZ
REFCLK0
SIO48M
USBCLK
R273 49.9RST
R274
R271
R272 49.9RST
C183 X_10P
C180 X_10P
C181 X_10P
C241 X_10P
C232 X_10P
C233 X_10P
C234 X_10P
C235 X_10P
CN10
1 2
3 4
5 6
7 8
X_8P4C-10P
C218 10P
C229 10P
C190 10P
C182 10P
1
49.9RST
49.9RST
XIN
6
C205
27P
14.318MHZ/32PF
CP18 X_COPPER
VCC2.5V
L28
B B
CB97
104P
VCC2.5V
A A
X_80_0805
103P
X_80_0805
L27
CP17X_COPPER
+
CE2
X_ELS10U/16V-B
+
CE1
X_ELS10U/16V-B
CB92
X_104P
CB93
104P
SMBCLK
SMBDAT
FWDSDCLKO
CB70
104P
SMBCLK11,14,17,23
SMBDAT11,14,17,23
FWDSDCLKO7
CB72
103P
CBVDD DDRCLK[0..5]
CB71
104PCB96
FB_OUT
12
23
10
22
18
21
20
3
7
8
9
U6
ICS93722
VDD
VDD
VDD
AVDD
SCLK
SDATA
CLK_IN
NC
NC
NC
FB_IN
GND
61115
GND
GND
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
FB_OUT
GND
28
XOUT
7
Y1
2
4
13
17
24
26
1
5
14
16
25
27
19
C197
27P
DDRCLK-[0..5]
DDRCLK0 DDRCLK0
DDRCLK1 DDRCLK1
DDRCLK2 DDRCLK2
DDRCLK3 DDRCLK3
DDRCLK4 DDRCLK4
DDRCLK5 DDRCLK5
DDRCLK-0 DDRCLK-0
DDRCLK-1 DDRCLK-1
DDRCLK-2 DDRCLK-2
DDRCLK-3 DDRCLK-3
DDRCLK-4 DDRCLK-4
DDRCLK-5 DDRCLK-5
R112
SHORT
R129
R130 X_0
R132 X_0
R113
R111
R109
R128
R131
R133
R114 X_0
R110 X_0
R108
22
DDRCLK[0..5] 14
DDRCLK-[0..5] 14
X_0
X_0
X_0
X_0
X_0
X_0
X_0
X_0
FB_OUT
C77
X_10P
Clock Buffer (DDR)
(OPTIONS)
By-Pass Capacitors
Place near to the Clock Buffer
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK4
DDRCLK5
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-4
DDRCLK-5
1: (ICS-93705)
C87 X_10P
C88 X_10P
C90 X_10P
C78 X_10P
C76 X_10P
C74 X_10P
C86 X_10P
C89 X_10P
C91 X_10P
C79 X_10P
C75 X_10P
C73 X_10P
VCC3
MULTISEL internal Pull-Up 120K
MULTISEL
CVCC3
R341 X_10K
R270
VCC3
CVCC3
F0~F4 internal Pull-Down 120K
R325 X_2.7K
R326
R339 1K
R322
R331 2.7K
FS2
0
0
0 133
0
1
FS0
FS1
X_2.7K
FS3
X_2.7K
FS4
FS0
FS1FS4
0 100
0
0
R276 X_4.7K
R277 X_4.7K
MODE0:
1 : pin12=PCICLK
0 : pin12=PCI_STOP#
(internal pull-up 120K resistor)
10K
MODE1:
0 : Pin45=CPU_STOP# ,Pin33=PD#/VTT_PWRGD
1 : Pin33=CPU_STOP# ,Pin45=PD#/VTT_PWRGD
(internal pull-up 120K resistor)
R340
SDRAM
CPU
100
100
MODE0
MODE1
10K
ZCLK
80
80
VCC3
BSEL0 3
FS2
AGP
660
66
PCIFS3
330
33
MICRO-STAR INT'L LO.,LTD.
Title
Main Clock Gen.
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
MS-6701
1
5 28Tuesday, September 24, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg6.png)
5
4
3
2
1
AAD[0..31]
SBA[0..7]
PIPE#
2
ACBE#[0..3]
ST[0..2]
ADSTB[0..1]
ADSTB#[0..1]
AREQ# 13
AGNT# 13
AFRAME# 13
AIRDY# 13
ATRDY# 13
ADEVSEL# 13
ASERR# 13
ASTOP# 13
TP1
TP2
TP3
SBSTB 13
SBSTB# 13
AGPCLK0 5
AVREFGC
HDSTB#3 3
HDSTB#2 3
HDSTB#1 3
HDSTB#0 3
HDSTB3 3
HDSTB2 3
HDSTB1 3
HDSTB0 3
APAR 13
RBF# 13
WBF# 13
PIPE# 13
C1XAVSS
C4XAVSS
C1XAVDD
C4XAVDD
HVREF
D D
AH25
AJ25
AH27
AJ27
U21
T21
P21
N21
HLOCK#3
HTRDY#3
HBPRI#3
BREQ#03
HRS#23
HRS#13
HRS#03
HREQ#43
HREQ#33
HREQ#23
HREQ#13
HREQ#03
HADSTB#13
HADSTB#03
R141
20
R134
110
CPUCLK1
CPUCLK-1
HDEFER#
HLOCK#
HTRDY#
CPURST#
PWRGD_CPU
HBPRI#
BREQ#0
HRS#2
HRS#1
HRS#0
HADS#
HITM#
HIT#
HDRDY#
HDBSY#
HBNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HADSTB#1
HADSTB#0
HNCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
HPCOMP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
HD#[0..63]3
CB85
0.01u
place this capacitor
under 650 solder side
CPUCLK15
CPUCLK-15
HDEFER#3
CPURST#3
PWRGD_CPU3
HADS#3
HITM#3
HIT#3
HDRDY#3
HDBSY#3
HBNR#3
C C
HA#[3..31]3
B B
A A
HA#[3..31]
VCCP
5
R151
75
R148
150
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HD#[0..63]
HVREF
CB82
0.1u
AJ26
AH26
U26
U24
C20
D19
U25
U29
U28
W26
W28
W29
W24
W25
AD24
AA24
AF26
AE25
AH28
AD26
AG29
AE26
AF28
AC24
AG28
AE29
AD28
AC25
AD27
AE28
AF27
AB24
AB26
AC28
AC26
AC29
AA26
AB28
AB27
AA25
AA29
AA28
V26
T27
T24
T26
V28
T28
V24
V27
Y27
Y26
Y24
Y28
CPUCLK
CPUCLK#
DEFER#
HLOCK#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS#2
RS#1
RS#0
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HASTB#1
HASTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
B21
HD#63
C1XAVSS
C1XAVDD
C4XAVSS
HOST
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
F19
A21
E19
D22
D20
B22
C22
B23
HD#59
HD#58
HD#57
HD#62
HD#61
HD#55
HD#60
HD#56
R136
150
HNCVREF
R139
75
4
HVREF0
C4XAVDD
HD#55
HD#54
HD#53
A23
D21
HD#54
HD#53
CB75
X_0.1u
CB76
0.1u
HVREF1
HD#52
F22
HD#52
HVREF2
HD#51
D24
HD#51
D23
HD#50
ST0
ST1
ST2
AAD2
AAD0
AAD1
HNCOMP
HNCVREF
A19A7F9B7M6M5M4L3L6L4K6L2K3J3K4J2J6J4J1H6F4F1G6E3F5E2E4E1D3D4C2F7C3E6B2D5D6A3D7C5A5C6D8
ST0
ST1
ST2
AAD0
AAD1
HNCOMP
HNCOMPVREF
AAD2
J17
HVREF3
HVREF4
HPCOMP
B20
B19
HPCOMP
651-1
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
C24
B24
E25
E23
D25
A25
C26
B26
B27
D26
B28
E26
F28
HD#44
HD#43
HD#49
HD#48
HD#46
HD#47
HD#45
C1XAVDD
C1XAVSS
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
AAD3
AAD4
AAD5
AAD3
AAD4
AAD5
HD#37
HD#36
HD#35
G25
F27
F26
HD#36
HD#35
HD#34
1 2
X_COPPER_0
CB66
0.01u
1 2
X_COPPER_0
AAD6
AAD6
HD#34
AAD7
AAD7
HD#33
G24
H24
HD#33
CP9
L16
X_0
CP10
AAD8
AAD8
HD#32
G29
HD#32
HD#31
AAD9
AAD9
HD#31
J26
HD#30
AAD10
AAD10
HD#30
G26
HD#29
AAD11
AAD11
HD#29
J25
HD#28
VCC3VCCP VCCP
AAD12
AAD12
HD#28
H26
AAD13
AAD14
AAD15
AAD16
AAD13
AAD14
AAD15
HD#27
HD#26
HD#25
G28
H28
J24
HD#24
HD#27
HD#26
HD#25
CT14
X_10u_0805
AAD17
AAD16
HD#24
K28
HD#23
AAD18
AAD17
AAD18
HD#23
HD#22
J29
HD#22
AAD19
AAD19
HD#21
K27
HD#21
3
AAD20
AAD20
HD#20
J28
HD#20
AAD21
AAD21
HD#19
M24
HD#19
AAD22
AAD22
HD#18
L26
K26
HD#18
AAD24
AAD23
AAD23
AAD24
HD#17
HD#16
L25
HD#17
HD#16
C4XAVDD
C4XAVSS
AAD25
AAD25
HD#15
L28
HD#15
AAD26
AAD26
HD#14
M26
HD#14
AAD27
AAD27
HD#13
P26
L29
HD#13
AAD28
AAD28
HD#12
HD#12
AAD30
SBA4
AAD29
AAD31
SBA7
SBA6
SBA5
SBA7
SBA6
SBA5
AAD29
AAD30
AAD31
AGP
HD#11
HD#10
HD#9
HD#8
HD#7
HD#6
HD#5
N24
N26
M27
N28
P27
N29
R24
R28
HD#5
HD#4
HD#9
HD#8
HD#7
HD#6
HD#11
HD#10
X_COPPER_0
CB65
0.01u
1 2
X_COPPER_0
SBA3
SBA2
SBA4
SBA3
SBA2
HD#4
HD#3
HD#2
M28
P28
R26
HD#3
HD#2
HD#1
CP8
1 2
L15
X_80
CP11
SBA1
C7
SBA1
HD#1
R29
HD#0
SBA0
SBA0
HD#0
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
AGP8XDET
SB_STB
SB_STB#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
AGPCLK
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
DBI#3
DBI#2
DBI#1
E21
A27
H27
HDBI#3
HDBI#2
HDBI#1
VCC3
CT13
X_10u_0805
APAR
RBF#
WBF#
PIPE#
ADBIH
ADBIL
DBI#0
R25
HDBI#0
U8A
F6
F3
H4
K5
C9
A6
G2
G1
G3
G4
H5
H1
H3
E8
F8
D9
D10
B3
C4
B5
A4
K1
L1
C1
D1
B10
M1
B9
A9
B8
A8
M3
M2
F20
F23
K24
P24
F21
F24
L24
N25
SIS-SIS651-VA1
ACBE#3
ACBE#2
ACBE#1
ACBE#0
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
RBF#
WBF#
SBSTB
SBSTB#
ADSTB0
ADSTB#0
ADSTB1
ADSTB#1
AGPCLK0
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
HDSTB#3
HDSTB#2
HDSTB#1
HDSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDBI#[0..3] 3
AAD[0..31] 13
SBA[0..7] 13
ACBE#[0..3] 13
ST[0..2] 13
ADSTB[0..1] 13
ADSTB#[0..1] 13
VDDQ
R197
60.4
AVREFGC 13
R219
X_8.2K
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
CB104
0.1u
CB106
0.1u
C149
0.1u
1 2
X_COPPER_0
CB102
0.01u
1 2
X_COPPER_0
1 2
X_COPPER_0
CB108
0.01u
1 2
X_COPPER_0
CP23
L34
X_0
CP22
CP25
L36
X_80
CP24
VCC3
CT19
X_10u_0805
VCC3
CT21
X_10u_0805
MICRO-STAR INT'L LO.,LTD.
Title
SIS650-Host & AGP
Size Document Number Rev
Custom
Date: Sheet of
MS-6701
1
6 28Tuesday, September 24, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg7.png)
5
D D
C C
B B
VCC1_8
A A
C204
104P
C132
104P
Rs place close to DIMM1
RMD1 MD1
RMD5 MD5
RMD4 MD4
RMD0 MD0
RMD6 MD6
RMD2 MD2
RDQM0 DQM0
RDQS0 DQS0
RMD9 MD9
RMD8 MD8
RMD7 MD7
RMD3 MD3
RMD11 MD11
RMD10 MD10
RMD15 MD15
RMD14 MD14
RDQM1 DQM1
RMD13 MD13
RDQS1 DQS1
RMD12 MD12 RMA10
RMD21 MD21 RMA11
RMD17 MD17 RMA12
RMD16 MD16
RMD20 MD20
RMD22 MD22
RMD18 MD18 RSRAS#
RDQM2 DQM2 RSCAS#
RDQS2 DQS2 RSWE#
RMD28 MD28
RMD24 MD24
RMD23 MD23
RMD19 MD19
RMD31 MD31
RMD27 MD27
RMD30 MD30
RMD26 MD26
RDQM3 DQM3
RDQS3 DQS3
RMD25 MD25
RMD29 MD29
RMD37 MD37
RMD33 MD33
RMD36 MD36
RMD32 MD32
RMD38 MD38
RMD34 MD34
RDQM4 DQM4
RDQS4 DQS4
RMD44 MD44
RMD40 MD40
RMD35 MD35
RMD39 MD39
RDQS5 DQS5 FWDSDCLKO
RDQM5 DQM5
RMD41 MD41
RMD45 MD45
RMD47 MD47
RMD46 MD46
RMD43 MD43
RMD42 MD42
RMD55 MD55
RDQS6 DQS6
RMD54 MD54
RDQM6 DQM6
RMD53 MD53
RMD52 MD52
RMD49 MD49
RMD48 MD48
RMD56 MD56
RMD60 MD60
RMD51 MD51
RMD50 MD50
RMD62 MD62
RDQM7 DQM7
RMD57 MD57
RMD61 MD61
RMD59 MD59
RMD63 MD63
RMD58 MD58
RDQS7 DQS7
C179
105P
RN4
8P4R-10
RN6
8P4R-10
RN8
8P4R-10
RN14
8P4R-10
RN11
8P4R-10
RN20
8P4R-10
RN23
8P4R-10
RN30
8P4R-10
RN34
8P4R-10
RN32
8P4R-10
RN40
8P4R-10
RN42
8P4R-10
RN45
8P4R-10
RN48
8P4R-10
RN51
8P4R-10
RN55
8P4R-10
RN53
8P4R-10
RN57
8P4R-10
RN62
8P4R-10
RN64
8P4R-10
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
4
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7
AJ23
AG22
AH21
AJ21
AD23
AE23
AF22
AF21
AD22
AH22
AD21
AG20
AE19
AF19
AE21
AD20
AD19
AH19
AF20
AH20
AF18
AG18
AH17
AD16
AD18
AD17
AF17
AJ17
AE17
AH18
AD14
AG14
AJ13
AE13
AJ15
AF14
AD13
AF13
AH13
AH14
AD10
AH10
AD8
AG10
AF10
AH9
AD9
AH5
AG4
AH3
AG6
AH4
AD6
AC5
AG2
AG1
AC6
AD4
AD3
AC4
AD2
AC1
AC2
AE9
AF9
AJ9
AE5
AF6
AF5
AF4
AJ3
AE4
AE2
AF3
AF2
AB6
AA6
AB3
AE1
AB4
U8B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB#0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB#2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB#3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB#4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7
SIS-SIS651-VA1
650-2
3
RMA7
RMA8
RMA5
RMA6
RMA14
RMA13
RMA9
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
SRAS#
SCAS#
SWE#
CS#0
CS#1
CS#2
CS#3
CS#4
CS#5
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
SDCLK
FWDSDCLKO
SDRCLKI
SDAVDD
SDAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
RN29
RN26
X_8P4R-0
RMA0
AH11
RMA1
AF12
RMA2
AH12
RMA3
AG12
AD12
RMA4
RMA5
AH15
RMA6
AF15
RMA7
AH16
RMA8
AE15
AD15
RMA9
RMA10
AF11
RMA11
AG8
RMA12
AJ11
RMA13
AG16
AF16
RMA14
RSRAS#
AH8
RSCAS#
AJ7
RSWE#
AH7
AE7
AF7
AH6
AJ5
AF8
AD7
AB2
AA4
AB1
Y6
AA5
Y5
Y4
AA3
R167 22
AD11
AE11
Y1
SDAVDD
Y2
AA1
DDRAVDD
AA2
DDRVREFA
AJ19
DDRVREFB
AH2
R212 4.7K
W3
RMA7
78
RMA8
56
RMA5
34
RMA6
12
X_8P4R-0
78
RMA14
56
RMA13
34
12
RMA9
Rs place close to DIMM1
R104 X_0
R107
R125 X_0
R115 X_0
R137 X_0
R142 X_0
R140 X_0
RCS-0
RCS-1
RCS-2
RCS-3
CKE: Open Drain
S3AUXSW#
VCC3SBY
12
34
56
78
RN37X_8P4R-0
X_0
RN49 X_8P4R-0
C104
10p_0603
DDRAVSS
HI: DDR
78
56
34
12
CKE0
CKE1
CKE2
CKE3
SDCLK
2
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..3]
CKE[0..3]
RMA0
RMA1
RMA2
RMA3
RMA4
RSRAS# 14,15
RSCAS# 14,15
RSWE# 14,15
RCS-0
RCS-2
RCS-1
RCS-3
S3AUXSW# 25
SDCLK 5
FWDSDCLKO 5
SDAVSS
DDRAVDD
RMD[0..63] 14,15
DDRVREFA
DDRVREFB
SDAVDD
CB115
0.1u
RDQM[0..7] 14,15
RDQS[0..7] 14,15
RMA[0..14] 14,15
RCS-[0..3] 14,15
CKE[0..3] 14
CB124
0.1u
X_COPPER_0
CB125
0.01u
CB84
0.1u
CB109
0.1u
X_COPPER_0
CB114
0.01u
CP30
1 2
L42
X_80
VCCM
VCCM
CP29
1 2
L41
X_80
VCC3
R144
150
R146
150
R190
150
R189
150
VCC3
1
VCCM VDDQ
C141
104P
C156
104P
C124
104P
5
C178
X_104P
4
C177
104P
C139
105P/0805
Title
MICRO-STAR INT'L LO.,LTD.
SIS648-Memory
Size Document Number Rev
Custom
3
2
Date: Sheet of
MS-6701
1
7 28Tuesday, September 24, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg8.png)
5
4
3
2
1
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
ZAD[0..15]10
D D
ZAD[0..15]
VCC1_8
NB Hardware Trap Table
DLLEN#
DRAM_SEL
TRAP0
TRAP1
CSYNC
RSYNC
LSYNC
enable PLL disable PLL
SDR DDR
normal NB debug mode
TV selection, NTSC/PAL(0/1) 0
enable VB
enable VGA interface
enable panel link
0
1
Default
1(DDR)
0
0
0
1
0
embedded pull-low
(30~50K Ohm)
yes
yes
yes
for 651 only
RSYNC
TRAP1
CSYNC
LSYNC
VCC3
R192 4.7K
R176 4.7K
R225 4.7K
R224 4.7K
R201
150
R204
150
VCC3
C C
COST DOWN
COST DOWN
B B
A A
BAV99-S-SOT23
2
VCC3
UD5
BAV99-S-SOT23
3
R106
75
L40
X_0
1 2
X_COPPER_0
L39
X_0
1 2
X_COPPER_0
VCC1_8
1
ROUT
GOUT
BOUT
CP28
CP27
2
UD4
R105
ZVREF
CB119
0.1u
Z1XAVDD
C126
0.1u
Z1XAVSS
VSSZCMP
Z4XAVDD
C125
0.1u
Z4XAVSS
VCC1_8
1
3
VCC1_8
UD3
BAV99-S-SOT23
2
3
R103
75
75
C71
X_22p
1
C68
X_22p
VCC5
L14 80
L13 80
L12 80
C66
X_22p
Z1XAVSS
Z4XAVSS
POLY SWITCH
C70
47p
ZCLK0
ZCLK05
ZUREQ
ZUREQ10
ZDREQ
ZDREQ10
ZSTB0
ZSTB010
ZSTB-0 GOUT
ZSTB-010
ZSTB1
ZSTB110
ZSTB-1 HSYNC
ZSTB-110
ZAD0
ZAD1 DDC1CLK
ZAD2
ZAD3
ZAD4
ZAD5 INTA#
ZAD6
ZAD7
ZAD8 CSYNC
ZAD9 RSYNC
ZAD10 LSYNC
ZAD11
ZAD12
ZAD13 VCOMP
ZAD14 VRSET
ZAD15 VVBWN ENTEST
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P DACAVSS1
Z1XAVDD DCLKAVSS
Z4XAVDD ECLKAVSS
1.1A-P
FS1
CONNECTOR
TOP VIEW
R
G
B
C67
C65
47p
47p
CP7 X_COPPER
U8C
SIS-SIS650-VA1
V3
ZCLK
U6
ZUREQ
U1
ZDREQ
T3
ZSTB0
T1
ZSTB#0
P1
ZSTB1
P3
ZSTB#1
T4
ZAD0
R3
ZAD1
T5
ZAD2
T6
ZAD3
R2
ZAD4
R6
ZAD5
R1
ZAD6
R4
ZAD7
P4
ZAD8
N3
ZAD9
P5
ZAD10
P6
ZAD11
N1
ZAD12
N6
ZAD13
N2
ZAD14
N4
ZAD15
U3
ZVREF
V5
VDDZCMP
U4
ZCMP_N
U2
ZCMP_P
V6
VSSZCMP
W1
Z1XAVDD
W2
Z1XAVSS
V2
Z4XAVDD
V1
Z4XAVSS
PCIRST1#17,22,23
NBPWRGD23
AUXOK11
VGACON1
6
1
7
2
8
3
9
4
10
5
16
17
VGA-D15-BL-PC99
PCIRST1#
NBPWRGD
AUXOK
11
12
13
14
15
C59
22p
HyperZip
651-3
PCIRST#
PWROK
Y3W4W6
CP6
1 2
X_COPPER_0
L11 X_300
L10 300
L8 300
L6 X_300
CP5
1 2
X_COPPER_0
C55
22p
VGA
Stereo
Glass
AUXOK
D11
TRAP1
E10
TRAP1
TRAP0
A10
TESTMODE2
TESTMODE1
TESTMODE0
F11
C11
E11
UD2
BAV99-S-SOT23
2
2
UD1
BAV99-S-SOT23
DLLEN#
ENTEST
F10
ENTEST
3
3
1
DDC1DATA
HSYNC
VSYNC
DDC1CLK
1
VOSCI
ROUT
GOUT
BOUT
HSYNC
VSYNC
VGPIO0
VGPIO1
INT#A
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
VCC5
R101
1.8K
VCC5
VCC5
C15
A12
B13
A13
F13
E13
D13
D12
B11
E12
A11
F12
E14
D14
F14
B12
C12
C13
C14
B15
A15
B14
A14
R93
1.8K
R170 0
R169
R166
R160 33
R157 33
R153 100
R161
100
REFCLK0
0
0
VSYNC
DDC1DATA
DACAVDD1 NBPWRGD
DACAVSS1
DACAVDD1
DCLKAVDD
ECLKAVDD
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
REFCLK0 5
INTA# 10,13,16
CSYNC 13
RSYNC 13
LSYNC 13
CP13
1 2
X_COPPER_0
L21
X_603
CP14
1 2
CB89
X_COPPER_0
0.1u
X_80_0603
CP15
1 2
X_COPPER_0
L24 X_603
CB91
0.1u
CP16
1 2
X_COPPER_0
L25 X_80_0603
L22
VCC3
VCC3
C110
X_47p
AUXOK
C94
X_10u_0805
C95
X_10u_0805
VCC1_8
C103
C107
X_47p
X_47p
R172 4.7K
C130 0.1u
C131 0.1u
VVBWN
DACAVDD1
DACAVSS1
L38
X_0
CP26
1 2
X_COPPER_0
ROUT
BOUT
CB80
CB79 0.1u
COST DOWN
C136
0.1u
0.1u
L30
80_0603
CP19
1 2
CB100
0.1u
X_COPPER_0
R196 56
R195 56
L29X_80_0603
VCC1_8
VDDZCMP
ZCMP_N
ZCMP_P
VRSETVCOMP
C108
X_10u_0805
VSSZCMP
R152
130
MICRO-STAR INT'L LO.,LTD.
Title
SIS650-Power & HyperZip
Size Document Number Rev
Custom
5
4
3
2
Date: Sheet of
MS-6701
1
8 28Tuesday, September 24, 2002
0A
![](/html/cf/cf6d/cf6d22feb4bf8f2006005ae914b3a72d2faeadd5a66879882d8f38317e0a6f80/bg9.png)
5
VCCP VCC1_8 VCC3 VCC3SBY
4
3
2
VCC3
CB86
1u
1
PVDDM
VSS
VSS
AF25
AG24
AUX1.8
AUX3.3
VSS
VSS
AG26
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH23
VSS
AH24
VSS
U8D
U10
U9
A20
A22
A24
A26
C19
C21
C23
C25
C27
E20
E22
E24
F25
H25
K25
M25
P25
T25
V25
Y25
AB25
AD25
E27
G27
J27
L27
N27
R27
U27
W27
AA27
AC27
AE27
D29
F29
H29
K29
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2
P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27
SIS-SIS650-VA1
VCC1_8SBY
VCC3SBY
VCCP
CB74
1u
CB81
1u
VDDQ VCCM
CB123
0.1u
CB113
0.1u
CB177
X_0.1u
CB178
X_0.1u
CB180
X_0.1u
CB176
X_0.1u
VCC1_8
VCCP
VCC3
X_1u-0805
X_1u-0805
VCC3SBY
CB87
0.1u
CB117
0.1u
CB116
0.1u
Place these capacitors under 645 solder side
CB193
VCCM
X_0.1u
CB190
X_0.1u
CB187
CB179
CT18
X_10u_0805
CT20
X_10u_0805
CB181
X_0.1u
CB183
X_0.1u
CB188
X_0.1u
CB185
X_0.1u
VCC3
CB186
X_0.1u
CB182
X_0.1u
CB120
0.1u
CB94
0.1u
VCC1_8
VCC3SBY
VDDQ
CB184
X_0.1u
CB192
X_0.1u
CB191
X_0.1u
CB189
X_0.1u
CB121
0.1u
CB122
0.1u
CB77
1u
CB103
0.1u
H21
H22
J16
J20
J21
J22
K16
K17
K18
K19
K20
K21
L20
M20
N20
P20
R20
R21
T20
U20
V20
W20
Y20
Y21
AA20
AA21
AA22
AB21
AB22
L12
L14
L15
L16
L18
M11
M19
N11
P19
R11
T19
U11
V19
W11
W13
W15
W17
P11
J14
J15
K15
K10
K12
K14
M10
W10
Y11
Y13
Y15
VCCP
C16
C17
C18
D15
D16
D17
D18
AD5
AE10
AE12
AE14
AE16
AE18
AE20
AE22
W18
AA10
AA13
AA14
AA15
AA16
AA17
AB13
AB17
N10
R10
A16
VTT
A17
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VTT
A18
VTT
B16
VTT
B17
VTT
B18
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
E15
VTT
E16
VTT
E17
VTT
E18
VTT
F15
VTT
F16
VTT
F17
VTT
F18
VTT
AB5
VDDM
VDDM
AE6
VDDM
AE8
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
V10
VDDM
V11
VDDM
VDDM
Y9
VDDM
Y10
VDDM
Y12
VDDM
Y14
VDDM
Y16
VDDM
Y18
VDDM
Y19
VDDM
AA8
VDDM
AA9
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
AB8
VDDM
AB9
VDDM
VDDM
VDDM
E5
VDDQ
E7
VDDQ
E9
VDDQ
G5
VDDQ
J5
VDDQ
L5
VDDQ
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
J10
VDDQ
J13
VDDQ
K9
VDDQ
K11
VDDQ
K13
VDDQ
L10
VDDQ
N9
VDDQ
VDDQ
N5
VDDZ
R5
VDDZ
U5
VDDZ
W5
VDDZ
P9
VDDZ
P10
VDDZ
R9
VDDZ
VDDZ
T9
VDDZ
T10
VDDZ
T11
VDDZ
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L17
L19
N19
R19
U19
W19
M12
M13
M14
M15
M16
M17
M18
N12
N13
N14
N15
N16
N17
N18
P12
VSS
VSS
VSS
P13
P14
P15
651-4
VSS
VSS
VSS
VSS
VSS
VSS
P16
P17
P18
R12
R13
R14
Power
VSS
VSS
VSS
R15
R16
R17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R18
T12
T13
T14
T15
T16
T17
T18
U12
IVDD
PVDD
PVDD
OVDD
OVDD
OVDD
PVDDZ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U13
U14
U15
U16
U17
U18
V12
V13
V14
V15
V16
V17
V18
B25
D D
VCCM
C C
VDDQ
B B
VCC1_8
A A
Y17
PVDD
PVDD
PVDDM
PVDDM
PVDDM
PVDDM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C28
C29
D27
D28
E28
E29
AF23
AF24
C112
C119
VCC1_8
105P/0805
104P
Closed to SIS648
5
4
3
C172
104P
2
Title
Size Document Number Rev
Custom
Date: Sheet of
MICRO-STAR INT'L LO.,LTD.
SIS648-Power & HyperZip
MS-6701
1
9 28Tuesday, September 24, 2002
0A