MSI MS-6710 Schematics

8
MS-6710
INTEL (R) Brookdale-G Chipset Willamette/Northwood 478pin mPGA-B Processor Schematics
D D
CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale-GE Chipset:
INTEL MCH (North Bridge) + INTEL ICH4 (South Bridge)
On Board Chipset:
C C
Expansion Slots:
B B
A A
BIOS -- FWH LPC Super I/O -- W83627HF Clock Generator -- CY283490C PCI SOUND -- C-MEDIA CMI8738MX PCI 1394 -- VIA 6386 PCI LAN -- RealTek 8100BL
AGP2.0 SLOT * 1 PCI2.2 SLOT * 1
ERP BOM Function Description
8
7
Version 0A 07/05/2002 Update
7
6
5
4
3
Cover Sheet Block Diagram Power Delivery Map GPIO Spec. Clock CY28349 & ATA100 IDE CONNECTORS mPGA478-B INTEL CPU Sockets INTEL Brookdale-G MCH -- North Bridge INTEL ICH4 -- South Bridge
2
1
1 2 3 4
5 6 - 7 8 - 10 11-12
DDR DIMMM1,2 DDR Termination AGP Slot VGA Connector PCI Slot & FAN PCI LAN FWH
USB & FAN Connectors
PCI Audio - CMI8738 & Front Audio / 6 Channel / Game port KB/MS/COM/LPT/FDD IO Connectors ACPI Controller L6719B CPU Power ( PWM )-VRM9.0 Front Panel & Connectors VT6306 1394 Chip Manual Part & Jumper Setting
14
15
16
17
18
19
20
21 22-23
24
25
26
27
28
29
30History I
Title
Micro-Star
Document Number
Last Revision Date:
6
5
4
3
Friday, July 05, 2002
2
MS-6710
Cover Sheet
Sheet of
1 30
1
Rev
00A
Block Diagram
VRM
AGP / ADD
AGPCLK 66MHZ
AGP BUS
INT & PWR-MNG
P4 478-Pin Processor
CTRL
ADDR
ADDR
AGTL+ BUS
CTRL
DATA
DATA
1
CPUCLK, CPUCLK# 100/133MHZ
14.318MHZ
MCHCLK, MCHCLK# 100/133MHZ
MCH_66 66MHZ
DOT_CLK 48MHZ
X'TEL
Clock 408
Generator
AGPCLK 66MHZ
ICH_66 66MHZ
ICH_PCLK 33MHZ
FWH_PCLK 33MHZ
SIO_PCLK 33MHZ
PCICLK0,1 33MHZ
LAN_PCLK 33MHZ
SIO_48 48MHZ
ICH_48 48MHZ
ICH_14 14.318MHZ
Slot
845G / GL
DDR1
VGA
VGA BUS
Connector
A A
IDE Primary
UltraDMA 66/100
IDE Secondary
BGA 760 Pin
VCCP
HUB LINK BUS
ICH4
VCC_AGP 1.5V MEM_STR 2.5V
ICH_66 66MHZ
ICH_PCLK 33MHZ
ICH_48 48MHZ
ICH_14 14.318MHZ
FW82801DB
C_MEDIA
8738
Audio chip
PCI BUS
AUDIO_PCLK 33MHZ
VCC5_SB 5V VCC3_SB 3.3V VCC1_5SB 1.5V
VCCP VCC3 3.3V VCC_AGP 1.5V
INT & PWR-MNG
DDR BUS
PCICLK0,1,2,3 33MHZ
PCI BUS
1394PCLK 33MHZ
DDR2
PCI Slot 1
PCI Slot 2
VT6306
1394 Chip
1394 PORT
Audio port
Game Port
USB Port 5
USB 6 PORT
USB Port 3
USB Port 4 USB Port 2USB Port 6
USB Port 1
Mouse
Keyboard
LPC SIO
Parallel
Serial1
1
SIO_PCLK 33MHZ
SIO_48 48MHZ
LPC BUS
FWH_PCLK 33MHZ
FirmWare Hub
BIOS
Micro-Star
Document Number
Last Revision Date:
Monday, June 10, 2002
Title
MS-6710
Block Diagram
Sheet of
2 30
Rev
00A
8
7
6
5
4
3
2
1
Power Delivery Map
D D
ATX 12V POWER Supply
3.3V 5V 5VSB1A12V
VRM9.0
Power Translator ACPI IC
C C
B B
A A
8
7
OP
3.3V VREG
1.8V VREG
6
1.5V VREG
1.8V VREG
3.3V DUAL FET
5V TO 3.3V RESISTOR
5
Processor Core Processor Vtt
MCH Core 1.5V
MCH Vtt MCH AGP
MCH HUB Interface 1.8V
MCH Memory DDR 2.5V
DDR System Memory 2.5V
ICH4 Core 1.8V ICH4 I/O 3.3V ICH4 Resume 3.3V
ICH4 Resume I/O 1.8V
ICH4 RTC 3.3V ICH4 5V
FWH 3.3V
LPC Super I/O 3.3V
CLOCK GEN 3.3V
HARDWARE AUDIO 3.3V
PCI LAN 3.3V/2.5V
5VDual For USB and K/B
4
POWER CONSUMPTION
VCCP VCC_AGP
CPU
69.0A NOTE40
MCH
2.4A NOTE1
ICH4
0
CY283490C
0 0
FWH -SST W83627HF
0
DIMM
0
PCI
0
USB
0
AGP
0
NOTE1 --- MCH VCC_AGP
= VCC1_5 (1.5A) VCC_AGP (0.37A)+
NOTE2 --- DIMM S0 STATE --- 2.0A * 2 = 4.0A ---> V_DIMM S1/S3 STATE --- 200mA * 2 = 400mA ---> V_DIMM V_DIMM -->400mA*2.5V/3.3V=303mA --> VCC3_SB
NOTE3 --- ICH4
1.8V
132mA
VCC_AGP 550mA 266mA N/A
82mA
VCC1_5SB
528mA
VCC3(I/O) VCC3_SB 167mA
VCC3_SB
=
VCC1_8SB
=
VCC5_SB
= VCC3_SB VCC1_8SB+
VCC1_8
0
0 0
0.2A
0
NOTE3 NOTE3 NOTE3
0
0
0
0
0
0
0
0
0 0
0 0
S0Power S3/S4/S5
S1
99mA
N/A
52mA
25mA
0.76mA
N/A
1mA
0.8mA / N/A
Micro-Star
Document Number
Last Revision Date:
3
Monday, June 10, 2002
VCC3_DIMM VCC3 VCC5 VCC5_SB
0
0
2.0A 0 0
0
NOTE2
0 0 0 0
0 0 0
0 0
0
6.0A 1.0A8.0A 2.0A
Title
0 0
NOTE2 0 0 0
MS-6710
Power Delivery Map
2
Sheet of
0
0 0 0
0 ?
+12V
0 0 0
0 0
0
3 30
1
-12V
0 0 0
0 0 0 0 0
Rev
5
General Purpose I/O Spec.
4
3
2
1
D D
ICH4
FunctionTypeGPIO Pin
GPIO 0 GPIO 1 GPIO 2 GPIO 3 GPIO 4
C C
GPIO 5 GPIO 6~7 GPIO 8 GPIO 9~10 GPIO 11 GPIO 12~13 GPIO 14~15 GPIO 16 GPIO 17 GPIO 18~21
B B
GPIO 22 GPIO 23 O GPIO 24~27 GPIO 28 GPIO 29~47
I
REQ#A
I
REQ#5
I
IRQE#
I
IRQF#
I
IRQG#
I
IRQH#
I
Not Implemented
I
SIO_PME#
I
Not Implemented
I
External SMI
I
Not Implemented
I
Not Implemented
O
Non Connect
O
GNT#5
O
Non Connect
O/D
Non Connect BIOS Protect
I/O
Non Connect
I/O
LAN DISABLED(ICH4) Non Connect
I/O
FWH
GPIO Pin Type Function
GPI 0 GPI 1 GPI 2 GPI 3
DEVICE
PCI Slot 1
PCI Slot 2 INTB#
PCI LAN
PCI AUDIO INTF# AD25 AUDPCLK
PCI 1394 INTH#
I
ATA IDE 1 Detect
I
ATA IDE 2 Detect Reserved
I I
Reserved
ICH INT Pin
INTA# INTB# INTC# INTD#
INTC# INTD# INTA#
INTC#
IDSEL
AD16
AD17
AD26
AD23
CLOCK
PCICLK0
PCICLK1
LANPCLK
1394PCLK
A A
Title
Micro-Star
Document Number
Last Revision Date:
5
4
3
2
Monday, June 10, 2002
MS-6710
GPIO Spec.
Sheet of
1
Rev
00A
4 30
8
CB1 104P
filtering from 10K~1M
X_80_0805
X_COPPER CB10 104P
VCC3
R25 220
R27 X_10K
CB2 104P
FB2
CP1
R23 1K
FB1
30S/0805
CB11 X_476P/0805
CE
Q1
B
3904
R28 X_220
VCC3
D D
* Put GND copper under Clock Gen. connect to every GND pin * 40 mils Trace on Layer 4 with GND copper around it
* put close to every power pin *
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Differentical mode spacing 7mils on itself
VCC3
C C
VCCP
VCC3
SKTOCC#6
CB3 X_106P/0805
VDDA3V
SMBCLK_ISO12,13,14,18,25
SMBDATA_ISO12,13,14,18,25
B
7
CLOCK GENERATOR BLOCK
VCC3V
CB4 X_104P
CE
Q2 X_3904
SMBCLK_ISO SMBDATA_ISO
R26 X_1K
CB5 104P
CB6 104P
CB7 104P
CB8 104P
CB9 104P
C5 103P
C7 103P
C12 103P
39
36
46
43
29
9
5
18
13
24
21
2
47 34
33 26
25 19
U1
CPU_VDD
CPU_GND
MREF_VDD
MREF_GND
3V66_GND
PCI_VDD
PCI_GND PCI_VDD
PCI_GND
48_VDD
48_GND REF_VDD
REF_GND CORE_VDD
CORE_GND SCLK
SDATA VTT_GD#
CY28349
6
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
CPUCLK2
CPUCLK2#
3V66_03V66_VDD 3V66_1 3V66_2
3V66_48/SEL66_48#
FS2/PCI0 FS3/PCI1
SEL48_24#/PCI2
FS4/PCI3
FS0/48MHz
FS1/24_48MHz
MUL0/REF0 MUL1/REF1
RESET#
PWR_DN#
5
*Trace < 0.5"
RN1
1 2 3 4 5 6 7 8
7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2
CB12 104P
8P4R-33
22PC10
22PC13
CB13 104P
CPUCLK CPUCLK#
MCHCLK
MCH_66 ICH_66 AGPCLK
PCICLK0 PCICLK1 LANPCLK AUDPCLK SIO_PCLK FWH_PCLK ICH_PCLK
ICH_48
AUDIO_14
Iref = 2.32mA
CPU0
R2 27.4RST
41
CPU0#
R4 27.4RST
40
CPU1
R7 27.4RST
38
CPU1# MCHCLK#
R8 27.4RST
37
45 44
3132 30 28
SEL48_2
R10 33
27
FS2
6
FS3
R12 33
7
SEL48_1
8
FS4
10
RN2
11
PCI4 PCI5 PCI6 PCI7 PCI8 PCI9
IREF
8P4R-33
12 14
RN3
15
8P4R-33
16 17
FS0
R14 33
22
FS1 SIO_48
R15 33
23
MUL0 ICH_14
R17 33
48
MUL1 MUL0
R18 33
1
X1
3
X1
X1 14M-32pf-HC49S-D
X2 MUL1 VCC3V
4
X2
R22 475RST
35 20
PWR_DN# VCC3V
R24 1K
42
VCC3 VCC3 VCC3 VCC3
4
3
Shut Source Termination Resistors
CPUCLK
CPUCLK 6 CPUCLK# 6
MCHCLK 8 MCHCLK# 8
MCH_66 8 ICH_66 12 AGPCLK 16
DOT_CLK 8
1394PCLK 28
PCICLK0 18 PCICLK1 18 LANPCLK 19 AUDPCLK 22 SIO_PCLK 13 FWH_PCLK 20 ICH_PCLK 11
ICH_48 12 SIO_48 13
ICH_14 12 AUDIO_14 22
CB14
CB15
104P
104P
CPUCLK# MCHCLK MCHCLK#
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
FS0 VCC3V
VCC3V FS1
SEL48_1 FS3 FS2 FS4
SEL48_2
MUL1
1 1 1 1 1
SMBCLK_ISO SMBDATA_ISO
R1 49.9RST R3 49.9RST R5 49.9RST R6 49.9RST
R9 1K
R11 1.5K R13 8.2K
RN4
1 2 3 4 5 6 7 8
8P4R-10K
R16 10K
R19 10K R20 X_10K
R21 X_10K
R29 4.7K R30 4.7K
2
VCC3V
FSB (MHz)FS4 FS3 FS2 FS1 FS0 100 MHz1 1 1 0 1 133 MHz
BSEL0 6
MUL0=0 MUL1=1
VCC3
1
Pull-Down Capacitors
CPUCLK CPUCLK# MCHCLK MCHCLK#
AGPCLK ICH_66 MCH_66
PCICLK0 PCICLK1 LANPCLK
AUDPCLK SIO_PCLK FWH_PCLK ICH_PCLK
1394PCLK
ICH_14 AUDIO_14 SIO_48 ICH_48
Ioh=6*Iref Voh=0.71V
used only for EMI issue
X_10pC1 X_10pC2 X_10pC3 X_10pC4
CN1
1
2
3
4
5
6
7
8
X_8P4C-10P
CN2
7
8
5
6
3
4
1
2
X_8P4C-10P
CN3
1
2
3
4
5
6
7
8
X_8P4C-10P
X_10PC6
10PC8 10PC9 X_10PC11 X_10PC14
Trace less 0.2"
SECONDARY IDE BLOCK
IDE2
HD_RST#
R31 33
SDD7 SDD6 SDD5 SDD4 SDD11 SDD3 SDD2 SDD1 SDD0
R35
C15
4.7K
X_220P
YJ220-CW-1
1
2 3 4 5 6 7 8 91110
12
13 14
1615
17 18 19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
4039
R36 10K
VCC3
Micro-Star
Document Number
Last Revision Date:
Wednesday, July 10, 2002
2
SDD8 SDD9 SDD10
SDD12 SDD13 SDD14 SDD15
Title
Clock & ATA100 IDE
R33 10KR34
MS-6710
Sheet of
SDD[8..15] 12
SD_DET 20 SD_A2 12 SD_CS#3 12
5 30
1
Rev
00A
R37
4.7K
7
PRIMARY IDE BLOCK
IDE1
C16 X_220P
1 3 4 5 6 7 8
91110 13 14 17 18
19 21 23 25 27 29 31 33 35 37
R38 10K
VCC3
YJ220-CB-1
R32 33
2
PDD8 PDD9 PDD10 PDD11 PDD12
12
PDD13 PDD14
1615
PDD15
22 24 26 28 30 32 34 36 38 4039
PDD[8..15] 12
PD_DET 20 PD_A2 12 PD_CS#3 12
10K
ATA100 IDE CONNECTORS
6
5
SDD[0..7]12
SD_DREQ12
SD_IOW#12
SD_IOR#12 SD_IORDY12 SD_DACK#12
IRQ1511 SD_A112 SD_A012
SD_CS#112
SD_LED27
VCC5
* Trace Width : 5mils * Trace Spacing : 7mils * Length(longest)-Length(shortest)<0.5" * Trace Length less than 5"
4
3
B B
HD_RST#
HD_RST#25
PDD[0..7]12
PD_DREQ12
PD_IORDY12 PD_DACK#12
A A
8
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
PD_IOW#12
PD_IOR#12
IRQ1411 PD_A112 PD_A012
PD_CS#112
PD_LED27
VCC5
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
HA#[31..3]8
VID4
VSS_SENSE
VCC_SENSE
D14#
D13#
D12#
D23
C26
HD#12
HD#13
D11#
H21
HD#11
AD26
AC26
ITP_CLK1
D10#
G22
B25
HD#9
HD#10
ITP_CLK0
D9#
D8#
C24
C23
HD#8
HD#7
VID3
AE1
AE2
VID4#
VID3#
D7#
D6#
D5#
B24
D22
HD#5
HD#6
HA#8
HA#22
HA#25
HA#23
HA#26
P24
HD#41
A26#
D41#
R21
HD#40
A25#
D40#
HA#24
N25
HD#39
A24#
D39#
N26
HD#38
A23#
D38#
M26
HD#37
A22#
D37#
HA#21
N23
HD#36
A21#
D36#
HA#20
M24
HD#35
A20#
D35#
HA#19
P21
HD#34
A19#
D34#
HA#18
N22
HD#33
HA#27
HA#28
HA#30
HA#29
D D
HINV#[3..0]8
FERR#11
STPCLK#11
HINIT#
HINIT#11
HDBSY#8 HDRDY#8 HTRDY#8
HADS#8
HLOCK#8
HBNR#8
HIT#8
HITM#8
HBPRI#8
C C
HDEFER#8
Trace 10 mils width 10 mils space, Max 8"
CPU_TMPA13 VTIN_GND13
TRMTRIP#11
SKTOCC#5
PROCHOT#12
B B
CPURST#8
HD#[63..0]8
ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_TCK
PROCHOT#
IGNNE#11
HSMI#11 A20M#11
SLP#11
BSEL05,8
CPU_GD
CPU_GD12
CPURST#
HINV#0 HINV#1 HINV#2 HINV#3
HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54
E21
G25
P26 V21
AC3
AA3 AB2
AF26
AB26
A22
AD2
AD3 AE21 AF24 AF25
AD6
AD5 AB23 AB25 AA24
AA22 AA25
Y21 Y24 Y23
W25
Y26
W26
V24
V6 B6 Y4
W5
H5 H2
J6
G1 G4 G2
F3 E3 D2 E2
C1 D5
F7 E6 D4 B3 C4 A2
C3 B2 B5 C6
A7
U2A
DBI0# DBI1# DBI2# DBI3#
IERR# MCERR# FERR# STPCLK# BINIT# INIT# RSP#
DBSY# DRDY# TRDY#
ADS# LOCK# BNR# HIT# HITM# BPRI# DEFER#
TDI TDO TMS TRST# TCK THERMDA THERMDC THERMTRIP# GND/SKTOCC# PROCHOT# IGNNE# SMI# A20M# SLP#
RESERVED0 RESERVED1 RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6
BSEL0 BSEL1
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
U23
HD#50
U24
HD#49
U26
HD#48
T23
HD#47
T22
HD#46
T25
HD#45
T26
HD#44
R24
HD#43
D42#
R25
HD#42
V22
HD#53
U21
HD#52
V25
HD#51
HA#9
HA#5
HA#4
A12#
D27#
HA#11
H24
HD#26
A11#
D26#
HA#10
G26
HD#25
A10#
D25#
L21
HD#24
A9#
D24#
D26
HD#23
HA#3
HA#7
HA#6
AE25A5A4
A8#
A7#
A6#
A5#
A4#
A3#
DBR#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
F26
E25
F24
F23
G23
E24
H22
D25
J21
HD#19
HD#14
HD#16
HD#22
HD#20
HD#18
HD#15
HD#21
HD#17
HA#14
HA#15
HA#16
HA#17
HA#13
HA#12
A18#
A17#
A16#
A15#
A14#
A13#
D33#
D32#
D31#
D30#
D29#
D28#
M23
H25
K23
J24
L22
M21
HD#32
HD#29
HD#30
HD#28
HD#31
HD#27
VID2
AE3
C21
HD#4
VID2#
D4#
VID1
AE4
A25
HD#3
VID0
AE5
VID1#
VID0#
LINT1/NMI
LINT0/INTR
D3#
D2#
A23
B22
HD#2
HD#1
GTLREF3 GTLREF2 GTLREF1 GTLREF0
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI12 TESTHI11 TESTHI10
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
BCLK1# BCLK0#
RS2# RS1# RS0#
BR0#
COMP1 COMP0
DP3# DP2# DP1# DP0#
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
D1#
D0#
B21
HD#0
AP1# AP0#
VID[4..0] 13,26
AA21 AA6 F20 F6
AB4 AA5 Y6 AC4 AB5 AC6
H3 J3 J4 K5 J1
AD25
R41 49.9_1%
A6
R42 49.9_1%
Y3
R43 49.9_1%
W4
R44 49.9_1%
U6 AB22 AA20 AC23 AC24 AC20 AC21 AA2 AD24
AF23 AF22
F4 G5 F1
V5 AC1 H6
R53 51.1_1%
P1
R55 51.1_1%
L24 L25
K26 K25 J26
R5 L5 W23 P23 J23 F21 W22 R22 K22 E22
E5 D1
GTLREF
BPM#5 BPM#4 BPM#3 BPM#2
HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0
R45 1K
HRS#2 HRS#1 HRS#0
HBR#0
HREQ#[0..4] 8
VCCP
CPU pin AB22=ITPCLKOUT1 CPU pin AA20=ITPCLKOUT0
VCCP
CPUCLK# 5 CPUCLK 5
HRS#[2..0] 8
HBR#0 8
* Short trace
HADSTB#1 8 HADSTB#0 8 HDSTBP#3 8 HDSTBP#2 8 HDSTBP#1 8 HDSTBP#0 8 HDSTBN#3 8 HDSTBN#2 8 HDSTBN#1 8 HDSTBN#0 8
NMI 11 INTR 11
GTLREF
Every pin put one 220pF cap near it. Trace Width 7mils, Space 10mils. Keep the voltage divider within
1.5" of the GETREF pin.
CPU STRAPPING RESISTORS
BPM#5 BPM#4 BPM#3 BPM#2
ALL COMPONENTS CLOSE TO CPU
PROCHOT# CPU_GD
with in 1"~2"
HBR#0 CPURST# HINIT#
ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_TCK
SOCKET478
2/3*Vccp
C17 220p
R46 51 R47 51 R48 51 R49 51
R50 X_62 R51 300 R52 220 R54 51 R56 X_300
R57 150 R58 75 R59 39 R60 680 R61 27
C18 1u-0805
VCCP
R39
49.9_1%
R40 100_1%
VCCP
VCCP
VCCP
A A
Title
Micro-Star
Document Number
mPGA478-B INTEL CPU SOCKET Part1
Last Revision Date:
8
7
6
5
4
3
Wednesday, July 10, 2002
2
MS-6710
Sheet of
6 30
1
Rev
00A
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
VCCP
D D
C C
B B
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
U2B
D10
VSS
A11
VSS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA23
VSS
AA26
VSS
AA4
VSS
AA7
VSS
AA9
VSS
AB10
VSS
AB12
VSS
AB14
VSS
AB16
VSS
AB18
VSS
AB20
VSS
AB21
VSS
AB24
VSS
AB3
VSS
AB6
VSS
AB8
VSS
AC11
VSS
AC13
VSS
AC15
VSS
AC17
VSS
AC19
VSS
AC2
VSS
AC22
VSS
AC25
VSS
AC5
VSS
AC7
VSS
AC9
VSS
AD1
VSS
XX1
VSS
XX2
VSS
XX3
VSS
XX4
VSS
XX5
VSS
VSS
VSS
VSS
XX6
XX7
XX8
VSSVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
XX9
XX10
XX11
XX12
XX13
XX14
XX15
XX16
D14
D16
D18
D20
VSS
D21D3D24D6D8E1E11
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
E4
E26
F19
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F12
F14
F16
F18F2F22
F25F5F8
AD20
AD22
AE23
AF4
AF3
F9
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
G21G6G24
G3H1H23
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
VCCA
VSS
H26H4J2
VSSA
VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N6 N3 N24 N21 M5 M25 M22 M2 L4 L26 L23 L1 K6 K3 K24 K21 J5 J25 J22
SOCKET478
VCC_VID 25
L1 4.7uH/100MA L2 4.7uH/100MA
C19
C20 22u-1206
C21 22u-1206
0.1u
Keep the 22uF cap within 0.6" of the CPU pin. Trace Width 12mils, Space 10mils.
VCCP
CPU DECOUPLING CAPACITORS
VCCPVCCP
CB17 10u-0805CB18
CB22 10u-0805
CB28 10u-0805
CB33 10u-0805
CB38 10u-0805
CB41 10u-0805
Place these caps on south side of processor
5
Within CPU Cavity Solder Side
4
Title
Micro-Star
Document Number
mPGA478-B INTEL CPU SOCKET Part2
Last Revision Date:
3
Wednesday, July 10, 2002
2
MS-6710
Sheet of
7 30
1
Rev
00A
CB21 10u-1206
CB26 10u-1206
CB32 10u-1206
VCCP
PLACE CAPS WITHIN CPU CAVITY
7
VCCP
CB16 10u-1206 CB20 10u-1206 CB23 10u-1206 CB27 10u-1206 CB31 10u-1206 CB34
A A
10u-1206 CB37 10u-1206
Place 14 pcs 1206 size cap north side of processor
8
10u-1206 CB24
10u-1206 CB29
10u-1206 CB35
10u-1206 CB39
10u-1206
VCCP
CB19 10u-1206
CB25 10u-1206
CB30 10u-1206
CB36 10u-1206
CB40 10u-1206
6
5
HA#[31..3]6 HD#[63..0] 6
* Length must be matched within +/-0.1"of the Strobe Signals
D D
HBPRI#6
HLOCK#6
HREQ#[4..0]6
C C
HDEFER#6
HTRDY#6
HRS#[2..0]6
HDBSY#6
HDRDY#6
HADSTB#06 HADSTB#16
HDSTBN#06 HDSTBP#06 HDSTBN#16 HDSTBP#16 HDSTBN#26 HDSTBP#26 HDSTBN#36 HDSTBP#36
B B
HINV#[3..0]6
MCHCLK5
MCHCLK#5
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HBR#06
HBNR#6
HADS#6
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HIT#6
HITM#6
HRS#0 HRS#1 HRS#2
HINV#0 HINV#1 HINV#2 HINV#3
R68 24.9_1% R69 24.9_1%
Trace 10 mils & 7mils space < 0.5"
HL[5..0]11
HL_STB11
HL_STB#11
CRT_B17
A A
CRT_B#17
CRT_G17
CRT_G#17
CRT_R17
CRT_R#17
HL0 HL1 HL2 HL3 HL4 HL5
5
U4A
W31
HA3#
AA33
HA4#
AB30
HA5#
V34
HA6#
Y36
HA7#
AC33
HA8#
Y35
HA9#
AA36
HA10#
AC34
HA11#
AB34
HA12#
Y34
HA13#
AB36
HA14#
AC36
HA15#
AC31
HA16#
AF35
HA17#
AD36
HA18#
AD35
HA19#
AE34
HA20#
AD34
HA21#
AE36
HA22#
AF36
HA23#
AE33
HA24#
AF34
HA25#
AG34
HA26#
AG36
HA27#
AE31
HA28#
AH35
HA29#
AG33
HA30#
AG31
HA31#
U33
BREQ0#
T34
BNR#
M34
BPRI#
T35
HLOCK#
T36
ADS#
V36
HREQ0#
AA31
HREQ1#
W33
HREQ2#
AA34
HREQ3#
W35
HREQ4#
P36
HIT#
M36
HITM#
N36
DEFER#
V30
HTRDY#
R36
RS0#
U34
RS1#
P34
RS2#
U31
DBSY#
U36
DRDY#
AB35
HAD_STB0#
AF30
HAD_STB1#
N31
HD_STBN0#
L31
HD_STBP0#
G33
HD_STBN1#
J34
HD_STBP1#
C30
HD_STBN2#
E29
HD_STBP2#
D25
HD_STBN3#
E25
HD_STBP3#
N33
DINV_0#
C35
DINV_1#
B33
DINV_2#
C26 H30
DINV_3# HD_VREF0
K30
HCLKP
J31
HCLKN
V35
HY_RCOMP
B28
HX_RCOMP
AA7
HI0
HUB LINK
AB8
HI1
AC7
HI2
AC5
HI3
AD8
HI4
AF4 AD3
HI5 HI_REF
AD4
HI_STBS
AC4
HI_STBF
G15
BLUE
H16
BLUE#
E15
GREEN
F16
GREEN#
C15
RED
D16
RED#
Y28
T28
M28
K26
VTTFSB
VTTFSB
VTTFSB
VTTFSB
HOST
VGA
K22
K20
VTTFSB
VTTFSB
4
K18
AD28
VTTFSB
VTTFSB
HD_VREF1 HD_VREF2
HCC_VREF
HY_SWNG HX_SWNG
HI_SWING
HL_RCOMP
DDCA_DATA
DDCA_CLK
4
HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
GCLKIN
RSTIN#
CPURST#
PWROK
HA_VREF
HSYNC VSYNC
DREFCLK
REFSET
VCCP
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9#
HI10
HI6 HI7 HI8 HI9
T30 R33 R34 N34 R31 L33 L36 P35 J36 K34 K36 M30 M35 L34 K35 H36 G34 G36 J33 D35 F36 F34 E36 H34 F35 D36 H35 E33 E34 B35 G31 C36 D33 D30 D29 E31 D32 C34 B34 D31 G29 C32 B31 B32 B30 B29 E27 C28 B27 D26 D28 B26 G27 H26 B25 C24 B23 B24 E23 C22 G25 B22 D24 G23
AE7 AJ31 D22 E7
H24 D27 AD30 P30
Y30 H28
AE4 AE5 AF3 AE2 AF2
AD2
R73 68.1_1%
AC2
C7 D7
B7 C6
D14
R76 137_1%
B16
Brookdale_MCH
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HVREF
HSWNG
HL6 HL7 HL8 HL9 HL10
HUB_MREF HI_SWING
X_10pC28
MCH_66 5 PCIRST#1 22,25,28 CPURST# 6 PWR_GD 25
Trace 10 mils & 7mils space <
0.5"
VCC_AGP
3V_DDCDA 17 3V_DDCCL 17
3V_HSYNC 27 3V_VSYNC 27
DOT_CLK 5
3
VCC_AGP MEM_STR
VCCA_SM
HL[10..6] 11
VCC_AGP
VCCA_DPLL
VCC3
CB51 0.1u
R74
BSEL06
10K
3
U4C
A3
VCC_AGP
POWER
A7
VCC_AGP
C1
VCC_AGP
D4
VCC_AGP
D6
VCC_AGP
G1
VCC_AGP
K6
VCC_AGP
L1
VCC_AGP
L9
VCC_AGP
P6
VCC_AGP
R1
VCC_AGP
R9
VCC_AGP
W9
VCC_AGP
V6
VCC_AGP
AD6
VCC_HI
AC9
VCC_HI
AC1
VCC_HI
AE3
VCC_HI
W19
VCC
Y19
VCC
AA19
VCC
W20
VCC
U21
VCC
W21
VCC
AA21
VCC
A9
VCC
B9
VCC
C9
VCC
D9
VCC
E9
VCC
B10
VCC
C10
VCC
D10
VCC
F10
VCC
H10
VCC
A11
VCC
B11
VCC
C11
VCC
D11
VCC
E11
VCC
G11
VCC
J11
VCC
B12
VCC
C12
VCC
D12
VCC
F12
VCC
H12
VCC
G13
VCC
J13
VCC
H14
VCC
J15
VCC
AA17
VCC
W18
VCC
W17
VCC
V19
VCC
U19
VCC
U17
VCC
AG2 AT20
VCCA_SM VCCQ_SM
AG1
VCCA_SM
A15
VCCA_DAC
B14
VCCA_DAC
A13
VCCA_DPLL
C14
VSSA_DAC
B15
VSSA_DAC
B6
VCC_GPIO
PSBSEL RSVD
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
GND
M10
T10
Other
GND
GND
GND
Y10
AH16
AH20
GND
GND
GND
GND
AH24
AH28
AF28
Y3
R75 10K
Y2
AA2 AA4 AA3 AA5
W7
Y4
Y8
A37 AB2 AB3
VCCA_FSB
VTT_DECAP VTT_DECAP VTT_DECAP VTT_DECAP VTT_DECAP
GND
GND
AB28
V28
VCCSM VCCSM VCCSM VCCSM VCCSM
VCCSM VCCSM VCCSM VCCSM VCCSM
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
VCCSM VCCSM VCCSM VCCSM VCCSM
VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB
VTTFSB
VCCQ_SM VCCQ_SM
GND
GND
P28
K24
K28
2
AH8 AK8 AG9 AJ9 AL9
AM22 AJ23 AL37 AU9 AK10
AJ11 AL11 AU25 AM26 AU13 AM14 AJ27 AJ1 AL1 AJ15 AP15 AU29 AH2 AJ2 AK2 AL2 AM30 AH3 AJ3 AK3 AL3 AH4 AJ4 AK4 AL4 AU17
AJ5 AL5 AU5 AM18 AJ19 AK32 AU33 AH6 AK6
AP20 AG7 AJ7 AL7 AP7
B18 C18 D18 H18 B19 C19 D19 E19 G19 J19 B20 C20 D20 F20 H20
F18 A17
AT21 AU21
G37 L37 R37 AC37 A31
A2
NC
A36
NC
AH34
NC
AJ35
NC
AT1
NC
AT37
NC
AU1
NC
AU2
NC
AU36
NC
AU37
NC
B1
NC
B37
NC
GND
Brookdale_GMCH
2
VCCA_FSB
VCCQ_SM
Place <0.1"
GMCH REFERENCE BLOCK
VCCA_FSB
CB42
0.1u
VCCA_DPLL
CB43
0.1u
VCCA_SM
CB44
0.1u
VCCQ_SM
CB45
0.1u
HSWNG
VCCP
CB46 0.1u CB47 0.1u CB48 0.1u CB49 0.1u CB50 0.1u
Micro-Star
Document Number
Last Revision Date:
Friday, July 12, 2002
HVREF
Place Cap. as Close as possible to
, Trace width 12 mils & 10mils space
GMCH
Keep the voltage divider within 3" of the GMCH pin.
HI_SWING
HUB_MREF
Place 0.01uF Cap. as Close as possible to GMCH< 0.25" Trace width 12 mils & 10mils space
Title
Brookdale-G (HOST_HI_VGA)
+
C29
0.01u
C31
0.01u
1
L3 0.82uH_0603 C22
I=30mA
22u-1206
L4
10uH_0805
C23
I=35mA
470u
L5 1uH-0805
CT1
+
I=500mA
100u_16V
L6 0.68uH-0805 C24
I=150mA
4.7u-0805
R63 1
VCCP
R64 301 1%
R65
C25
150 1%
0.01u
VCCP
R66
49.9 1%
R67
C27
100_1%
0.1u
VCC_AGP
C30
0.1u
C32
0.1u
MS-6710
Sheet of
1
R62
1
C26
0.01u
R70 226_1%
R71 100_1%
R72 100_1%
8 30
VCC_AGP
VCC_AGP
MEM_STR
VCC_AGP
Rev
00A
5
AH10
AH12
AH14
AH18
AH22
AH26
D D
C C
Trace lengh must as short as possible for SRCVEN
Trace width 12 mil with 12 mil space for SM_VREF.
GAD[31..0]16
B B
A A
GC_BE#[3..0]16
R79 X_0_Soder
DDR_VREF
5
MDQ0 MDQ1 MDQ2 MDQ3 MDQ4 MDQ5 MDQ6 MDQ7 MDQ8 MDQ9 MDQ10 MDQ11 MDQ12 MDQ13 MDQ14 MDQ15 MDQ16 MDQ17 MDQ18 MDQ19 MDQ20 MDQ21 MDQ22 MDQ23 MDQ24 MDQ25 MDQ26 MDQ27 MDQ28 MDQ29 MDQ30 MDQ31 MDQ32 MDQ33 MDQ34 MDQ35 MDQ36 MDQ37 MDQ38 MDQ39 MDQ40 MDQ41 MDQ42 MDQ43 MDQ44 MDQ45 MDQ46 MDQ47 MDQ48 MDQ49 MDQ50 MDQ51 MDQ52 MDQ53 MDQ54 MDQ55 MDQ56 MDQ57 MDQ58 MDQ59 MDQ60 MDQ61 MDQ62 MDQ63
C33 0.1u
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC_BE#0 GC_BE#1 GC_BE#2 GC_BE#3
VCC_AGP
AR10
AP10 AT11 AT13 AT14 AT10 AR12 AR14 AP14 AT15 AP16 AT18 AT19 AR16 AT16 AP18 AR20 AR22 AP22 AP24 AT26 AT22 AT23 AT25 AR26 AP26 AT28 AR30 AP30 AT27 AR28 AT30 AT31 AR32 AT32 AR36 AP35 AP32 AT33 AP34 AT35 AN36 AM36 AK36 AJ36 AP36 AM35 AK35 AK34
AK24 AL23
AN4 AP2
AT3 AP5 AN2 AP3 AR4
AT4
AT5 AR6
AT9
AT6 AP6
AT8 AP8
V4 V2 W4 W5 U5 U4 U2 V3
R2 R5 R7
P3 P8 K4 K2
M3
H4 G2 K3
H3 K8 G4
R4 N4 M2 H2
U4B
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
SRCVEN_OUT# SRCVEN_IN#
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7
T2
G_AD8
T3
G_AD9
T4
G_AD10 G_AD11 G_AD12 G_AD13
T8
G_AD14 G_AD15 G_AD16 G_AD17 G_AD18
J2
G_AD19 G_AD20
L5
G_AD21
L4
G_AD22 G_AD23 G_AD24 G_AD25
J4
G_AD26
J5
G_AD27
J7
G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE0# G_C/BE1# G_C/BE2# G_C/BE3#
AGP
VCC_AGP
K10
K12
VCCSM
DDR
VCC_AGP
VCC_AGP
K14
K16
VCCSM
VCCSM
VCC_AGP
VCC_AGP
P10
V10
VCCSM
VCC_AGP
AB10
VCCSM
VCCSM
SCMDCL_K0
SCMDCLK_0#
SCMDCLK_1
SCMDCLK_1#
SCMDCLK_2
SCMDCLK_2#
SCMDCLK_3
SCMDCLK_3#
SCMDCLK_4
SCMDCLK_4#
SCMDCLK_5
SCMDCLK_5#
SMX_RCOMP0
SMY_RCOMPSM_VREF
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_REQ# G_GNT#
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGP_VREF
AGP_RCOMP
VCC_AGP
VCC_AGP
AD10
SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8
SMA9 SMA10 SMA11 SMA12
SMAB1 SMAB2 SMAB4 SMAB5
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7 SCKE0
SCKE1 SCKE2 SCKE3
SCS0# SCS1# SCS2# SCS3#
SBA_0
SBA_1 SRAS# SCAS#
SWE#
G_PAR
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
PIPE#
RBF#
WBF#
ST0 ST1 ST2
4
MEM_STR
AL25 AN25 AP23 AK20 AL19 AL17 AP19 AP17 AN17 AK16 AK26 AL15 AN15
AP25 AN23 AN19 AK18
AR2 AT7 AT12 AT17 AR24 AT29 AT34 AL36
AP4 AR8 AP12 AR18 AT24 AP28 AR34 AL34
AP13 AN13 AK14 AL13
AL29 AP31 AK30 AN31
AL21 AK22 AN11 AP11 AM34 AL33 AP21 AN21 AP9 AN9 AP33 AN34
AN27 AP27 AK28 AN29 AP29
AF10 AJ34AM2 M4
N7 N5 N2 P2 P4
D5 B5
C3 C2 D3 D2 E4 E2 F3 F2
F4 E5
C4 B4 B3
V8 U7 M8 L7
H8 G7 G5
W2
R98 40.2_1%
L2
Brookdale_GMCH
4
DDRMAA0 DDRMAA1 DDRMAA2 DDRMAA3 DDRMAA4 DDRMAA5 DDRMAA6 DDRMAA7 DDRMAA8 DDRMAA9 DDRMAA10 DDRMAA11 DDRMAA12
MSDQS0 MSDQS1 MSDQS2 MSDQS3 MSDQS4 MSDQS5 MSDQS6 MSDQS7
MSDM0 MSDM1 MSDM2 MSDM3 MSDM4 MSDM5 MSDM6 MSDM7
MSCKE0 MSCKE1 MSCKE2 MSCKE3
SMX SMY
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
CB52 0.1u
Place < 0.5"
DDRMAA[12..0] 14,15
DDRMAB1 14,15 DDRMAB2 14,15 DDRMAB4 14,15 DDRMAB5 14,15
MSCKE[3..0] 14,15
MSCS0# 14,15 MSCS1# 14,15 MSCS2# 14,15 MSCS3# 14,15
DCLK0 14 DCLK0# 14 DCLK1 14 DCLK1# 14 DCLK2 14 DCLK2# 14 DCLK3 14 DCLK3# 14 DCLK4 14 DCLK4# 14 DCLK5 14 DCLK5# 14
MSBS0 14 MSBS1 14 MRAS# 14,15 MCAS# 14,15 MWE# 14,15
GFRAME# 16 GIRDY# 16 GTRDY# 16 GDEVSEL# 16 GSTOP# 16 GPAR 16
GREQ# 16 GGNT# 16
SBA[7..0] 16
SB_STB 16 SB_STB# 16
ST[2..0] 16
GAD_STB0 16 GAD_STB#0 16 GAD_STB1 16 GAD_STB#1 16
PIPE# 16 RBF# 16 WBF# 16
AGPREF 16
3
Trace width 12 mil with 10 mil space.
Place 0.1uF <1" to GMCH
MEM_STR
R77
R78
60.4
60.4
C35
R80
R81
0.1u
60.4
60.4
3
2
1
DDR SERIAL RESISTORS
DDRMD1
RN5 10
DDRMD[63..0]14,15
C34
0.1u
7 8
DDRMD5
5 6
DDRMD4
3 4
DDRMD0
1 2
DDRMD3
RN6 10
7 8
DDRMD7
5 6
DDRMD6
3 4
DDRMD2
1 2
DDRMD13
RN7 10
7 8
DDRMD12
5 6
DDRMD9
3 4
DDRMD8
1 2
DDRMD11
RN8 10
7 8
DDRMD10
5 6
DDRMD15
3 4
DDRMD14
1 2
DDRMD21
RN9 10
7 8
DDRMD17
5 6
DDRMD16
3 4
DDRMD20
1 2
DDRMD23
RN10 10
7 8
DDRMD19
5 6
DDRMD22
3 4
DDRMD18
1 2
DDRMD25
RN11 10
7 8
DDRMD29
5 6
DDRMD28
3 4
DDRMD24
1 2
DDRMD31
RN12 10
7 8
DDRMD27
5 6
DDRMD30
3 4
DDRMD26
1 2
DDRMD37
RN13 10
7 8
DDRMD33
5 6
DDRMD36
3 4
DDRMD32
1 2
DDRMD35
RN14 10
7 8
DDRMD39
5 6
DDRMD38
3 4
DDRMD34
1 2
DDRMD41
RN15 10
7 8
DDRMD45
5 6
DDRMD44
3 4
DDRMD40
1 2
DDRMD47
RN16 10
7 8
DDRMD43
5 6
DDRMD46
3 4
DDRMD42
1 2
DDRMD53
RN17 10
7 8
DDRMD52
5 6
DDRMD49
3 4
DDRMD48
1 2
DDRMD51
RN18 10
7 8
DDRMD50
5 6
DDRMD55
3 4
DDRMD54
1 2
DDRMD57
RN19 10
7 8
DDRMD61
5 6
DDRMD56
3 4
DDRMD60
1 2
DDRMD59
RN20 10
7 8
DDRMD63
5 6
DDRMD58
3 4
DDRMD62
1 2
MSDM0 SDM0
R82 10
MSDM1
R83 10
MSDM2
R84 10
MSDM3
R85 10
MSDM4
R86 10
MSDM5
R87 10
MSDM6
R88 10
MSDM7
R89 10
MSDQS0
R90 10
MSDQS1
R91 10
MSDQS2
R92 10
MSDQS3
R93 10
MSDQS4
R94 10
MSDQS5
R95 10
MSDQS6
R96 10
MSDQS7
R97 10
2
MDQ1 MDQ5 MDQ4 MDQ0 MDQ3 MDQ7 MDQ6 MDQ2 MDQ13 MDQ12 MDQ9 MDQ8 MDQ11 MDQ10 MDQ15 MDQ14 MDQ21 MDQ17 MDQ16 MDQ20 MDQ23 MDQ19 MDQ22 MDQ18 MDQ25 MDQ29 MDQ28 MDQ24 MDQ31 MDQ27 MDQ30 MDQ26 MDQ37 MDQ33 MDQ36 MDQ32 MDQ35 MDQ39 MDQ38 MDQ34 MDQ41 MDQ45 MDQ44 MDQ40 MDQ47 MDQ43 MDQ46 MDQ42 MDQ53 MDQ52 MDQ49 MDQ48 MDQ51 MDQ50 MDQ55 MDQ54 MDQ57 MDQ61 MDQ56 MDQ60 MDQ59 MDQ63 MDQ58 MDQ62
SDM1 SDM2 SDM3 SDM4 SDM5 SDM6 SDM7
SDQS0 SDQS1 SDQS2 SDQS3 SDQS4 SDQS5 SDQS6 SDQS7
Micro-Star
Document Number
Last Revision Date:
Friday, July 12, 2002
SDM0 15 SDM1 15 SDM2 15 SDM3 15 SDM4 15 SDM5 15 SDM6 15 SDM7 15
SDQS[7..0] 14,15
Title
MS-6710
Brookdale-G(DDR & AGP)
Sheet of
1
Rev
00A
9 30
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