5
4
3
2
1
CPU:
MS-6703T7
Ver:0C
Pentium4 socket-478 Processor
System Chipset:
SIS648(NB) + SIS963(SB)
D D
VRM 9.x
INTEL Socket 478
CPU Clock
On Board Function Chip:
LPC I/O-W83697HF
IEEE1394a PHY Realtek 8801B
MII LAN PHY Realtek 8201BL
Command
Address BUS
Data BUS
DDR DIMM
Terminator
Audio Codec-Realtek ALC650/AD1980
Expansion Slot:
AGP3.0 Slot*1
PCI2.2 Slot*3
C C
ZCLK0 133
SIS648
AGP 4X/8X
AGP 3.0
AGP BUS
Data BUS
Address BUS
Command
2 DDR
Modules
01-Block drigrame & Cover sheet
02-Power Div & Specification
03-Intel socket 478 CPU part 1
04-Intel socket 478 CPU part 2
05-Main Clock Gen & Clock buffer.
CONTENT
06-SIS648-1 Host & AGP
USB Port 1
USB Port 2
USB Port 3
USB Port 4
USB Port 5
B B
A A
USB Port 6
MII LAN PHY
IEEE1394a PHY
AC97 Codec
Floopy
Parallel
Serial
USB Clock
USB 2.0 BUS
AC97 Link BUS
I/O Clock
W83697HF
LPC I/O
HyperZip
SIS963
LPC Interface
Keyboard
Mouse
PCI Clock
SB 14MHz
ZCLK1 133
PCI Clock
UltraDMA
33/66/100/133
IDE connector 1
IDE connector 2
PCI BUS
DDR DIMM
Buffer
PCI Conn 2
PCI Conn 3
PCI Conn 1
Clock Gen
CPU Clock
NB Clock
ZCLK0 133
ZCLK1 133
AGP Clock66
PCI Clock
USB Clock
I/O Clock
SB 14MHz
CPU Clock
NB Clock
ZCLK0 133
ZCLK1 133
AGP Clock66
PCI Clock
USB Clock
I/O Clock
SB 14MHz
07-SIS648-2 Memory
08-SIS648-3/4 Power & HyperZip
09-DIMM 1 & 2
10-DDR Terminator
11-AGP slot & Pull-UP/DN resistor
12-SIS963-1 PCI & IDE & HyperZip
13-SIS963-2 MISC.
14-SIS963-3/4 USB & Power
15-IDE 1/2 & PS2
16-PCI slot 1 & 2 & 3
17-USB port
18-IEEE1394a PHY
19-MII LAN PHY
20-W83697HF & BIOS & HW Monitor
21-Com/Parallel port
22-AC97 Codec
23-ATX & F-Panel
24-MS5 ACPI Controller
25-VRM 9.0
26-Manual Parts
27-History
MSI
ISA Flash ROM
5
4
3
2
Title
Cover Sheet & Block Diagr am
Size Document Number Rev
Date: Sheet
MICRO-STAR
MS-6703T7
1
12 6 Thursday, August 01, 2002
0C
of
5
ATX POWER Supply
3.3V 5V 5VSB1A12V
4
Power Delivery Map
3
2
1
D D
VRM 9.0 Center Processer Unit
GPIO_0
GPIO_1
GPIO_2
GPIO_3
5VDU VREG
GPIO_4
GPIO_5
3VSB VREG
NB-SIS648
Core Power
GPIO_6
GPIO_7
GPI_8
GPI_9
1.8V VREG
Z-Link BUS
GPI_10
GPIO_11
VDIMM VREG
Memory Interface
AGP Interface
C C
VDDQ VREG
GPIO_12
GPIO_13 I/O
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
2.5V VREG DDR Memory
GPIO_19
GPIO_20
SB-SIS963
Core Power
Z-Link BUS
DEVICES
PCI SLOT 1
Clock Generator
B B
Clock Buffer
PCI SLOT 3
AGP slot
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
MAIN
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
RESUME
INT#
INT#B
INT#C
INT#D
INT#A
INT#C
INT#D
INT#A
INT#B
INT#D
INT#A
INT#B
INT#C
M/B ID0
M/B ID1
THERM#
M/B ID2
M/B ID3
CLEAR CMOS
CLEAR PASSWORD
Flash ROM Protection H: Enable ; L: Disabled.
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
KBDAT
KBCLK
MSDAT RESUME
MSCLK
SMBCLK
SMBDAT
PCI
IDSEL
AD17
AD18 PCI SLOT 2
AD19
REQ#/GNT#
PREQ#0
PGNT#0
PREQ#1
PGNT#1
PREQ#2
PGNT#2
CLOCK
PCICLK1
PCICLK2
PCICLK3
SIS963 GPIO Function Define
PCI slot
LAN PHY
A A
MSI
Title
Power Delivery
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR
MS-6703T7
1
22 6 Thursday, August 01, 2002
0C
of
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCK
VCCP
VID4 25
VID3
AE2
D22
HD#5
VID2
AE3
VID3#
D5#
C21
HD#4
VID1
AE4
VID2#
D4#
A25
HD#3
VID0
AE5
VID1#
D3#
A23
HD#2
VID0#
D2#
VID3 25
VID2 25
VID1 25
VID0 25
Open-D
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1
LINT0
D1#
D0#
BSEL0
BSEL1
B22
B21
AD6
AD5
WILLAMETTE_CPU_S
HD#0
HD#1
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
GTLREF1
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R196 56
R212 56
R193 56
R190 56
HRS#2
HRS#1
HRS#0
BREQ#0
R235 49.9_1%
R233 49.9_1%
HADSTB#1
HADSTB#0
HDSTB3
HDSTB2
HDSTB1
HDSTB0
HDSTB#3
HDSTB#2
HDSTB#1 HD#60
HDSTB#0
NMI
INTR
HREQ#4 6
HREQ#3 6
HREQ#2 6
HREQ#1 6
HREQ#0 6
VCCP
CPUCLK-0 5
CPUCLK0 5
HRS#2 6
HRS#1 6
HRS#0 6
BREQ#0 6
* Short trace
HADSTB#1 6
HADSTB#0 6
HDSTB3 6
HDSTB2 6
HDSTB1 6
HDSTB0 6
HDSTB#3 6
HDSTB#2 6
HDSTB#1 6
HDSTB#0 6
NMI 13
INTR 13
FERR#, STPCLK#, SMI#,
CPUSLP#, A20M#, INTR, NMI,
IGNNE#, INIT#
-----REGISTER CONTROLLER
NEED SETTING
G25
AC3
AA3
AB2
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A22
A7
Y21
Y24
Y23
Y26
V24
HA#[3..31]
U12A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M
SLP#
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
HA#27
HA#26
HA#25
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
HA#30
A31#
HA#29
A30#
HA#28
A29#
A28#
A27#
A26#
HA#24
A25#
HA#23
A24#
HA#22
A23#
HA#21
A22#
HA#20
A21#
A20#
HA#19
HA#18
A19#
HA#17
A18#
HA#16
A17#
HA#15
A16#
HA#14
A15#
HA#13
A14#
HA#12
A13#
HA#11
A12#
HA#10
A11#
Socket478-1
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
D27#
D26#
V22
U21
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
N25
N26
M26
N23
M24
P21
N22
M23
H25
K23
J24
L22
M21
H24
HD#52
HD#53
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
G26
HA#9
A10#
D25#
L21
HD#24
HA#8
A9#
D24#
D26
HD#23
HA#7
A8#
D23#
F26
HD#22
HA#6
A7#
D22#
E25
HD#21
HA#5
A6#
D21#
F24
HD#20
A5#
D20#
HA#3
HA#4
A4#
D19#
F23
G23
HD#19
HD#18
A3#
D18#
E24
HD#17
D17#
HD#16
AE25A5A4
D16#
H22
D25
HD#15
DBR
D15#
J21
HD#14
D14#
D23
HD#13
AD26
AC26
ITP_CLK1
VSS_SENSE
VCC_SENSE
D13#
D12#
D11#
D10#
C26
H21
G22
B25
HD#9
HD#12
HD#11
HD#10
BSEL0 5
VID4
ITP_CLK0
D9#
D8#
D7#
C24
C23
HD#7
HD#6
HD#8
AE1
VID4#
D6#
B24
HA#[3..31] 6
D D
HDBI#[0..3] 6
STPCLK# 13
HDBSY# 6
HDRDY# 6
HTRDY# 6
HLOCK# 6
HBPRI# 6
C C
B B
HD#[0..63] 6
A A
HDEFER# 6
CPU_TMPA 20
VTIN_GND 20
THERMTRIP# 13
SKTOCC# 5
PROCHOT# 13
CPUSLP# 13
PWRGD_CPU 6
CPURST# 6
HD#[0..63]
IGNNE# 13
HDBI#0
HDBI#1
HDBI#2
HDBI#3
FERR#
FERR# 13
STPCLK#
INIT#
INIT# 13
HDBSY#
HDRDY#
HTRDY#
HADS#
HADS# 6
HLOCK#
HBNR#
HBNR# 6
HIT#
HIT# 6
HITM#
HITM# 6
HBPRI#
HDEFER#
TDI_CPU
TDO_CPU
TMS_CPU
TRST#_CPU
TCK_CPU
CPU_TMPA
VTIN_GND
THERMTRIP#
SKTOCC#
PROCHOT#
IGNNE#
SMI#
SMI# 13
A20M#
A20M# 13
CPUSLP#
PWRGD_CPU
CPURST#
HD#63
HD#62
HD#61
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
Length < 1.5inch.
GTLREF1
2/3*Vccp
C199
220p
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU STRAPPING RESISTORS
CLOSED TO SOCKET478
THERMTRIP#
FERR#
PROCHOT#
BREQ#0
CPURST#
PWRGD_CPU
STPCLK#
INIT#
SMI#
CPUSLP#
A20M#
INTR
NMI
IGNNE#
BPM#0
BPM#1
BPM#4
BPM#5
PWRGD_CPU
CPURST#
CPUSLP#
TDO_CPU
TMS_CPU
TDI_CPU
TCK_CPU
TRST#_CPU
7 8
5 6
3 4
1 2
CPU ITP BLOCK
CLOSED TO SOCKET478
C187
1u-0805
R271 62
R216 X_62
R228 62
R272 49.9_1%
R204 49.9_1%
R195 49.9_1%
R223 X_56
R230 X_56
R217 X_56
R213 X_56
RN24
X_56_8P4R
R205 49.9_1%
R207 49.9_1%
R211 49.9_1%
R209 49.9_1%
X_150p C178
X_150p C183
X_150p C194
R221 75
R219 39
R276 150
R227 27
R222 680
R201
49.9_1%
R203
100_1%
VCCP
VCCP
MSI
Title
FCPGA478-1
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR
MS-6703T7
1
32 6 Thursday, August 01, 2002
0C
of
5
VCCP
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AD10
AD12
AD14
AD16
AD18
AD21
AD23
AE11
V23
D10
A11
A13
A15
A17
A19
A21
A24
A26
AA1
AA4
AA7
AA9
AB3
AB6
AB8
AC2
AC5
AC7
AC9
AD1
AD4
AD8
P22
P25
R23
R26
T21
T24
U22
U25
U12B
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AF18
VCC
VSS
AF20
VCC
VSS
VCC
AC10
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
AF6
AF8
B10
B12
XX1
XX2
XX3
XX4
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P2
VSS
VSS
VSS
P5
VSS
R1
VSS
VSS
VSS
R4
VSS
VSS
VSS
T3
VSS
T6
VSS
U2
VSS
VSS
VSS
U5
VSS
V1
VSS
GND
GND
GND
GND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE13
AE15
AE17
AE19
AE22
AE24
XX13
XX14
XX15
XX16
AE26
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE7
AE9
AF1
AF10
AF12
AF14
AF16
D D
C C
B B
AC12
VCC
VSS
B14
AC14
B16
VCC
VSS
AC16
VCC
VSS
B18
AC18
VCC
VSS
B20
AC8
VCC
VSS
B23
AD11
AD13
VCC
VSS
B26B4B8
4
VCC
VSS
AD15
VCC
VSS
AD17
VCC
VSS
C11
AD19
VCC
VSS
C13
AD7
C15
AD9
VCC
VSS
C17C2C19
VCC
VSS
AE10
VCC
VSS
AE12
VCC
VSS
AE14
VCC
VSS
C22
AE16
AE18
AE20
AE6
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C25C5C7C9D12
AE8
VCC
VSS
AF11
D14
VCC
VSS
AF13
VCC
VSS
D16
AF15
AF17
AF19
AF2
AF21
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
Trace Width 20mils.
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
WILLAMETTE_CPU_S
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
3
FOR NORTHWOOD
CPU ONLY
VCC_VID
C10
C12
AF4
AF3
XX5
VCC
VCC
VCC
VCC
VCC
VCCVID
VCCVIDPRG
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E23
V26V4W21
W24W3W6Y2Y22
XX6
GND
VSS
C181
0.1u
XX7
XX8
GND
GND
VCC-IOPLL
VSS
VSS
Y25
Y5
GND
VSS
2
XX9
XX10
XX11
XX12
VCCP
F19
VCC
GND
GND
GND
GND
F9
VCC
C14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCCA
VSSA
AD22
C16
C18
C20
C8
D11
D13
D15
D17
D19
D7
D9
E10
E12
E14
E16
E18
E20
E8
F11
F13
F15
F17
E26
E4
E7
E9
F10
F12
F14
F16
F18
F2
F22
F25
F5
F8
G21
G24
G3
G6
H1
H23
H26
H4
J2
J22
J25
J5
K21
K24
K3
K6
L1
L23
L26
L4
M2
M22
M25
M5
N21
N24
N3
N6
AE23
AD20
C180
C167
C168
10u-0805x
1u
10u-0805x
VCCP
C159
X_22u-1206
CB57
10u-0805x
CB56
10u-0805x
CB55
10u-0805x
CB54
10u-0805x
CB24
10u-0805x
CB23
10u-0805x
CB22
10u-0805x
CB21
10u-0805x
CB20
10u-0805x
VCCP
PLACE CAPS WITHIN CPU CAVITY
VCCP
+
CT39
X_150u-2.5V
+
CT40
X_150u-2.5V
Solder side
L37 4.7UH/100MA
L38 4.7UH/100MA
C160
X_22u-1206
VCCP
CB32
10u-0805x
CB31
10u-0805x
CB30
10u-0805x
CB28
10u-0805x
CB29
10u-0805x
CB34
10u-0805x
CB38
10u-0805x
VCCP
CB153
10u-0805x
CB154
10u-0805x
CB155
10u-0805x
CB156
10u-0805x
1
VCCP
CB37
10u-0805x
CB33
10u-0805x
CB35
10u-0805x
CB39
10u-0805x
CB169
10u-0805x
CB170
10u-0805x
A A
5
N12-4780020-F02
N12-4780020-A10
N12-4780020-M06
MSI
Title
FCPGA478-2
Size Document Number Rev
4
3
2
Date: Sheet
MICRO-STAR
MS-6703T7
1
42 6 Thursday, August 01, 2002
0C
of
5
VCC3
CB100
0.1u
D D
C C
B B
A A
VCC2.5V
SEL_CLK
CB40
1000p
SKTOCC# 3
VCC2.5V
CB140
0.1u
C
L44 X_80S_L0805
CP22
X_COPPER
CE1
10u/16V
VCCP
R311
10K
MBT3904
VCC3
CP49 X_COPPER
L69
X_80S_L0805
CE6
CB145
103P
22u/6.3v
X_80S_L0805
L68
CP48 X_COPPER
VCC2.5V
R463
X_10K_1%
C333
X_0.1u
R462
X_10K_1%
R443 X_300
R444 X_100
5
R315
1K
+
+
CB42
0.1u
R310
10K
CE5
22u/6.3v
A
B
FWDSDCLKO CBVDD
VCC3
FWDSDCLKO 7
CB46
0.1u
Q21
CB142
0.1u
R298
10K
CB51
CB141
0.1u
CB45
0.1u
MBT3904
Q20
MBT3904
0.1u
VCC3
R283
10K
Q19
VCC3
CB146
0.1u
CB148
103P
SMBCLK
SMBDAT
FWDSDCLKO
SEL_CLK
CB53
0.1u
CP37 X_COPPER
X_80S_L0805
CB64
0.1u
R464
Select Clock Buffer
CY28353
PART
10K_1% X
A
10K_1%
B
104pf
C
CB43
CB62
0.1u
0.1u
R278
L59
CBVDD DDRCLK[0..5]
CB147
0.1u
X_0
FB_OUT
CVCC3
CB61
0.1u
475_1%
CB63
0.1u
3
12
23
10
7
22
8
9
18
21
20
ICS93722
4
U13
CY28381-SSOP48
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
PCI_STOP#
45
CPU_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
CB59
1000p
37
VSSA
Trace Width 10mils.
U18
CY28352-SSOP28
VDD
VDD
VDD
AVDD
SCLK
SDATA
CLK_IN
NC
NC
NC
FB_IN
GND
GND
GND
GND
61115
28
X
CY28352
X
X
4
C223
27p
X
X
XIN
6
Y4
14M-32pf-HC49S-D
2
CLK0
4
CLK1
13
CLK2
17
CLK3
24
CLK4
26
CLK5
1
CLK#0
5
CLK#1
14
CLK#2
16
CLK#3
25
CLK#4
27
CLK#5
19
FB_OUT
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK_F0/FS3
PCICLK_F1/FS4
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
24_48M/MULTISEL
SCLK
SDATA
XOUT
7
C224
27p
DDRCLK-[0..5]
R429
R435
R453
R456
R442
R434
R428
R438
R447
R458
R437
R431
R448
3
Main Clock Generator
R273
R277
R257
R261
R253
R284
R285
R256
R259
R270
R279
RN25 33_8P4R
R268 33
R240
R252
R293
R297
R309
R305
48M
40
39
44
43
47
31
30
9
10
FS3
14
FS4
15
16
17
20
21
22
23
FS0
2
FS1
3
FS2
4
27
MULTISEL
26
35
34
CY28381 Clock Generator
FS4 FS0
0 33
1
00
1 133 1001
FS1
FS2
CY28370 Clock Generator
FS4
0
0
FS1 FS2
0 100
1
33
33
33
33
X_22
22
22
22
22
33
X_33
7 8
5 6
3 4
1 2
33
33
22
22
22
22
0
0
0
0
06 6
0 166
1
Clock Buffer (DDR)
DDRCLK[0..5] 9
DDRCLK-[0..5] 9
DDRCLK0
0
DDRCLK1
0
DDRCLK2
0
DDRCLK3
0
DDRCLK4
0
DDRCLK5
0
DDRCLK-0
0
DDRCLK-1
0
DDRCLK-2
0
DDRCLK-3
0
DDRCLK-4
0
DDRCLK-5
0
FB_OUT
22
C322
10p
3
By-Pass Capacitors
Place near to the Clock Buffer
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK4
DDRCLK5
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-4
DDRCLK-5
SBPCLK
CPU
100
CPU FS3
100
133
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
SB14MHZ
AC97_14MHZ
LPCPCLK
PCICLK4
PCICLK1
PCICLK2
PCICLK3
USBCLK
SIO48M
SBMCLK
SBMDAT
SDRAM FS3
1000
SDRAM
C308 X_10p
C312 X_10p
C327 X_10p
C329 X_10p
C319 X_10p
C311 X_10p
C307 X_10p
C317 X_10p
C321 X_10p
C332 X_10p
C316 X_10p
C309 X_10p
CPUCLK0 3
CPUCLK-0 3
CPUCLK1 6
CPUCLK-1 6
AGPCLK0 6
AGPCLK1 11
ZCLK0 8
ZCLK1 12
LPCPCLK 20
PCICLK4 16
PCICLK1 16
PCICLK2 16
PCICLK3 16
SBPCLK 12
SB14MHZ 13
AC97_14MHZ 22
USBCLK 14
SIO48M 20
SMBCLK 9,13,24
SMBDAT 9,13,24
ZCLK
AGP
133
66
133
66
ZCLK
AGP FS0
133
133 1
66 0 33
2
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
SBPCLK
LPCPCLK
PCICLK4
PCICLK3
PCICLK2
PCICLK1
X_10p_8P4C
SB14MHZ
AC97_14MHZ
SIO48M
USBCLK
PCI
33
PCI
33
2
F0~F4 inte rnal Pull-Down 150K Ohm
CVCC3 VCC3
R249
R248
R241
R294
R275
X_10K
X_10K
10K
X_10K
10K
MULTISEL
Title
Size Document Number Rev
Date: Sheet
R251 X_0
R242 0
FS0
R247
FS3
FS4
MULTISEL int ernal Pull-Up 150K Ohm
R301 X_4.7K
R304 X_4.7K
MSI
Main CLK GEN
1
R269
R274
R258
R262
C227 X_10p
C252 X_10p
C253 X_10p
C230 X_10p
C233 X_10p
C237 X_10p
C242 X_10p
C251 X_10p
CN9
1 2
3 4
5 6
7 8
C215 10p
C214 10p
C260 10p
C257 10p
X_10K
R246
MICRO-STAR
MS-6703T7
1
49.9_1%
49.9_1%
49.9_1%
49.9_1%
BSEL0 3
FS1
FS2
10K
10K or 0 Ohm
VCC3
52 6 Thursday, August 01, 2002
of
0C
5
AGPST[0..2] 11
NB_VREF
C4XAVSS
C4XAVDD
C1XAVSS
C1XAVDD
D D
CPUCLK1 5
CPUCLK-1 5
HLOCK# 3
HDEFER# 3
HTRDY# 3
CPURST# 3
PWRGD_CPU 3
HBPRI# 3
BREQ#0 3
HDRDY# 3
HDBSY# 3
HREQ#4 3
HREQ#3 3
HREQ#2 3
HREQ#1 3
C C
HA#[3..31] 3
B B
HREQ#0 3
HADSTB#1 3
HADSTB#0 3
CPUCLK1
CPUCLK-1
HLOCK#
HDEFER#
HTRDY#
CPURST#
HBPRI#
BREQ#0
HRS#2
HRS#2 3
HRS#1
HRS#1 3
HRS#0
HRS#0 3
HADS#
HADS# 3
HITM#
HITM# 3
HIT#
HIT# 3
HDRDY#
HDBSY#
HBNR#
HBNR# 3
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HADSTB#1
HADSTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
U11A SIS648
AJ31
CPUCLK
AJ33
CPUCLK#
T33
HLOCK#
T35
DEFER#
V32
HTRDY#
B23
CPURST#
F22
CPUPWRGD
R34
BPRI#
U31
BREQ0#
R33
RS#2
T32
RS#1
U35
RS#0
V35
ADS#
R35
HITM#
U34
HIT#
W34
DRDY#
U33
DBSY#
V33
BNR#
W35
HREQ4#
Y33
HREQ3#
W31
HREQ2#
W33
HREQ1#
Y35
HREQ0#
AG31
HASTB1#
AA33
HASTB0#
AH33
HA31#
AG33
HA30#
AJ35
HA29#
AF32
HA28#
AJ34
HA27#
AH32
HA26#
AG35
HA25#
AE31
HA24#
AH35
HA23#
AF35
HA22#
AE35
HA21#
AE33
HA20#
AE34
HA19#
AF33
HA18#
AG34
HA17#
AC33
HA16#
AD32
HA15#
AD33
HA14#
AC35
HA13#
AD35
HA12#
AC31
HA11#
AC34
HA10#
AB35
HA9#
AB32
HA8#
AB33
HA7#
AA35
HA6#
AA31
HA5#
Y32
HA4#
AA34
HA3#
HD63#
C24
E23
HD62#
HD61#
B24
AL36
C1XAVSS
HD60#
D23
AK34
AJ36
AK35
AA26
C4XAVSS
C1XAVDD
C4XAVDD
HOST
HD59#
HD58#
HD57#
HD56#
HD55#
D25
F24
C26
B25
B26
D27
W26
U26
HVREF0
HVREF1
HD54#
HD53#
D26
E27
R26
L20
HVREF2
HVREF3
HD52#
HD51#
B27
D28
HVREF4
HD50#
HD49#
C28
4
HNCVREF
HNCOMP
HPCOMP
AGPST0
AGPST2
AGPST1
GAD1
GAD0
GAD6
GAD5
GAD3
GAD4
GAD2
D22
C22
B22B6F7B5Y5W4V2W6V4U2V5U4R2T4R3T5P2R4N2R6L3L4K2L6J2J3K4J4J6H4G3H5F2G4E2G6E3F4D2F5E4B2E6
ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
AAD4
HCOMP_P
HCOMP_N
HCOMPVREF_N
AAD5
GAD7
AAD6
GAD8
AAD7
GAD9
AAD8
GAD10
AAD9
GAD11
AAD10
AAD11
GAD12
AAD12
GAD13
GAD14
AAD13
AAD14
GAD15
AAD15
GAD16
GAD17
AAD16
AAD17
GAD18
AAD18
GAD19
GAD20
AAD19
AAD20
GAD21
GAD22
AAD21
AAD22
GAD23
GAD24
AAD23
AAD24
GAD25
GAD26
AAD25
AAD26
GAD27
GAD28
AAD27
AAD28
GAD29
GAD30
AAD29
AAD30
GAD31
AAD31
PSBA6
PSBA7
SBA7
AGP
SIS648-1
HD48#
HD47#
HD46#
HD45#
HD44#
HD43#
HD42#
HD41#
HD40#
HD39#
HD38#
HD37#
HD36#
HD35#
HD34#
HD33#
HD32#
HD31#
HD30#
HD29#
HD28#
HD27#
HD26#
HD25#
HD24#
HD23#
HD22#
HD21#
HD20#
HD19#
HD18#
HD17#
HD16#
HD15#
HD14#
HD13#
HD12#
HD11#
HD10#
HD9#
HD8#
B28
E29
F28
B29
C30
B30
B31
C32
D29
C33
B33
B35
D32
B34
E31
D31
D33
D35
G31
C35
F33
E33
D34
E35
F32
J34
G34
H35
F35
J33
J31
G35
H33
J35
K32
N33
K33
L31
L33
K35
L35
M35
3
GAD[0..31] 11
PSBA4
PSBA5
PSBA3
SBA6
SBA5
SBA4
SBA3
HD7#
HD6#
HD5#
HD4#
M33
P32
P33
PSBA2
L34
PSBA1
SBA2
HD3#
N34
PSBA0
SBA1
HD2#
B3
N35
SBA0
HD1#
P35
AC/BE3#
AC/BE2#
AC/BE1#
AC/BE0#
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
WBF#
AGP8XDET#
ADBIH/PIPE#
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGPCLK
AGPCOMP_P
AGPCOMP_N
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN3#
HDSTBN2#
HDSTBN1#
HDSTBN0#
HDSTBP3#
HDSTBP2#
HDSTBP1#
HDSTBP0#
HD0#
DBI3#
DBI2#
F26
B32
E34
RBF#
DBI1#
DBI0#
R31
GC/BE#3
K5
GC/BE#2
M5
GC/BE#1
P4
GC/BE#0
U6
GREQ#
C6
GGNT#
E8
GFRAME#
N6
GIRDY#
M4
GTRDY#
N4
GDEVSEL#
L2
GSERR#
P5
GSTOP#
M2
GPAR
N3
RBF#
D7
WBF#
B4
8X_DET
C7
DBIH
C4
DBIL
D6
R199 10
C2
R202 10
D3
R224 10
T2
R226 10
U3
R208 10
G2
R210 10
H2
D8
R229 44.2_1%
W2
R232 49.9_1%
Y2
B8
C8
A7
B7
W3
Y4
HDSTB#3
D24
HDSTB#2
F30
HDSTB#1
G33
HDSTB#0
N31
HDSTB3
E25
HDSTB2
D30
HDSTB1
H32
HDSTB0
M32
PSBA0
PSBA1
PSBA2
PSBA6
PSBA5
PSBA7
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
RN17 10_8P4R
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN19 10_8P4R
GC/BE#[0..3] 11
GREQ# 11
GGNT# 11
GFRAME# 11
GIRDY# 11
GTRDY# 11
GDEVSEL# 11
GSERR# 11
GSTOP# 11
GPAR 11
RBF# 11
WBF# 11
8X_DET 11
DBIH 11
DBIL 11
SBSTB
SBSTB#
ADSTB0
ADSTB#0
ADSTB1
ADSTB#1
AGPCLK0 5
VDDQ
VREF4X_IN 11
HDSTB#3 3
HDSTB#2 3
HDSTB#1 3
HDSTB#0 3
HDSTB3 3
HDSTB2 3
HDSTB1 3
HDSTB0 3
2
SBA0
SBA1
SBA3 PSBA3
SBA2
SBA4 PSBA4
SBA6
SBA5
SBA7
SBSTB 11
SBSTB# 11
ADSTB0 11
ADSTB#0 11
ADSTB1 11
ADSTB#1 11
AGP3.0 = 50 ohm
SBA[0..7] 11
VCC3
L47
X_80_L
C1XAVDD
CB44
C228
0.1u
103P
C1XAVSS
L48
X_80_L
VCC3 VCC3
L46
X_80_L
C218
103P
L45
X_80_L
Closed to SIS648
1
VCC3
CP25
X_COPPER
CP26
X_COPPER
CP24
X_COPPER
C4XAVDD A4XAVDD
CB41
0.1u
C4XAVSS
CP23
X_COPPER
L40
X_80_L
C172
103P
L41
X_80_L
L42
X_80_L
C173
103P
L43
X_80_L
CP17
X_COPPER
A1XAVDD PWRGD_CPU
CB26
0.1u
A1XAVSS
CP18
X_COPPER
CP19
X_COPPER
CB25
0.1u
A4XAVSS
CP21
X_COPPER
HD#47
HD#46
HD#45
HD#44
HD#42
HD#43
HD#41
4
HD#39
HD#40
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#59
HD#63
HD#58
HD#[0..63] 3
A A
5
HD#56
HD#51
HD#52
HD#50
HD#48
HD#49
HD#53
HD#54
HD#60
HD#57
HD#62
HD#61
HD#55
HD#23
HD#22
HD#24
C174
103P
C175
0.1u
HD#20
HD#21
HD#18
HD#19
HD#16
HD#17
C161
103P
HD#14
HD#15
NB_VREF
HD#26
HD#28
HD#27
HD#25
HD#29
VCCP VCCP
R175
75_1%
R171
150_1%
HD#13
HD#12
HD#10
HD#11
HD#7
HDBI#0
HDBI#3
HDBI#1
HDBI#2
HDBI#[0..3] 3
R176
C169
103P
150_1%
HNCVREF
R177
C176
103P
75_1%
3
VCCP
R172 20_1%
R186 113_1%
HNCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
HPCOMP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
2
MSI
Title
SiS648-Host & AGP
Size Document Number Rev
Date: Sheet
MICRO-STAR
MS-6703T7
1
62 6 Thursday, August 01, 2002
of
0C
HD#6
HD#8
HD#9
HD#5
HD#3
HD#4
HD#0
HD#2
HD#1
5
RMD1 MD1
RMD5 MD5
RMD4 MD4
RMD0 MD0
RMD3
RMD7
RMD6
D D
RMD2 MD2
RMD13 MD13
RMD12 MD12
RMD9 MD9
RMD8 MD8
RMD11 MD11
RMD10 MD10
RMD15 MD15
RMD14 MD14
RMD21 MD21
RMD17 MD17
RMD16 MD16
RMD20 MD20
RMD23 MD23
RMD19 MD19
RMD22 MD22
RMD18 MD18
RMD25 MD25
RMD29 MD29
RMD28 MD28
RMD24 MD24
RMD31 MD31
RMD27 MD27
RMD30 MD30
RMD26 MD26
RMD37 MD37
RMD33 MD33
RMD36 MD36
RMD32 MD32
RMD35 MD35
C C
RMD39 MD39
RMD38 MD38
RMD34 MD34
RMD41 MD41
RMD45 MD45
RMD44 MD44
RMD40 MD40
RMD47 MD47
RMD46 MD46
RMD43 MD43
RMD42 MD42
RMD51 MD51
RMD50 MD50
RMD55 MD55
RMD54 MD54
RMD53 MD53
RMD52 MD52
RMD49 MD49
RMD48 MD48
RMD57 MD57
RMD61 MD61
RMD56 MD56
RMD60 MD60
RMD59 MD59
RMD58
RMD63
RMD62 MD62
B B
RDQS2 DQS2
RDQS4 DQS4
RDQS6 DQS6
RN42
1 2
3 4
5 6
10_8P4R
7 8
RN41
1 2
3 4
5 6
10_8P4R
7 8
RN40
1 2
3 4
5 6
10_8P4R
7 8
RN31
1 2
3 4
5 6
10_8P4R
7 8
RN29
1 2
3 4
5 6
10_8P4R
7 8
RN39
1 2
3 4
5 6
10_8P4R
7 8
RN38
1 2
3 4
5 6
10_8P4R
7 8
RN45
1 2
3 4
5 6
10_8P4R
7 8
RN37
1 2
3 4
5 6
10_8P4R
7 8
RN44
1 2
3 4
5 6
10_8P4R
7 8
RN43
1 2
3 4
5 6
10_8P4R
7 8
RN36
1 2
3 4
5 6
10_8P4R
7 8
RN34
1 2
3 4
5 6
10_8P4R
7 8
RN35
1 2
3 4
5 6
10_8P4R
7 8
RN33
1 2
3 4
5 6
10_8P4R
7 8
1 2
3 4
RN32
5 6
10_8P4R
7 8
R355 10
R343 10
R354 10
R339 10
R352 10
R350 10
R348 10
R346 10
RDQM0
RDQM1
RDQM2 DQM2
RDQM3
RDQM4
RDQM5 DQM5
RDQM6
RDQM7
R356 10
R342 10
R353 10
R364 10
R351 10
R331 10
R349 10
R347 10
DQM0
DQM1
DQM3
DQM4
DQM6
DQM7
MD3
MD7
MD6
MD58
MD63
DQS0 RDQS0
DQS1 RDQS1
DQS3 RDQS3
DQS5 RDQS5
DQS7 RDQS7
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7
AN35
AP36
AK33
AM33
AN34
AK32
AR34
AN33
AR35
AP34
AM32
AL31
AR31
AL30
AN32
AR33
AN31
AM31
AR32
AP32
AP30
AR30
AM29
AL27
AN30
AN29
AL28
AN28
AL29
AR29
AP26
AN25
AR24
AL24
AL25
AR26
AM25
AN24
AP24
AR25
AN21
AP20
AN20
AL18
AM21
AR21
AL19
AM19
AL20
AR20
AL15
AL14
AN15
AR15
AN16
AM15
AN14
AL13
AP16
AR16
AM13
AL12
AL11
AR12
AP14
AR14
AN13
AP12
AN12
AR13
AL10
AR11
AM9
AR9
AM11
AN11
AP10
AN9
AN10
AR10
4
VDDQ
AA1
AA2
AA3
AA4
VDDQ
VDDQ
VDDQ
SIS648-2
Memory
VSS
VSS
VSS
A22
A24
A26
A28
E15
E13
E11
U11B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB0#
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB1#
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB2#
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB3#
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB4#
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB5#
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB6#
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB7#
NC
NC
NC
AA5
VDDQ
VSS
A30
AA6
VDDQ
VSS
A32
AB1
VDDQ
VSS
A34
AB2
VDDQ
VSS
C23
AB3
VDDQ
VSS
C25
AB4
VDDQ
VSS
C27
AB5
VDDQ
VSS
C29
AB6
VDDQ
VSS
C31
AC1
VDDQ
VSS
C34
AC2
VDDQ
VSS
C36
AC3
VDDQ
VSS
E22
AC4
VDDQ
VSS
E24
AC5
AC6
L11
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MA10
MA11
MA12
MA13
MA14
MA15
SRAS#
SCAS#
SWE#
CS0#
CS1#
CS2#
CS3#
CS4#
CS5#
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
FWDSDCLKO
SDRCLKI
DLLAVDD
DLLAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
DDRCOMP_P
DDRCOMP_N
VSS
VSS
VSS
VSS
SIS648
E26
E28
E30
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
NC
NC
NC
NC
NC
NC
NC NC
3
L12
L13
M11
M12
M13
M14
M15
M16
N11
N12
P12
R12
T12
U12
V12
AR23
AN23
AN22
AM23
AL23
AL26
AN26
AN27
AR27
AR28
AP22
AN18
AR22
AP28
AM27
AL33
SRAS# RSRAS#
AL17
SCAS# RSCAS#
AR19
SWE# RSWE#
AN19
AM17
AL16
AN17
AR17
AP18
AR18
AP4
AT3
AR3
AP3
AR2
AN4
R267 22
AP2
R263 22
AL21
C240 10p
AL22
DLLAVDD
AL35
DLLAVSS
AL34
DDRAVDD
AM35
DDRAVSS
AN36
DDRVREFA
AF16
DDRVREFB
AF23
R266 X_4.7K
AP1
R265 40.2_1%
AR8
R264 40.2_1%
AP8
D4
D5
AM5
AM34
A15
C12
C14 C16
R335 0
MA1
R361 0
MA2
R362 0
MA3
R338 0
MA4
R363 0
MA5
MA6
MA7
MA8
MA9
MA10 RMA10
R360
MA11 RMA11
R344 0
MA12 RMA12
R337 0
MA13
MA14
MA15
R359 0
R332 0
R336 0
CS-0
CS-1 RCS-2
CS-2
CS-3
CKE0
CKE1
CKE2
CKE3
S3AUXSW#
FWDSDCLKO
VCCM
0
R358 0
RN26
0_8P4R
S3AUXSW# 23
FWDSDCLKO 5
7 8
5 6
3 4
1 2
RMA0 MA0
RMA1
RMA2
RMA3
RMA4
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..15]
RCS-[0..3]
CKE[0..3]
RCS-0
RCS-1
RCS-3
RSRAS# 9,10
RSCAS# 9,10
RSWE# 9,10
RMD[0..63] 9,10
RDQM[0..7] 9,10
RDQS[0..7] 9,10
RMA[0..15] 9,10
RCS-[0..3] 9,10
CKE[0..3] 9
2
C247
103P
C246
103P
CP27
DLLAVDD
CB49
0.1u
DLLAVSS
CP32
DDRVREFA
RN27
0_8P4R
RN28
0_8P4R
R334 0
X_COPPER
CB50
10u-0805
X_COPPER
CB52
1u-0805
MA7
MA8
MA5
MA6
MA14
MA13
MA9
MA15 RMA15
VCC3 VCC3
L49
X_80_L
C232
103P
L54
X_80_L
R286
150_1%
R288
150_1%
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
R287
150_1%
R289
150_1%
1
RMA7
RMA8
RMA5
RMA6
RMA14
RMA13
RMA9
CP33
L55
X_COPPER
X_80_L
DDRAVDD
CB58
C241
0.1u
103P
DDRAVSS
L56
CP34
X_COPPER
X_80_L
VCCM VCCM
C248
103P
DDRVREFB
C249
103P
CKE adj Offset 9A Bit 5 : 7
Place these capacitors under SIS648 solder side
VCC1_8
A A
VCCM
C209
0.1u
C276
0.1u
C211
0.1u
C289
0.1u
C212
0.1u
C277
0.1u
5
C304
1u
C283
0.1u
C282
1u
VCCP
C2501uC239
10u-0805
C177
0.1u
10u-0805
1u-0805
C236
C163
C171
0.1u
C153
10u-1206
VDDQ
C210
0.1u
C207
1u-0805
C186
C185
0.1u
0.1u
4
VCCP
VCCM VCC1_8
C362
C364
1u_B
C377
1u_B
C366
1u_B
C378
1u_B
1u_B
C376
1u_B
3
C370
1u_B
C374
1u_B
VDDQ
1u_B
C363
1u_B
C367
1u_B
C368
1u_B
C373
C369
C372
1u_B
1u_B
2
MSI
Title
SiS648-Memory
Size Document Number Rev
Date: Sheet
MICRO-STAR
MS-6703T7
1
72 6 Thursday, August 01, 2002
0C
of
5
VCCP
A17
A18
A19
A20
A21
B17
B18
B19
B20
B21
C17
C18
C19
C20
C21
D17
D18
D19
D20
D21
E17
E18
E19
E20
E21
F17
F18
F19
F20
F21
L25
L26
M18
M19
W15
VTT
VSS
W16
VTT
VSS
W17
VTT
VSS
W18
VTT
VSS
W19
VTT
VSS
W20
VTT
VSS
M20
VTT
VSS
W21
VCCM
D D
C C
B B
A A
AM6
AM7
AM8
AN5
AN6
AN7
AN8
AP5
AP6
AP7
AR4
AR5
AR6
AR7
AB24
AC13
AD14
AD16
AD18
AD20
AD22
AB25
AC25
AD12
AD25
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AE26
AF11
AF12
AF25
AF26
U11D
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
AA18
VSS
VSS
AA19
VSS
AA20
VSS
AA21
VSS
AA22
VTT
VSS
VSS
V23
W14
AL8
VDDM
AL9
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
AT4
VDDM
AT5
VDDM
AT6
VDDM
AT7
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
P14
VSS
P15
VSS
P16
VSS
P17
VSS
P18
VSS
P19
VSS
P20
VSS
P21
VSS
P22
VSS
P23
VSS
R14
VSS
R15
VSS
R16
VSS
R17
VSS
R18
VSS
R19
VSS
R20
VSS
R21
VSS
R22
VSS
R23
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
T18
VSS
T19
VSS
T20
VSS
T21
VSS
T22
VSS
T23
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
U18
VSS
U19
VSS
U20
VSS
U21
VSS
U22
VSS
U23
VSS
V14
VSS
V15
VSS
V16
VSS
V17
VSS
V18
VSS
V19
VSS
V20
VSS
V21
VSS
V22
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT24
AT26
AT28
AT30
AT32
AT34
AL32
Y14
Y15
5
SIS648-3
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
AA14
AA15
VSS
AA16
VSS
AA17
M21
W22
VTT
VSS
M22
W23
VTT
VSS
M23
VTT
VSS
AC32
M24
VTT
VSS
AC36
M25
VTT
VSS
AD34
M26
VTT
VSS
AE32
N25
AE36
4
VTT
VSS
4
P25
AF34
VTT
VSS
R25
VTT
VSS
AG32
T25
VTT
VSS
AG36
U25
VTT
VSS
AH34
V25
AJ32
VTT
VSS
W25
VTT
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VDD3.3
AUX1.8
AUX3.3
Y25
VTT
VDDZ VDDM
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA25
VTT
SIS648
AD3 AL7
AE1
AF3
AG1
AH3
AJ1
AK3
AM3
W11
W12
Y11
Y12
AA12
A9
C10
L17
M17
N17
AB12
AC12
AA23
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
E32
E36
F34
G32
G36
H34
J32
J36
K34
L32
L36
M34
N32
N36
P34
R32
R36
T34
U32
U36
V34
W32
W36
Y34
AA32
AA36
AB34
AM10
AM12
AM14
AM16
AM18
AM20
AM22
AM24
AM26
AM28
AM30
AP9
AP11
AP13
AP15
AP17
AP19
AP21
AP23
AP25
AP27
AP29
AP31
AP33
AP35
AT8
AT10
AT12
AT14
AT16
AT18
AT20
AT22
3
VCC1_8
ZCLK0 5
ZUREQ 12
ZDREQ 12
ZSTB0 12
ZSTB-0 12
ZSTB1 12
ZSTB-1 12
VCC3
VCC1_8SBY
VCC3SBY
ZAD[0..16] 12
VCC3
C157
0.1u
C140
0.1u
C220
1u
C152
1u-0805
VCC1_8SBY
C221
0.1u
VCC3SBY
C271
0.1u
Closed to SIS648
VCC3 VCC1_8SBY VCC3SBY
C365
C375
1u_B
C371
1u_B
1u_B
Place under 648 solder side
3
ZUREQ
ZDREQ
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
VCC1_8
AL6
AL4
AK5
AJ2
AJ3
AE3
AF2
AH5
AK2
AJ4
AJ6
AH2
AH4
AG3
AG6
AF4
AG2
AF5
AG4
AD2
AE6
AE2
AE4
AL3
AK4
AD5
AD4
AN1
AM2
AL2
AL1
2
N13
N14
N16
N18
N19
N20
N21
N22
N23
N24
P13
P24
R24
T13
T24
U24
V13
V24
W13
W24
Y13
IVDD
IVDD
VSS
VSS
VCC1_8
VCC1_8
IVDD
IVDD
VSS
VSS
L51
X_80_L
C229
0.1u
L50
X_80_L
R290
150_1%
R291
49.9_1%
2
IVDD
VSS
Y24
IVDD
VSS
U11C
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
ZCLK
ZUREQ
ZDREQ
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCOMP_N
ZCOMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CP31
X_COPPER
Z4XAVDD
CB48
0.1u
Z4XAVSS
CP30
X_COPPER
CP35
X_COPPER
Z1XAVDD
CB60
0.1u
Z1XAVSS
CP36
X_COPPER
VSS
SIS648
A3A5C1C3C5E1E5E7E9F3G1G5H3J1J5K3L1L5M3N1N5P3R1R5T3U1U5V3W1W5Y3
VCC3
L53
X_80_L
C216
0.1u
L52
X_80_L
VCC3
L57
X_80_L
C225
0.1u
L58
X_80_L
IVDD
SIS648-4
HyperZip
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA24
AB13
AC24
AD13
AD15
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VSS
VSS
VSS
VSS
VSS
VSS
CP29
X_COPPER
R245 56.2_1%
CB47
0.1u
R244 56.2_1%
CP28
X_COPPER
C244
0.1u
ZVREF
C243
0.1u
AD17
IVDD
VSS
AD19
IVDD
VSS
1
AD21
AD23
AD24
N15
R13
U13
AA13
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
B11
NC
B12
NC
B13
NC
B14
NC
B15
NC
B16
NC
C11
NC
C13
NC
C15
NC
D11
NC
D12
NC
D13
NC
D14
NC
D15
NC
D16
NC
E12
NC
E14
NC
E16
NC
F11
NC
F13
NC
F15
NC
A11
NC
A13
NC
AUXOK
VSS
VSS
VSS
AE5
PCIRST#
TESTMODE0
TESTMODE1
TESTMODE2
VSS
VSS
VSS
AG5
AJ5
AL5
AN3
AUXOK
PWROK
ENTEST
DLLEN#
TRAP0
TRAP1
NBPWRGD
AM4
PCIRST1#
AN2
R187 4.7K
D9
E10
B10
B9
C9
D10
R174 X_4.7K
F9
TRAP1 MuTIOL 1G I/O Type Selection I
External pull-up 1 : full-swing mode
Internal pull-down 0 : partial-swing mode
AUXOK 13
NBPWRGD 24
PCIRST1# 19,20,24
VCC3
closed to SIS648
C245 X_0.1u
AUXOK
C255 X_0.1u
NBPWRGD
ZCMP_N
ZCMP_P
MSI
Title
SiS648-Power & HyperZip
Size Document Number Rev
Date: Sheet
MICRO-STAR
MS-6703T7
1
82 6 Thursday, August 01, 2002
0C
of