MSI MS-6555 Schematics

Cover Sheet
Block Diagram
Clock ICS950218AF & ATA100 IDE CONNECTORS
mPGA478-B INTEL CPU Sockets
INTEL Brookdale-G GMCH -- North Bridge
INTEL ICH4 -- South Bridge

1
2

3
4 - 5
6 - 8
9-10

MS-6555

Version 1.0

INTEL (R) Brookdale-G Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics

CPU:

Willamette/Northwood mPGA-478B Processor

LPC I/O -- W83627HF
AC'97 Codec / Audio Jack / Front Audio Connector
Audio Amplifier & CD Panel Play
DDR DIMM1&2 and DDR Terminator Resistor
AGP Slot
PCI SLOT 1 & 2 & 3
Floppy, KB/MS, Com/Printer Ports
USB Connectors
Front Panel , ATX Connectors & 1.5V Regulators
FWH & CNR Riser
VRM 9.0 Regulator (CPU Power)
SMBUS Isolation & FAN
Real Tek 8100BL LAN Controller
W83302D(MS5) ACPI Controller
VGA Connector

11

12

13

14-15

16

17

18

19

20

21

22

23

24

25

26

System Brookdale-G Chipset:

INTEL GMCH (North Bridge) +
INTEL ICH4 (South Bridge)

On Board Chipset:

BIOS -- FWH
AC'97 Codec -- ALC201A/650
LPC Super I/O -- W83627HF
Clock Generation -- ICS950218AF
LAN -- RealTek 8100BL

Expansion Slots:

AGP2.0 SLOT * 1
PCI2.2 SLOT * 3
CNR SLOT * 1

Last Schematic Update Date:

Tuesday, April 23, 2002

Title
Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Micro Star Restricted Secret

COVER SHEET

MS-6555

Last Revision Date:
Sheet

1 27

of

Rev

1.0

VCC12 Power
Supply CONN

AGP 4X (1.5V)
VGA CONN

IDE CONN 1&2

USB Port 0:1
USB Front Panel

USB Port 2:3
USB Front Panel

USB Port 4:5
USB Rear Panel

(100/133MHz)

VRM 9.2 Clock

4X (66MHz) AGP

ATA33/ATA66/ATA100

(48MHz)

LPC Bus

Winbond
LPC I/O
W83627HF

Willamette/Northwood
Socket (mPGA478-B)

Scalable Bus

GMCH: Graphic &
Memory

Controller HUB

HUB Interface

ICH4: I/O

Controller HUB

(33MHz)

FWH: Firmware HUB

Brookdale -G Chipset

(100/133MHz)

(200/266 MHz)

(14.318MHz)

PCI (33MHz)

PCI (33MHz)

AC Link

Generator

DDR DIMM1,2

PCI Slots 1:3

LAN Controller

AC '97 Audio

Codec

MIC In

Line In

Line Out

CD-ROM (Option)

Hardware
Monitor

PS2 Mouse &
Keyboard

Parallel (1)
Serial (2)

Floppy Disk
Drive

Model option table

Model type Function BOM Config ERP BOM No.

MS6555L2 For Legend (845G) Cfg6555L2-10-B 50/60 1-6555-01S

50/60 1-6555C-01SMS6555CL2 For Legend (845GL) Cfg6555CL2-10-B
MS6555 For SI & China OEM(G) Cfg6555-10-L
MS6555C For SI & China OEM(GL) Cfg6555C-10-L

50/60 1-6555-02S

50/60 1-6555C-02S

Title
Document Number

Micro Star Restricted Secret

BLOCK DIAGRAM

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-6555

Last Revision Date:

Sheet

Monday, March 25, 2002

2 27

of

Rev

1.0

VCC3

R30 1K

R35
220

R512 X_10K

FB1 80_0805

CB1

CB273

0.1u

4.7u-0805

filtering from 10K~1M

FB2 0_0805

CB7

CB275

0.1u

4.7u-0805

for good filtering from 10K~1M

Q1

2N3904S

CE

B

R513

B

X_220

VCC3

* Put GND copper under Clock Gen.
connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around
* put close to every power pin

it

Trace Width 7mils.

*

Same Group spacing 15mils

*

Different Group spacing 30mils

*

Differentical mode spacing 7mils on itself

*

VCC3

VCCP

VCC3

SKTOCC#(4)

CB274

0.1u

SMBCLK_ISO(11,14,21,23,25)

SMBDATA_ISO(11,14,21,23,25)

CE

Q2

X_NPN-3904LT1-S-SOT23

CLOCK GENERATOR BLOCK

CB2

0.1u

CB3

0.1u

CB4

0.1u

CB5

0.1u

CB6

0.1u

C24

0.01u

C26

0.01u

C27

0.01u

U1

39

CPU_VDD

36

CPU_GND

46

MREF_VDD

43

MREF_GND

29

3V66_GND

9

PCI_VDD

5

PCI_GND

18

PCI_VDD

13

PCI_GND

24

48_VDD

21

48_GND

2

REF_VDD

47

REF_GND

34

CORE_VDD

33

CORE_GND

26

SCLK

25

SDATA

19

VTT_GD#

ICS-ICS950218-SSOP48

VCC3V

VDDA3V

R39

X_1K

CPUCLK0

CPUCLK0#

CPUCLK1

CPUCLK1#

CPUCLK2

CPUCLK2#

3V66_03V66_VDD
3V66_1
3V66_2

3V66_48/SEL66_48#

FS2/PCI_F0
FS3/PCI_F1

SEL48_24#/PCI_F2

FS4/PCI0

FS0/48MHz

FS1/24_48MHz

MUL0/REF0
MUL1/REF1

RESET#

PWR_DN#

*Trace < 0.5"

CPU0

R2 27.4_1%

CPU0#

R4 27.4_1%

CPU1

R10 27.4_1%

CPU1# MCHCLK#

R12 27.4_1%

RMCH_66
RICH_66
RAGPCLK
SEL48_2

R589 47

FS2

R15 33

FS3
SEL48_1

FS4
RPCICLK1
RPCICLK2
RLAN_PCLK
RSIO_PCLK

RICH_PCLK

FS0

R26 33

FS1 DOT_CLK

R27 47

REF_14 ICH_14

R25 33

X1

C23 22P1 2

X1 14M-32pf-HC49S-D

X2

32pF

C25 22P

R28 475_1%

R860 22

PWR_DN#

PCI1
PCI2
PCI3
PCI4
PCI5
PCI6

IREF

41
40

38
37

45
44

3132
30
28
27

6
7
8

10
11
12
14
15
16
17

22
23

48
1

3

X1

4

X2

35
20

42

RN84

1 2
3 4
5 6
7 8

33

R16 33
R17 33

7 8

5 6

3 4

1 2

RN2 33

1 2

R590 33

CPUCLK
CPUCLK#

MCHCLK

MCH_66
ICH_66
AGPCLK

PCICLK0

PCICLK1
PCICLK2
LAN_PCLK
SIO_PCLK
FWH_PCLKRFWH_PCLK
ICH_PCLK

ICH_48

Iref = 2.32mA

FP_RST# (10,20,25)

VCC3V

CPUCLK (4)
CPUCLK# (4)

MCHCLK (6)
MCHCLK# (6)

MCH_66 (6)
ICH_66 (10)
AGPCLK (16)
SIO_48 (11)

PCICLK0 (17)

PCICLK1 (17)
PCICLK2 (17)
LAN_PCLK (24)
SIO_PCLK (11)
FWH_PCLK (21)
ICH_PCLK (9)

ICH_48 (10)
DOT_CLK (6)

ICH_14 (10)

Shut Source Termination Resistors

CPUCLK

R1 49.9_1%

CPUCLK#

R3 49.9_1%

MCHCLK

R5 49.9_1%

MCHCLK#

R7 49.9_1%

Trace less 0.2"

49.9ohm for 50ohm M/B impedance

CLOCK STRAPPING RESISTORS

RN75

8.2K

1 2
3 4
5 6
7 8

R740 10K

VCC3V

BSEL0 (4,6)

CPU (MHz)
100 MHz
133 MHz

VCC3

VCC3V

R18 1.5K

DOT_CLK

R22 8.2K

FS4 FS3 FS2 FS1 FS0

1 1 1 0 1
1 1 1 1 1

SMBCLK_ISO
SMBDATA_ISO

SEL48_2

REF_14

MULTSEL0=0 -> 6X Iref
MULTSEL0=1 -> 7X Iref

FS4
SEL48_1
FS3
FS2

FS0

R29 2.7K
R32 2.7K

R741 10K

R742 10K

Pull-Down Capacitors

CPUCLK
CPUCLK#
MCHCLK
MCHCLK#

AGPCLK
ICH_66
MCH_66

PCICLK0
PCICLK1
PCICLK2

LAN_PCLK
SIO_PCLK
FWH_PCLK
ICH_PCLK

SIO_48
ICH_48
DOT_CLK

ICH_14

used only for EMI issue

X_10pC1
X_10pC2
X_10pC3
X_10pC4

CN10 X_8P4C-10P

2
4
6
8

X_10pC13
X_10pC14
X_10pC15

CN11 X_8P4C-10P

2
4
6
8

Trace less 0.2"

1
3
5
7

1
3
5
7

X_10pC376
10pC20
X_10pC21
X_10pC16

PRIMARY IDE BLOCK SECONDARY IDE BLOCK

IDE1

HD_RST#1

PDD[0..7](10)

PD_DREQ(10)

PD_IOW#(10)

PD_IOR#(10)
PD_IORDY(10)
PD_DACK#(10)

IRQ14(9)

PD_A1(10)

PD_CS#1(10) PD_CS#3 (10)

PD_LED(20)

Modify

HD_RST#(25)

PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

R47

4.7K

R157 L2_10K R158 L2_120KST

+12V

HD_RST# HD_RST#1 HD_RST#2

HD_RST#1R

R43 33 R44 33

C29
220p

G

Q9 L2_2N7002

R216 0 R217 0

CN-BH-D2x20-1:21-BL-ZBT-S1

1
3 4
5 6
7 8
91110

13 14
17 18

19
21
23
25
27
29
31
33
35
37

R48
10K

DS

2

12
1615

22
24
26
28
30
32
34
36
38
4039

RST_GATE

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

C30
X_4700p

ATA100 IDE CONNECTORS

PDD[8..15] (10)

* Trace Width : 5mils
* Trace Spacing : 7mils
* Length(longest)-Length(shortest)<0.5"
* Trace Length less than 6"

PD_DET (21)
PD_A2 (10)PD_A0(10)

R743

15K

1 2

G

Q10 L2_2N7002

DS

Only for CD-Play in S5 state
function (Legend)

IDE2

R50
10K

D2x20-1:21-WH-SBT

1

2

SDD8
SDD9
SDD10
SDD11
SDD12

12

SDD13
SDD14

1615

SDD15

22
24
26
28
30
32
34
36
38
4039

C32
X_4700p

R744

15K

VCC3VCC5 VCC5VCC3

3 4
5 6
7 8

91110
13 14
17 18

19
21
23
25
27
29
31
33
35
37

Micro Star Restricted Secret

Clock & IDE Conn.

HD_RST#2

SDD[0..7](10)

SD_DREQ(10)

SD_IOW#(10)

SD_IOR#(10)
SD_IORDY(10)
SD_DACK#(10)

IRQ15(9)
SD_A1(10)
SD_A0(10)

SD_CS#1(10) SD_CS#3 (10)

SD_LED(20)

SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

R49

4.7K

C31
220p

HD_RST#2R

Title
Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

SD_DET (21)
SD_A2 (10)

MS-6555

Last Revision Date:
Sheet

SDD[8..15] (10)

Monday, April 22, 2002

3 27

of

Rev

1.0

CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK

HA#[3..31](6)

VID[0..4] (11,22)

HA#8

HA#22

HA#25

HA#23

HA#26

HA#27

HA#28

HA#30

HA#29

HA#31

DBI0#
DBI1#
DBI2#
DBI3#

IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#

RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6

BSEL0
BSEL1

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D53#

V22

U21

AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2

A35#

A34#

A33#

A32#

A31#

A30#

A29#

A28#

A27#

A26#

D52#

D51#

D50#

D49#

D48#

D47#

D46#

D45#

D44#

D43#

D42#

D41#

V25

U23

U24

U26

T23

T22

T25

T26

R24

R25

P24

R21

CPU1A

HINV#[0..3](6)

FERR#(9)

STPCLK#(9)

HINIT#(9)

HDBSY#(6)

HDRDY#(6)

HTRDY#(6)

HADS#(6)

HLOCK#(6)

HBNR#(6)

HITM#(6)

HBPRI#(6)

HDEFER#(6)

CPU_TMPA(11)

VTIN_GND(11)

TRMTRIP#(9)
SKTOCC#(3)
PROCHOT#(10)

IGNNE#(9)

HSMI#(9)
A20M#(9)

SLP#(9)

BSEL0(3,6)

CPU_GD(10)

CPURST#(6)

HD#[0..63](6)

HINV#0
HINV#1
HINV#2
HINV#3

HINIT#

HIT#(6)

ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK

TRMTRIP#
SKTOCC#

CPU_GD
CPURST#
HD#63

HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54

AF26

AB26

AE21
AF24
AF25

AB23
AB25
AA24

AA22
AA25

E21

G25

P26
V21

AC3

V6
B6
Y4

AA3

W5

AB2

H5
H2

J6

G1
G4
G2

F3
E3
D2
E2

C1
D5
F7
E6
D4
B3
C4
A2

C3
B2
B5
C6

A22

A7
AD2
AD3

AD6
AD5

Y21
Y24
Y23

W25

Y26

W26

V24

HA#24

A25#

D40#

N25

A24#

D39#

N26

A23#

D38#

M26

HA#21

A22#

D37#

N23

HA#20

A21#

D36#

M24

HA#19

A20#

D35#

P21

HA#18

A19#

D34#

N22

HA#17

A18#

D33#

M23

HA#16

A17#

D32#

H25

A16#

D31#

HA#15

K23

HA#14

A15#

D30#

J24

HA#13

A14#

D29#

L22

HA#12

A13#

D28#

M21

HA#11

A12#

D27#

H24

HA#10

A11#

D26#

G26

HA#9

A10#

D25#

L21

A9#

D24#

D26

HA#7

A8#

D23#

F26

HA#6

A7#

D22#

E25

HA#5

A6#

D21#

F24

HA#4

A5#

D20#

F23

HA#3

A4#

D19#

G23

A3#

D18#

E24

AE25A5A4

D17#

D16#

H22

D25

DBR#

VCC_SENSE

D15#

D14#

D13#

J21

D23

C26

AD26

AC26

ITP_CLK1

ITP_CLK0

VSS_SENSE

D12#

D11#

D10#

D9#

D8#

H21

G22

B25

C24

C23

D7#

VID4

AE1

B24

VID3

AE2

VID4#

VID3#

D6#

D5#

D22

VID2

AE3

C21

VID1

AE4

VID2#

D4#

A25

VID0

AE5

VID1#

VID0#

GTLREF3
GTLREF2
GTLREF1
GTLREF0

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI12
TESTHI11
TESTHI10

TESTHI9

TESTHI8
ITPCLKOUT1
ITPCLKOUT0

TESTHI5

TESTHI4

TESTHI3

TESTHI2

TESTHI1

TESTHI0

BCLK1#
BCLK0#

COMP1
COMP0

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

D3#

D2#

D1#

D0#

A23

B22

B21

RS2#
RS1#
RS0#

AP1#
AP0#
BR0#

DP3#
DP2#
DP1#
DP0#

SOCKET478

AA21
AA6
F20
F6

AB4
AA5
Y6
AC4
AB5
AC6

H3
J3
J4
K5
J1

AD25

R59 49.9_1%

A6

R60 49.9_1%

Y3

R61 49.9_1%

W4

R62 49.9_1%

U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24

AF23
AF22

F4
G5
F1

V5
AC1
H6

R64 51.1_1%

P1

R65 51.1_1%

L24
L25

K26
K25
J26

R5
L5
W23
P23
J23
F21
W22
R22
K22
E22

E5
D1

GTLREF1

BPM#5
BPM#4
BPM#3
BPM#2

HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0

R592 1K

HRS#2
HRS#1
HRS#0

HREQ#[0..4] (6)

VCCP

VCCP

CPUCLK# (3)
CPUCLK (3)

HRS#[0..2] (6)

HBR#0 (6)

* Short trace

HADSTB#1 (6)
HADSTB#0 (6)
HDSTBP#3 (6)
HDSTBP#2 (6)
HDSTBP#1 (6)
HDSTBP#0 (6)
HDSTBN#3 (6)
HDSTBN#2 (6)
HDSTBN#1 (6)
HDSTBN#0 (6)

NMI (9)
INTR (9)

GTLREF1

2/3*Vccp

Every pin put one 220pF cap near it.
Trace Width 7mils, Space 10mils.
Keep the voltage divider within

1.5" of the GETREF pin.

CPU ITP BLOCK

ITP_TDI
ITP_TRST#

ITP_TMS

R74 39

ITP_TDO

R76 75_1%

ITP_TCK

R77 27.4_1%

C34 C35
220p

R79 150
R83 680

1u-0805

VCCP

R54

49.9_1%

R55
100_1%

VCCP

VCCP

BPM#4
BPM#5
BPM#2
BPM#3

HD#53

HD#48

HD#51

HD#50

HD#49

HD#52

R82 49.9_1%
R85 49.9_1%
R87 49.9_1%
R88 49.9_1%

HD#41

HD#45

HD#39

HD#42

HD#44

HD#43

HD#34

HD#37

HD#35

HD#38

HD#36

HD#40

HD#47

HD#46

CPU STRAPPING RESISTORS

VCCP

HD#32

HD#29

HD#26

HD#30

HD#28

HD#31

HD#33

HD#27

ALL COMPONENTS CLOSE TO CPU

PROCHOT#
CPU_GD
HBR#0
CPURST#
HINIT#

HD#25

HD#23

HD#24

HD#19

HD#22

HD#20

HD#18

HD#21

HD#17

R78 X_62
R80 300
R81 150
R84 49.9_1%
R86 X_300

HD#5

HD#8

HD#7

HD#9

HD#10

HD#14

HD#16

HD#15

HD#11

HD#12

HD#13

HD#0

HD#2

HD#4

HD#3

HD#1

HD#6

ALL COMPONENTS CLOSE TO CPU

Micro Star Restricted Secret

mPGA478-B Intel CPU Socket Part 1

MS-6555

Last Revision Date:

Monday, April 22, 2002

Sheet

4 27

of

Rev

1.0

VCCP

Title
Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

AA11
AA13
AA15
AA17
AA19
AA23
AA26

AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24

AC11
AC13
AC15
AC17
AC19

AC22
AC25

CPU VOLTAGE BLOCK

AE23

AF3

VCC-IOPLL

VCC-VIDPRG

VSS

VSS

VSS

VSS

J22

J25J5K21

AD20

VCCA

VCC_IOPLL

VSSA

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VCCA

AD22

Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24

VCCP

A10

A12

A14

A16

A18

A20A8AA10

AA12

AA14

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19B7B9

C10

C12

C14

C16

C18

C20C8D11

D13

D15

D17

D19D7D9

E10

E12

E14

E16

E18

E20E8F11

F13

F15

F17

F19

AF4

VCC

VSS

VCC

VSS

G21G6G24

VCC

VCC

VSS

VSS

G3H1H23

VCC

VSS

VCC

VSS

F9

VCC

VSS

VCC

VSS

H26H4J2

VCC-VID

VSS

VSS

VSS

CPU1B

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VSS

F14

VSS

F16

VSS

VSS

F18F2F22

VSS

VSS

F25F5F8

VCC

VSS

D10

VSS

A11

VSS

A13

VSS

A15

VSS

A17

VSS

A19

VSS

A21

VSS

A24

VSS

A26

VSS

A3

VSS

A9

VSS

AA1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AA4

VSS

AA7

VSS

AA9

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AB3

VSS

AB6

VSS

AB8

VSS
VSS
VSS
VSS
VSS
VSS

AC2

VSS
VSS
VSS

AC5

VSS

AC7

VSS

AC9

VSS

AD1

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AD10

AD12

AD14

AD16

AD18

AD21

AD4

AD23

AD8

AE11

AE13

AE15

AE17

AE19

AE22

AE24

AE26

AE7

AE9

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF6

AF8

B10

B12

B14

B16

B18

B23

B20

B26B4B8

C11

C13

C15

C17C2C19

C22

C25C5C7C9D12

D14

D16

D18

D20

D21D3D24D6D8E1E11

E13

E15

E17

E19

E23

E26

E7E9F10

E4

F12

C39
22u-1206

VSSA

SOCKET478

VCC_VID (25)

L23 4.7uH-10%
L24 4.7uH-10%

C40
22u-1206

Keep the 22uF cap within 0.6"
of the CPU pin.
Trace Width 12mils, Space 10mils.

VCCP

CB12
10u-1206
CB19
10u-1206
CB26
10u-1206
CB33
10u-1206
CB40
10u-1206
CB47
10u-1206
CB53
10u-1206

Place 14 pcs 1206 size cap
north side of processor

CB14
10u-1206
CB15
10u-1206
CB29
10u-1206
CB28
10u-1206
CB22
10u-1206

VCCPVCCP VCCP

PLACE CAPS WITHIN CPU CAVITY

CB21
10u-1206
CB36
10u-1206
CB35
10u-1206
CB50
10u-1206
CB49
10u-1206

CPU DECOUPLING CAPACITORS

VCCPVCCP

Place these caps on south
side of processor

CB39
10u-0805
CB46
10u-0805
CB52
10u-0805
CB57
10u-0805
CB60
10u-0805
CB58
10u-0805

VCCP

CB17

0.1u
CB24

0.1u
CB31

0.1u
CB38

0.1u CB44
CB45

0.1u

CB16

0.1u
CB23

0.1u
CB30

0.1u
CB37

0.1u

0.1u
CB51

0.1u

Title

Micro Star Restricted Secret

mPGA478-B Intel CPU Socket Part 2

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-6555

Last Revision Date:
Sheet

Monday, April 22, 2002

5 27

of

Rev

1.0

Y28

T28

M28

K26

K22

K20

K18

AD28

HA#[3..31](4) HD#[0..63] (4)

* Length must be matched
within +/-0.1"of the Strobe
Signals

HREQ#[0..4](4)

HDEFER#(4)

HRS#[0..2](4)

HDRDY#(4)

HADSTB#0(4)
HADSTB#1(4)

HDSTBN#0(4)
HDSTBP#0(4)
HDSTBN#1(4)
HDSTBP#1(4)
HDSTBN#2(4)
HDSTBP#2(4)
HDSTBN#3(4)
HDSTBP#3(4)

HINV#[0..3](4)

MCHCLK(3)

MCHCLK#(3)

Trace 10 mils & 7mils space < 0.5"

HL[0..5](9)

3

2 1

CRT_B(26)
CRT_B#(26)

CRT_G(26)
CRT_G#(26)

CRT_R(26)
CRT_R#(26)

VCC_AGP

D1
BAV99

U4C

A3

VCC_AGP

A7
C1
D4
D6

G1

K6
L1
L9
P6
R1
R9

W9

V6

AD6
AC9

AC1
AE3

W19

Y19

AA19

W20

U21

W21

AA21

A9
B9
C9
D9

E9
B10
C10
D10
F10
H10
A11
B11
C11
D11
E11

G11

J11
B12
C12
D12
F12
H12

G13

J13
H14

J15

AA17

W18
W17

V19
U19

U17

AG2 AT20
AG1

A15
B14
A13

C14
B15

B6

Y3

Y2
AA2
AA4
AA3
AA5

W7

Y4

Y8
A37
AB2
AB3

POWER

VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP

VCC_AGP
VCC_AGP
VCC_HI

VCC_HI
VCC_HI

VCC_HI
VCC

VCC
VCC

VCC
VCC

VCC
VCC

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC
VCC

VCC
VCC

VCC
VCC

VCCA_SM VCCQ_SM
VCCA_SM

VCCA_DAC
VCCA_DAC
VCCA_DPLL

VSSA_DAC
VSSA_DAC
VCC_GPIO

PSBSEL
RSVD

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

Other

GND

GND

M10

T10

Y10

GND

AH16

GND

AH20

GND

GND

AH24

GND

AH28

GND

AF28

GND

AB28

V28

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB

VTTFSB

VCCA_FSB

VCCQ_SM
VCCQ_SM

VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP

GND

GND

GND

GND

P28

K24

K28

AH8
AK8
AG9
AJ9
AL9

AM22
AJ23
AL37
AU9
AK10

AJ11
AL11
AU25
AM26
AU13
AM14
AJ27
AJ1
AL1
AJ15
AP15
AU29
AH2
AJ2
AK2
AL2
AM30
AH3
AJ3
AK3
AL3
AH4
AJ4
AK4
AL4
AU17

AJ5
AL5
AU5
AM18
AJ19
AK32
AU33
AH6
AK6

AP20
AG7
AJ7
AL7
AP7

B18
C18
D18
H18
B19
C19
D19
E19
G19
J19
B20
C20
D20
F20
H20

F18
A17

AT21
AU21

G37
L37
R37
AC37
A31

A2

NC

A36

NC

AH34

NC

AJ35

NC

AT1

NC

AT37

NC

AU1

NC

AU2

NC

AU36

NC

AU37

NC

B1

NC

B37

NC

Brookdale_GMCH

GMCH REFERENCE BLOCK

VCCA_FSB

VCCA_DPLL

C46
470u

VCCA_SM

CB64

0.1u

VCCQ_SM

CB270

0.1u

VCCP

Place Cap. as Close as possible to
GMCH

VCCA_FSB

CB66 0.1u
CB67 0.1u
CB68 0.1u
CB69 0.1u
CB70 0.1u

Place <0.1"

Title
Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Place 0.01uF Cap. as Close as possible to
GMCH< 0.25"
Trace width 12 mils & 10mils space

Micro Star Restricted Secret

Brookdale-G GMCH Part 1 (Power,Host ,VGA & HUB)

L25 0.82uH

CB62

C284

0.1u

22u-1206

L26

+

CB63
X_0.1u

R605 1

10uH-0805

L27 1uH-0805

CT10

+

100u_16V

L28 0.68uH-0805

C285

4.7u-0805
R520

1

R89

301 1%

HSWNG

C48

0.01u

R91

49.9_1%

HVREF

C50

0.1u

VCCP

VCCP

I=30mA

I=35mA

I=500mA

I=150mA

R90
150_1%

R92
100_1%

VCC_AGP

VCC_AGP

VCC_AGP

MEM_STR

, Trace width 12 mils & 10mils space

Keep the voltage divider within 3" of the
GMCH pin.

VCC_AGP

R93

HI_SWING

HUB_MREF

C51

0.01u

C53

0.01u

C52

0.1u

C54

0.1u

226_1%

0.704V

R96
100_1%

0.352V

R97
100_1%

MS-6555

Last Revision Date:

Monday, April 22, 2002

Sheet

6 27

L01-1006024-J07

0805

Rev

of

1.0

VTTFSB

VTTFSB

VTTFSB

VTTFSB

HD_VREF1
HD_VREF2

HCC_VREF

HY_SWNG
HX_SWNG

HI_SWING

HL_RCOMP

DDCA_DATA

DDCA_CLK

VCCP

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

GCLKIN

RSTIN#

CPURST#

PWROK

HA_VREF

HI6
HI7
HI8
HI9

HI10

HSYNC
VSYNC

DREFCLK

REFSET

HD#0

T30

HD#1

R33

HD#2

R34

HD#3

N34

HD#4

R31

HD#5

L33

HD#6

L36

HD#7

P35

HD#8

J36

HD#9

K34

HD#10

K36

HD#11

M30

HD#12

M35

HD#13

L34

HD#14

K35

HD#15

H36

HD#16

G34

HD#17

G36

HD#18

J33

HD#19

D35

HD#20

F36

HD#21

F34

HD#22

E36

HD#23

H34

HD#24

F35

HD#25

D36

HD#26

H35

HD#27

E33

HD#28

E34

HD#29

B35

HD#30

G31

HD#31

C36

HD#32

D33

HD#33

D30

HD#34

D29

HD#35

E31

HD#36

D32

HD#37

C34

HD#38

B34

HD#39

D31

HD#40

G29

HD#41

C32

HD#42

B31

HD#43

B32

HD#44

B30

HD#45

B29

HD#46

E27

HD#47

C28

HD#48

B27

HD#49

D26

HD#50

D28

HD#51

B26

HD#52

G27

HD#53

H26

HD#54

B25

HD#55

C24

HD#56

B23

HD#57

B24

HD#58

E23

HD#59

C22

HD#60

G25

HD#61

B22

HD#62

D24

HD#63

G23
AE7

NB_RST#

AJ31
D22
E7

HVREF

H24
D27
AD30
P30

HSWNG

Y30
H28

HL6

AE4

HL7

AE5

HL8

AF3

HL9

AE2

HL10

AF2

HUB_MREF
HI_SWING

AD2

GHCOMP

R98 68.1_1%

AC2

R99 2.7K
R100 2.7K

C7
D7

B7

R594 22
R595 22

C6

DOT_CLK

D14

RFSET

R103 137_1%

B16

Brookdale_GMCH

R593 0

X_10pC294

MCH_66 (3)
CPURST# (4)

PWR_GD (10,25)

Trace 10 mils &
7mils space < 0.5"

VCC_AGP

VCC3

BSEL0(3,4)
3VDDCDA (26)
3VDDCCL (26)

3V_HSYNC (26)
3V_VSYNC (26)

DOT_CLK (3)

VCC_AGP

VCC_AGP MEM_STR

PCIRST#1 (11,21,24,25)

HL[6..10] (9)

VCCA_SM VCCQ_SM

VCC_AGP

VCCA_DPLL

VCC3

CB71 0.1u

R101 8.2K

R102

8.2K

R218 X_10K

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HBR#0(4)

HBNR#(4)

HBPRI#(4)

HLOCK#(4)

HADS#(4)

HIT#(4)

HITM#(4)

HTRDY#(4)

HDBSY#(4)

3

HL_STB#(9)

HL_STB(9)

1

BAV99

2

R94 24.9_1%
R95 24.9_1%

D2

1

3

3

2

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HRS#0
HRS#1
HRS#2

HINV#0
HINV#1
HINV#2
HINV#3

HL0
HL1
HL2
HL3
HL4
HL5

1

2

U4A

W31

HA3#

AA33

HA4#

AB30

HA5#

V34

HA6#

Y36

HA7#

AC33

HA8#

Y35

HA9#

AA36

HA10#

AC34

HA11#

AB34

HA12#

Y34

HA13#

AB36

HA14#

AC36

HA15#

AC31

HA16#

AF35

HA17#

AD36

HA18#

AD35

HA19#

AE34

HA20#

AD34

HA21#

AE36

HA22#

AF36

HA23#

AE33

HA24#

AF34

HA25#

AG34

HA26#

AG36

HA27#

AE31

HA28#

AH35

HA29#

AG33

HA30#

AG31

HA31#

U33

BREQ0#

T34

BNR#

M34

BPRI#

T35

HLOCK#

T36

ADS#

V36

HREQ0#

AA31

HREQ1#

W33

HREQ2#

AA34

HREQ3#

W35

HREQ4#

P36

HIT#

M36

HITM#

N36

DEFER#

V30

HTRDY#

R36

RS0#

U34

RS1#

P34

RS2#

U31

DBSY#

U36

DRDY#

AB35

HAD_STB0#

AF30

HAD_STB1#

N31

HD_STBN0#

L31

HD_STBP0#

G33

HD_STBN1#

J34

HD_STBP1#

C30

HD_STBN2#

E29

HD_STBP2#

D25

HD_STBN3#

E25

HD_STBP3#

N33

DINV_0#

C35

DINV_1#

B33

DINV_2#

C26 H30

DINV_3# HD_VREF0

K30

HCLKP

J31

HCLKN

V35

HY_RCOMP

B28

HX_RCOMP

AA7

HI0

AB8

HI1

AC7

HI2

AC5

HI3

AD8

HI4

AF4 AD3

HI5 HI_REF

AD4

HI_STBS

AC4

HI_STBF

G15

BLUE

H16

BLUE#

E15

GREEN

F16

GREEN#

C15

RED

D16

RED#

D3
BAV99

VTTFSB

VTTFSB

VTTFSB

VTTFSB

HOST

HUB LINK

VGA

Trace lengh

AH10

AH12

AH14

AH18

AH22

AH26

must as short
as possible
for SRCVEN

Trace width 12
mil with 12 mil
space for
SM_VREF.

GAD[0..31](16)

GC_BE#[0..3](16)

R118

DDR_VREF

MDQ0
MDQ1
MDQ2
MDQ3
MDQ4
MDQ5
MDQ6
MDQ7
MDQ8
MDQ9
MDQ10
MDQ11
MDQ12
MDQ13
MDQ14
MDQ15
MDQ16
MDQ17
MDQ18
MDQ19
MDQ20
MDQ21
MDQ22
MDQ23
MDQ24
MDQ25
MDQ26
MDQ27
MDQ28
MDQ29
MDQ30
MDQ31
MDQ32
MDQ33
MDQ34
MDQ35
MDQ36
MDQ37
MDQ38
MDQ39
MDQ40
MDQ41
MDQ42
MDQ43
MDQ44
MDQ45
MDQ46
MDQ47
MDQ48
MDQ49
MDQ50
MDQ51
MDQ52
MDQ53
MDQ54
MDQ55
MDQ56
MDQ57
MDQ58
MDQ59
MDQ60
MDQ61
MDQ62
MDQ63

X_0_Solder

SR_OUT#
SR_IN#

C55 0.1u

GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3

AR10

AP10
AT11
AT13
AT14
AT10
AR12
AR14
AP14
AT15
AP16
AT18
AT19
AR16
AT16
AP18
AR20
AR22
AP22
AP24
AT26
AT22
AT23
AT25
AR26
AP26
AT28
AR30
AP30
AT27
AR28
AT30
AT31
AR32
AT32
AR36
AP35
AP32
AT33
AP34
AT35
AN36

AM36

AK36

AJ36

AP36

AM35

AK35
AK34

AK24

AL23

AN4
AP2
AT3
AP5
AN2
AP3
AR4
AT4
AT5
AR6
AT9

AT6
AP6
AT8
AP8

W4
W5

U4B

V4
V2

U5
U4
U2
V3
T2
T3
T4
R2
R5
R7
T8
P3
P8
K4
K2

J2

M3

L5
L4

H4

G2

K3

J4
J5

J7
H3
K8

G4

R4
N4

M2

H2

SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63

SRCVEN_OUT#
SRCVEN_IN#

G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31

G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#

DDR

AGP

VCC_AGP

VCC_AGP

K10

K12

K14

VCCSM

VCCSM

VCCSM

VCC_AGP

VCC_AGP

VCC_AGP

K16

P10

V10

VCCSM

VCCSM

VCCSM

SCMDCL_K0

SCMDCLK_0#

SCMDCLK_1

SCMDCLK_1#

SCMDCLK_2

SCMDCLK_2#

SCMDCLK_3

SCMDCLK_3#

SCMDCLK_4

SCMDCLK_4#

SCMDCLK_5

SCMDCLK_5#

SMX_RCOMP0

SMY_RCOMPSM_VREF

G_DEVSEL#

AGP_RCOMP

VCC_AGP

VCC_AGP

VCC_AGP

AB10

AD10

MEM_STR

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8

SMA9
SMA10
SMA11
SMA12

SMAB1
SMAB2
SMAB4
SMAB5

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7

SDM0

SDM1

SDM2

SDM3

SDM4

SDM5

SDM6

SDM7
SCKE0

SCKE1
SCKE2
SCKE3

SCS0#
SCS1#
SCS2#
SCS3#

SBA_0

SBA_1
SRAS#
SCAS#

SWE#

G_FRAME#

G_IRDY#

G_TRDY#

G_STOP#

G_PAR

G_REQ#
G_GNT#

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

SB_STB

SB_STB#

ST0
ST1
ST2

AD_STB0

AD_STB0#

AD_STB1

AD_STB1#

PIPE#

RBF#

WBF#

AGP_VREF

Brookdale_GMCH

AL25
AN25
AP23
AK20
AL19
AL17
AP19
AP17
AN17
AK16
AK26
AL15
AN15

AP25
AN23
AN19
AK18

AR2
AT7
AT12
AT17
AR24
AT29
AT34
AL36

AP4
AR8
AP12
AR18
AT24
AP28
AR34
AL34

AP13
AN13
AK14
AL13

AL29
AP31
AK30
AN31

AL21
AK22
AN11
AP11
AM34
AL33
AP21
AN21
AP9
AN9
AP33
AN34

AN27
AP27
AK28
AN29
AP29

AF10
AJ34AM2
M4

N7
N5
N2
P2
P4

D5
B5

C3
C2
D3
D2
E4
E2
F3
F2

F4
E5

C4
B4
B3

V8
U7
M8
L7

H8
G7
G5

W2
L2

MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7

MSDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7

MSCKE0
MSCKE1
MSCKE2
MSCKE3

MSCS0#
MSCS1#
MSCS2#
MSCS3#

DCLK0
DCLK0#
DCLK1
DCLK1#
DCLK2
DCLK2#
DCLK3
DCLK3#
DCLK4
DCLK4#
DCLK5
DCLK#5

MSBS0
MSBS1
MRAS#
MCAS#
MWE#

SMY

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

ST0
ST1
ST2

CB72 0.1u

R121 40.2_1%

VCC_AGP

DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12

DDRMAB1
DDRMAB2
DDRMAB4
DDRMAB5

Place < 0.5"

MSCS0# (14,15)
MSCS1# (14,15)
MSCS2# (14,15)
MSCS3# (14,15)

DCLK0 (14)
DCLK0# (14)
DCLK1 (14)
DCLK1# (14)
DCLK2 (14)
DCLK2# (14)
DCLK3 (14)
DCLK3# (14)
DCLK4 (14)
DCLK4# (14)
DCLK5 (14)
DCLK5# (14)

MSBS0 (14,15)
MSBS1 (14,15)
MRAS# (14,15)
MCAS# (14,15)
MWE# (14,15)

SMX

GFRAME#(16)
GIRDY# (16)
GTRDY# (16)
GDEVSEL# (16)
GSTOP# (16)
GPAR (16)

GREQ# (16)
GGNT# (16)

SBA0 (16)
SBA1 (16)
SBA2 (16)
SBA3 (16)
SBA4 (16)
SBA5 (16)
SBA6 (16)
SBA7 (16)

SB_STB (16)
SB_STB#(16)

ST[0..2](16)

GAD_STB0(16)
GAD_STB#0 (16)
GAD_STB1(16)
GAD_STB#1 (16)

PIPE# (16)
RBF# (16)
WBF# (16)

AGPREF (16)

DDRMAA[0..12] (14,15)

DDRMAB1 (14,15)
DDRMAB2 (14,15)
DDRMAB4 (14,15)
DDRMAB5 (14,15)

MSCKE[0..3] (14,15)

60.4

R33

60.4

Trace width 12 mil
with 10 mil space.

Place 0.1uF <1" to GMCH

R120

60.4

C56

C57

0.1u

0.1u

R34

60.4

MEM_STR

DDR SERIAL RESISTORS

DDRMD[0..63](14,15)

Title
Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

DDRMD1
DDRMD5
DDRMD4
DDRMD0
DDRMD3
DDRMD7
DDRMD6
DDRMD2
DDRMD13
DDRMD12
DDRMD9
DDRMD8
DDRMD11
DDRMD10
DDRMD15
DDRMD14
DDRMD21
DDRMD17
DDRMD16
DDRMD20
DDRMD23
DDRMD19
DDRMD22
DDRMD18
DDRMD25
DDRMD29
DDRMD28
DDRMD24
DDRMD31
DDRMD27
DDRMD30
DDRMD26
DDRMD37
DDRMD33
DDRMD36
DDRMD32
DDRMD35
DDRMD39
DDRMD38
DDRMD34
DDRMD41
DDRMD45
DDRMD44
DDRMD40
DDRMD47
DDRMD43
DDRMD46
DDRMD42
DDRMD53
DDRMD52
DDRMD49
DDRMD48
DDRMD51
DDRMD50
DDRMD55
DDRMD54
DDRMD57
DDRMD61
DDRMD56
DDRMD60
DDRMD59
DDRMD63
DDRMD58
DDRMD62

MSDM0 SDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7

MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7

Micro Star Restricted Secret

Brookdale-G GMCH Part 2 (DDR & AGP)

RN3 10

7 8
5 6
3 4
1 2

RN5 10

7 8
5 6
3 4
1 2

RN7 10

7 8
5 6
3 4
1 2

RN9 10

7 8
5 6
3 4
1 2

RN10 10

7 8
5 6
3 4
1 2

RN12 10

7 8
5 6
3 4
1 2

RN13 10

7 8
5 6
3 4
1 2

RN14 10

7 8
5 6
3 4
1 2

RN15 10

7 8
5 6
3 4
1 2

RN16 10

7 8
5 6
3 4
1 2

RN18 10

7 8
5 6
3 4
1 2

RN20 10

7 8
5 6
3 4
1 2

RN21 10

7 8
5 6
3 4
1 2

RN22 10

7 8
5 6
3 4
1 2

RN23 10

7 8
5 6
3 4
1 2

RN24 10

7 8R119
5 6
3 4
1 2

R609 10
R610 10
R611 10
R612 10
R613 10
R614 10
R615 10
R616 10

R110 10
R111 10
R112 10
R113 10
R114 10
R115 10
R116 10
R117 10

SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7

MS-6555

MDQ1
MDQ5
MDQ4
MDQ0
MDQ3
MDQ7
MDQ6
MDQ2
MDQ13
MDQ12
MDQ9
MDQ8
MDQ11
MDQ10
MDQ15
MDQ14
MDQ21
MDQ17
MDQ16
MDQ20
MDQ23
MDQ19
MDQ22
MDQ18
MDQ25
MDQ29
MDQ28
MDQ24
MDQ31
MDQ27
MDQ30
MDQ26
MDQ37
MDQ33
MDQ36
MDQ32
MDQ35
MDQ39
MDQ38
MDQ34
MDQ41
MDQ45
MDQ44
MDQ40
MDQ47
MDQ43
MDQ46
MDQ42
MDQ53
MDQ52
MDQ49
MDQ48
MDQ51
MDQ50
MDQ55
MDQ54
MDQ57
MDQ61
MDQ56
MDQ60
MDQ59
MDQ63
MDQ58
MDQ62

SDM0 (14,15)
SDM1 (14,15)
SDM2 (14,15)
SDM3 (14,15)
SDM4 (14,15)
SDM5 (14,15)
SDM6 (14,15)
SDM7 (14,15)

Last Revision Date:

Monday, April 22, 2002

Sheet

7 27

SDQS[0..7] (14,15)

Rev

1.0

of

AA18

AL31
AR31
AU31

AB32
AD32
AF32
AH32

AR19

AM32

AJ33
AN33
AR33

AA20

AM20

AJ21
AR21

GMCH DECOUPLING CAPACITOR

C17

D17

E17

G17

J17

V17

AH30

C31

AC3

AG3

AM3

AN3

AR3

AU3

AB4

AG4

Y17

AJ17

AR17

AR9

AM10

AR23

AU23

F24

AM24

VSS

VSS

VSS

AM16

VSS

VSS

B17

VSS

VSS

A25

VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

N35
R35
U35
AA35
AC35
AE35
AG35
AL35
AN35
AR35
AU35
B36
W36
AF8
AM8
G9
J9
N9
U9
AA9
AE9
A23
C23
D23
J23

AH36
AT36
C37
E37
J37
U37
AA37
AE37
AG37
AJ37
C25
AN37
AR37
AR11
AU11
J25
AJ25
AR25
F26
AK12
AM12
B13
C13
D13
E13
A27
C27
J27
AJ13
AR13
F14

AL27
AR27
AU27
F28
AM28
E1
J1
N1
U1
AA1
AE1
AN1
AR1
B2
D15

AR15
AU15
N37
C16

VCC_AGP

CB73

0.1u
CB74

0.1u
CB75

0.1u
CB77

0.1u
CB80

0.1u

Place decoupling cap
close to GMCH AGP
Interface < 0.1"

VCC_AGP

Place decoupling cap
close to GMCH Core
Logic Interface <

0.1"

VCC5

VCC3
VCC3 VCC5

CB88

0.1u

X_0.1uC66

X_0.1uC68

0.1uC72

0.1uC43

0.1uC36

VCC_AGP

0.1uC37

0.1uC70

VCC_AGPVCC3

Pin A5
Pin E1
Pin J1
Pin N1
Pin U1

VCC_AGP

CB76

Pin AA1

0.1u 0.01u
CB78

Pin AE1

0.1u

Place decoupling cap
close to GMCH
Hub-Link Interface<

0.1"

VCCP

CB84

0.1u
CB86

0.1u
CB89

0.1u
CB91

0.1u
CB93

0.1u

Place decoupling cap
close to GMCH CPU
Interface < 250mil
in the Vtt corridor

VCC_AGP

+

CT11

1000u/6.3V

Place Bulk cap for Core Logic,
AGP & Hub Link Interface

Title

+

CT13
1000u/6.3V

CT15
X_100u_16V

Place Bulk cap between
GMCH & DIMM slot

Micro Star Restricted Secret

MEM_STR

+

MEM_STR

Place decoupling cap
close to GMCH Memory
Interface < 0.1", with
18 mil trach width

CT14
470u

Brookdale-G GMCH Part 3 (GN D)

Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

VCC_AGP

C58
CB79

0.1u

Place decoupling cap
close to GMCH DAC
Interface< 0.1"

CB81

Pin AL37

0.1u
CB82

Pin AU5

0.1u
CB83

Pin AU9

0.1u
CB85

Pin AU13

0.1u
CB87

0.1u

Pin AU17

CB90

Pin AU25

0.1u
CB92

0.1u

Pin AU29

CB94

0.1u

Pin AU33

VCCP

CB276

X_10u-1206

+

CT16

+

100u_16V

CB277
X_10u-1206

MS-6555

Last Revision Date:

Monday, April 22, 2002

Sheet

8 27

of

Pin B14
Pin A15

Rev

1.0

U4D

U18

VSS

V18

VSS

Y18

F32
H32
K32

M32

P32
T32
V32
Y32

AM4

AG5

AN5
AR5

A33
C33

M6

AB6
AF6

AM6

U20
V20
Y20

A21
B21
C21
D21
E21

G21

J21

D34

W34

A35
E35

G35

J35

L35
AN7
AR7
AU7

V21
Y21

F22
H22

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A5

VSS

C5

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS

F6

VSS

H6

VSS
VSS

T6

VSS

Y6

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

B8

VSS

C8

VSS

D8

VSS

F8

VSS

VSS
VSS

VSS
VSS
VSS
VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

A29

C29

J29

L29

N29

U29

R29

W29

AA29

AC29

AE29

AG29

AJ29

AR29

F30

AT2E3G3J3L3N3R3U3W3

ICH4 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS

ICH4 SMI# SIGNAL

CHECK

THIS....

AC8B2H18H6J1

VCC3_3

VCC3_3

VCC3_3

GND12

GND13

GND14

AB7

AC1

VCC3_3

GND15

AC10

AC14

VCC3_3

VCC3_3

VCC3_3

GND16

GND17

GND18

AC18

AC23

VCC3

J18K6M10

VCC3_3

VCC3_3

GND19

GND20

AC5

B12

P12P6U1

VCC3_3

GND21

B16

B18

VCC3_3

VCC3_3

VCC3_3

GND22

GND23

GND24

B20

B22B9C15

V10

V16

VCC3_3

GND25

V18

VCC3_3

VCC3_3

GND26

GND27

GND28

C17

C19

VCC1_5SB

E20

F14

E13

E12

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

GND29

GND30

GND31

C21

C23C6D1

G18R6T6

U6

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

VCCSUS1_5

GND32

GND33

GND34

GND35

GND36

D12

D15

D17

D19

E11

F10

VCCSUS3_3

GND37

GND38

D21

D23D4D8

F15

F16

F17

F18

K14V7V8

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

GPIO1/REQB#/REQ5#

GPIO17/GNTB#/GNT5#

GND43

GND39

GND40

GND41

GND42

E14

D22

E10

E16

V9

CPUSLP#

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

VCCSUS3_3

STPCLK#

A20GATE

THRMTRIP#

HL_STB#
HLCOMP

HI_SWING

APICCLK

LAN_CLK

LAN_RSTSYNC

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

GND44

GND45

GND46

GND47

E17

E18

E19

U5A

A20M#

FERR#

IGNNE#

INIT#

INTR

NMI

SMI#

RCIN#

NC

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8

HI9
HI10
HI11

HI_STB

HIREF

PIRQA#
PIRQB#
PIRQC#
PIRQD#

IRQ14
IRQ15

APICD0
APICD1

SERIRQ

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

GNT0#
GNT1#
GNT2#
GNT3#
GNT4#

INT-FW82801DB

AB23
U21
AA21
W21
V22
AB22
V21
W23
V23
U22
Y22
U23
W20

L19
L20
M19
M21
P19
R19
T20
R20
P23
L22
N22
K21
P21
N20
R23
R22
M23

D5
C2
B4
A3

AC13
AA19
J19
H19
K20
J22

B1
A2
B3
C7
B6
A6

C1
E6
A7
B7
D6
C5

C11
B11
A10
A9
A11
B10
C10
A12

RA20M#
RSLP#

FERR#

RIGNNE#

RINTR
RNMI

SMI#

RSTPCLK#

KB_RST#
A20GATE#

TRMTRIP#
HL0

HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10

HL11

IHCOMP
HI_ISWING
HUB_IREF

APICCLK
APIC_D0
APIC_D1
SERIRQ

PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4

PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#B

ELAN_CLK
ELAN_SYNC
ELAN_RXD0
ELAN_RXD1
ELAN_RXD2
ELAN_TXD0
ELAN_TXD1
ELAN_TXD2

R184 0
R185 0

R186 0
R187 33
R188 0
R189 0

R191 0

R521 62

KB_RST# (11)
A20GATE#(11)

TRMTRIP#(4)

This resistor less than 0.5"
from ICH use 15 mils trace

HL_STB (6)
HL_STB# (6)

R130 68.1_1%

INTA# (16,17)
INTB# (16,17)
INTC# (17)
INTD# (17)

IRQ14 (3)
IRQ15 (3)

SERIRQ (11)

PREQ#[0..4] (17,24)

PGNT#0 (17)
PGNT#1 (17)
PGNT#2 (17)
PGNT#3 (24)

ELAN_CLK (21)
ELAN_SYNC (21)
ELAN_RXD0 (21)
ELAN_RXD1 (21)
ELAN_RXD2 (21)
ELAN_TXD0 (21)
ELAN_TXD1 (21)
ELAN_TXD2 (21)

FINIT# (21)
A20M# (4)

SLP# (4)
FERR# (4)
IGNNE# (4)
HINIT# (4)
INTR (4)
NMI (4)

STPCLK# (4)

HL[0..10] (6)

VCC_AGP

SMI#

R122 33

100pC78

HSMI# (4)

ICH4 STRAPPING RESISTORS

FERR#
TRMTRIP#

SERIRQ

KB_RST#
A20GATE#
PREQ#A
PGNT#A
PREQ#B
PGNT#B
PGNT#4

APIC_D0
APIC_D1
APICCLK
EE_DOUT

R123 62
R124 62

R125 8.2K
R126 10K
R127 10K
R131 10K
R132 X_10K
R745 10K
R746 X_10K
R747 X_10K

R128 10K
R129 10K

R133 X_10K

VCCP

VCC3

ICH4 REFERENCE VOLTAGE

VCC_AGP

R135

HI_ISWING

HUB_IREF

C79

X_0.01u

C81
X_0.01u

226_1%

R136

C80

100_1%

0.1u

R137

C82

100_1%

0.1u

VCC_AGP VCC3_SB

K12

K18

K22

P10

T18

U19

VCC1_5

VCC1_5

VCC1_5

GND3

GND4

GND5

A20

A22A4AA12

VCC1_5

VCC1_5

VCC1_5

GND6

GND7

GND8

AA16

V14A5AC17

VCC1_5

VCC1_5

GND9

GND10

GND11

AA22

AA3

AA9

AB20

AD[0..31](17,24)

C_BE#[0..3](17,24)

DEVSEL#(17,24)

FRAME#(17,24)

IRDY#(17,24)

TRDY#(17,24)

STOP#(17,24)

PAR(17,24)

PLOCK#(17)

SERR#(17,24)
PERR#(17,24)

PME#(16,17,24)

ICH_PCLK(3)

PCIRST#(25)
LAN_EN(10)
RSMRST#(10,13)

EE_EECS(21)
EE_DIN(21)
EE_DOUT(21)
EE_SHCLK(21)

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C_BE#0
C_BE#1
C_BE#2
C_BE#3

PREQ#A PREQ#B
PGNT#A

R6 0
R134 X_0

LAN_RST#

EE_EECS
EE_DIN
EE_DOUT
EE_SHCLK

H5

J3
H3
K1

G5

J4
H4

J5
K2

G2

L1

G4

L2
H2

L3
F5
F4
N1
E5
N2
E3
N3
E4

M5

E2
P1
E1
P2
D3
R1
D2
P4

J2
K4

M4

N4

M3

F1

L5
F2
F3

G1
M2

K5

L4

W2

B5
E8

P5
U5
Y5

D10
D11

A8

C12

K10

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#

GPIO0/REQA#
GPIO16/GNTA#

PCICLK
PCIRST#
LAN_RST#
EE_CS

EE_DIN
EE_DOUT
EE_SHCLK

GND1

GND2

A1

A16

A18

Pin A4

VCC3

Pin A1

0.1u

Pin H1

CB103

0.1u

ICH4 DECOUPLING CAPACITORS

Pin AC10

Pin T1

0.1u

CB105

0.1u

Pin AC18

X_0.1u

CB107

0.1u

Place one 0.1u close to ICH4 <100 mil

Pin K23 Pin C23 Pin A16 Pin AC1Pin T23 Pin N23 Pin C22 Pin C22

VCC_AGP

CB95
X_0.1uCB104

CB96
X_0.1uCB102

VCC_AGP VCC_AGP

CB97

CB98

X_0.1u

0.1u

CB99
X_0.1u

C83
X_0.01u

FOR Core Logic FOR Hub Interface FOR PLL

VCC1_5SB

CB100

0.1u

Micro Star Restricted Secret

CB101

0.1uCB106

Title
Document Number

MICRO-STAR INT'L CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Place Cap. as Close as possible to ICH4 < 0.25"
Trace width use 12 mils and 10mils space

ICH4 Part 1 (Power,HUB,PCI & CPU I/F)

MS-6555

Last Revision Date:

Monday, April 22, 2002

Sheet

9 27

of

Rev

1.0