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8
7
6
Last Schematic Update Date:
08/20/2001
5
4
3
2
1
D D
MS-6547
VERSION:0A
SIS 645/650 CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics
Cover Sheet
Block Diagram
MAIN CLOCK GEN
DDR CLOCK BUFFER
mPGA478-B INTEL CPU Sockets
SIS 645/650 NORTH BRIDGE
CPU:
Willamette/Northwood mPGA-478B Processor
DDR SLOT
DDR TERMINATOR
SIS 961A SOUTH BRIDGE
System Brookdale Chipset:
C C
SIS 645/650 (North Bridge)
+961A (South Bridge)
On Board Chipset:
LPC Super I/O -- W83697HF
AGP SLOT
PCI SLOTS 19-21
IDE CONNECTOR
USB CONNECTOR
KB/MS CONNECTOR
Expansion Slots:
AGP2.0 SLOT * 1
AC'97 CODEC
AUDIO CONNECTOR
PCI2.2 SLOT* 5
CNR SLOT * 1
B B
LPC I/O(W83697HF)
HARDWARE MONITOR
PARALLEL PORT
SERIAL PORT
FLASH MEMORY
VRM 9.X
1
2
3
4
5 - 6
7- 10
11-12
13
14-17
18
22
23
24
25
26
27CNR CONNECTOR
28
29
30
31
32
33
VOLTAGE REGULATOR 34-35
ATX POWER CON & VGA CON 36
FRONT PANEL 37
Decoupling Capacitor 38
MS-3 (D-LED) 39
A A
8
7
6
5
4
3
2
1
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7
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1
System Block Diagram
D D
SOCKET-478
Host Bus
Support Dual Monitor
VGA
D-SUB
VGA SLOT
DDR SDRAM
SSTL-2 Termination
(Only for DDR)
SIS645/650
C C
PCI SLOT 4PCI SLOT 5
VGA Connector
Support Max to six-PCI Devices
PCI SLOT 3 PCI SLOT 2 PCI SLOT 1
VGA CONNECTOR
VGA
HyperZip
512 MB
SiS961
IDE 1
B B
IDE 2
KEYBOARD
/MOUSE
FAN1FAN
Legacy
ROM
PS/2
LPC Bus
FAN CONTROL
2
FAN CONTROL
LPC Super I/O
VOLTAGE MONITOR
TEMPERATURE MONITOR
DIMM 1 DIMM 2 DIMM 3
AC'97
Audio Codec
ACR
USB 0
USB 1
USB 3
USB 2
USB 4
USB 5
Rtt
Analog In
Analog Out
A A
8
7
IR/CIR
6
GAME/MIDIGPIOs
SERIAL PARALLEL FLOPPY
5
MICRO-STAR INT'L CO.,LTD.
Title
System Block Diagram
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
4
3
2
2 39Friday, September 14, 2001
1
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8
VCC3
L48
80_0805
CP24
X_COPPER
D D
CB177
CB178
CE7
+
22u
0.1u CB180
VCC3
C C
VCCP
R207
10K
NPN-MBT3904LT1-S-SOT23
CB196
0.1u
0.1u CB197
R219
10K
Q27
NPN-MBT3904LT1-S-SOT23
B B
VCC3
0.1u
R218
10K
Q26
VCC3
VCC3
7
CB179
0.1u
0.1u
CP26 X_COPPER
L49
X_80_0805
CB194
0.1u
CE11
+
22u
R217
CB195
0.1u
CB182
0.1u
0.1u
CB187
CB198
0.1u
475
CB184
100P
6
5
Main Clock Generator
(3 OPTIONS)
1: (ICS)
2: (Cypress)
3. (Hitachi)
U15
952001AF
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
CB181
100P
VDDSD
12
PCI_STOP#
45
CPU_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
37
VSSA
XIN
6
Y1
14M-16pf-HC49S-D
C143
10p
CPUCLK#0
CPUCLK#1
PCICLK_F0/FS3
PCICLK_F1/FS4
24_48M/MULTISEL
XOUT
7
C134
10p
CPUCLK0
CPUCLK1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
48M
SCLK
SDATA
4
Damping Resistors
Place near to the
Clock Outputs
40
39
44
43
47
31
30
9
10
FS3 96XPCLK
14
FS4 SIOPCLK
15
16
17
20
21
22
23
FS0
2
FS1
3
FS2
4
27
26
MULTISEL
35
34
R237 33
R238
R235
R236 33
R234
R239
R240 22
R289
R290
RN76 33
RN77 33
R283 33
R285 33
R286
R287
R241 22
R242 22
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
VCC3
33
33
22
22
22
22
33
33
R291 2.7K
R292 X_2.7K
R288 X_2.7K
R271 X_2.7K
R276 X_2.7K
MULTISEL
3
By-Pass Capacitors
Place near to the Clock Outputs
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1 AGPCLK1
SDCLK
AGPCLK0
AGPCLK1 ZCLK1
ZCLK0
ZCLK1
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REFCLK0
REFCLK1
APICCLK APICCLK
REFCLK2
UCLK48M
SIO48M
SMBCLK
SMBDAT
CPUCLK0 5
CPUCLK-0 5
CPUCLK1 7
CPUCLK-1 7
SDCLK 8
AGPCLK0 7
AGPCLK1 18
ZCLK0 9
ZCLK1 14
96XPCLK 14
SIOPCLK 28
PCICLK1 19
PCICLK2 20
PCICLK3 20
PCICLK4 21
PCICLK5 21
REFCLK0 9
REFCLK1 15
APICCLK 15
REFCLK2 39
UCLK48M 16
SIO48M 28
SMBCLK 4,11,12,15,27,39
SMBDAT 4,11,12,15,27,39
FS0
FS1
FS2
FS3
FS4
R220 X_0
SDCLK
AGPCLK0
ZCLK0
PCICLK2
PCICLK1
SIOPCLK
96XPCLK
PCICLK5
PCICLK4
PCICLK3
REFCLK0
REFCLK1
REFCLK2
UCLK48M
SIO48M
2
R215
R216
R213 49.9
R214
C110 10p
C111 10p
C112 10p
C163 10p
C164 10p
CN18 10p
1 2
3 4
5 6
7 8
CN19 10p1 2
3 4
5 6
7 8
C161 10p
C153 10p
C160 10p
C162 10p
C113 10p
C114 10p
Frequency Selection
1
49.9
49.9
49.9
R243 X_4.7K
FS4 FS1FS2FS3 FS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A A
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
SIS650 CLOCK SIS650 CLOCK
0 0 0
0 0 1
0 1 0
0 1 1
1 0 1
1 1
1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 1
1 1
1 1 1
8
CPU PCI
SDRAM
(MHz) (MHz) (MHz)
001
0
001
0
ZCLK
(MHz)
7
AGPCLK
(MHz)
6
CPU PCI
SDRAM
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0 0 1
0 1 0
0 1 1
1 0 1
1 1
1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 1
1 1
1 1 1
0 0 0
0
5
(MHz) (MHz) (MHz)
001
0
001
0
4
AGPCLK
ZCLKFS4 FS1FS2FS3 FS0
(MHz)(MHz)
3
VCC3
MICRO-STAR INT'L CO.,LTD.
Title
MAIN CLOCK GEN
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
2
3 39Thursday, September 20, 2001
1
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7
6
5
4
3
2
1
D D
VCC2.5V
CE5
+
22u
C C
VCC2.5V
B B
CP11 X_COPPER
CB126
0.1u
CP14 X_COPPER
L32
X_80_0805
L28
X_80_0805
CB127
0.01u
CB88
0.1u
CE4
+
22u
CB124
0.1u
SMBCLK
SMBDAT
CB87
0.1u
CBVDD
CB118
0.01u
R116 0
R86 0
FWDSDCLKO DDRCLK-3
FB_OUT
Clock Buffer (DDR)
(OPTIONS)
1: (ICS-93705)
CBVDD
CB110
0.1u
CB123
0.1u
U7
93705CF
15
VDDI2C
4
VDD
11
VDD
21
VDD
28
VDD
34
VDD
38
VDD
45
VDD
16
AVDD
17
AGND
12
SCLK
37
SDATA
13
CLK_IN
14
NC
35
FB_IN
36
NC
CB111
0.1u
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
CLK#6
CLK#7
CLK#8
CLK#9
FB_OUT
NC
3
5
10
20
22
46
44
39
29
27
2
6
9
19
23
47
43
40
30
26
33
32
R111
R112 0
R115 0
R118
R119
R81
R82 0
R85 0
R89
R110 0
R113 0
R114
R117
R120
R80 0
R83 0
R84
R88
R87 22
DDRCLK[0..8]
DDRCLK-[0..8]
SMBCLK
SMBDAT
FWDSDCLKO
DDRCLK0
0
DDRCLK1
DDRCLK2
DDRCLK3
0
DDRCLK5
0
DDRCLK4
0
DDRCLK8
DDRCLK7
DDRCLK6
0
DDRCLK-0
DDRCLK-1
DDRCLK-2
0
0
DDRCLK-5
0
DDRCLK-4
DDRCLK-8
DDRCLK-7
0
DDRCLK-6
0
FB_OUT
C43
10p
DDRCLK[0..8] 11,12
DDRCLK-[0..8] 11,12
SMBCLK 3,11,12,15,27,39
SMBDAT 3,11,12,15,27,39
FWDSDCLKO 8
By-Pass Capacitors
Place near to the Clock Buffer
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK5
DDRCLK4
DDRCLK8
DDRCLK7
DDRCLK6
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-5
DDRCLK-4
DDRCLK-8
DDRCLK-7
DDRCLK-6
C58 X_10p
C59 X_10p
C62 X_10p
C64 X_10P
C65 X_10P
C38 X_10P
C39 X_10P
C42 X_10P
C45 X_10P
C57 X_10P
C60 X_10P
C61 X_10P
C63 X_10P
C66 X_10P
C37 X_10P
C40 X_10P
C41 X_10P
C44 X_10P
GND
GND
GND
GND
GND
GND
GND
GND
GND
178182425314142
GND
48
A A
MICRO-STAR INT'L CO.,LTD.
Title
DDR CLOCK BUFFER
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
8
7
6
5
4
3
2
4 39Thursday, September 20, 2001
1
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2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
VCCP
R61
49.9
R62
C30
1u
1u220p
X_1000pC33
X_1000pC34
X_0.022uC3
100
VCCP
R12
49.9
R19
C4
100
VCCP
VCCP
VCCP
VCCP
5 39Friday, September 21, 2001
1
VID 1
AE4
VID2#
D4#
A25
HD#3
VID0
AE5
VID1#
VID0#
LINT1/NMI
LINT0/INTR
D3#
D2#
A23
B22
HD#2
HD# 1
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
D1#
D0#
B21
PGA-S478-F02
HD# 0
VCCPS+ 33
VCCPS- 33
VID[0..4]39
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
4
GTLREF1
GTLREF2
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R60 4.7K
R26 4.7K
R59 4.7K
R58 4.7K
RS#2
RS#1
RS#0
R38 49.9
R66 49.9
CPUCLK-0 3
CPUCLK0 3
RS#[0..2] 7
HBR#0 7
* Short trace
HADSTB#17
HADSTB#07
HDSTBP#3 7
HDSTBP#2 7
HDSTBP#1 7
HDSTBP#0 7
HDSTBN#3 7
HDSTBN#2 7
HDSTBN#1 7
HDSTBN#0 7
NMI 15
INTR 15
HREQ#[0..4] 7
3
Length < 1.5inch.
C21
220p
2/3*Vccp
C22
220p
GTLREF1
Length < 1.5inch.
C16
220p
2/3*Vccp
C17
GTLREF2
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU ITP BLOCK
ITP_TMS
ITP_TDO
ITP_TCK
R28 39
R29 75
R31 27
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#
BPM#0
BPM#1
BPM#4
BPM#5
ITP_TDI
ITP_TRST#
CPU_GD
CPURST#
CPUSLP#
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-1
Size Document Number Rev
MS-6547 0A
Custom
Date: Sheet of
2
R14 62
R64 300
R48 49.9
R65 49.9
R50 62
R22 49.9
R23 49.9
R25 49.9
R24 49.9
R49 150
R30 680
HA#[3..31]7
D D
U4A
HDBI#[0..3]7
STPCLK#15
HDBSY#7
HDRDY#7
C C
B B
A A
HTRDY#7
HLOCK#7
HDEFER#7
Trace : 10
mil width
10mil space
CPU_TMPA29 VCCP
VTIN_GND29
R63 X_33
CPUSLP#15
CPU_GD7
CPURST#7
HD#[0..63]7
8
HDBI#0
HDBI#1
HDBI#2
HDBI#3
FERR#15
INIT#15
HADS#7
HBNR#7
HIT#7
HITM#7
HBPRI#7
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
CPU_TMPA
THERMTRIP#
IGNNE#15
SMI#15
A20M#15
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
PROCHOT#
IGNNE#
SMI#
A20M#
CPUSLP#
G25
AC3
AA3
AB2
AF26
AB26
AD2
AD3
AE21
AF24
AF25
AD6
AD5
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
P26
V21
V6
B6
Y4
W5
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A22
A7
Y21
Y24
Y23
Y26
V24
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
D53#
D52#
D51#
D50#
V22
U21
V25
U23
U24
HD# 53
HD#5 1
HD#5 0
HD#49
HD#52
7
A34#
D49#
HA#28
HA# 30
HA#2 9
HA# 31
A33#
A32#
A31#
A30#
A29#
D48#
D47#
D46#
D45#
D44#
U26
T23
T22
T25
T26
R24
HD# 48
HD#47
HD#4 6
HD#4 5
HD#44
HD# 43
A28#
D43#
HA#2 2
HA# 25
HA#23
HA# 26
HA#2 7
HA#2 4
A27#
A26#
A25#
D42#
D41#
D40#
R25
P24
R21
N25
HD#4 1
HD#39
HD#42
HD#4 0
A24#
D39#
HA#18
HA#1 4
HA# 15
HA# 16
HA# 21
HA# 20
HA#1 9
HA#1 7
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
D38#
D37#
D36#
D35#
D34#
D33#
D32#
D31#
D30#
N26
M26
N23
M24
P21
N22
M23
H25
K23
J24
HD#32
HD#29
HD#34
HD#3 0
HD#3 1
HD#37
HD#3 5
HD# 33
HD# 38
HD#3 6
6
A14#
D29#
HA#8
HA#9
HA# 5
HA#4
A9#
D24#
HA#3
HA#7
HA# 6
AE25A5A4
AD26
A8#
A7#
A6#
A5#
A4#
A3#
DBR#
VCC_SENSE
VSS_SENSE
Differential
Host Data
Strobes
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
D13#
D12#
D11#
D26
F26
E25
F24
F23
G23
E24
H22
D25
J21
D23
C26
H21
G22
HD#19
HD# 23
HD#1 6
HD#22
HD#2 0
HD# 18
HD#2 1
HD#17
HD#1 0
HD#14
HD#1 5
HD#1 1
HD#12
HD# 13
5
AC26
ITP_CLK1
ITP_CLK0
D10#
D9#
D8#
B25
C24
C23
HD#8
HD#9
VID2
VID4
VID3
AE1
AE2
AE3
VID4#
VID3#
D7#
D6#
D5#
B24
D22
C21
HD# 5
HD#4
HD#7
HD# 6
HA# 10
HA# 11
HA#13
HA#1 2
A13#
A12#
A11#
A10#
D28#
D27#
D26#
D25#
L22
M21
H24
G26
L21
HD#2 6
HD# 28
HD#24
HD#2 5
HD#27
![](/html/27/27c4/27c483956c51bca13bda89b4f599da09059e2b0120f15fbabedc01a3ef9396f1/bg6.png)
8
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
VCC
VSS
AD18
VCC
VSS
AD21
VCC
VSS
AD23
VCC
VSS
AD4
VCC
VSS
AD8
VCC
VSS
AE11
AA16
VCC
VSS
AE13
U4B
VCC
VCC
D D
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB21
C C
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
VSS
AD14
VCC
VSS
AD16
VCC
VSS
AA18
AE15
VCC
VSS
AA8
AE17
VCC
VSS
AB11
AE19
VCC
VSS
AB13
AE22
VCC
VSS
AB15
AE24
VCC
VSS
AB17
AE26
7
VCC
VSS
AB19
AE7
VCC
VSS
AB7
AE9
VCC
VSS
AB9
AF1
VCC
VSS
AC10
AF10
VCC
VSS
AC12
AF12
VCC
VSS
AC14
AF14
VCC
VSS
AC16
AF16
VCC
VSS
AC18
AF18
VCC
VSS
AC8
AF20
VCC
VSS
CPU VOLTAGE BLOCK
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF8
VSS
B10
B12
B14
B16
B18
B23
B20
B26B4B8
VCC
VSS
6
AE16
VCC
VSS
AE18
VCC
VSS
AE20
C11
VCC
VSS
AE6
C13
VCC
VSS
AE8
C15
AF11
VCC
VSS
C17C2C19
AF13
VCC
VSS
VCC
VSS
AF15
AF17
VCC
VSS
C22
AF19
AF2
AF21
AF5
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C25C5C7C9D12
AF7
VCC
VSS
VCC
VSS
AF9
D14
B11
VCC
VSS
D16
5
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
VCC
VSS
VCC
VSS
4
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
VSS
H26H4J2
AE23
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
3
AD20
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PGA-S478-F02
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
VCC_VID 34
C32
10u-1206
C27
10u-1206
2
C31
22u-1206
L14 4.7u-10%
L13 4.7u-10%
C26
22u-1206
1
VCCP
B B
CPU DECOUPLING CAPACITORS
VCCP
A A
CB15
10u-1206
CB19
10u-1206
CB23
10u-1206
CB31
10u-1206
CB39
10u-1206
CB44
10u-1206
CB49
10u-1206
CB53
10u-1206
CB55
10u-1206
CB16
10u-1206
PLACE CAPS WITHIN CPU CAVITY
8
7
VCCP
CB14
10u-1206
CB28
10u-1206
CB20
10u-1206
CB33
10u-1206
CB46
10u-1206
CB51
10u-1206
CB54
10u-1206
CB40
10u-1206
CB29
10u-1206
6
VCCP
5
CB34
10u-1206
CB41
10u-1206
CB47
10u-1206
CB30
10u-1206
CB35
10u-1206
CB42
10u-1206
CB48
10u-1206
CB214
10u-1206
BOTTOM
VCCP
CB215
10u-1206
5020
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-2
Size Document Number Rev
MS-6547 0A
Custom
4
3
Date: Sheet of
2
6 39Thursday, September 20, 2001
1
![](/html/27/27c4/27c483956c51bca13bda89b4f599da09059e2b0120f15fbabedc01a3ef9396f1/bg7.png)
8
D D
CPUCLK13
CPUCLK-13
5
HDEFER#
HLOCK#5
HTRDY#5
CPURST#5
CPU_GD5
HBPRI#5
RS#[0..2]5
HADS#5
HITM#5
HIT#5
HDRDY#5
HDBSY#5
HBNR#5
C C
HREQ#[0..4]5
HREQ#[0..4]
HA#[3..31]5
B B
VCCP
VCCP VCCP
R122
75
CPUCLK1 ACBE#3
CPUCLK-1 ACBE#2
HLOCK#
HTRDY# AREQ#
CPURST# AGNT#
CPU_GD AFRAME#
HBPRI# AIRDY#
HBR#0 ATRDY#
HBR#05
RS#[0..2]
HADS#
HITM# RBF#
HIT# WBF#
HDRDY# PIPE#
HDBSY#
HBNR#
HREQ#4 ADBIL
HREQ#3
HREQ#2 SBSTB
HREQ#1 SBSTB#
HREQ#0
HA#[3..31]
R104
20
R94
110
HADSTB#15
HADSTB#05
HADSTB#1 ADSTB#0
HADSTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HNCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
HD#[0..63]5
CB115
0.01u
A A
R109
150
CB105
0.01u
place this capacitor
under 650 solder side
8
7
C1XAVSS
C1XAVDD
AH25
AJ25
AJ26
CPUCLK
AH26
CPUCLK#
U26
DEFER#
U24
HLOCK#
V26
HTRDY#
C20
CPURST#
D19
CPUPWRGD
T27
BPRI#
U25
W26
W28
W29
W24
W25
AD24
AA24
AF26
AE25
AH28
AD26
AG29
AE26
AF28
AC24
AG28
AE29
AD28
AC25
AD27
AE28
AF27
AB24
AB26
AC28
AC26
AC29
AA26
AB28
AB27
AA25
AA29
AA28
BREQ0#
T24
RS#2
T26
RS#1
U29
RS#0
V28
ADS#
T28
HITM#
U28
HIT#
DRDY#
V24
DBSY#
V27
BNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
Y27
HREQ#0
HASTB#1
HASTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
Y26
HA#5
Y24
HA#4
Y28
HA#3
RS#2 ASERR#
RS#1 ASTOP#
RS#0
HD#[0..63]
HVREF
CB102
0.1u
C1XAVSS
C1XAVDD
HOST
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
B21
F19
A21
E19
D22
D20
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
R98
150
R101
75
7
HD#57
B22
HD#57
C4XAVSS
C4XAVDD
AH27
AJ27
C4XAVSS
HD#56
C22
B23
HD#56
HD#55
HNCVREF
HVREF
U21
HVREF0
C4XAVDD
HD#55
HD#54
HD#53
A23
D21
HD#54
HD#53
CB94
0.01u
CB97
0.01u
T21
HVREF1
HD#52
F22
HD#52
6
HPCOMP
HNCOMP
HNCVREF
ST0
ST1
ST2
AAD0
AAD1
P21
N21
J17
B20
B19
A19A7F9B7M6M5M4L3L6L4K6L2K3J3K4J2J6J4J1H6F4F1G6E3F5E2E4E1D3D4C2F7C3E6B2D5D6A3D7C5A5C6D8
ST0
ST1
ST2
AAD0
HVREF2
HVREF3
HVREF4
HPCOMP
HNCOMP
AAD1
HNCOMPVREF
AAD2
AAD2
AAD3
AAD3
AAD4
AAD4
AAD5
AAD5
AAD6
AAD6
AAD7
AAD7
5
AAD8
AAD8
AAD9
AAD9
AAD10
AAD10
AAD11
AAD11
AAD12
AAD12
AAD13
AAD13
AAD14
AAD14
AAD15
AAD15
AAD16
AAD16
AAD17
AAD17
AAD18
AAD18
AAD19
AAD19
AAD20
AAD20
AAD21
AAD21
AAD22
AAD22
AAD23
AAD23
AAD24
AAD24
AAD25
AAD25
650-1
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16
D24
HD#51
6
D23
HD#50
C24
HD#49
B24
HD#48
E25
HD#47
E23
HD#46
D25
HD#45
A25
C26
B26
HD#44
HD#43
HD#42
C1XAVDD
C1XAVSS
B27
HD#41
D26
HD#40
B28
HD#39
E26
HD#38
F28
HD#37
CB85
0.01u
G25
HD#36
F27
HD#35
F26
G24
H24
G29
HD#34
HD#33
HD#32
HD#31
L16
80_0603
CP7
1 2
X_COPPER_0
X_80_0603
5
J26
HD#30
L18
G26
HD#29
VCC3
J25
HD#28
H26
G28
HD#27
HD#26
CT14
10u-0805
H28
HD#25
J24
HD#24
K28
HD#23
J29
HD#22
K27
HD#21
J28
HD#20
M24
HD#19
L26
HD#18
K26
HD#17
L25
HD#15
L28
M26
HD#16
HD#15
C4XAVDD
C4XAVSS
4
AAD26
AAD27
AAD28
AAD29
AAD30
AAD26
AAD27
AAD28
AAD29
AAD30
AGP
HD#14
HD#13
HD#12
HD#11
HD#10
P26
L29
N24
N26
M27
HD#14
HD#13
HD#12
HD#11
HD#10
HD#9
4
AAD31
AAD31
HD#9
N28
HD#8
HD#8
P27
HD#7
SBA7
SBA7
HD#7
N29
HD#6
L17
SBA6
SBA6
HD#6
CB84
0.01u
SBA5
SBA4
SBA5
HD#5
R24
R28
HD#5
HD#4
X_80_0603
SBA3
SBA2
SBA1
SBA4
SBA3
SBA2
SBA1
HD#4
HD#3
HD#2
HD#1
M28
P28
R26
HD#3
HD#2
HD#1
L15
80_0603
CP6
1 2
X_COPPER_0
SBA0
C7
R29
HD#0
SBA0
HD#0
ADEVSEL#
AGP8XDET
AD_STB#0
AD_STB#1
AGPRCOMP
AGPVSSREF
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
DBI#3
DBI#2
E21
A27
HDBI#3
HDBI#2
VCC3
CT13
10u-0805
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ASERR#
ASTOP#
APAR
RBF#
WBF#
PIPE#
ADBIH
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB1
AGPCLK
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
DBI#1
DBI#0
H27
R25
HDBI#1
HDBI#0
3
U9A
F6
F3
ACBE#1
H4
ACBE#0HDEFER#
K5
C9
A6
G2
G1
G3
ADEVSEL#
G4
H5
H1
APAR
H3
E8
F8
D9
D10
ADBIH
B3
C4
B5
A4
ADSTB0
K1
L1
ADSTB1
C1
ADSTB#1
D1
AGPCLK0
B10
AGPRCOMP
M1
A1XAVDD
B9
A1XAVSS
A9
A4XAVDD
B8
A4XAVSS
A8
AVREFGC
M3
M2
HDSTBN#3
F20
HDSTBN#2
F23
HDSTBN#1
K24
HDSTBN#0
P24
HDSTBP#3
F21
HDSTBP#2
F24
HDSTBP#1
L24
HDSTBP#0
N25
SIS-SIS650
HDBI#[0..3] 5
3
2
AAD[0..31]
SBA[0..7]
ACBE#[0..3]
ST[0..2]
ADSTB[0..1]
ADSTB#[0..1]
AREQ# 18
AGNT# 18
AFRAME# 18
AIRDY# 18
ATRDY# 18
ADEVSEL# 18
ASERR# 18
ASTOP# 18
APAR 18
RBF# 18
WBF# 18
PIPE# 18
ADBIH 18
ADBIL 18
SBSTB 18
SBSTB# 18
AGPCLK0 3
AVREFGC 18
HDSTBN#3 5
HDSTBN#2 5
HDSTBN#1 5
HDSTBN#0 5
HDSTBP#3 5
HDSTBP#2 5
HDSTBP#1 5
HDSTBP#0 5
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650-1
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
AAD[0..31] 18
SBA[0..7] 18
ACBE#[0..3] 18
ST[0..2] 18
ADSTB[0..1] 18
ADSTB#[0..1] 18
AGPRCOMP
A1XAVDD
CB134
0.1u
A1XAVSSHPCOMP
A4XAVDD
CB136
0.1u
A4XAVSS
2
R160
60_1%
80_0603
CB132
0.01u
L33
L36
80_0603
CB138
0.01u
1 2
X_COPPER_0
X_0_0603
L35
VDDQ
L34
CP15
1 2
X_COPPER_0
X_80_0603
CP17
7 39Friday, September 21, 2001
1
VCC3
CT20
10u-0805
VCC3
CT22
10u-0805
1
![](/html/27/27c4/27c483956c51bca13bda89b4f599da09059e2b0120f15fbabedc01a3ef9396f1/bg8.png)
8
7
6
5
4
3
2
1
MA7
MA8
MA5
MA6
MA14
MA13
MA9
D D
Rs place close to DIMM1
RMD1 MD1 MD0
RMD5 MD5 MD1
RMD4 MD4 MD2
RMD0 MD0 MD3
RMD6 MD6 MD4
RMD2 MD2 MD5
RDQM0 DQM0 MD6
RDQS0 DQS0 MD7
RMD9 MD9 DQM0
RMD8 MD8 DQS0
RMD7 MD7 MD8
RMD3 MD3 MD9 MA2
RMD11 MD11 MD10
RMD10 MD10 MD11
RMD15 MD15 MD12
RMD14 MD14 MD13
RDQM1 DQM1 MD14 MA7
RMD13 MD13 MD15 MA8
RDQS1 DQS1 DQM1 MA9
RMD12 MD12 DQS1 MA10 RMA10
RMD21 MD21 MD16 MA11 RMA11
RMD17 MD17 MD17 MA12 RMA12
RMD16 MD16 MD18 MA13
C C
B B
RMD20 MD20 MD19 MA14
RMD22 MD22 MD20
RMD18 MD18 MD21 SRAS# RSRAS#
RDQM2 DQM2 MD22 SCAS# RSCAS#
RDQS2 DQS2 MD23 SWE# RSWE#
RMD28 MD28 DQM2
RMD24 MD24 DQS2
RMD23 MD23 MD24
RMD19 MD19 MD25 CS-0
RMD31 MD31 MD26
RMD27 MD27 MD27 CS-2
RMD30 MD30 MD28 CS-3
RMD26 MD26 MD29
RDQM3 DQM3 MD30
RDQS3 DQS3 MD31
RMD25 MD25 DQM3
RMD29 MD29 DQS3
RMD37 MD37 MD32 CKE0
RMD33 MD33 MD33 CKE1
RMD36 MD36 MD34 CKE2
RMD32 MD32 MD35 CKE3
RMD38 MD38 MD36 CKE4
RMD34 MD34 MD37 CKE5
RDQM4 DQM4 MD38
RDQS4 DQS4 MD39
RMD44 MD44 DQM4
RMD40 MD40 DQS4
RMD35 MD35 MD40 SDCLK
RMD39 MD39 MD41
RDQS5 DQS5 MD42 FWDSDCLKO
RDQM5 DQM5 MD43
RMD41 MD41 MD44
RMD45 MD45 MD45
RMD47 MD47 MD46
RMD43 MD43
RMD42 MD42 DQS5
RMD55 MD55 MD48 SDAVSS
RDQS6 DQS6 MD49
RMD54 MD54 MD50
RDQM6 DQM6 MD51 DDRAVDD
RMD53 MD53 MD52
RMD52 MD52 MD53 DDRAVSS
RMD49 MD49
RMD48 MD48 MD55
RMD56 MD56 DQM6
RMD60 MD60 DQS6 DDRVREFA
RMD51 MD51 MD56 DDRVREFB
RMD50 MD50 MD57
RMD62 MD62
RDQM7 DQM7 MD59 DDRAVDD
RMD57 MD57
RMD61 MD61 MD61
RMD63 MD63
RMD58 MD58
RDQS7 DQS7
1 2
RN3
3 4
5 6
10
7 8
1 2
RN5
3 4
5 6
10
7 8
RN7101 2
3 4
5 6
7 8
RN11101 2
3 4
5 6
7 8
RN9101 2
3 4
5 6
7 8
1 2
RN15
3 4
5 6
10
7 8
1 2
RN17
3 4
5 6
10
7 8
RN23101 2
3 4
5 6
7 8
RN29101 2
3 4
5 6
7 8
RN26101 2
3 4
5 6
7 8
1 2
RN38
3 4
5 6
10
7 8
1 2
RN40
3 4
5 6
10
7 8
RN41101 2
3 4
5 6
7 8
RN44101 2
3 4
5 6
7 8
RN47101 2
3 4
5 6
7 8
1 2
RN51
3 4
5 6
10
7 8
1 2
RN49
3 4
5 6
10
7 8
RN53101 2
3 4
5 6
7 8
RN56101 2
3 4
5 6
7 8
1 2
3 4
RN60
5 6
7 8
10
MD47RMD46 MD46
DQM5 SDAVDD
MD54
MD58
MD60
MD62RMD59 MD59
MD63
DQM7
DQS7
A A
8
7
6
AJ23
AG22
AH21
AJ21
AD23
AE23
AF22
AF21
AD22
AH22
AD21
AG20
AE19
AF19
AE21
AD20
AD19
AH19
AF20
AH20
AF18
AG18
AH17
AD16
AD18
AD17
AF17
AJ17
AE17
AH18
AD14
AG14
AJ13
AE13
AJ15
AF14
AD13
AF13
AH13
AH14
AD10
AH10
AG10
AF10
AE9
AD8
AH9
AF9
AD9
AJ9
AH5
AG4
AE5
AH3
AG6
AF6
AF5
AF4
AH4
AJ3
AE4
AD6
AE2
AC5
AG2
AG1
AF3
AC6
AD4
AF2
AB6
AD3
AA6
AB3
AC4
AE1
AD2
AC1
AB4
AC2
U9B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB#0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB#2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB#3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB#4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7
SIS530_0
650-2
5
MA10
MA11
MA12
MA13
MA14
SRAS#
SCAS#
SWE#
CS#0
CS#1
CS#2
CS#3
CS#4
CS#5
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
SDCLK
FWDSDCLKO
SDRCLKI
SDAVDD
SDAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
AH11
AF12
AH12
AG12
AD12
AH15
AF15
AH16
AE15
AD15
AF11
AG8
AJ11
AG16
AF16
AH8
AJ7
AH7
AE7
AF7
AH6
AJ5
AF8
AD7
AB2
AA4
AB1
Y6
AA5
Y5
Y4
AA3
AD11
AE11
Y1
Y2
AA1
AA2
AJ19
AH2
R183 4.7K
W3
4
RN2210
RN2010
MA5
MA6
CS-1
CS-5
CS-4
R137 22
RMA7
78
RMA8
56
RMA5
34
RMA6
12
78
RMA14
56
RMA13
34
RMA9
12
Rs place close to DIMM1
R74 10
R70 10
R69 10
R68 10
R67 10
R75
R92 10
R78 10
R99 0
R108 0
R103 0
10
R105 10
RN45 10
R102 10
S3AUXSW#
R185 4.7K
C68
10u-1206
78
56
34
12
3
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..5]
CKE[0..5]
RMA0MA0
RMA1MA1
RMA2
RMA3MA3
RMA4MA4
RSRAS# 11,12,13
RSCAS# 11,12,13
RSWE# 11,12,13
RCS-0
RCS-2
RCS-1
RCS-3
RCS-5
RCS-4
S3AUXSW# 35
VCC3SBY
SDCLK 3
FWDSDCLKO 4
RMD[0..63] 11,12,13
RDQM[0..7] 11,12,13
RDQS[0..7] 11,12,13
RMA[0..14] 11,12,13
RCS-[0..5] 11,12,13
CKE[0..5] 11,12
VCCM
R121
VCCM
L46
080/0603
CP21
1 2
X_COPPER_0
150
R123
150
R155
150
R154
150
VCC3
CT25
10u-0805
VCC3VCC3SBY
CT24
10u-0805
8 39Friday, September 21, 2001
1
CB108
CB153
0.1u
CB152
0.01u
0.01u
CB113
0.01u
CB139
0.01u
CB140
0.01u
CB154
0.01u
L44 X_80_0603
L41
80_0603
CP18 X_COPPER_0
1 2
L37 X_80_0603
DDRVREFA
DDRVREFB
SDAVDD
SDAVSS
CB151
0.1u
DDRAVSS
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650-2
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
2
![](/html/27/27c4/27c483956c51bca13bda89b4f599da09059e2b0120f15fbabedc01a3ef9396f1/bg9.png)
8
D D
ZAD[0..15]14
ZSTB[0..1]14
ZSTB-[0..1]14
ZAD[0..15]
ZSTB[0..1]
ZSTB-[0..1]
C C
VCC1_8
CB155
R168
0.1u
150
CB150
R164
0.1u
150
B B
VCC3
L42
80_0603
C88
10u-0805
C87
A A
10u-0805
VCC3
CP19
1 2
X_COPPER_0
L39
80_0603
CP20
1 2
X_COPPER_0
L38X_80_0603
L43X_80_0603
8
ZVREF
C83
0.1u
0.1u
C85
Z1XAVDD
Z1XAVSS
Z4XAVSS
7
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
ZCLK03
ZUREQ14
ZDREQ14
VCC1_8
C90
10u-0805
7
6
NB Hardware Trap Table
DLLEN#
DRAM_SEL
TRAP0
TRAP1
CSYNC
RSYNC
LSYNC
ZCLK0
ZUREQ
ZDREQ
ZSTB0 ROUT
ZSTB-0 GOUT
ZSTB1
ZSTB-1 HSYNC
ZAD0
ZAD1 DDC1CLK TRAP1
ZAD2 DDC1DATA
ZAD3 CSYNC
ZAD4
ZAD5 INTA# LSYNC
ZAD6
ZAD7
ZAD8 CSYNC
ZAD9 RSYNC
ZAD10 LSYNC
ZAD11
ZAD12
ZAD13 VCOMP
ZAD14 VRSET
ZAD15 VVBWN ENTEST
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P DACAVSS2
VSSZCMP
Z1XAVDD DCLKAVSS
Z1XAVSS
Z4XAVDD ECLKAVSS
Z4XAVSS
L40
80_0603
CP22
1 2
X_COPPER_0
0
enable PLL disable PLL
SDR DDR
normal NB debug mode
TV selection, NTSC/PAL(0/1) 0
enable VB
enable VGA interface
enable panel link
U9C
SIS530_0
V3
ZCLK
U6
ZUREQ
U1
ZDREQ
T3
ZSTB0
T1
ZSTB#0
P1
ZSTB1
P3
ZSTB#1
T4
ZAD0
R3
ZAD1
T5
ZAD2
T6
ZAD3
R2
ZAD4
R6
ZAD5
R1
ZAD6
R4
ZAD7
P4
ZAD8
N3
ZAD9
P5
ZAD10
P6
ZAD11
N1
N6
N2
N4
U3
V5
U4
U2
V6
W1
W2
V2
V1
PCIRST1#19,28
PWRGD15,35,36
AUXOK15,34
L45X_80_0603
ZAD12
ZAD13
ZAD14
ZAD15
ZVREF
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
C89
0.1u
PCIRST1#
PWRGD
AUXOK
HyperZip
R165 56
R167 56
6
5
1
VGA
Stereo
Glass
650-3
PCIRST#
PWROK
AUXOK
Y3W4W6
5
D11
TRAP1
TRAP1
E10
TRAP0
A10
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Default
1(DDR)
TESTMODE2
TESTMODE1
TESTMODE0
F11
C11
DLLEN#
E11
0
0
0
1
0
ENTEST
F10
ENTEST
4
embedded pull-low
(30~50K Ohm)
yes
yes
yes
C15
VOSCI
A12
ROUT
B13
GOUT
A13
BOUT
F13
R132 33
HSYNC
R128 33
E13
VSYNC
R129 0
D13
VGPIO0
D12
VGPIO1
B11
INT#A
E12
CSYNC
A11
RSYNC
F12
LSYNC
E14
VCOMP
D14
VRSET
F14
VVBWN
B12
DACAVDD1
C12
DACAVSS1
C13
DACAVDD2
C14
DACAVSS2
B15
DCLKAVDD
A15
DCLKAVSS
B14
ECLKAVDD
A14
ECLKAVSS
DCLKAVDD
DCLKAVSS
ECLKAVSSZ4XAVDD
4
3
REFCLK0
BOUT
VSYNC RSYNC
DACAVDD1 PWRGD
DACAVSS1
DACAVDD2
DCLKAVDD
ECLKAVDD
L24
CB119
0.1u
CB120
0.1u
CP9
1 2
X_COPPER_0
X_80_0603
L26 80_0603
CP10
1 2
X_COPPER_0
L27 X_80_0603
80_0603
L25
REFCLK0 3
ROUT 36
GOUT 36
BOUT 36
HSYNC 36
VSYNC 36
DDC1CLK 36
DDC1DATA 36
INTA# 14,18,19,20,21
CSYNC 18
RSYNC 18
LSYNC 18
VCC3
CE2
10u-0805
VCC3
CE3
10u-0805
DACAVDD1
DACAVSS1
VVBWN VRSET
VCOMPECLKAVDD
DACAVDD2
DACAVSS2
3
for 650 only
CB104
CB100
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
2
0.1u
0.1u
2
R158 X_4.7K
R146 X_4.7K
R159 X_4.7K
R161 X_4.7K
R142 4.7K
C92 X_0.1u
CB128
0.1u
CB106
1u
L23 X_80_0603
L31
80_0603
CP13
1 2
X_COPPER_0
L19
80_0603
CP8
1 2
X_COPPER_0
L30X_80_0603
VCC1_8
VCC1_8
CE1
10u-0805
1
VCC3
CE6
10u-0805
R127
130
9 39Friday, September 21, 2001
1
![](/html/27/27c4/27c483956c51bca13bda89b4f599da09059e2b0120f15fbabedc01a3ef9396f1/bga.png)
8
VCCP VCC1_8 VCC3
H21
H22
J16
J20
PVDDP
PVDDP
L19
N19
VTT
PVDDP
PVDDP
R19
VCC1_8
U19
VTT
VTT
PVDDP
PVDDP
W19
J21
VTT
VTT
VSS
M12
VCCP
A16
VTT
A17
VTT
A18
VTT
B16
VTT
B17
AE10
AE12
AE14
AE16
AE18
AE20
AE22
W18
AA10
AA13
AA14
AA15
AA16
AA17
AB13
AB17
VTT
B18
VTT
C16
VTT
C17
VTT
C18
VTT
D15
VTT
D16
VTT
D17
VTT
D18
VTT
E15
VTT
E16
VTT
E17
VTT
E18
VTT
F15
VTT
F16
VTT
F17
VTT
F18
VTT
AB5
VDDM
AD5
VDDM
AE6
VDDM
AE8
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
V10
VDDM
V11
VDDM
VDDM
Y9
VDDM
Y10
VDDM
Y12
VDDM
Y14
VDDM
Y16
VDDM
Y18
VDDM
Y19
VDDM
AA8
VDDM
AA9
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
AB8
VDDM
AB9
VDDM
VDDM
VDDM
E5
VDDQ
E7
VDDQ
E9
VDDQ
G5
VDDQ
J5
VDDQ
L5
VDDQ
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
J10
VDDQ
J13
VDDQ
K9
VDDQ
K11
VDDQ
K13
VDDQ
L10
VDDQ
N9
VDDQ
N10
VDDQ
N5
VDDZ
R5
VDDZ
U5
VDDZ
W5
VDDZ
P9
VDDZ
P10
VDDZ
R9
VDDZ
R10
VDDZ
T9
VDDZ
T10
VDDZ
T11
VDDZ
D D
VCCM
C C
VDDQ
B B
VCC1_8
A A
L17
8
7
J22
K16
K17
K18
K19
K20
K21
L20
M20
N20
P20
R20
R21
T20
U20
V20
W20
Y20
Y21
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M13
M14
M15
M16
M17
M18
N12
N13
N14
N15
N16
N17
N18
VSS
P12
P13
P14
P15
P16
P17
7
6
AA20
AA21
AA22
AB21
AB22
L12
L14
L15
VTT
VTT
VTT
VTT
VTT
IVDD
IVDD
650-4
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P18
R12
VSS
R13
R14
R15
R16
R17
R18
T12
6
IVDD
VSS
5
VCC3SBY
L16
L18
M11
M19
N11
P19
R11
T19
U11
V19
W11
W13
W15
W17
P11
J14
J15
K15
K10
K12
K14
M10
W10
Y11
Y13
Y15
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T13
T14
T15
T16
T17
T18
U12
U13
VSS
U14
U15
U16
U17
U18
V12
V13
VSS
V14
PVDDZ
VSS
VSS
V15
V16
OVDD
VSS
V17
OVDD
VSS
V18
OVDD
VSS
PVDD
B25
PVDD
VSS
C28
PVDD
VSS
C29
PVDD
VSS
D27
VSS
D28
PVDDM
PVDDM
VSS
VSS
E28
E29
PVDDM
PVDDM
VSS
VSS
AF23
5
Y17
PVDDM
VSS
AF24
AF25
VSS
AG24
AUX1.8
AUX3.3
VSS
AG26
4
U9D
U10
VCC1_8SBY
U9
VCC3SBY
A20
VSS
A22
VSS
A24
VSS
A26
VSS
C19
VSS
C21
VSS
C23
VSS
C25
VSS
C27
VSS
E20
VSS
E22
VSS
E24
VSS
F25
VSS
H25
VSS
K25
VSS
M25
VSS
P25
VSS
T25
VSS
V25
VSS
Y25
VSS
AB25
VSS
AD25
VSS
E27
VSS
G27
VSS
J27
VSS
L27
VSS
N27
VSS
R27
VSS
U27
VSS
W27
VSS
AA27
VSS
AC27
VSS
AE27
VSS
D29
VSS
F29
VSS
H29
VSS
K29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH23
AH24
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2
P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27
SIS645
VDDQ
CB146
0.1u
CB149
0.1u
Place these capacitors under 635 solder side
VCCP
4
CB216
0.1u
CB218
0.1u
CB222
0.1u
CB217
0.1u
VCCP
3
VCC1_8
3
VCC3SBY
CB112
1u
CB107
1u
CB63
1u
CB81
1u
CB145
0.1u
CB144
0.1u
CB229
0.1u
CB228
0.1u
CB220
0.1u
CB219
0.1u
2
VCC3
CB114
1u
CB162
1u
CB163
0.1u
CB116
0.1u
CB86
0.1u
CB64
0.1u
CB38
0.1u
VCCM
CT18
10u_0805
CT21
10u_0805
VCCM
CB221
0.1u
CB223
0.1u
CB230
0.1u
CB226
0.1u
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650-4
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
CB211
0.1u
CB213
0.1u
VCC3
CB227
CB224
0.1u
0.1u
VCC1_8SBY
CB148
0.1u
CB121
0.1u
2
CB156
1u
CB164
0.1u
VCC3SBY
VDDQ
1
CB103
1u
CB133
0.1u
CB225
0.1u
CB232
0.1u
CB233
0.1u
CB231
0.1u
10 39Thursday, September 20, 2001
1
![](/html/27/27c4/27c483956c51bca13bda89b4f599da09059e2b0120f15fbabedc01a3ef9396f1/bgb.png)
8
RMD[0..63]8,12,13
RMA[0..14]8,12,13
RDQM[0..7]8,12,13
RDQS[0..7]8,12,13
RMA[0..14]
RDQM[0..7] RDQM[0..7]
RDQS[0..7]
D D
NOTE:
VDDID IS A TRAP ON THE DIMM
MODULE TO INDICATE:
VDDID
REQUIRED POWER
OPEN
VDD=VDDQ
GND
VDD!=VDDQ
MEMORY MUX TABLE:
C C
DDR
SDR
CS0
CS0
CS1
CS1
CS2
CS2
CS3
CS3
CS4
CS4
CS5 CS5
CSB0
DQS0
CSB1
DQS1
CSB2
DQS2
CSB3
DQS3
DQS4
CSB4
DQS5
CSB5
DQS6
CSB6
DQS7
CSB7
VCCM VCCM
R72 8.2K R71 8.2K
B B
9,21,22
9,21,22
9,21,22
RCS-[0..5]8,12,13
A A
DDRCLK[0..8]4,12
DDRCLK-[0..8]4,12
RCS-[0..5]
CKE[0..5]
CKE[0..5]8,12
DDRCLK[0..8]
DDRCLK-[0..8]
8
7
VCCM
120
148
168
184
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDD
VDD
VDD
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
5
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
9
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
VDD
VSS
176
VCC3
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA13
RMA14
RMA11
RMA12
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS7
RSRAS#
RSRAS#8,12,13
RSCAS#
RSCAS#8,12,13
RSWE#
RSWE#8,12,13
RCS-0
RCS-1
CKE0
CKE1
DDRCLK1
DDRCLK8
DDRCLK2
DDRCLK-1
DDRCLK-8
DDRCLK-2
7
6
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
124
132
139
145
152
160
VDDQ
VSS
116
VDDQ
VSS
100
VDDQ
VSS
VDDQ
VDDQ
addr =
1010000b
VSS
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VDDID
VSS
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VREF
SDA
VSS
6
SCL
VDDQ
WP
SA0
SA1
SA2
VSS
15223054627796
VDDQ
VSS
3111826344250586674818993
5
DIMM1
RMD0
2
RMD1
4
RMD2
6
RMD3
8
RMD4
94
RMD5
95
RMD6
98
RMD7
99
RMD8
12
RMD9
13
RMD10
19
RMD11
20
RMD12
105
RMD13
106
RMD14
109
RMD15
110
RMD16
23
RMD17
24
RMD18
28
RMD19
31
RMD20
114
RMD21
117
RMD22
121
RMD23
123
RMD24
33
RMD25
35
RMD26
39
RMD27
40
RMD28
126
RMD29
127
RMD30
131
RMD31
133
RMD32
53
RMD33
55
RMD34
57
RMD35
60
RMD36
146
RMD37
147
RMD38
150
RMD39
151
RMD40
61
RMD41
64
RMD42
68
RMD43
69
RMD44
153
RMD45
155
RMD46
161
RMD47
162
RMD48
72
RMD49
73
RMD50
79
RMD51
80
RMD52
165
RMD53
166
RMD54
170
RMD55
171
RMD56
83
RMD57
84
RMD58
87
RMD59
88
RMD60
174
RMD61
175
RMD62
178
RMD63
179
DDRVREF
1
82
90
92
91
181
182
183
DDR SDRAM DIMM
5
WP
SMBCLK
SMBDAT
RMD[0..63]
RMA[0..14]
RDQS[0..7]
4
VCCM
VCC3
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA13
RMA14
RMA11
RMA12
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6RDQS6
RDQS7
RSRAS#
RSCAS#
RSWE#
RCS-2
RCS-3
CKE2 WP
CKE3 SMBCLK
DDRCLK0
DDRCLK7
DDRCLK3
DDRCLK-0
DDRCLK-7
DDRCLK-3
4
120
148
168
184
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
3
VDD
VDD
VDD
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
5
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
9
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
3
2
DIMM2
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
116
124
132
139
145
152
160
176
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
addr =
1010001b
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
B
Date: Sheet of
15223054627796
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RMD0
2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VREF
VDDID
WP
SCL
SDA
SA0
SA1
SA2
VSS
VSS
VSS
VSS
VSS
VSS
DDR1 & DDR2
MS-6547 0A
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179
1
82
90
92
91
181
182
183
VSS
VSS
DDR SDRAM DIMM
3111826344250586674818993
RMD1
RMD2
RMD3
RMD4
RMD5
RMD6
RMD7
RMD8
RMD9
RMD10
RMD11
RMD12
RMD13
RMD14
RMD15
RMD16
RMD17
RMD18
RMD19
RMD20
RMD21
RMD22
RMD23
RMD24
RMD25
RMD26
RMD27
RMD28
RMD29
RMD30
RMD31
RMD32
RMD33
RMD34
RMD35
RMD36
RMD37
RMD38
RMD39
RMD40
RMD41
RMD42
RMD43
RMD44
RMD45
RMD46
RMD47
RMD48
RMD49
RMD50
RMD51
RMD52
RMD53
RMD54
RMD55
RMD56
RMD57
RMD58
RMD59
RMD60
RMD61
RMD62
RMD63
DDRVREF
SMBDAT
2
1
DDRVREF 12
WP 12
SMBCLK 3,4,12,15,27,39
SMBDAT 3,4,12,15,27,39
VCC3
11 39Thursday, September 20, 2001
1
![](/html/27/27c4/27c483956c51bca13bda89b4f599da09059e2b0120f15fbabedc01a3ef9396f1/bgc.png)
8
RMD[0..63]8,11,13
RMA[0..14]8,11,13
RDQM[0..7]8,11,13
RDQS[0..7]8,11,13
RMD[0..63]
RMA[0..14]
RDQM[0..7]
RDQS[0..7]
D D
C C
VCCM
R73 8.2K
B B
RSRAS#8,11,13
RSCAS#8,11,13
RSWE#8,11,13
RCS-[0..5]8,11,13
CKE[0..5]8,11
A A
DDRCLK[0..8]4,11
DDRCLK-[0..8]4,11
RCS-[0..5]
CKE[0..5]
DDRCLK[0..8]
DDRCLK-[0..8]
8
7
VCCM
120
148
168
184
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
VDD
VDD
VDD
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
5
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
9
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
VDD
VSS
176
VCC3
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA13
RMA14
RMA11
RMA12
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
RSRAS#
RSCAS#
RSWE#
RCS-4
RCS-5
CKE4 WP
CKE5 SMBCLK
DDRCLK4
DDRCLK6
DDRCLK5
DDRCLK-4
DDRCLK-6
DDRCLK-5
7
6
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
124
132
139
145
152
160
VDDQ
VSS
116
VDDQ
VSS
100
VDDQ
VSS
VDDQ
VDDQ
addr =
1010010b
VSS
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
VSS
VDDQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VDDID
VSS
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VREF
SDA
VSS
6
SCL
VDDQ
WP
SA0
SA1
SA2
VSS
15223054627796
VDDQ
VSS
3111826344250586674818993
5
DIMM3
RMD0
2
RMD1
4
RMD2
6
RMD3
8
RMD4
94
RMD5
95
RMD6
98
RMD7
99
RMD8
12
RMD9
13
RMD10
19
RMD11
20
RMD12
105
RMD13
106
RMD14
109
RMD15
110
RMD16
23
RMD17
24
RMD18
28
RMD19
31
RMD20
114
RMD21
117
RMD22
121
RMD23
123
RMD24
33
RMD25
35
RMD26
39
RMD27
40
RMD28
126
RMD29
127
RMD30
131
RMD31
133
RMD32
53
RMD33
55
RMD34
57
RMD35
60
RMD36
146
RMD37
147
RMD38
150
RMD39
151
RMD40
61
RMD41
64
RMD42
68
RMD43
69
RMD44
153
RMD45
155
RMD46
161
RMD47
162
RMD48
72
RMD49
73
RMD50
79
RMD51
80
RMD52
165
RMD53
166
RMD54
170
RMD55
171
RMD56
83
RMD57
84
RMD58
87
RMD59
88
RMD60
174
RMD61
175
RMD62
178
RMD63
179
DDRVREF
1
R162 4.7K
82
90
92
91
181
182
183
DDR SDRAM DIMM
5
SMBDAT
VCC3
WP 11
SMBCLK 3,4,11,15,27,39
SMBDAT 3,4,11,15,27,39
VCC3
4
CKE3
CKE2
CKE0
CKE1
CKE4
CKE5
VCCM
R43
75
R41
75
VCCM
4
3
RN13
1 2
3 4
5 6
7 8
470
R53 470
R52 470
DDRVREF GEN. & DECOUPLING
CB6
0.01u
CB4
0.01u
DIMM DECOUPLING
CB11
0.1u
CB143
0.1u
CB99
0.1u
CB79
0.1u
CB68
0.1u
CB24
0.1u
3
2
VCCM
CB5
0.01u
CB12
0.1u
CB130
0.1u
CB59
0.1u
CB80
0.1u
CB60
0.1u
CB91
0.1u
DDRVREF
CB3
0.01u
DDRVREF 11
CB142
0.1u
CB129
0.1u
CB98
0.1u
CB67
0.1u
CB25
0.1u
CB90
0.1u
MICRO-STAR INT'L CO.,LTD.
Title
DDR3
Size Document Number Rev
MS-6547 0A
B
Date: Sheet of
2
1
12 39Thursday, September 20, 2001
1