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MS-6534
Schematics
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MSI MS-6534 Schematics

8
7
6
5
4
3
2
1
Cover Sheet Block Diagram
1 2
MS-6534
Version 0A
INTEL (R) Brookdale Chipset
GPIO Spec. 3
D D
Clock CY28324 & ATA100 IDE CONNECTORS mPGA478-B INTEL CPU Sockets
4
5 - 6
Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
INTEL Brookdale MCH -- North Bridge INTEL ICH2 -- South Bridge LPC I/O W83627HF PCI AUDIO-CMI8738 AC'97 Codec
C C
Audio Amp TL072 & GAME
FWH -- BIOS & CNR RISER SDR DIMM-168PIN DIMM1,2
7 - 8 9 - 10
11 12 13 14 15 16
Willamette/Northwood mPGA-478B Processor
System Brookdale Chipset:
INTEL MCH (North Bridge) + INTEL ICH2 (South Bridge)
On Board Chipset:
BIOS -- FWH LPC Super I/O -- W83627HF Clock Generation -- CY28324
AGP 4X SLOT (1.5V) PCI SLOT 1 & 2 & 3 Front Panel & Connectors 19
USB & FAN Connectors
B B
AUDIO 4/6 CHANNEL CONTROL Votlage Regulator
17 18
20 21 22
(OPTION)
Expansion Slots:
PCI SOUND -- C-MEDIA CMI8738
AGP2.0 SLOT * 1 PCI2.2 SLOT * 3 CNR SLOT * 1
5
23 24 25 26
27,28
Standard: Option1: Option2:
4
2 Channel S/W Audio-Realtek ALC201A 6 Channel H/W Audio-C media 8738 4 Channel S/W Audio-Sigmatel 9708
Micro-Star
Document Number
Last Revision Date:
3
Wednesday, May 09, 2001
Title
2
MS-6534
Cover Sheet
Sheet of
Rev
0A
1 29
1
HIP6301V CPU Power ( PWM )-VRM9.X IO Connectors JUMPER SETTING MANUAL LAYOUT GUIDE
A A
POWER DELIVERY MAP 29
8
7
6
8
D D
AGP 4X(1.5V) AGP CONN
7
Power Supply CONN
AGP 4X (1.5V)
6
VRM
9.X
4X (66MHz) AGP
(593PINS/FCBGA)
5
(478PINS)
Willamette/Northwood Socket (mPGA478-B)
(400MHz)
Scalable Bus
MCH: Memory
Controller HUB
4
3
2
1
(100MHz)
CK408 Clock
(100MHz) Scalable Bus/2
(133MHz)
DIMM 1:2
( 66MHz X 4 )
HUB Interface
(14.318MHz)
C C
ICH2: I/O
IDE CONN 1&2
USB Port 0:3
(360PINS/EBGA)
(48MHz)
LPC Bus AC Link
Controller HUB
(33MHz)
(33MHz)
FWH: Firmware HUB
SIO
B B
PS2 Mouse & Keyboard
Parallel (1) Serial (2) Game (1)
Floppy Disk Drive CONN
PCI (33MHz)
PCI Audio / C-MEDIA CMI8738
AC '97 Audio
Codec
Audio In
Line In
CD-ROM
Telephone In
MIC In
PCI Slots 1:3
SPDIF/OUT
CNR Riser
AMP
Line Out
A A
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Friday, May 11, 2001
2
MS-6534
Block Diagram
Sheet of
Rev
0A
2 29
1
5
4
3
2
1
General Purpose I/O Spec.
D D
FWHICH2
Power
GPIO 0
*
GPIO 1 GPIO 2 GPIO 3~5 GPIO 6 GPIO 7
C C
*
GPIO 8 GPIO 9 GPIO 10 GPIO 11
*
GPIO 12 GPIO 13 GPIO 14~15 GPIO 16 GPIO 17
B B
GPIO 18 GPIO 19 GPIO 20 GPIO 21 GPIO 22 GPIO 23 GPIO 24 GPIO 25 GPIO 26
A A
GPIO 27 GPIO 28 GPIO 29~31
I
Non Connect(REQA#) I I
INTE# I
Non Connect(INT[F:H]#) I
AC97 Enabled/Disabled I
Non Connect I
LAN_WAKE#
Not Implemented
Not Implemented I
Non Connect(SMB_ALERT) I
External SMI I
LPC PME
Not Implemented O
Non Connect(GNTA#) O
Non Connect(GNT5#) O
Non Connect O
Non Connect O
Non Connect Main O
OD
O
BIOS Locked/Unlocked
I/O
Non Connect
I/O
Not Implemented
I/O
Audio 6 channel control
I/O
Not Implemented
Main MainNon Connect(REQ5#) Main Main Main Main Resume
Resume Resume Resume
Main Main Main Main
MainNon Connect MainNon Connect Main ResumeNon Connect Resume
Resume ResumeNon Connect
*: Reserve For Auto Detect
5
4
3
GPIO Pin Type FunctionFunctionTypeGPIO Pin
GPI 0 GPI 1 GPI 2 GPI 3
DEVICE
PCI Slot 1
I
ATA IDE 1 Detect
I
ATA IDE 2 Detect Reserved
I I
Reserved
ICH INT Pin
INTA# INTB# INTC# INTD#
PCI Slot 2 INTB#
INTC# INTD# INTA#
PCI Slot 3
INTC# INTD# INTA# INTB#
PCI Audio INTF# AD25
Micro-Star
Document Number
Last Revision Date:
2
Friday, May 11, 2001
IDSEL
AD16
AD17
AD18
Title
MS-6534
GPIO Spec.
Sheet of
1
Rev
0A
3 29
8
for good filtering from 10K~1M
CP3
X_COPPER
VCC3
D D
VCC3
*Put GND copper under Clock Gen. connect to every GND pin
* 40 mils Trace on Layer 4 with GND copper around it * put close to every power pin
C C
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Different mode spacing 7mils on itself
*
VCC3
VCCP
FB1 X_600
CB1
0.1u
for good filtering from 10K~1M
FB2 X_600
CB5
0.1u
R559 10K
R560
1 2
220
+
Rubycon
10u
CP4
X_COPPER
+
Rubycon
10u
Q53 NPN-3904LT1-S-SOT23
CT1
CT2
7
6
5
4
3
2
1
*Trace less 0.5"
CLOCK GENERATOR BLOCK Shut Source Termination Resistors
CPUCLK
R3 49.9
CPUCLK#
U1
39
CPU_VDD
VCC3V
SMBCLK SMBDATA
VTT_GD#
CB2
0.1u
CB3
0.1u
CB4
0.1u
CB6
0.1u
CB7
0.1u
CB8
0.1u
CB9
0.1u
CB10
0.1u
36
CPU_GND
46
MREF_VDD
43
MREF_GND
29
3V66_GND
9
PCI_VDD
5
PCI_GND
18
PCI_VDD
13
PCI_GND
24
48_VDD
21
48_GND
2
REF_VDD
47
REF_GND
34
CORE_VDD
33
CORE_GND
26
SCLK
25
SDATA
19
VTT_GD#
CYP-CY28324
ICS950208 CY28323
3VMREF/CPU_STP#
3VMREF#/PCI_STP#
FS2/PCI_F0 FS3/PCI_F1
MODE/PCI_F2
FS1/24_48MHz
CB418 1u
R15 X_0
CB419 1u
SMBCLK10,11,15,16
SMBDATA10,11,15,16
CPU0
CPU0#
CPU1
CPU1#
3V66_03V66_VDD 3V66_1 3V66_2 3V66_3
FS4/PCI0
PCI1 PCI2 PCI3 PCI4 PCI5 PCI6
FS0/48MHz
MUL0/REF0 MUL1/REF1
IREF
RST#
PWR_DN#
41
R5 33
40
R7 33
38
R10 33
37
R12 33
45 44
3132 30 28 27
6 7 8
10 11 12 14 15 16 17
22 23
48 1
3
X1
4
X2
35 20
42
C_STP P_STP
1 2
RN1
3 4
33
5 6 7 8
3V66_3
FS2
MODE
FS3
RN48
MODE
FS2
33
FS4
R555 33
7 8
RN3
5 6
33
3 4 1 2
FS0
R26 33
FS1
R27 33
MUL0
R557 33
MUL1 AUDIO_14
R558 33
32pF
X1 14M-32pf-HC49S-D
R35 475
CRST#
R38 4.7K
1 2 3 4 5 6 7 8
22pC21
22pC23
CPUCLK CPUCLK#
MCHCLK MCHCLK#
MCH_66 ICH_66 AGPCLK
10pC517
SIO_PCLK FWH_PCLK ICH_PCLK
PCICLK4 PCICLK0
PCICLK1 PCICLK2
ICH_48 SIO_48
ICH_14
VCC3V
CPUCLK 5 CPUCLK# 5
MCHCLK 7 MCHCLK# 7
MCH_66 7 ICH_66 10 AGPCLK 17
SIO_PCLK 11 FWH_PCLK 15 ICH_PCLK 9
PCICLK4 12 PCICLK0 18
PCICLK1 18 PCICLK2 18
ICH_48 10 SIO_48 11
ICH_14 10 AUDIO_14 12
VCC3V
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
VCC3
C607
X_0.1u
C608
X_0.1u
R4 49.9
MCHCLK
R6 49.9
MCHCLK#
R8 49.9
FS4
R16 10K
FS3
R17 10K
FS1
R18 X_10K R20 10K
FS0
R22 10K R23 X_10K
FS2
R24 10K R693 X_10K
MODE
R28 10K
MUL0
R30 10K R31 X_10K
MUL1
R32 10K R33 X_10K
CRST# VCC3V
R34 10K
SMBCLK
R36 4.7K
SMBDATA
R39 4.7K
C_STP
R13 X_1K
P_STP
R14 X_1K
VCC3V VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3
VCC3V
Pull-Down Capacitors
MCH_66 ICH_66 AGPCLK
SIO_PCLK FWH_PCLK ICH_PCLK
PCICLK0 PCICLK1 PCICLK2
PCICLK4
AUDIO_14
ICH_48 SIO_48
ICH_14
used only for EMI issue
Trace less 0.2"
CN16
1
2
3
4
5
6
7
8
X_10p CN17 X_10p
7
8
5
6
3
4
1
2
CN18 X_10p
7
8
5
6
3
4
1
2
X_10pC519
X_10pC520
10pC18
10pC19
10pC22
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0
R757 10K
R41 4.7K IDE1 R43 33
C24 220p
1 2
U2A DM7407-SOIC14 (VCC5_SB)
7
B B
A A
RESET BLOCK
PDD[0..7]10
PCIRST#9 PCIRST#1 7,11,12,15 PCIRST#2 17,18
8
HD_RST# HD_RST#
PD_DREQ10
PD_IOW#10
PD_IOR#10 PD_IORDY10 PD_DACK#10
IRQ149 PD_A110 PD_A010
PD_CS#110
PD_LED19
PCIRST#
D2x20-1:21-BL-ZBT
1
2 3 4 5 6 7 8 91110
12
13 14
1615
17 18 19
22
21
24
23
26
25 27 29 31 33 35 37
R53 10K
VCC3 VCC3
R57 330
C521
R45 470
28
30
32
34
36
38
4039
C25 X_4700p
VCC3 VCC3
X_10P
6
ATA100 IDE CONNECTORS
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
PDD[8..15] 10
PD_DET 15 PD_A2 10 PD_CS#3 10
PCIRST#
3 4
U2B DM7407-SOIC14 (VCC5_SB)
5
R58 330
SD_IOR#10
SD_LED19
IRQ159 SD_A110 SD_A010
SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0
R563 8.2KR562 8.2K
9 8
U2D DM7407-SOIC14 (VCC5_SB)
SDD[0..7]10
SD_DREQ10
SD_IOW#10
SD_IORDY10 SD_DACK#10
SD_CS#110
VCC5VCC5
PCIRST# HD_RST#
4
R42 4.7K R44 33
C26 220p
R55 1K
3
IDE2 D2x20-1:21-WH-SBT
1
2 3 4 5 6 7 8 91110
12
13 14
1615
17 18 19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
4039
R56 10K
VCC5
SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
R46 470
C27 X_4700p
Micro-Star
Document Number
Last Revision Date:
Wednesday, May 30, 2001
2
SDD[8..15] 10
SD_DET 15 SD_A2 10 SD_CS#3 10
Title
MS-6534
Clock CY28323/4 & ATA100 IDE
Sheet of
4 29
1
Rev
0A
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
VID2
AE3
VID2#
D4#
C21
VID1
VID0
AE4
AE5
VID1#
VID0#
LINT1/NMI
LINT0/INTR
D3#
D2#
A25
A23
B22
VCCPS+ 23 VCCPS- 23
VID[0..4] 11,23
GTLREF3 GTLREF2 GTLREF1 GTLREF0
BPM5# BPM4# BPM3# BPM2# BPM1# BPM0#
REQ4# REQ3# REQ2# REQ1# REQ0#
TESTHI12 TESTHI11 TESTHI10
TESTHI9 TESTHI8 TESTHI7 TESTHI6 TESTHI5 TESTHI4 TESTHI3 TESTHI2 TESTHI1 TESTHI0
BCLK1# BCLK0#
RS2# RS1# RS0#
AP1# AP0# BR0#
COMP1 COMP0
DP3# DP2# DP1# DP0#
ADSTB1# ADSTB0# DSTBP3# DSTBP2# DSTBP1# DSTBP0# DSTBN3# DSTBN2# DSTBN1# DSTBN0#
D1#
D0#
B21
PGA-S478-F02
AA21 AA6 F20 F6
AB4 AA5 Y6 AC4 AB5 AC6
H3 J3 J4 K5 J1
AD25 A6 Y3 W4 U6 AB22 AA20 AC23 AC24 AC20 AC21 AA2 AD24
AF23 AF22
F4 G5 F1
V5 AC1 H6
P1 L24
L25 K26 K25 J26
R5 L5 W23 P23 J23 F21 W22 R22 K22 E22
E5 D1
GTLREF1 GTLREF2
BPM#5 BPM#4
BPM#1 BPM#0
HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0
R67 4.7K R68 4.7K
R69 4.7K
R70 4.7K
HRS#2 HRS#1 HRS#0
R72 49.9 R74 49.9
HREQ#[0..4] 7
VCCP
CPUCLK# 4 CPUCLK 4
HRS#[0..2] 7
HBR#0 7
* Short trace
HADSTB#1 7 HADSTB#0 7 HDSTBP#3 7 HDSTBP#2 7 HDSTBP#1 7 HDSTBP#0 7 HDSTBN#3 7 HDSTBN#2 7 HDSTBN#1 7 HDSTBN#0 7
NMI 9 INTR 9
GTLREF1
GTLREF2
2/3*Vccp
C29
C28
220p
220p
2/3*Vccp
C32
C31 C33
220p
220p
Every pin put one 220pF cap near it. Trace Width 15mils, Space 15mils. Keep the voltage dividers within 1.5 inches of the first GTLREF Pin
HINIT#
IERR#
ITP_TMS ITP_TDO
ITP_TCK
ITP_TDI
ITP_TRST#
R774 300
R775 62
R77 39 R80 75
R89 27
R93 150
R100 680
HA#[3..31]7
HA#8
HA#22
HA#25
HA#23
HA#26
HA#27
HA#28
HA#30
HA#29
D D
HDBI#[0..3]7
C C
B B
HDEFER#7
Trace : 10 mil width 10mil space
CPU_TMPA11
VTIN_GND11
PROCHOT#10
CPURST#7
HD#[0..63]7
HDBI#0 HDBI#1 HDBI#2 HDBI#3
IERR#
FERR#9
STPCLK#9
HINIT#9,15
HDBSY#7
HDRDY#7
HTRDY#7
HADS#7
HLOCK#7
HBNR#7
HIT#7
HITM#7
HBPRI#7
ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_TCK
THERMTRIP#
IGNNE#9
HSMI#9 A20M#9
SLP#9
R678
CPU_GD
CPU_GD10
CPURST# HD#63
HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54
U3A
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AD2
X_0
AD3 AE21 AF24 AF25
AD6
AD5 AB23 AB25 AA24
AA22 AA25
W25 W26
Y21 Y24 Y23
Y26 V24
RESERVED2 RESERVED3 RESERVED4 RESERVED5 RESERVED6
BSEL0 BSEL1
PWRGOOD RESET# D63#
D62# D61# D60# D59# D58# D57# D56# D55# D54#
V22
D53#
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
U21
V25
U23
U24
U26
T23
T22
D40#
T25
T26
R24
R25
P24
R21
HA#18
HA#24
A24#
A23#
D39#
D38#
N25
N26
M26
A22#
D37#
N23
HA#16
HA#21
HA#20
HA#19
HA#17
A21#
A20#
A19#
A18#
A17#
A16#
D36#
D35#
D34#
D33#
D32#
D31#
M24
P21
N22
M23
H25
HA#9
HA#5
HA#4
HA#14
HA#10
HA#15
HA#11
HA#13
HA#12
A15#
A14#
A13#
A12#
A11#
A10#
D30#
D29#
D28#
D27#
D26#
D25#
K23
J24
L22
M21
H24
G26
HA#3
HA#7
HA#6
AE25A5A4
A9#
A8#
A7#
A6#
A5#
A4#
A3#
DBR#
VCC_SENSE
Differential Host Data Strobes
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D14#
G23
D13#
E24
H22
D25
J21
D23
L21
D26
F26
E25
F24
F23
AD26
AC26
ITP_CLK1
VSS_SENSE
D12#
D11#
D10#
C26
H21
G22
B25
VID4
AE1
ITP_CLK0
D9#
D8#
D7#
C24
C23
B24
VID3
AE2
VID4#
D6#
D22
VID3#
D5#
C30
1u-0805
1u-0805
VCCP
VCCP
VCCP
VCCP
VCCP
R62
49.9
R63 100
R65
49.9
R66 100
HD#5
HD#8
HD#7
HD#53
HD#48
HD#51
HD#50
HD#49
HD#52
A A
HD#41
HD#47
HD#46
HD#39
HD#45
HD#42
HD#44
HD#43
HD#40
HD#32
HD#29
HD#34
HD#37
HD#35
HD#33
HD#38
HD#36
HD#26
HD#30
HD#28
HD#31
HD#27
HD#19
HD#23
HD#24
HD#25
HD#16
HD#22
HD#20
HD#18
HD#21
HD#17
CPU STRAPPING RESISTORS
BPM#0 BPM#4
BPM#5
8
R91 49.9 R92 49.9 R99 49.9 R102 49.9
VCCP
7
6
HD#9
HD#10
HD#14
HD#15
HD#11
HD#12
HD#13
ALL COMPONENTS CLOSE TO CPU
PROCHOT#BPM#1 CPU_GD HBR#0 CPURST# THERMTRIP#
5
HD#0
HD#2
HD#4
HD#3
HD#1
HD#6
R94 62 R96 300 R98 49.9 R101 49.9 R103 X_62
4
VCCP
Title
Micro-Star
Document Number
Last Revision Date:
3
Wednesday, May 30, 2001
2
MS-6534
INTEL mPGA478-B CPU1
Sheet of
Rev
0A
5 29
1
8
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
VCC
VSS
AD18
VCC
VSS
AD21
VCC
VSS
AD23
VCC
VSS
AD4
VCC
VSS
AD8
VCC
VSS
AE11
AA16
VCC
VSS
AE13
U3B
VCC
VCC
D D
D10 A11 A13 A15 A17 A19 A21 A24 A26
A3 A9
AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26
AA4
AA7
AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB21
C C
AB24
AB3
AB6
AB8 AC11 AC13 AC15 AC17 AC19
AC2 AC22 AC25
AC5
AC7
AC9
AD1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AD10
VSS
AD12
VSS
AD14
VCC
VSS
AD16
VCC
VSS
AA18
AE15
VCC
VSS
AA8
AE17
VCC
VSS
AB11
AE19
VCC
VSS
AB13
AE22
VCC
VSS
AB15
AE24
VCC
VSS
AB17
AE26
7
VCC
VSS
AB19
AE7
VCC
VSS
AB7
AE9
VCC
VSS
AB9
AF1
VCC
VSS
AC10
AF10
VCC
VSS
AC12
AF12
VCC
VSS
AC14
AF14
VCC
VSS
AC16
AF16
VCC
VSS
AC18
AF18
VCC
VSS
AC8
AF20
VCC
VSS
CPU VOLTAGE BLOCK
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF6
AF8
VSS
B10
B12
B14
B16
B18
B23
B20
B26B4B8
VCC
VSS
6
AE16
VCC
VSS
AE18
VCC
VSS
AE20
C11
VCC
VSS
AE6
C13
VCC
VSS
AE8
C15
AF11
VCC
VSS
C17C2C19
AF13
VCC
VSS
VCC
VSS
AF15
AF17
VCC
VSS
C22
AF19
AF2
AF21
AF5
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
C25C5C7C9D12
AF7
VCC
VSS
VCC
VSS
AF9
D14
B11
VCC
VSS
D16
5
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
VCC
VSS
VCC
VSS
4
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
VSS
H26H4J2
AE23
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
3
AD20
VCCA
VSSA
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
PGA-S478-F02
AD22
Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N6 N3 N24 N21 M5 M25 M22 M2 L4 L26 L23 L1 K6 K3 K24
VCC_VID 23
C522 X_10u-1206
C523 X_10u-1206
2
C34 22u-1206
L1 4.7u_1206 L2 4.7u_1206
C35 22u-1206
1
VCCP
B B
CPU DECOUPLING CAPACITORS
VCCP VCCP VCCPVCCP
CB14 10u-1206
CB17 10u-1206
CB19 10u-1206 CB21 10u-1206 CB23 10u-1206
A A
CB24 10u-1206
CB25 10u-1206 CB26 10u-1206 CB27 10u-1206 CB28 10u-1206 CB56 10u-1206 CB57 10u-1206 CB58 10u-1206 CB66 10u-1206 CB86 10u-1206
CB87 10u-1206 CB95 10u-1206
CB109 10u-1206
CB111 10u-1206 CB112 10u-1206 CB113 10u-1206 CB114 10u-1206
CB115 10u-1206 CB116 10u-1206 CB117 10u-1206 CB118 10u-1206 CB121 10u-1206 CB122 10u-1206 CB123 10u-1206 CB124 10u-1206
PLACE CAPS WITHIN CPU CAVITY
8
7
6
VCCP
5
CB437 10u-1206
VCCP
CB110
VCCP
X_10u-1206 CB96 X_10u-1206 CB435 X_10u-1206 CB436 X_10u-1206 CB15 X_10u-1206 CB16 X_10u-1206 CB18 X_10u-1206
+
CT48 X_100u
+
CT49 X_100u
BACK SIDE
4
3
CPU DECOUPLING CAPACITORS
VCCP
+
CT46 100u
+
CT47 100u
PLACE CAPS WITHIN CPU CAVITY SOLDER
Title
Micro-Star
Document Number
Last Revision Date:
Wednesday, May 30, 2001
2
MS-6534
INTEL mPGA478-B CPU2
Sheet of
1
Rev
0A
6 29
5
HA#[3..31]5
D D
HBNR#5
HBPRI#5
HLOCK#5
HADS#5
HREQ#[0..4]5
C C
HDEFER#5
HRS#[0..2]5
B B
HL[0..10]9
A A
HTRDY#5
HDBSY#5
HDRDY#5
HADSTB#05 HADSTB#15
HDSTBN#05 HDSTBP#05 HDSTBN#15 HDSTBP#15 HDSTBN#25 HDSTBP#25 HDSTBN#35 HDSTBP#35
HDBI#[0..3]5
MCHCLK4
MCHCLK#4
HL[0..10]
HL_STB9
HL_STB#9
5
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HBR#05
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HIT#5
HITM#5
HRS#0 HRS#1 HRS#2
HDBI#0 HDBI#1 HDBI#2 HDBI#3
R111 24.9 R112 24.9
HL0 HL1 HL2 HL3 HL4 HL5
VCCP
AD4 AD3 AE6
AE7 AE11 AD11 AC15 AC16
AD5
AG4
AH9 AD15
AC2 AC13
M26
M25
AA9
AB8 AB18 AB20 AC19 AD18 AD20 AE19 AE21 AF18 AF20
AG19 AG21 AG23
AJ19 AJ21 AJ23
T4 T5 T3
U3 R3 P7 R2 P4 R6 P5 P3 N2 N7 N3
K4 M4 M3
L3 L5
K3
J2
M5
J3
L2 H4 N5
G2
M6
L7 V7
W3
Y7
W5
V3 U6
T7
R7 U5 U2
Y5 Y3 Y4
U7
W2 W7 W6
V5 V4
R5 N6
J8 K8
P25 P24 N27 P23
N25 N24
M8
U8
U4A
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
BR0# BNR# BPRI# HLOCK#
ADS# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4#
HIT# HITM# DEFER#
HTRDY# RS0# RS1# RS2#
DBSY# DRDY#
HAD_STB0# HAD_STB1#
HD_STBN0# HD_STBP0# HD_STBN1# HD_STBP1# HD_STBN2# HD_STBP2# HD_STBN3# HD_STBP3#
DBI0# DBI1# DBI2# DBI3#
BCLK BCLK#
H_RCOMP0 H_RCOMP1
HI0 HI1 HI2 HI3 HI4 HI5
HI_STB HI_STB#
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
INT-82845
HOST
HUB LINK
POWER
4
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
66IN
RSTIN#
CPURST#
H_VREF0 H_VREF1 H_VREF2 H_VREF3 H_VREF4
H_SWNG0 H_SWNG1
HI10
HI_REF
HL_RCOMP
VCC1_8 VCC1_8 VCC1_8 VCC1_8 VCC1_8
RSVD0 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9
NC0 NC1
4
3
HD#0
AA2
HD#1
AB5
HD#2
AA5
HD#3
AB3
HD#4
AB4
HD#5
AC5
HD#6
AA3
HD#7
AA6
HD#8
AE3
HD#9
AB7
HD#10
AD7
HD#11
AC7
HD#12
AC6
HD#13
AC3
HD#14
AC8
HD#15
AE2
HD#16
AG5
HD#17
AG2
HD#18
AE8
HD#19
AF6
HD#20
AH2
HD#21
AF3
HD#22
AG3
HD#23
AE5
HD#24
AH7
HD#25
AH3
HD#26
AF4
HD#27
AG8
HD#28
AG7
HD#29
AG6
HD#30
AF8
HD#31
AH5
HD#32
AC11
HD#33
AC12
HD#34
AE9
HD#35
AC9
HD#36
AE10
HD#37
AD9
HD#38
AG9
HD#39
AC10
HD#40
AE12
HD#41
AF10
HD#42
AG11
HD#43
AG10
HD#44
AH11
HD#45
AG12
HD#46
AE13
HD#47
AF12
HD#48
AG13
HD#49
AH13
HD#50
AC14
HD#51
AF14
HD#52
AG14
HD#53
AE14
HD#54
AG15
HD#55
AG16
HD#56
AG17
HD#57
AH15
HD#58
AC17
HD#59
AF16
HD#60
AE15
HD#61
AH17
HD#62
AD17
HD#63
AE16 P22
J27 AE17
HVREF
M7 R8 Y8 AB11 AB17
HSWNG
AA7 AD13
HL6
L28
HI6 HI7 HI8 HI9
L27 M27 N28 M24
P26 P27 L25
L29 M22 N23 N26
B19 C5 C8 C23 C26 D12 F26 H27 K23 K25
AD26 AD27
HL7 HL8 HL9 HL10
HUB_MREF
R113 40.2
VCC1_8
HD#[0..63] 5
MCH_66 4 PCIRST#1 4,11,12,15 CPURST# 5
HL[0..10]
VCC1_8
VCC_AGP
VCC_DIMM
3
VTT1 VTT2
VTT_GND1 VTT_GND2
W22
W29 AA22 AA26 AB21 AC29 AD21 AD23 AE26 AF23
AG29
AJ25
G29
AD12 AD14 AD16 AD19 AD22
AE1
AE4 AE18 AE20 AE29
AF5 AF7
AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF25
AG1 AG18 AG20 AG22
AH19 AH21 AH23
AJ11
AJ13
AJ15
AJ17
AJ27
R22 R29 U22 U26
N14 N16 P13 P15 P17 R14 R16 T15 U14 U16 T13 T17
A5
A9 A13 A17 A21 A25
C1 C29
D7 D11 D15 D19 D23 D25
F6 F10 F14 F18 F22
G1 G4
H8 H10 H12 H14 H16 H18 H20 H22 H24
J5 J7
K6 K22 K24 K26
L23
U13 U17
AJ3 AJ5 AJ7 AJ9
U4C
VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
Brookdale_MCH
POWER
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
2
A3 A7 A11 A15 A19 A23 A27 D5 D9 D13 D17 D21 E1 E4 E26 E29 F8 F12 F16 F20 F24 G26 H9 H11 H13 H15 H17 H19 H21 J1 J4 J6 J22 J26 J29 K5 K7 K27 L1 L4 L6 L8 L22 L24 L26 M23 N1 N4 N8 N13 N15 N17 N22 N29 P6 P8 P14 P16 R1 R4 R13 R15 R17 R26 T6 T8 T14 T16 T22 U1 U4 U15 U29 V6 V8 V22 W1 W4 W8 W26 Y6 Y22 AA1 AA4 AA8 AA29 AB6 AB9 AB10 AB12 AB13 AB14 AB15 AB16 AB19 AB22 AC1 AC4 AC18 AC20 AC21 AC23 AC26 AD6 AD8 AD10
2
MCH REFERENCE BLOCK
VTT1
VTT_GND1
VTT2
VTT_GND2
Place 1 Cap. as Close as possible to every pin of MCH Trace width use 15 mils and 15mils space
HVREF
C43
0.01u
Place 1 Cap. as Close as possible to every pin of MCH
Trace width use 15 mils and 15mils space
Place 0.01uF Cap. as Close as possible to MCH Trace width use 15 mils and 15mils space
C36
CB125
22u-1206
0.1u
C525
CB126
X_10u-1206
0.1u
HSWNG
C39
0.1u
C45
C44
0.01u
0.01u
HUB_MREF
C50 R110
0.01u
MCH Trace Decoupling Capacitors
VCCP VCCP VCC1_8
CB127 X_0.1u CB130 X_0.1u CB133 X_0.1u
ADDRESS
Title
Micro-Star
Document Number
Last Revision Date:
Wednesday, May 30, 2001
1
L3 4.7u_1206 C524
X_10u-1206
L4 4.7u_1206 C37
22u-1206
C40
C41
0.01u
C47
C46
0.01u
0.01u
C51
C52
0.1u
0.1u
CB128 X_0.1u CB131 X_0.1u CB134 X_0.1u CB136 X_0.1u
DATA
MS-6534
Brookdale MCH1
1
VCCP
R105 301
R106
1500.01u
VCCP
R107
49.9
R108
100
VCC1_8
R109 150
150
MCH & ICH2
Sheet of
7 29
VCC_AGP
VCC_AGP
C48
0.1u
CB129
0.1u CB132
0.1u
Rev
0A
5
G28
AA28 AB25 AB27 AA27 AB26
AB23 AA24 AA25 AB24 AC25 AC24 AC22 AD24
AA23
F27 E27 B28 C27 D26 E25 B25 D24 F23 B23 C22 C21 D20 C19 C18 C17 B13 E13 C12 B11 E11 C10
F9
E28 C28 D27 B27 F25 C25 E24 C24 E23 D22 E22 B21 C20 D18 E18 E14 C13 E12 F11 C11 E10 D10
G3
R27 R28 T25 R25 T26 T27 U27 U28 V26 V27 T23 U23 T24 U24 U25 V24 Y27 Y26
Y23
V25 V23 Y25
C9 E8 E7 C7 D6 B5 D4 C3 B2
B9 E9 D8 B7 E6 C6 C4 B3 D3
H3
U4B
SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63
RD_CLKIN RD_CLKO
G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31
G_C/BE0# G_C/BE1# G_C/BE2# G_C/BE3#
INT-82845
SDRAM
AGP
Tri-Stated during RSTIN# assertion
MD[0..63]16
D D
C C
Trace Length=50mil
B B
A A
GAD[0..31]17
GC_BE#[0..3]17
5
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC_BE#0 GC_BE#1 GC_BE#2 GC_BE#3
Data line SDRAM ECC
Bank Select
System memory clock
4
SMA10 SMA11 SMA12
SCS0# SCS1# SCS2# SCS3# SCS4# SCS5# SCS6# SCS7# SCS8#
SCS9# SCS10# SCS11#
SCKE0 SCKE1 SCKE2 SCKE3 SCKE4 SCKE5
SCK10
SCK11
SRAS# SCAS#
SWE#
SM_RCOMP
SD_REF0 SD_REF1
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ# G_GNT#
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
WBF#
AGPREF
G_RCOMP
TESTIN#
4
SMA0 SMA1 SMA2 SMA3 SMA4 SMA5 SMA6 SMA7 SMA8 SMA9
SCB0 SCB1 SCB2 SCB3 SCB4 SCB5 SCB6 SCB7
SBS0 SBS1
SCK0 SCK1 SCK2 SCK3 SCK4 SCK5 SCK6 SCK7 SCK8 SCK9
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
RBF#
G22 E21 F21 G21 E20 G20 E19 F19 G19 G18 E17 E15 G12
H23 J23 G7 G8 J24 G24 H7 F7 G25 H25 G6 H6
C16 E16 C15 D14 B17 D16 B15 C14
G9 F4 G10 F5 G11 E5
F17 G17
F13 G13 E2 C2 G15 G14 F3 E3 G16 F15 H5 G5
G23 J25 G27
J28 J9
J21 Y24
W27 W24 W28 W23 W25
AG24 AH25
AH28 AH27 AG28 AG27 AE28 AE27 AE24 AE25
AF27 AF26
AG25 AF24 AG26
R24 R23 AC27 AC28
AF22 AE22 AE23
AA21 AD25 H26
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12
MCS#0 MCS#1 MCS#2 MCS#3 MCS#4 MCS#5 MCS#6 MCS#7
MDP0 MDP1 MDP2 MDP3 MDP4 MDP5 MDP6 MDP7
MCKE0 MCKE1 MCKE2 MCKE3
MCLK0 MCLK1 MCLK2 MCLK3 MCLK4 MCLK5 MCLK6 MCLK7
R131 20.5
SM_REF
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
CB187 X_0.1u
R133 40.2 R134 X_4.7K
MA[0..12] 16
MCS#[0..7] 16
MDP[0..7] 16
MCKE[0..3] 16
MBS0 16 MBS1 16
MRAS# 16 MCAS# 16 MWE# 16
GFRAME# 17 GIRDY# 17 GTRDY# 17 GDEVSEL# 17 GSTOP# 17 GPAR 17
GREQ# 17 GGNT# 17
SBA[0..7] 17
SB_STB 17 SB_STB# 17
ST[0..2] 17
GAD_STB0 17 GAD_STB#0 17 GAD_STB1 17 GAD_STB#1 17
PIPE# 17 RBF# 17 WBF# 17
AGPREF 17
VCC1_8
3
2
1
MCH REFERENCE VOLTAGE
VCC_DIMM
R116
SM_REF
C54
0.1u
C55
1u-0805
49.9
R119
49.9
MCH MEMORY CLOCK RC CIRCUITS
CN14
MCLK[0..11]16
MCLK1 MCLK0 MCLK5 MCLK4 MCLK6 MCLK2 MCLK7 MCLK3
X_33P 7 5 3 1 7 5 3
8 6 4 2 8
CN15
6 4
X_33P1
2
MCH DECOUPLING CAPACITOR
VCC1_8 VCC_DIMMVCCP VCC_AGP
X_0.1uC480
CB431 X_1u-0805 CB433 X_1u-0805
CB138 1u-0805 CB143
0.1u
Micro-Star
Document Number
Last Revision Date:
Wednesday, May 30, 2001
CB139
1u-0805
CB144
0.1u
CB149
0.1u
CB154
0.1u
CB159
0.1u
Title
VCC_DIMM VCC1_8VCC_DIMM VCC_AGPVCC_DIMM VCC5
C609 X_0.1u
0.1uC69
C70 1u-0805
MS-6534
Brookdale MCH 2
Sheet of
1
CB140 1u-0805 CB145
0.1u CB150
0.1u CB155
0.1u CB160
0.1u CB428
0.1u CB429
0.1u
X_0.1uC476
VCC1_8VCC3
8 29
AGPREF
Rev
0A
CB137 1u-0805 CB142
0.1u CB147
0.1u CB152
0.1u CB157
0.01u CB434 10u-1206 CB438 X_10u-1206
X_0.1uC485 X_0.1uC486
BACK
VCC_DIMMVCCP
CB135
VCC_AGP
3
X_0.1u
CB430 X_1u-0805 CB432 X_1u-0805 CB439 X_1u-0805 CB440 X_1u-0805 CB442 X_1u-0805
2
ICH2 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
VCC1_8
D10D2E5
K19
L19P5V9
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
VCC1.8
GND1
GND2
GND3
GND4
GND5
A1A2A10B1B2B3B9
E14
GND6
R750
X_10K
AA4 AB4
AB3 AA5 AB5
AA6
AA8 AB8
AB9
W10
AA10
AA3 AB6
AA9 AB7
AA7
W11
AA15
W5 W4
W6 W3
W9
Y10
W8 W1
W2 W7 Y15
U5A
AD0 AD1
Y4
AD2 AD3 AD4
Y5
AD5 AD6 AD7 AD8
Y3
AD9 AD10 AD11
Y6
AD12
Y2
AD13 AD14
Y1
AD15
V2
AD16 AD17
V1
AD18 AD19
U4
AD20 AD21
U3
AD22
Y9
AD23
U2
AD24 AD25
U1
AD26 AD27
T4
AD28 AD29
T3
AD30 AD31
CBE#0 CBE#1
Y8
CBE#2 CBE#3
DEVSEL#
V3
FRAME# IRDY#
V4
TRDY# STOP# PAR PLOCK# SERR#
Y7
PERR# PME#
M3
GPIO0/REQA#
L2
GPIO16/GNTA# PCICLK PCIRST#
F4
NC12
G4
NC13
H3
NC14
H4
NC15
J1
NC16
K4
EE_CS
K3
EE_DIN
J4
EE_DOUT
J3
EE_SHCLK
VCC1.8
AD[0..31]12,18
C_BE#[0..3]12,18
DEVSEL#12,18
FRAME#12,18
PLOCK#18
ICH_PCLK4
PCIRST#4
CS15
DIN15
DOUT15
SHCLK15
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C_BE#0 C_BE#1 C_BE#2 C_BE#3
IRDY#12,18
TRDY#12,18
STOP#12,18
PAR12,18
SERR#18 PERR#18
PME#12,17,18
REQA# GNTA#
VCC3
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18R5T5U5V5V6V7V8V14
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
B10C2C3C4C9D5D6D7D8D9E6E7E8E9J9
GND19
VCC3
VCC3
GND20
GND21
VCC3
VCC3
GND22
GND23
J10
VCC3
GND24
J11
J12
VCC1_8SB
V15
V16H5J5
VCCSUS1_8
VCCSUS1_8
GND25
GND26
GND27
J13
J14K9K10
A22
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
GND28
GND29
GND30
GND31
K11
K12
K13
B21
B22C1D1D3E1E2E3
GND68
GND69
GND70
GND71
GND32
GND33
GND58
GND59
K14J2K1
AA1
AA2
E4
NC5
NC6
NC8
NC9
CPUSLP#
NC10
NC11
NC17
FERR#
IGNNE#
STPCLK#
A20GATE
HL_STB HL_STB# HLCOMP
HUBREF
PIRQA#
PIRQB#
PIRQC#
PIRQD#
APICCLK
APICD0 APICD1
SERIRQ
REQ0# REQ1# REQ2# REQ3#
LAN_RSTSYNC
GND62
GND63
GND64
AB1
AB2
AB21
REQ4#
GNT0# GNT1# GNT2# GNT3# GNT4#
LAN_CLK
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2
GND67
GND65
GND66
INT-82801BA-VB4
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
GND60
GND61
AA21
AA22
A20M#
INIT#
INTR
NMI
SMI#
RCIN#
HL10 HL11
IRQ14 IRQ15
A20M#
D11 A12
FERR#
R22 A11 C12 C11 B11
SMI#
B12 C10
KB_RST#
B13
A20GATE#
C13
HL0
A4
HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9
B5 A5 B6 B7 A8 B8 A9 C8 C6 C7 C5 A6 A7 A3
B4 P1
P2 P3 N4
F21 C16 N20 P22 N19 N21
R2 R3 T1 AB10 P4 L3
M2 M1 R4 T2 R1 L4
G3 H2 G2 G1 H1 F3 F2 F1 A21 AB22
HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10
HLCOMP HUB_IREF
APIC_D0 APIC_D1 SERIRQ
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5
PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4
R696 X_0
A20M# 5 SLP# 5 FERR# 5 IGNNE# 5 HINIT# 5,15 INTR 5 NMI 5
STPCLK# 5 KB_RST# 11 A20GATE# 11
HL[0..10] 7
This resistor less than 0.5" from ICH use 15 mils trace
HL_STB 7 HL_STB# 7
R140 40.2
INTA# 17,18 INTB# 17,18 INTC# 18 INTD# 18
IRQ14 4 IRQ15 4
SERIRQ 11
LAN_CLK 15 RST 15 RXD0 15 RXD1 15 RXD2 15 TXD0 15 TXD1 15 TXD2 15
VCC1_8
PREQ#[0..5] 12,18
PGNT#[0..4] 12,18
6CH_CTRL 12,21
ICH2 SMI# SIGNAL
SMI#
R139 33
100pC71
APIC_D0
R142 10K
APIC_D1
R143 10K
ICH2 STRAPPING RESISTORS
FERR#
R141 62
SERIRQ
R144 8.2K
KB_RST#
R145 10K
A20GATE#
R146 10K
REQA#
R147 2.7K
GNTA#
HLCOMP
R743 X_2.7K
R152 X_2.7K
R749 X_40.2
Reserved GPI
Top-Swap Override
Enhanced Hub Interface Mode
ICH2 REFERENCE VOLTAGE
HUB_IREF
C74
C73 R154
0.1u
0.01u
HSMI# 5
VCCP
VCC3
VCC3
VCC5
VCC1_8
C75
0.1u
R153 150
150
VCC3
CB188
0.1u
CB189
CB190
CB191
0.1u
0.1u
Place one 0.1U/0.01U pair in each corner and 2 on opposite sides close to ICH2 if it fit
0.1u
CB192
0.1u
ICH2 DECOUPLING CAPACITORS
VCC1_8SBVCC1_8
CB196 CB201
CB197
0.01u
Distribute near the 1.8V power pin of the ICH2
CB199
0.1u0.01u
CB200
0.1u
0.1u
Distribute near the VCC1_8SB Power pin of the ICH2
Place Cap. as Close as possible to ICH2 Trace width use 15 mils and 15mils space
Title
Micro-Star
Document Number
Last Revision Date:
Wednesday, May 30, 2001
MS-6534
Brookdale ICH2 PCI
Sheet of
9 29
Rev
0A
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